Jamie Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
mb/google/hatch: update DLL values for Kindred
Update emmc DLL values for Kindred
BUG=b:131401116 BRANCH=none TEST=Boot to OS 100 times on Kindred EVT
Change-Id: Ibd840b31bb0e5a742495758de55b532e6c3946aa Signed-off-by: Jamie Chen jamie.chen@intel.com --- M src/mainboard/google/hatch/variants/kindred/overridetree.cb 1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/36076/1
diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index 272cbfb..9d33fa9 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -61,7 +61,7 @@ # Refer to EDS-Vol2-14.3.8. # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78. # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x0F10" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x911"
# EMMC TX DATA Delay 2 # Refer to EDS-Vol2-14.3.9. @@ -69,7 +69,7 @@ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79. # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2F2D2D" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C262828"
# EMMC RX CMD/DATA Delay 1 # Refer to EDS-Vol2-14.3.10. @@ -77,7 +77,7 @@ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119. # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C121936" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C16583b"
# EMMC RX CMD/DATA Delay 2 # Refer to EDS-Vol2-14.3.12. @@ -88,13 +88,13 @@ # 11: Reserved # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39. # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1182D" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1001D"
# EMMC Rx Strobe Delay # Refer to EDS-Vol2-14.3.11. # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39. # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. - register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1414" + register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
device domain 0 on device pci 15.0 on
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG@13 PS1, Line 13: TEST Was this test run on all the different emmc parts?
Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG@13 PS1, Line 13: TEST
Was this test run on all the different emmc parts?
No. I only verified on sandisk 64G device.
I just requested Quanta to help verify on each eMMC SKU devices on issue tracker.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG@9 PS1, Line 9: Update emmc DLL values for Kindred What problems do the new values fix? Where did you get them from?
Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1:
(1 comment)
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG@9 PS1, Line 9: Update emmc DLL values for Kindred
What problems do the new values fix? Where did you get them from?
Original values were for fixing chrome issue 136784418 and unblocked kindred EVT build. It works fine on EVT, but the new one has better margin. We got this new values by collect tuning data from kindred EVT boards with all difference eMMC part. It can cover hynix 32G, hynix 64G, Sandisk 32G and Sandisk 64G on kindred.
Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG@13 PS1, Line 13: TEST
No. I only verified on sandisk 64G device. […]
ODM has finished the others eMMC verification.
Test results as below : 100 cycles warmboot stress test Hynix_32GB - Pass Hynix_64GB - Pass Sandisk_32GB - Pass Sandisk_64GB - Pass
100 cycles cold boot stress test Hynix_32GB - Pass Hynix_64GB - Pass Sandisk_32GB - Pass Sandisk_64GB - Pass
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1: Code-Review+1
Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36076/1//COMMIT_MSG@13 PS1, Line 13: TEST
ODM has finished the others eMMC verification. […]
Ack
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36076 )
Change subject: mb/google/hatch: update DLL values for Kindred ......................................................................
mb/google/hatch: update DLL values for Kindred
Update emmc DLL values for Kindred
BUG=b:131401116 BRANCH=none TEST=Boot to OS 100 times on Kindred EVT
Change-Id: Ibd840b31bb0e5a742495758de55b532e6c3946aa Signed-off-by: Jamie Chen jamie.chen@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36076 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Shelley Chen shchen@google.com --- M src/mainboard/google/hatch/variants/kindred/overridetree.cb 1 file changed, 5 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Shelley Chen: Looks good to me, approved Tim Wawrzynczak: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index 272cbfb..9d33fa9 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -61,7 +61,7 @@ # Refer to EDS-Vol2-14.3.8. # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78. # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x0F10" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x911"
# EMMC TX DATA Delay 2 # Refer to EDS-Vol2-14.3.9. @@ -69,7 +69,7 @@ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79. # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2F2D2D" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C262828"
# EMMC RX CMD/DATA Delay 1 # Refer to EDS-Vol2-14.3.10. @@ -77,7 +77,7 @@ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119. # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C121936" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C16583b"
# EMMC RX CMD/DATA Delay 2 # Refer to EDS-Vol2-14.3.12. @@ -88,13 +88,13 @@ # 11: Reserved # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39. # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1182D" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1001D"
# EMMC Rx Strobe Delay # Refer to EDS-Vol2-14.3.11. # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39. # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. - register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1414" + register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
device domain 0 on device pci 15.0 on