coreboot-gerrit November 2019

coreboot-gerrit@coreboot.org

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2418 discussions

Change in coreboot[master]: drivers/intel/fsp2_0: Hide CONFIG_FSP_CAR
by Nico Huber (Code Review) 05 Nov '19

05 Nov '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36169 ) Change subject: drivers/intel/fsp2_0: Hide CONFIG_FSP_CAR ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36169 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida32e9c4f5839aef4d4deb7a1c7fabe6335a5d2a Gerrit-Change-Number: 36169 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner Gerrit-Comment-Date: Tue, 05 Nov 2019 09:48:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Don't link CAR teardown in romstage
by Arthur Heymans (Code Review) 05 Nov '19

05 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36166 ) Change subject: soc/intel/common: Don't link CAR teardown in romstage ...................................................................... soc/intel/common: Don't link CAR teardown in romstage This is done in postcar stage. Change-Id: I0ff1624c20b9649ca0a8fa31c342bf99530076d7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/common/block/cpu/Makefile.inc 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/36166/1 diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc index a6c4f37..857bf0f 100644 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ b/src/soc/intel/common/block/cpu/Makefile.inc @@ -3,7 +3,6 @@ bootblock-$(CONFIG_FSP_CAR)+= car/cache_as_ram_fsp.S bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S -- To view, visit https://review.coreboot.org/c/coreboot/+/36166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ff1624c20b9649ca0a8fa31c342bf99530076d7 Gerrit-Change-Number: 36166 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tigerlake: Do initial SoC commit till ramstage
by Subrata Banik (Code Review) 05 Nov '19

05 Nov '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 ) Change subject: soc/intel/tigerlake: Do initial SoC commit till ramstage ...................................................................... Patch Set 12: > Patch Set 12: Code-Review-1 > > (8 comments) > > > Patch Set 12: > > > > > Patch Set 12: > > > > > > I have divided this CL into possible logic groups as https://review.coreboot.org/q/topic:%22TGL_UPSTREAM%22+(status:open%20OR%20… > > > > > > Kindly help to review. > > > > > > Also this CL is based on all clean up been done so far with > > > > > > https://review.coreboot.org/q/topic:%22ICL_CLEAN_UP_FOR_TGL_UPSTREAM%22+(st… > > > > > > Thanks to all reviewer so far helping to clean ICL code in order to create soc/intel/tigerlake copy CL as mentioned above. > > > > HI Arthur/Philipp, > > > > Will you please consider your -2 with this new sets of split CL in place and we have icl base clean up cl also merged ? This will help us to land TGL SOC copy code ? > > This still has received no real review. It references many docs that I cannot find so how do you expect proper review to happen? I agree with you Arthur that document is accessible with some specific account only as its still not releases externally. those document i have mentioned is just a placeholder with actual TGL document but so far all codes are ICL code base only as TGL specific codes are yet to add -- To view, visit https://review.coreboot.org/c/coreboot/+/36087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id95e2fa9b7a7c6b3b9233d2c438b25a6c4904bbb Gerrit-Change-Number: 36087 Gerrit-PatchSet: 12 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 05 Nov 2019 08:50:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake/acpi: Copy acpi directory from icelake
by Arthur Heymans (Code Review) 05 Nov '19

05 Nov '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36553 ) Change subject: soc/intel/tigerlake/acpi: Copy acpi directory from icelake ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… File src/soc/intel/tigerlake/acpi/gpio.asl: https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… PS1, Line 85: LAnd (LGreaterEqual (Arg0, GPP_G0), LLessEqual (Arg0, GPP_A23) > @Arthur, as mentioned earlier, we can take a CL separately where we migrate all ASL syntax to latest because i'm afraid there might be more instance and this is not just TGL changes. Do you agree ? i can raise a cb,org ticket to track this activity ? It's much harder to review all this code in the old syntax. You don't have to fix all other instances of old ACPI syntax, but for good review to happen on TGL ACPI code it helps greatly. -- To view, visit https://review.coreboot.org/c/coreboot/+/36553 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If967cb5904f543ce21eb6e89421df0e5673d2238 Gerrit-Change-Number: 36553 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Nov 2019 08:46:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Do initial SoC commit till ramstage
by Arthur Heymans (Code Review) 05 Nov '19

05 Nov '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 ) Change subject: soc/intel/tigerlake: Do initial SoC commit till ramstage ...................................................................... Patch Set 12: Code-Review-1 (8 comments) > Patch Set 12: > > > Patch Set 12: > > > > I have divided this CL into possible logic groups as https://review.coreboot.org/q/topic:%22TGL_UPSTREAM%22+(status:open%20OR%20… > > > > Kindly help to review. > > > > Also this CL is based on all clean up been done so far with > > > > https://review.coreboot.org/q/topic:%22ICL_CLEAN_UP_FOR_TGL_UPSTREAM%22+(st… > > > > Thanks to all reviewer so far helping to clean ICL code in order to create soc/intel/tigerlake copy CL as mentioned above. > > HI Arthur/Philipp, > > Will you please consider your -2 with this new sets of split CL in place and we have icl base clean up cl also merged ? This will help us to land TGL SOC copy code ? This still has received no real review. It references many docs that I cannot find so how do you expect proper review to happen? https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/K… File src/soc/intel/tigerlake/Kconfig: https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/K… PS12, Line 81: depends on FSP_USES_CB_STACK why? https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/M… File src/soc/intel/tigerlake/Makefile.inc: https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/M… PS12, Line 57: postcar-y += memmap.c only needed in romstage anymore in master. Needs a rebase. https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/m… File src/soc/intel/tigerlake/memmap.c: https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/m… PS12, Line 187: /* Fill up memory layout information */ : void fill_soc_memmap_ebda(struct ebda_config *cfg) : { : size_t chipset_mem_size; : : cfg->tolum_base = calculate_dram_base(&chipset_mem_size); : cfg->reserved_mem_size = chipset_mem_size; : } Please don't use this. https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/m… PS12, Line 195: : void cbmem_top_init(void) : { : /* Fill up EBDA area */ : fill_ebda_area(); : } remove. https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/m… PS12, Line 229: void *cbmem_top(void) rebase on master please. https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/p… File src/soc/intel/tigerlake/pmutil.c: https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/p… PS12, Line 140: void cast to uint8_t * https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/s… File src/soc/intel/tigerlake/smmrelocate.c: https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/s… PS12, Line 1: /* Is this file not copied 1 on 1 many times in the tree? Make it common? https://review.coreboot.org/c/coreboot/+/36087/12/src/soc/intel/tigerlake/s… PS12, Line 191: tseg_base Check if aligned to tseg_size. -- To view, visit https://review.coreboot.org/c/coreboot/+/36087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id95e2fa9b7a7c6b3b9233d2c438b25a6c4904bbb Gerrit-Change-Number: 36087 Gerrit-PatchSet: 12 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 05 Nov 2019 08:43:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake/acpi: Copy acpi directory from icelake
by Subrata Banik (Code Review) 05 Nov '19

05 Nov '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36553 ) Change subject: soc/intel/tigerlake/acpi: Copy acpi directory from icelake ...................................................................... Patch Set 1: (2 comments) https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… File src/soc/intel/tigerlake/acpi/gpio.asl: https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… PS1, Line 85: LAnd (LGreaterEqual (Arg0, GPP_G0), LLessEqual (Arg0, GPP_A23) > Please use the new ASL syntax. […] @Arthur, as mentioned earlier, we can take a CL separately where we migrate all ASL syntax to latest because i'm afraid there might be more instance and this is not just TGL changes. Do you agree ? i can raise a cb,org ticket to track this activity ? https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… PS1, Line 87: Store (PID_GPIOCOM0, Local0) > Local0 = PID_GPIOCOM0 same as above ? -- To view, visit https://review.coreboot.org/c/coreboot/+/36553 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If967cb5904f543ce21eb6e89421df0e5673d2238 Gerrit-Change-Number: 36553 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Nov 2019 08:29:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake/acpi: Copy acpi directory from icelake
by Arthur Heymans (Code Review) 05 Nov '19

05 Nov '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36553 ) Change subject: soc/intel/tigerlake/acpi: Copy acpi directory from icelake ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… File src/soc/intel/tigerlake/acpi/gpio.asl: https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… PS1, Line 40: ^ This makes this hard to read, I'd have to look up the scope where this is defined and find this object in that scope. Please reference the path's absolute. https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… PS1, Line 85: LAnd (LGreaterEqual (Arg0, GPP_G0), LLessEqual (Arg0, GPP_A23) Please use the new ASL syntax. Arg0 >= GPP_G0 && Arg0 <= GPP_A23 https://review.coreboot.org/c/coreboot/+/36553/1/src/soc/intel/tigerlake/ac… PS1, Line 87: Store (PID_GPIOCOM0, Local0) Local0 = PID_GPIOCOM0 -- To view, visit https://review.coreboot.org/c/coreboot/+/36553 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If967cb5904f543ce21eb6e89421df0e5673d2238 Gerrit-Change-Number: 36553 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Nov 2019 08:25:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Include Tigerlake device IDs
by Subrata Banik (Code Review) 05 Nov '19

05 Nov '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36225 ) Change subject: soc/intel/common: Include Tigerlake device IDs ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36225 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19047354718bdf510dffee4659d885f1313a751b Gerrit-Change-Number: 36225 Gerrit-PatchSet: 9 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 05 Nov 2019 08:24:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Include Tigerlake device IDs
by Patrick Rudolph (Code Review) 05 Nov '19

05 Nov '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36225 ) Change subject: soc/intel/common: Include Tigerlake device IDs ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36225 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19047354718bdf510dffee4659d885f1313a751b Gerrit-Change-Number: 36225 Gerrit-PatchSet: 9 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 05 Nov 2019 07:55:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template
by Patrick Rudolph (Code Review) 05 Nov '19

05 Nov '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36243 ) Change subject: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template ...................................................................... Patch Set 4: > Patch Set 4: > > As the maintainer for github.com/IntelFSP, I would prefer that "early" UPD headers like this that solely exist to enable compilation of coreboot for unreleased SOCs be kept here in vendorcode. After the SOC is released and FSP binaries are posted at github.com/IntelFSP, I would prefer that the copy of the UPD headers here in vendorcode is deleted and the official headers provided at github.com/IntelFSP are used. > > The reason is github.com/IntelFSP should only contain finished work that is ready for production use. The early headers won't meet that standard of quality. I fully agree. -- To view, visit https://review.coreboot.org/c/coreboot/+/36243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1d064ea60e3b7c2d1114771b07cf7ec7f0e2b37 Gerrit-Change-Number: 36243 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Tue, 05 Nov 2019 07:01:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2019