coreboot-gerrit November 2019

coreboot-gerrit@coreboot.org

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2418 discussions

Change in coreboot[master]: sb/broadcom/bcm5785: Remove unused 'include <pc80/isa-dma.h>
by HAOUAS Elyes (Code Review) 23 Nov '19

23 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36383 ) Change subject: sb/broadcom/bcm5785: Remove unused 'include <pc80/isa-dma.h> ...................................................................... sb/broadcom/bcm5785: Remove unused 'include <pc80/isa-dma.h> Change-Id: Ia7d48458f40a26a3d135e981ed19019d376523d0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/broadcom/bcm5785/sb_pci_main.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/36383/1 diff --git a/src/southbridge/broadcom/bcm5785/sb_pci_main.c b/src/southbridge/broadcom/bcm5785/sb_pci_main.c index 318086e..f91f166 100644 --- a/src/southbridge/broadcom/bcm5785/sb_pci_main.c +++ b/src/southbridge/broadcom/bcm5785/sb_pci_main.c @@ -19,7 +19,6 @@ #include <device/pnp.h> #include <device/pci_ids.h> #include <pc80/mc146818rtc.h> -#include <pc80/isa-dma.h> #include <arch/io.h> #include <device/smbus.h> #include "bcm5785.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/36383 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7d48458f40a26a3d135e981ed19019d376523d0 Gerrit-Change-Number: 36383 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/kahlee/treeya: Make sure touchpad data hold time more than ...
by Peichao Li (Code Review) 23 Nov '19

23 Nov '19

Peichao Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36945 ) Change subject: mb/google/kahlee/treeya: Make sure touchpad data hold time more than 300ns ...................................................................... mb/google/kahlee/treeya: Make sure touchpad data hold time more than 300ns According to SI team request, need tune I2C bus2 data hold time more than 300ns BUG=b:144736027 TEST=build firmware and masure I2C bus2 data hold time Signed-off-by: Peichao Wang <peichao.wang(a)bitland.corp-partner.google.com> Change-Id: Idc58a595c77eba8544f27682a284be6aac5dbe25 --- M src/mainboard/google/kahlee/variants/treeya/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/36945/1 diff --git a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb index e8477ee..e35f00c 100644 --- a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb @@ -44,6 +44,7 @@ .speed = I2C_SPEED_FAST, .rise_time_ns = 3, .fall_time_ns = 2, + .data_hold_time_ns = 400, }" # Enable I2C3 for touchscreen at 400kHz -- To view, visit https://review.coreboot.org/c/coreboot/+/36945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc58a595c77eba8544f27682a284be6aac5dbe25 Gerrit-Change-Number: 36945 Gerrit-PatchSet: 1 Gerrit-Owner: Peichao Li <peichao.wang(a)bitland.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: qualcomm: qgpt: Fixes for python3
by Douglas Anderson (Code Review) 23 Nov '19

23 Nov '19

Douglas Anderson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37024 ) Change subject: qualcomm: qgpt: Fixes for python3 ...................................................................... qualcomm: qgpt: Fixes for python3 * Binary strings should be joined with a binary string * Binary files should be opened in binary mode. * Division that wants truncation should make it explicit. I have tested that these changes let me compile. Change-Id: I7c41b80688a9c6bdb3c66561ff531311cc7ebb13 Signed-off-by: Douglas Anderson <dianders(a)chromium.org> --- M util/qualcomm/qgpt.py 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/37024/1 diff --git a/util/qualcomm/qgpt.py b/util/qualcomm/qgpt.py index 5101836..476ca5c 100755 --- a/util/qualcomm/qgpt.py +++ b/util/qualcomm/qgpt.py @@ -167,7 +167,7 @@ # CRC of Partition Entry PartEntry = GPTBlobBuffer[options.sector_size*2:options.sector_size*2 + 128] - CalcEntryCRC = crc32(''.join(struct.pack("B", x) for x in PartEntry)) + CalcEntryCRC = crc32(b''.join(struct.pack("B", x) for x in PartEntry)) GPTBlobBuffer[i] = CalcEntryCRC & 0xFF GPTBlobBuffer[i+1] = (CalcEntryCRC>>8) & 0xFF @@ -177,7 +177,7 @@ # CRC of Partition Table Header GPTHeader = GPTBlobBuffer[options.sector_size:options.sector_size + 92] - CalcEntryCRC = crc32(''.join(struct.pack("B", x) for x in GPTHeader)) + CalcEntryCRC = crc32(b''.join(struct.pack("B", x) for x in GPTHeader)) i = options.sector_size + 16 GPTBlobBuffer[i] = CalcEntryCRC & 0xFF @@ -209,11 +209,11 @@ options.inputfile = args[0] options.outputfile = args[1] - with open(options.inputfile, 'r+') as fin: + with open(options.inputfile, 'rb+') as fin: bb_buffer = fin.read() # Round up to next sector if bootblock size not evenly divisible - options.end_lba = ((len(bb_buffer) + options.sector_size - 1) / + options.end_lba = ((len(bb_buffer) + options.sector_size - 1) // options.sector_size) # Add 3 sectors for MBR, GPT header and GPT partition entry options.end_lba += 3 -- To view, visit https://review.coreboot.org/c/coreboot/+/37024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c41b80688a9c6bdb3c66561ff531311cc7ebb13 Gerrit-Change-Number: 37024 Gerrit-PatchSet: 1 Gerrit-Owner: Douglas Anderson <dianders(a)chromium.org> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: [test] Add -Wsign-compare warning option
by HAOUAS Elyes (Code Review) 23 Nov '19

23 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33810 Change subject: [test] Add -Wsign-compare warning option ...................................................................... [test] Add -Wsign-compare warning option Change-Id: I12961fc29ef90f73a5e09a4efdf586ee980cb6d6 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/33810/1 diff --git a/Makefile.inc b/Makefile.inc index 362243e..37610a2 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -401,7 +401,7 @@ CFLAGS_common += -pipe -g -nostdinc -std=gnu11 CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs +CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -Wsign-compare CFLAGS_common += -Wstrict-aliasing -Wshadow -Wdate-time -Wtype-limits CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer CFLAGS_common += -ffunction-sections -fdata-sections -fno-pie -- To view, visit https://review.coreboot.org/c/coreboot/+/33810 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12961fc29ef90f73a5e09a4efdf586ee980cb6d6 Gerrit-Change-Number: 33810 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in em100[master]: makedpfw: Fix the example command line to use the proper files
by Evan Lojewski (Code Review) 23 Nov '19

23 Nov '19

Evan Lojewski has uploaded this change for review. ( https://review.coreboot.org/c/em100/+/37160 ) Change subject: makedpfw: Fix the example command line to use the proper files ...................................................................... makedpfw: Fix the example command line to use the proper files The makedpfw example command contradicts the usage in makechips.sh This fixed the help text to match the script and to use the correct names as provided in Windows pacakge. Signed-off-by: Evan Lojewski <github(a)meklort.com> Change-Id: I897584b58904ca3c2c6cab567ed8bce2d6d4afb0 --- M makedpfw.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/em100 refs/changes/60/37160/1 diff --git a/makedpfw.c b/makedpfw.c index 97dfe15..2973f75 100644 --- a/makedpfw.c +++ b/makedpfw.c @@ -62,7 +62,7 @@ static void usage(char *name) { printf("makedpfw: EM100pro firmware update maker\n\nExample:\n" - " %s -m 1.bin -M 2.27 -f 2.bin -F 0.85 -o \n" + " %s -m 2.bin -M 2.27 -f 1.bin -F 0.85 -o \n" "\nUsage:\n" " -m|--mcu-file <file> MCU firmware file name\n" " -M|--mcu-version <version> MCU firmware version\n" -- To view, visit https://review.coreboot.org/c/em100/+/37160 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: em100 Gerrit-Branch: master Gerrit-Change-Id: I897584b58904ca3c2c6cab567ed8bce2d6d4afb0 Gerrit-Change-Number: 37160 Gerrit-PatchSet: 1 Gerrit-Owner: Evan Lojewski <meklort(a)gmail.com> Gerrit-MessageType: newchange

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Change in em100[master]: Fix option handling for makedpfw
by Evan (Code Review) 23 Nov '19

23 Nov '19

Evan has uploaded this change for review. ( https://review.coreboot.org/c/em100/+/37159 ) Change subject: Fix option handling for makedpfw ...................................................................... Fix option handling for makedpfw Remove the unsupported "trace" long option and add support for the "output" option. Change-Id: I41ad3d9b9f24d99e4effd215c184379a164e55bb --- M makedpfw.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/em100 refs/changes/59/37159/1 diff --git a/makedpfw.c b/makedpfw.c index 2b03138..97dfe15 100644 --- a/makedpfw.c +++ b/makedpfw.c @@ -51,7 +51,7 @@ static const struct option longopts[] = { {"debug", 0, 0, 'D'}, {"help", 0, 0, 'h'}, - {"trace", 0, 0, 't'}, + {"output", 1, 0, 'o'}, {"mcu-file", 1, 0, 'm'}, {"mcu-version", 1, 0, 'M'}, {"fpga-file", 1, 0, 'f'}, -- To view, visit https://review.coreboot.org/c/em100/+/37159 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: em100 Gerrit-Branch: master Gerrit-Change-Id: I41ad3d9b9f24d99e4effd215c184379a164e55bb Gerrit-Change-Number: 37159 Gerrit-PatchSet: 1 Gerrit-Owner: Evan <meklort(a)gmail.com> Gerrit-MessageType: newchange

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Change in em100[master]: makechips.sh: Fix URL for version detection
by Stefan Reinauer (Code Review) 23 Nov '19

23 Nov '19

Stefan Reinauer has uploaded this change for review. ( https://review.coreboot.org/c/em100/+/37158 ) Change subject: makechips.sh: Fix URL for version detection ...................................................................... makechips.sh: Fix URL for version detection The URL that is used for detecting the database version number has changed slightly, leaving the version empty on recent builds. Adapt the URL to match dediprog.com to fix the issue. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Change-Id: Iac6ea6ae9bbccc544bacc64eadc11ce6563c83f0 --- M makechips.sh 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/em100 refs/changes/58/37158/1 diff --git a/makechips.sh b/makechips.sh index 61d7357..1451662 100755 --- a/makechips.sh +++ b/makechips.sh @@ -17,7 +17,7 @@ # URL="https://www.dediprog.com/download/save/78.msi" -VURL="https://www.dediprog.com/download?productCategory=SPI+Flash+Solution&produc…" +VURL="https://www.dediprog.com/download?productCategory=SPI+Flash+Solution&produc…" if ! which curl > /dev/null; then echo "Install curl to run this script." -- To view, visit https://review.coreboot.org/c/em100/+/37158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: em100 Gerrit-Branch: master Gerrit-Change-Id: Iac6ea6ae9bbccc544bacc64eadc11ce6563c83f0 Gerrit-Change-Number: 37158 Gerrit-PatchSet: 1 Gerrit-Owner: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86: Fix naked reference to CONFIG_NO_CAR_GLOBAL_MIGRATION
by HAOUAS Elyes (Code Review) 23 Nov '19

23 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34440 ) Change subject: arch/x86: Fix naked reference to CONFIG_NO_CAR_GLOBAL_MIGRATION ...................................................................... arch/x86: Fix naked reference to CONFIG_NO_CAR_GLOBAL_MIGRATION Found-by: util/lint/kconfig_lint Change-Id: I43408ddd31d7da8fde3253c56053170e01a7fd22 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/car.ld M src/arch/x86/include/arch/early_variables.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/34440/1 diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 5802b02..ab03da4 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -84,7 +84,7 @@ *(.sbss.*) #else /* .car.global_data objects only around when - * !CONFIG_NO_CAR_GLOBAL_MIGRATION is employed. */ + * !CONFIG(NO_CAR_GLOBAL_MIGRATION) is true. */ *(.car.global_data); #endif . = ALIGN(ARCH_POINTER_ALIGN_SIZE); diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h index a69c230..ca343e7 100644 --- a/src/arch/x86/include/arch/early_variables.h +++ b/src/arch/x86/include/arch/early_variables.h @@ -83,7 +83,7 @@ /* * We might end up here if: * 1. ENV_CACHE_AS_RAM is not set for the stage or - * 2. ENV_CACHE_AS_RAM is set for the stage but CONFIG_NO_CAR_GLOBAL_MIGRATION + * 2. ENV_CACHE_AS_RAM is set for the stage but CONFIG(NO_CAR_GLOBAL_MIGRATION) is true * is also set. In this case, there is no need to migrate CAR global * variables. But, since we might still be running out of CAR, car_active needs * to return 1 if ENV_CACHE_AS_RAM is set. -- To view, visit https://review.coreboot.org/c/coreboot/+/34440 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43408ddd31d7da8fde3253c56053170e01a7fd22 Gerrit-Change-Number: 34440 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: device: Fix naked reference to CONFIG_DEBUG_RAM_SETUP
by HAOUAS Elyes (Code Review) 23 Nov '19

23 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34439 ) Change subject: device: Fix naked reference to CONFIG_DEBUG_RAM_SETUP ...................................................................... device: Fix naked reference to CONFIG_DEBUG_RAM_SETUP Found-by: util/lint/kconfig_lint Change-Id: I360c4f563c2aa2acc740eac6c4e0145bda18edb7 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/device/dram/ddr2.c M src/device/dram/ddr3.c M src/include/device/dram/common.h M src/include/device/dram/ddr3.h 4 files changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/34439/1 diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c index 60588b8..eec2d74 100644 --- a/src/device/dram/ddr2.c +++ b/src/device/dram/ddr2.c @@ -668,8 +668,8 @@ /** * \brief Print the info in DIMM * -* Print info about the DIMM. Useful to use when CONFIG_DEBUG_RAM_SETUP is -* selected, or for a purely informative output. +* Print info about the DIMM. Useful to use when CONFIG(DEBUG_RAM_SETUP) is +* true, or for a purely informative output. * * @param dimm pointer to already decoded @ref dimm_attr structure */ diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index 834dc83..8d79710 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -624,8 +624,8 @@ /** * \brief Print the info in DIMM * -* Print info about the DIMM. Useful to use when CONFIG_DEBUG_RAM_SETUP is -* selected, or for a purely informative output. +* Print info about the DIMM. Useful to use when CONFIG(DEBUG_RAM_SETUP) is +* true, or for a purely informative output. * * @param dimm pointer to already decoded @ref dimm_attr structure */ diff --git a/src/include/device/dram/common.h b/src/include/device/dram/common.h index b1677c8..7be58ab 100644 --- a/src/include/device/dram/common.h +++ b/src/include/device/dram/common.h @@ -45,10 +45,10 @@ /** @} */ /** - * \brief Convenience macro for enabling printk with CONFIG_DEBUG_RAM_SETUP + * \brief Convenience macro for enabling printk with CONFIG(DEBUG_RAM_SETUP) * * Use this macro instead of printk(); for verbose RAM initialization messages. - * When CONFIG_DEBUG_RAM_SETUP is not selected, these messages are automatically + * When CONFIG(DEBUG_RAM_SETUP) is not selected, these messages are automatically * disabled. * @{ */ diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 0f9373e..19bce96 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -49,10 +49,10 @@ /** @} */ /** - * \brief Convenience macro for enabling printk with CONFIG_DEBUG_RAM_SETUP + * \brief Convenience macro for enabling printk with CONFIG(DEBUG_RAM_SETUP) * * Use this macro instead of printk(); for verbose RAM initialization messages. - * When CONFIG_DEBUG_RAM_SETUP is not selected, these messages are automatically + * When CONFIG(DEBUG_RAM_SETUP) is false, these messages are automatically * disabled. * @{ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/34439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I360c4f563c2aa2acc740eac6c4e0145bda18edb7 Gerrit-Change-Number: 34439 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common/basecode: Implement CSE update flow
by Sridhar Siricilla (Code Review) 23 Nov '19

23 Nov '19

Hello Patrick Rudolph, Subrata Banik, Balaji Manigandan, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35403 to look at the new patch set (#21). Change subject: soc/intel/common/basecode: Implement CSE update flow ...................................................................... soc/intel/common/basecode: Implement CSE update flow This is the core patch that implement CSE FW update flow. To enable the FW update flow the following are required: * Descriptor change to accommodate a larger CSME region The CSME size is 6MB for the POC. * FMAP changes to accommodate ME update binary in RW CBFSes. Due to the increased CSME binary size and to accommodate the extra CSME RW binaries (which are ~2.5 MB) in RW CBFSes, the board FMAP has to be modified. * The new CSE binary with new partitions and respective RW area binaries. The following changes have been done in this patch: * Implement Update flow Get the partition info containing version of ME RW using GET_BOOT_PARTITION_INFO HECI command Get the me_rw.version from the currently selected RW slot. If the version from the above 2 locations don't match start the update Set the CSE's next boot partition to RO using SET_BOOT_PARTITION HECI command. Send global reset command to reset only the CSME Wait for CSME to enter SOFT_TEMP_DISABLE operation mode (indicated by HFSTS1 register bit 19:16) Enable HMRFPO (Host ME Region Flash Protection Override) using the HMRFPO_ENABLE HECI command Erase and Copy the CBFS ME RW to ME RW partition Set the CSE's next boot partition to RW using SET_BOOT_PARTITION HECI command Trigger global reset The system should boot with the Updated ME Verified that the basic update flows are working on Cometlake RVP and hatch. Change-Id: I12f6bba3324069d65edabaccd234006b0840e700 Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Signed-off-by: V Sowmya <v.sowmya(a)intel.com> Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> --- A src/soc/intel/common/basecode/fw_update/Kconfig A src/soc/intel/common/basecode/fw_update/Makefile.inc A src/soc/intel/common/basecode/fw_update/cse_update.c A src/soc/intel/common/basecode/include/intelbasecode/cse_update.h 4 files changed, 445 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/35403/21 -- To view, visit https://review.coreboot.org/c/coreboot/+/35403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12f6bba3324069d65edabaccd234006b0840e700 Gerrit-Change-Number: 35403 Gerrit-PatchSet: 21 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2019