coreboot-gerrit October 2019

coreboot-gerrit@coreboot.org

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1921 discussions

Change in libgfxinit[master]: gma: Give GM45 its own designation (separate from G45)
by Angel Pons (Code Review) 04 Oct '19

04 Oct '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/35711 ) Change subject: gma: Give GM45 its own designation (separate from G45) ...................................................................... Patch Set 3: Code-Review+2 My main concern with this change is that G45 and GM45 are dangerously similar names. Maybe use Eaglelake and Cantiga instead? -- To view, visit https://review.coreboot.org/c/libgfxinit/+/35711 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I99bbd0582a03a9e2806ef2ebf63e466ec40133b3 Gerrit-Change-Number: 35711 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 04 Oct 2019 07:33:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: site-local: Allow to read Makefile.inc w/o .config
by Balaji Manigandan (Code Review) 04 Oct '19

04 Oct '19

Balaji Manigandan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34024 ) Change subject: site-local: Allow to read Makefile.inc w/o .config ...................................................................... site-local: Allow to read Makefile.inc w/o .config Makefile.inc allows to extend site specific configurations list the make options irrespective of a .config Change-Id: I7c968c773c368ea74689b9741c4c978c35110187 Signed-off-by: Balaji Manigandan B <balaji.manigandan(a)intel.com> --- M Makefile 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/34024/1 diff --git a/Makefile b/Makefile index 45b0bc5..dfc70e0 100644 --- a/Makefile +++ b/Makefile @@ -129,11 +129,12 @@ endif endif +-include $(TOPLEVEL)/site-local/Makefile.inc + ifeq ($(NOCOMPILE),1) include $(TOPLEVEL)/Makefile.inc include $(TOPLEVEL)/payloads/Makefile.inc include $(TOPLEVEL)/util/testing/Makefile.inc --include $(TOPLEVEL)/site-local/Makefile.inc real-all: @echo "Error: Expected config file ($(DOTCONFIG)) not present." >&2 @echo "Please specify a config file or run 'make menuconfig' to" >&2 -- To view, visit https://review.coreboot.org/c/coreboot/+/34024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c968c773c368ea74689b9741c4c978c35110187 Gerrit-Change-Number: 34024 Gerrit-PatchSet: 1 Gerrit-Owner: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86/acpi: Add SSDT for QEMU
by Patrick Rudolph (Code Review) 04 Oct '19

04 Oct '19

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35382 ) Change subject: arch/x86/acpi: Add SSDT for QEMU ...................................................................... arch/x86/acpi: Add SSDT for QEMU Add a SSDT on qemu and place BOOT0000 inside it to allow testing the google firmware kernel module in qemu. Tested on Qemu Q35. Change-Id: Ibd1b2c2f4fc3db9ae8f338b0d53b2d00ea2c4190 --- M src/arch/x86/acpi.c 1 file changed, 45 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/35382/1 diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index b486409..8e4de82 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -37,6 +37,8 @@ #include <version.h> #include <commonlib/sort.h> +static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp); + u8 acpi_checksum(u8 *table, u32 length) { u8 ret = 0; @@ -1260,9 +1262,51 @@ /* Align ACPI tables to 16byte */ current = acpi_align_current(current); + /* Special case for qemu */ fw = fw_cfg_acpi_tables(current); - if (fw) + if (fw) { + rsdp = NULL; + /* Find RSDP. */ + for (void *p = (void *)current; p < (void *)fw; p += 16) { + if (valid_rsdp((acpi_rsdp_t *)p)) { + rsdp = p; + break; + } + } + if (!rsdp) + return fw; + + /* Add BOOT0000 for Linux google firmware driver */ + printk(BIOS_DEBUG, "ACPI: * SSDT\n"); + ssdt = (acpi_header_t *)fw; + current = (unsigned long)ssdt + sizeof(acpi_header_t); + + memset((void *)ssdt, 0, sizeof(acpi_header_t)); + + memcpy(&ssdt->signature, "SSDT", 4); + ssdt->revision = get_acpi_table_revision(SSDT); + memcpy(&ssdt->oem_id, OEM_ID, 6); + memcpy(&ssdt->oem_table_id, oem_table_id, 8); + ssdt->oem_revision = 42; + memcpy(&ssdt->asl_compiler_id, ASLC, 4); + ssdt->asl_compiler_revision = asl_revision; + ssdt->length = sizeof(acpi_header_t); + + acpigen_set_current((char *) current); + + /* Write object to declare coreboot tables */ + acpi_ssdt_write_cbtable(); + + /* (Re)calculate length and checksum. */ + ssdt->length = current - (unsigned long)ssdt; + ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length); + + acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); + + acpi_add_table(rsdp, ssdt); + return fw; + } dsdt_file = cbfs_boot_map_with_leak( CONFIG_CBFS_PREFIX "/dsdt.aml", -- To view, visit https://review.coreboot.org/c/coreboot/+/35382 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd1b2c2f4fc3db9ae8f338b0d53b2d00ea2c4190 Gerrit-Change-Number: 35382 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: intel/fsp_broadwell_de: Rename from xx_DEV_FUNC
by Werner Zeh (Code Review) 04 Oct '19

04 Oct '19

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35734 ) Change subject: intel/fsp_broadwell_de: Rename from xx_DEV_FUNC ...................................................................... Patch Set 3: Code-Review+1 (1 comment) https://review.coreboot.org/c/coreboot/+/35734/1/src/soc/intel/fsp_broadwel… File src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h: https://review.coreboot.org/c/coreboot/+/35734/1/src/soc/intel/fsp_broadwel… PS1, Line 53: #define PCH_DEVFN_VTD PCI_DEVFN(VTD_DEV, VTD_FUNC) > PCH_, SCH_, something else for prefix? VTD is directly located in the internal "Integrated I/O" block. Maybe use IIO as prefix? -- To view, visit https://review.coreboot.org/c/coreboot/+/35734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a8675a4e613a8efc135b05cde36f166acaa7ed4 Gerrit-Change-Number: 35734 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 04 Oct 2019 04:19:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/basecode: Implement CSE update flow
by Sridhar Siricilla (Code Review) 04 Oct '19

04 Oct '19

Hello Patrick Rudolph, Subrata Banik, Balaji Manigandan, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35403 to look at the new patch set (#14). Change subject: soc/intel/common/basecode: Implement CSE update flow ...................................................................... soc/intel/common/basecode: Implement CSE update flow This is the core patch that implement CSE FW update flow. To enable the FW update flow the following are required: * Descriptor change to accommodate a larger CSME region The CSME size is 6MB for the POC. * FMAP changes to accommodate ME update binary in RW CBFSes. Due to the increased CSME binary size and to accommodate the extra CSME RW binaries (which are ~2.5 MB) in RW CBFSes, the board FMAP has to be modified. * The new CSE binary with new partitions and respective RW area binaries. The following changes have been done in this patch: * Implement Update flow Get the partition info containing version of ME RW using GET_BOOT_PARTITION_INFO HECI command Get the me_rw.version from the currently selected RW slot. If the version from the above 2 locations don't match start the update Set the CSE's next boot partition to RO using SET_BOOT_PARTITION HECI command. Enable HMRFPO (Host ME Region Flash Protection Override) using the HMRFPO_ENABLE HECI command Send global reset command to reset only the CSME. Wait for CSME to enter SECOVR_MEI_MSG operation mode (indicated by HFSTS1 register bit 19:16) Erase and Copy the CBFS ME RW to ME RW partition. Trigger global reset. The system should boot with the Updated ME. Verified that the basic update flows are working on Cometlake RVP and hatch. Change-Id: I12f6bba3324069d65edabaccd234006b0840e700 Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Signed-off-by: V Sowmya <v.sowmya(a)intel.com> Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> --- A src/soc/intel/common/basecode/fw_update/Kconfig A src/soc/intel/common/basecode/fw_update/Makefile.inc A src/soc/intel/common/basecode/fw_update/cse_update.c A src/soc/intel/common/basecode/include/intelbasecode/cse_update.h 4 files changed, 437 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/35403/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/35403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12f6bba3324069d65edabaccd234006b0840e700 Gerrit-Change-Number: 35403 Gerrit-PatchSet: 14 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mediatek/mt8183: Add the shared 'dramc_param' module
by Hung-Te Lin (Code Review) 04 Oct '19

04 Oct '19

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35775 ) Change subject: mediatek/mt8183: Add the shared 'dramc_param' module ...................................................................... Patch Set 4: Code-Review+2 LGTM except the nits in comments -- To view, visit https://review.coreboot.org/c/coreboot/+/35775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4cfd634da1855a76706aab0b050197251e2ed4dd Gerrit-Change-Number: 35775 Gerrit-PatchSet: 4 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 04 Oct 2019 03:20:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mediatek/mt8183: Add the shared 'dramc_param' module
by Yu-Ping Wu (Code Review) 04 Oct '19

04 Oct '19

Hello Julius Werner, Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35775 to look at the new patch set (#4). Change subject: mediatek/mt8183: Add the shared 'dramc_param' module ...................................................................... mediatek/mt8183: Add the shared 'dramc_param' module The dramc_param module is shared with repository mt8183-dramk-private. It is added here to simplify the communication between coreboot and the program dram.elf. BUG=139099592 BRANCH=none TEST=emerge-kukui coreboot Change-Id: I4cfd634da1855a76706aab0b050197251e2ed4dd Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/mt8183/Makefile.inc A src/soc/mediatek/mt8183/dramc_param.c A src/soc/mediatek/mt8183/include/soc/dramc_param.h 3 files changed, 131 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/35775/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/35775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4cfd634da1855a76706aab0b050197251e2ed4dd Gerrit-Change-Number: 35775 Gerrit-PatchSet: 4 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mediatek/mt8183: Add the shared 'dramc_param' module
by Yu-Ping Wu (Code Review) 04 Oct '19

04 Oct '19

Hello Julius Werner, Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35775 to look at the new patch set (#3). Change subject: mediatek/mt8183: Add the shared 'dramc_param' module ...................................................................... mediatek/mt8183: Add the shared 'dramc_param' module The dramc_param module is shared with repository mt8183-dramk-private. It is added here to simplify the communication between coreboot and the program dram.elf. BUG=139099592 BRANCH=none TEST=emerge-kukui coreboot Change-Id: I4cfd634da1855a76706aab0b050197251e2ed4dd Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/mt8183/Makefile.inc A src/soc/mediatek/mt8183/dramc_param.c A src/soc/mediatek/mt8183/include/soc/dramc_param.h 3 files changed, 131 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/35775/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/35775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4cfd634da1855a76706aab0b050197251e2ed4dd Gerrit-Change-Number: 35775 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mediatek/mt8183: Add the shared 'dramc_param' module
by Yu-Ping Wu (Code Review) 04 Oct '19

04 Oct '19

Hello Julius Werner, Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35775 to look at the new patch set (#2). Change subject: mediatek/mt8183: Add the shared 'dramc_param' module ...................................................................... mediatek/mt8183: Add the shared 'dramc_param' module The dramc_param module is shared with repository mt8183-dramk-private. It is added here to simplify the communication between coreboot and the program dram.elf. BUG=139099592 BRANCH=none TEST=emerge-kukui coreboot Change-Id: I4cfd634da1855a76706aab0b050197251e2ed4dd Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/mt8183/Makefile.inc A src/soc/mediatek/mt8183/dramc_param.c A src/soc/mediatek/mt8183/include/soc/dramc_param.h 3 files changed, 132 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/35775/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/35775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4cfd634da1855a76706aab0b050197251e2ed4dd Gerrit-Change-Number: 35775 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/drallion: Set UART for console to UART controller 0
by Aamir Bohra (Code Review) 04 Oct '19

04 Oct '19

Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35633 ) Change subject: mb/google/drallion: Set UART for console to UART controller 0 ...................................................................... mb/google/drallion: Set UART for console to UART controller 0 Drallion uses UART 0 for console, change the config accordindly. Change-Id: I0ae2f8459b6225b99b758180413afa22386355d4 Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/google/drallion/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/35633/1 diff --git a/src/mainboard/google/drallion/Kconfig b/src/mainboard/google/drallion/Kconfig index a2ed3d8..97d0b51 100644 --- a/src/mainboard/google/drallion/Kconfig +++ b/src/mainboard/google/drallion/Kconfig @@ -91,7 +91,7 @@ config UART_FOR_CONSOLE int - default 2 + default 0 config VARIANT_DIR string -- To view, visit https://review.coreboot.org/c/coreboot/+/35633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ae2f8459b6225b99b758180413afa22386355d4 Gerrit-Change-Number: 35633 Gerrit-PatchSet: 1 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit October 2019