coreboot-gerrit August 2018

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Change in coreboot[master]: lib/lzmadecode.c: : Avoid static analysis error for unused value
by Richard Spiegel (Code Review) 10 Aug '18

10 Aug '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/28021 Change subject: lib/lzmadecode.c: : Avoid static analysis error for unused value ...................................................................... lib/lzmadecode.c: : Avoid static analysis error for unused value Within procedure LzmaDecode(), the variable len can be assigned a value that is never read after, thus causing a static analysis error. Tell the static analysis we know it can happen. BUG=b:112253891 TEST=Build and boot grunt. Change-Id: I37bc3ff19ca85f819ba1cbb2a281c1ad55619da9 Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/lib/lzmadecode.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/28021/1 diff --git a/src/lib/lzmadecode.c b/src/lib/lzmadecode.c index 6d21f6c..0a5d038 100644 --- a/src/lib/lzmadecode.c +++ b/src/lib/lzmadecode.c @@ -422,6 +422,10 @@ } } RC_NORMALIZE; + /* + * Tell static analysis we know len can have a dead assignment. + */ + (void)len; *inSizeProcessed = (SizeT)(Buffer - inStream); -- To view, visit https://review.coreboot.org/28021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I37bc3ff19ca85f819ba1cbb2a281c1ad55619da9 Gerrit-Change-Number: 28021 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

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Change in coreboot[master]: intel/common/block: Fix issues found by klockwork
by John Zhao (Code Review) 10 Aug '18

10 Aug '18

John Zhao has abandoned this change. ( https://review.coreboot.org/28019 ) Change subject: intel/common/block: Fix issues found by klockwork ...................................................................... Abandoned need rebase -- To view, visit https://review.coreboot.org/28019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Ia79d6c08c3b75dfd638a75563fb06a4916b7b218 Gerrit-Change-Number: 28019 Gerrit-PatchSet: 3 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: amd/stoneyridge: Add PMxC0 reset status to boot log
by Edward Hill (Code Review) 10 Aug '18

10 Aug '18

Edward Hill has uploaded this change for review. ( https://review.coreboot.org/28020 Change subject: amd/stoneyridge: Add PMxC0 reset status to boot log ...................................................................... amd/stoneyridge: Add PMxC0 reset status to boot log Print the PMxC0 S5/Reset status bits to the console. TEST=Inspect console for Grunt BUG=b:110788201 Change-Id: Ia905bb325a535fd4aa7082011cdfe92f08dff2cb Signed-off-by: Edward Hill <ecgh(a)chromium.org> --- M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/amd/stoneyridge/southbridge.c 2 files changed, 37 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/28020/1 diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 64b4b46..80671df 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -91,6 +91,7 @@ #define PM_ACPI_RTC_WAKE_EN BIT(29) #define PM_RST_CTRL1 0xbe #define SLPTYPE_CONTROL_EN BIT(5) +#define PM_RST_STATUS 0xc0 #define PM_PMIO_DEBUG 0xd2 #define PM_MANUAL_RESET 0xd3 #define PM_HUD_SD_FLASH_CTRL 0xe7 diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index a6219b4..f406ff4 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -789,6 +789,41 @@ print_pm1_status(pm1_sts); } +static void sb_print_pmxc0_status(void) +{ + /* PMxC0 S5/Reset Status shows the source of previous reset. */ + uint32_t pmxc0_status = pm_read32(PM_RST_STATUS); + + static const char *const pmxc0_status_bits[] = { + [0] = "ThermalTrip", + [1] = "FourSecondPwrBtn", + [2] = "Shutdown", + [3] = "ThermalTripFromTemp", + [4] = "RemotePowerDownFromASF", + [5] = "ShutDownFan0", + [16] = "UserRst", + [17] = "SoftPciRst", + [18] = "DoInit", + [19] = "DoReset", + [20] = "DoFullReset", + [21] = "SleepReset", + [22] = "KbReset", + [23] = "LtReset", + [24] = "FailBootRst", + [25] = "WatchdogIssueReset", + [26] = "RemoteResetFromASF", + [27] = "SyncFlood", + [28] = "HangReset", + [29] = "EcWatchdogRst", + [31] = "BIT31", + }; + + printk(BIOS_SPEW, "PMxC0 STATUS: 0x%x ", pmxc0_status); + print_num_status_bits(ARRAY_SIZE(pmxc0_status_bits), pmxc0_status, + pmxc0_status_bits); + printk(BIOS_SPEW, "\n"); +} + static int get_index_bit(uint32_t value, uint16_t limit) { uint16_t i; @@ -842,6 +877,7 @@ { sb_init_acpi_ports(); sb_clear_pm1_status(); + sb_print_pmxc0_status(); } void southbridge_final(void *chip_info) -- To view, visit https://review.coreboot.org/28020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia905bb325a535fd4aa7082011cdfe92f08dff2cb Gerrit-Change-Number: 28020 Gerrit-PatchSet: 1 Gerrit-Owner: Edward Hill <ecgh(a)chromium.org>

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Change in coreboot[master]: intel/common/block: Fix issues found by klockwork
by John Zhao (Code Review) 10 Aug '18

10 Aug '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28019 to look at the new patch set (#2). Change subject: intel/common/block: Fix issues found by klockwork ...................................................................... intel/common/block: Fix issues found by klockwork src/soc/intel/common/block/cpu/mp_init.c Function init_cpus: Pointer dev checked for NULL may be deferenced. src/soc/intel/common/block/graphics/graphics.c Function graphics_get_bar: Pointer dev returned from call may be NULL and will be deferenced. BRANCH=None TEST=Built & booted Yorp board. Change-Id: Ia79d6c08c3b75dfd638a75563fb06a4916b7b218 Signed-off-by: John Zhao <john.zhao(a)intel.com> --- M 3rdparty/blobs M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/graphics/graphics.c 3 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/28019/2 -- To view, visit https://review.coreboot.org/28019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ia79d6c08c3b75dfd638a75563fb06a4916b7b218 Gerrit-Change-Number: 28019 Gerrit-PatchSet: 2 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: intel/common/block: Fix issues found by klockwork
by build bot (Jenkins) (Code Review) 10 Aug '18

10 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28019 ) Change subject: intel/common/block: Fix issues found by klockwork ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/28019/1/src/soc/intel/common/block/cpu/mp_i… File src/soc/intel/common/block/cpu/mp_init.c: https://review.coreboot.org/#/c/28019/1/src/soc/intel/common/block/cpu/mp_i… PS1, Line 130: trailing whitespace -- To view, visit https://review.coreboot.org/28019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia79d6c08c3b75dfd638a75563fb06a4916b7b218 Gerrit-Change-Number: 28019 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 22:23:25 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: intel/common/block: Fix issues found by klockwork
by John Zhao (Code Review) 10 Aug '18

10 Aug '18

John Zhao has uploaded this change for review. ( https://review.coreboot.org/28019 Change subject: intel/common/block: Fix issues found by klockwork ...................................................................... intel/common/block: Fix issues found by klockwork src/soc/intel/common/block/cpu/mp_init.c Function init_cpus: Pointer dev checked for NULL may be deferenced. src/soc/intel/common/block/graphics/graphics.c Function graphics_get_bar: Pointer dev returned from call may be NULL and will be deferenced. BRANCH=None TEST=Built & booted Yorp board. Change-Id: Ia79d6c08c3b75dfd638a75563fb06a4916b7b218 Signed-off-by: John Zhao <john.zhao(a)intel.com> --- M 3rdparty/blobs M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/graphics/graphics.c 3 files changed, 7 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/28019/1 diff --git a/3rdparty/blobs b/3rdparty/blobs index 372012e..c285102 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 372012e8e1d0d01f3e77ff73b118665b41ff68b6 +Subproject commit c2851026e72dcb7b8c1d19e750c0416a6abf41ce diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 89c95a4..64d262d 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -125,14 +125,16 @@ { struct device *dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER); assert(dev != NULL); - + DEVTREE_CONST struct bus *bus = dev->link_list; + assert(bus != NULL); + if (chip_get_fsp_mp_init()) return; microcode_patch = intel_microcode_find(); intel_microcode_load_unlocked(microcode_patch); - soc_init_cpus(dev->link_list); + soc_init_cpus(bus); } static void wrapper_x86_setup_mtrrs(void *unused) diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index c6ea7e2..022cb48 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -15,6 +15,7 @@ */ #include <compiler.h> +#include <assert.h> #include <console/console.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -36,6 +37,7 @@ { struct device *dev = SA_DEV_IGD; struct resource *gm_res; + assert(dev != NULL); /* Check if Graphics PCI device is disabled */ if (!dev->enabled) -- To view, visit https://review.coreboot.org/28019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia79d6c08c3b75dfd638a75563fb06a4916b7b218 Gerrit-Change-Number: 28019 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com>

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Change in coreboot[master]: sb/intel/{bd82x6x, ibexpeak}: Don't build with FAKE_IFD by default
by Angel Pons (Code Review) 10 Aug '18

10 Aug '18

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/28018 Change subject: sb/intel/{bd82x6x,ibexpeak}: Don't build with FAKE_IFD by default ...................................................................... sb/intel/{bd82x6x,ibexpeak}: Don't build with FAKE_IFD by default FAKE_IFD depends on out tree flashrom patches for which there are better alternatives available now, so don't build with FAKE_IFD by default. Change-Id: I2c6a6586da9a6d26b0a5bf7d3ba8f3ffe3205647 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/ibexpeak/Kconfig 2 files changed, 0 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/28018/1 diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 3033e20..c028595 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -66,9 +66,6 @@ hex default 0x80 -config BUILD_WITH_FAKE_IFD - def_bool !HAVE_IFD_BIN - endif if SOUTHBRIDGE_INTEL_BD82X6X || SOUTHBRIDGE_INTEL_C216 || SOUTHBRIDGE_INTEL_IBEXPEAK diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index 5cf402c..d377950 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -58,9 +58,6 @@ If you set this option to y, the serial IRQ machine will be operated in continuous mode. -config BUILD_WITH_FAKE_IFD - def_bool !HAVE_IFD_BIN - config HPET_MIN_TICKS hex default 0x80 -- To view, visit https://review.coreboot.org/28018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2c6a6586da9a6d26b0a5bf7d3ba8f3ffe3205647 Gerrit-Change-Number: 28018 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>

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Change in coreboot[master]: mb/*/*/cmos.default: Decrease debug_level to 'Debug'
by Angel Pons (Code Review) 10 Aug '18

10 Aug '18

Angel Pons has posted comments on this change. ( https://review.coreboot.org/28006 ) Change subject: mb/*/*/cmos.default: Decrease debug_level to 'Debug' ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/28006 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia39ee457a8985142f6e7a674532995b11cb52198 Gerrit-Change-Number: 28006 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 20:25:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: sb/intel/lynxpoint: Don't build with FAKE_IFD by default
by Angel Pons (Code Review) 10 Aug '18

10 Aug '18

Angel Pons has posted comments on this change. ( https://review.coreboot.org/28009 ) Change subject: sb/intel/lynxpoint: Don't build with FAKE_IFD by default ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/28009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I21bc5bdc8b733fbfdb1b2a4fbcb572c76701074a Gerrit-Change-Number: 28009 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 20:21:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell/Kconfig: Clean up redefined config options
by Angel Pons (Code Review) 10 Aug '18

10 Aug '18

Angel Pons has posted comments on this change. ( https://review.coreboot.org/28010 ) Change subject: soc/intel/braswell/Kconfig: Clean up redefined config options ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/28010 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icd41137a1bbfe519c89a71cc0c7c3755558bd834 Gerrit-Change-Number: 28010 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 20:20:43 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit August 2018