coreboot-gerrit August 2018

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Change in coreboot[master]: [HACK]cavium/cn81xx/soc: Don't advertise CAR area as usable
by Philipp Deppenwiese (Code Review) 10 Aug '18

10 Aug '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/28003 ) Change subject: [HACK]cavium/cn81xx/soc: Don't advertise CAR area as usable ...................................................................... Patch Set 1: Code-Review+2 Tested and works! Later on we will do a follow up -- To view, visit https://review.coreboot.org/28003 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3ec8fff99e21cbdf4ad3f4562ff9bbc1cd3c135b Gerrit-Change-Number: 28003 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 23:23:51 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: lib/fit: support booting initrd placed above 4GiB
by Philipp Deppenwiese (Code Review) 10 Aug '18

10 Aug '18

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/28002 ) Change subject: lib/fit: support booting initrd placed above 4GiB ...................................................................... lib/fit: support booting initrd placed above 4GiB Store initrd offset as 64bit integer. Tested on Cavium CN81XX EVB: The initrd could be loaded when placed above 4GiB. Previously it failed to find the initrd. Change-Id: I5d1ae860ae4a4465546bc0ef89937d611d1e56ab Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/28002 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/include/device_tree.h M src/lib/device_tree.c M src/lib/fit.c 3 files changed, 21 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Philipp Deppenwiese: Looks good to me, approved diff --git a/src/include/device_tree.h b/src/include/device_tree.h index 7f725e4..4c1a37c 100644 --- a/src/include/device_tree.h +++ b/src/include/device_tree.h @@ -158,6 +158,7 @@ size_t size); void dt_add_string_prop(struct device_tree_node *node, const char *name, char *str); void dt_add_u32_prop(struct device_tree_node *node, const char *name, u32 val); +void dt_add_u64_prop(struct device_tree_node *node, const char *name, u64 val); void dt_add_reg_prop(struct device_tree_node *node, u64 *addrs, u64 *sizes, int count, u32 addr_cells, u32 size_cells); int dt_set_bin_prop_by_path(struct device_tree *tree, const char *path, diff --git a/src/lib/device_tree.c b/src/lib/device_tree.c index a905dbf..89387ff 100644 --- a/src/lib/device_tree.c +++ b/src/lib/device_tree.c @@ -882,6 +882,22 @@ } /* + * Add a 64-bit integer property to a node, or update it if it already exists. + * + * @param node The device tree node to add to. + * @param name The name of the new property. + * @param val The integer to be stored in the property. + */ +void dt_add_u64_prop(struct device_tree_node *node, const char *name, u64 val) +{ + u64 *val_ptr = malloc(sizeof(val)); + if (!val_ptr) + return; + *val_ptr = htobe64(val); + dt_add_bin_prop(node, name, val_ptr, sizeof(*val_ptr)); +} + +/* * Add a 'reg' address list property to a node, or update it if it exists. * * @param node The device tree node to add to. diff --git a/src/lib/fit.c b/src/lib/fit.c index fe8a82e..68f5bed 100644 --- a/src/lib/fit.c +++ b/src/lib/fit.c @@ -212,12 +212,11 @@ struct device_tree_node *node; node = dt_find_node(tree->root, path, NULL, NULL, 1); - /* Warning: this assumes the ramdisk is currently located below 4GiB. */ - u32 start = (uintptr_t)ramdisk_addr; - u32 end = start + ramdisk_size; + u64 start = (uintptr_t)ramdisk_addr; + u64 end = start + ramdisk_size; - dt_add_u32_prop(node, "linux,initrd-start", start); - dt_add_u32_prop(node, "linux,initrd-end", end); + dt_add_u64_prop(node, "linux,initrd-start", start); + dt_add_u64_prop(node, "linux,initrd-end", end); } static void update_reserve_map(uint64_t start, uint64_t end, -- To view, visit https://review.coreboot.org/28002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I5d1ae860ae4a4465546bc0ef89937d611d1e56ab Gerrit-Change-Number: 28002 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: lib/fit: support booting initrd placed above 4GiB
by Philipp Deppenwiese (Code Review) 10 Aug '18

10 Aug '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/28002 ) Change subject: lib/fit: support booting initrd placed above 4GiB ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5d1ae860ae4a4465546bc0ef89937d611d1e56ab Gerrit-Change-Number: 28002 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 23:23:14 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/opencellular/elgon: Add mainboard support
by build bot (Jenkins) (Code Review) 10 Aug '18

10 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28024 ) Change subject: mainboard/opencellular/elgon: Add mainboard support ...................................................................... Patch Set 2: (128 comments) https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… File src/mainboard/opencellular/elgon/gbcv2.dts: https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 20: compatible = "cavium,thunder-81xx"; DT compatible string "cavium,thunder-81xx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 20: compatible = "cavium,thunder-81xx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 26: compatible = "arm,psci-0.2"; DT compatible string "arm,psci-0.2" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 26: compatible = "arm,psci-0.2"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 102: compatible = "cache"; DT compatible string "cache" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 109: compatible = "arm,armv8-timer"; DT compatible string "arm,armv8-timer" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 109: compatible = "arm,armv8-timer"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string "cavium,thunder-pmu" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string "arm,armv8-pmuv3" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 119: compatible = "regulator-fixed"; DT compatible string "regulator-fixed" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 130: compatible = "arm,gic-v3"; DT compatible string "arm,gic-v3" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 130: compatible = "arm,gic-v3"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 143: compatible = "arm,gic-v3-its"; DT compatible string "arm,gic-v3-its" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 143: compatible = "arm,gic-v3-its"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 153: compatible = "simple-bus"; DT compatible string "simple-bus" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 160: compatible = "fixed-clock"; DT compatible string "fixed-clock" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 169: compatible = "fixed-clock"; DT compatible string "fixed-clock" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 214: compatible = "arm,sbsa-gwdt"; DT compatible string "arm,sbsa-gwdt" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 214: compatible = "arm,sbsa-gwdt"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 215: reg = <0x8440 0xa0000 0x0 0x1000 0x8440 0xb0000 0x0 0x1000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 220: compatible = "cavium,smmu-v2"; DT compatible string "cavium,smmu-v2" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 220: compatible = "cavium,smmu-v2"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 223: interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 228: compatible = "pci-host-ecam-generic"; DT compatible string "pci-host-ecam-generic" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 239: ranges = <0x3000000 0x8010 0x0 0x8010 0x0 0x80 0x0 0x3000000 0x8100 0x0 0x8100 0x0 0x80 0x0 0x3000000 0x8680 0x0 0x8680 0x0 0x160 0x28000000 0x3000000 0x87e0 0x2c000000 0x87e0 0x2c000000 0x0 0x94000000 0x3000000 0x8400 0x0 0x8400 0x0 0x10 0x0 0x3000000 0x8430 0x0 0x8430 0x0 0x2 0x0 0x3000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x1f 0x3a000000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; DT compatible string "pci-bridge" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; DT compatible string "cavium,thunder-8890-mrml-bridge" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 247: ranges = <0x3000000 0x87e0 0x0 0x3000000 0x87e0 0x0 0x10 0x0>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 253: compatible = "cavium,thunder-8890-mdio-nexus"; DT compatible string "cavium,thunder-8890-mdio-nexus" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 253: compatible = "cavium,thunder-8890-mdio-nexus"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 253: compatible = "cavium,thunder-8890-mdio-nexus"; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 257: assigned-addresses = <0x3000000 0x87e0 0x5000000 0x0 0x800000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 258: ranges = <0x87e0 0x5000000 0x3000000 0x87e0 0x5000000 0x0 0x800000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 261: compatible = "cavium,thunder-8890-mdio"; DT compatible string "cavium,thunder-8890-mdio" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 261: compatible = "cavium,thunder-8890-mdio"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 261: compatible = "cavium,thunder-8890-mdio"; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 264: reg = <0x87e0 0x5003800 0x0 0x30>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 268: compatible = "cavium,thunder-8890-mdio"; DT compatible string "cavium,thunder-8890-mdio" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 268: compatible = "cavium,thunder-8890-mdio"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 268: compatible = "cavium,thunder-8890-mdio"; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 271: reg = <0x87e0 0x5003880 0x0 0x30>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 276: compatible = "cavium,thunder-8890-mmc"; DT compatible string "cavium,thunder-8890-mmc" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 276: compatible = "cavium,thunder-8890-mmc"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 283: compatible = "mmc-slot"; DT compatible string "mmc-slot" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 303: compatible = "cavium,thunder-8890-twsi"; DT compatible string "cavium,thunder-8890-twsi" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 303: compatible = "cavium,thunder-8890-twsi"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 310: compatible = "idt,82p33914-1"; DT compatible string "idt,82p33914-1" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 310: compatible = "idt,82p33914-1"; DT compatible string vendor "idt" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 318: compatible = "cavium,thunder-8890-twsi"; DT compatible string "cavium,thunder-8890-twsi" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 318: compatible = "cavium,thunder-8890-twsi"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 325: compatible = "atmel,24c256"; DT compatible string "atmel,24c256" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 325: compatible = "atmel,24c256"; DT compatible string vendor "atmel" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 331: compatible = "isil,isl12057"; DT compatible string "isil,isl12057" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 331: compatible = "isil,isl12057"; DT compatible string vendor "isil" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 336: compatible = "infineon,slb9645xq-12"; DT compatible string "infineon,slb9645xq-12" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 336: compatible = "infineon,slb9645xq-12"; DT compatible string vendor "infineon" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 336: compatible = "infineon,slb9645xq-12"; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 344: compatible = "cavium,thunder-8890-bgx"; DT compatible string "cavium,thunder-8890-bgx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 344: compatible = "cavium,thunder-8890-bgx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 349: local-mac-address = [00 00 00 00 00 00]; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 356: compatible = "cavium,thunder-8890-bgx"; DT compatible string "cavium,thunder-8890-bgx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 356: compatible = "cavium,thunder-8890-bgx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 362: local-mac-address = [00 00 00 00 00 00]; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 370: compatible = "cavium,thunder-8890-bgx"; DT compatible string "cavium,thunder-8890-bgx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 370: compatible = "cavium,thunder-8890-bgx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 376: compatible = "cavium,thunder-8190-spi"; DT compatible string "cavium,thunder-8190-spi" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 376: compatible = "cavium,thunder-8190-spi"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 383: compatible = "micron,n25q128a13", "spi-flash"; DT compatible string "micron,n25q128a13" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 383: compatible = "micron,n25q128a13", "spi-flash"; DT compatible string vendor "micron" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 383: compatible = "micron,n25q128a13", "spi-flash"; DT compatible string "spi-flash" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 383: compatible = "micron,n25q128a13", "spi-flash"; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 393: compatible = "cavium,thunder-8890-gpio"; DT compatible string "cavium,thunder-8890-gpio" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 393: compatible = "cavium,thunder-8890-gpio"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 404: compatible = "cavium,cn8130-nand"; DT compatible string "cavium,cn8130-nand" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 404: compatible = "cavium,cn8130-nand"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 411: compatible = "cavium,pci-host-thunder-pem"; DT compatible string "cavium,pci-host-thunder-pem" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 411: compatible = "cavium,pci-host-thunder-pem"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 420: reg = <0x8800 0x1f000000 0x0 0x39000000 0x87e0 0xc0000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 421: ranges = <0x1000000 0x0 0x0 0x8830 0x0 0x0 0x10000 0x3000000 0x0 0x10000000 0x8810 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8820 0x0 0x10 0x0 0x3000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 424: interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x10 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x11 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x12 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x13 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 430: compatible = "cavium,pci-host-thunder-pem"; DT compatible string "cavium,pci-host-thunder-pem" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 430: compatible = "cavium,pci-host-thunder-pem"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 439: reg = <0x8840 0x57000000 0x0 0x39000000 0x87e0 0xc1000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 440: ranges = <0x1000000 0x0 0x10000 0x8870 0x10000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8850 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8860 0x0 0x10 0x0 0x3000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 443: interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x14 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x15 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x16 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x17 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 449: compatible = "cavium,pci-host-thunder-pem"; DT compatible string "cavium,pci-host-thunder-pem" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 449: compatible = "cavium,pci-host-thunder-pem"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 458: reg = <0x8880 0x8f000000 0x0 0x39000000 0x87e0 0xc2000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 459: ranges = <0x1000000 0x0 0x20000 0x88b0 0x20000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8890 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x88a0 0x0 0x10 0x0 0x3000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 462: interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x18 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x19 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x1a 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x1b 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 470: compatible = "cavium,thunder-8190-tdm"; DT compatible string "cavium,thunder-8190-tdm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/2/src/mainboard/opencellular/elgon/gb… PS2, Line 470: compatible = "cavium,thunder-8190-tdm"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt -- To view, visit https://review.coreboot.org/28024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Gerrit-Change-Number: 28024 Gerrit-PatchSet: 2 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 23:19:54 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mainboard/opencellular/elgon: Add mainboard support
by Philipp Deppenwiese (Code Review) 10 Aug '18

10 Aug '18

Philipp Deppenwiese has uploaded a new patch set (#2). ( https://review.coreboot.org/28024 ) Change subject: mainboard/opencellular/elgon: Add mainboard support ...................................................................... mainboard/opencellular/elgon: Add mainboard support Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- A src/mainboard/opencellular/elgon/Kconfig A src/mainboard/opencellular/elgon/Kconfig.name A src/mainboard/opencellular/elgon/Makefile.inc A src/mainboard/opencellular/elgon/bdk_devicetree.c A src/mainboard/opencellular/elgon/board.fmd A src/mainboard/opencellular/elgon/board_info.txt A src/mainboard/opencellular/elgon/bootblock.c A src/mainboard/opencellular/elgon/death.c A src/mainboard/opencellular/elgon/devicetree.cb A src/mainboard/opencellular/elgon/gbcv2.dts A src/mainboard/opencellular/elgon/mainboard.c A src/mainboard/opencellular/elgon/mainboard.h A src/mainboard/opencellular/elgon/memlayout.ld A src/mainboard/opencellular/elgon/romstage.c A src/mainboard/opencellular/elgon/vboot.fmd 15 files changed, 1,259 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/28024/2 -- To view, visit https://review.coreboot.org/28024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Gerrit-Change-Number: 28024 Gerrit-PatchSet: 2 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: mainboard/opencellular/elgon: Add mainboard support
by build bot (Jenkins) (Code Review) 10 Aug '18

10 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28024 ) Change subject: mainboard/opencellular/elgon: Add mainboard support ...................................................................... Patch Set 1: (129 comments) https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… File src/mainboard/opencellular/elgon/gbcv2.dts: https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 20: compatible = "cavium,thunder-81xx"; DT compatible string "cavium,thunder-81xx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 20: compatible = "cavium,thunder-81xx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 26: compatible = "arm,psci-0.2"; DT compatible string "arm,psci-0.2" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 26: compatible = "arm,psci-0.2"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 58: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 69: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 80: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "cavium,thunder" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string "arm,armv8" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 91: compatible = "cavium,thunder", "arm,armv8"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 102: compatible = "cache"; DT compatible string "cache" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 109: compatible = "arm,armv8-timer"; DT compatible string "arm,armv8-timer" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 109: compatible = "arm,armv8-timer"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string "cavium,thunder-pmu" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string "arm,armv8-pmuv3" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 114: compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 119: compatible = "regulator-fixed"; DT compatible string "regulator-fixed" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 130: compatible = "arm,gic-v3"; DT compatible string "arm,gic-v3" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 130: compatible = "arm,gic-v3"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 143: compatible = "arm,gic-v3-its"; DT compatible string "arm,gic-v3-its" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 143: compatible = "arm,gic-v3-its"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 153: compatible = "simple-bus"; DT compatible string "simple-bus" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 160: compatible = "fixed-clock"; DT compatible string "fixed-clock" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 169: compatible = "fixed-clock"; DT compatible string "fixed-clock" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 178: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 187: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 196: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,pl011" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string "arm,primecell" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 205: compatible = "arm,pl011", "arm,primecell"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 214: compatible = "arm,sbsa-gwdt"; DT compatible string "arm,sbsa-gwdt" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 214: compatible = "arm,sbsa-gwdt"; DT compatible string vendor "arm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 215: reg = <0x8440 0xa0000 0x0 0x1000 0x8440 0xb0000 0x0 0x1000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 220: compatible = "cavium,smmu-v2"; DT compatible string "cavium,smmu-v2" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 220: compatible = "cavium,smmu-v2"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 223: interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 228: compatible = "pci-host-ecam-generic"; DT compatible string "pci-host-ecam-generic" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 239: ranges = <0x3000000 0x8010 0x0 0x8010 0x0 0x80 0x0 0x3000000 0x8100 0x0 0x8100 0x0 0x80 0x0 0x3000000 0x8680 0x0 0x8680 0x0 0x160 0x28000000 0x3000000 0x87e0 0x2c000000 0x87e0 0x2c000000 0x0 0x94000000 0x3000000 0x8400 0x0 0x8400 0x0 0x10 0x0 0x3000000 0x8430 0x0 0x8430 0x0 0x2 0x0 0x3000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x1f 0x3a000000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; DT compatible string "pci-bridge" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; DT compatible string "cavium,thunder-8890-mrml-bridge" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 244: compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 247: ranges = <0x3000000 0x87e0 0x0 0x3000000 0x87e0 0x0 0x10 0x0>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 253: compatible = "cavium,thunder-8890-mdio-nexus"; DT compatible string "cavium,thunder-8890-mdio-nexus" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 253: compatible = "cavium,thunder-8890-mdio-nexus"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 253: compatible = "cavium,thunder-8890-mdio-nexus"; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 257: assigned-addresses = <0x3000000 0x87e0 0x5000000 0x0 0x800000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 258: ranges = <0x87e0 0x5000000 0x3000000 0x87e0 0x5000000 0x0 0x800000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 261: compatible = "cavium,thunder-8890-mdio"; DT compatible string "cavium,thunder-8890-mdio" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 261: compatible = "cavium,thunder-8890-mdio"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 261: compatible = "cavium,thunder-8890-mdio"; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 264: reg = <0x87e0 0x5003800 0x0 0x30>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 268: compatible = "cavium,thunder-8890-mdio"; DT compatible string "cavium,thunder-8890-mdio" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 268: compatible = "cavium,thunder-8890-mdio"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 268: compatible = "cavium,thunder-8890-mdio"; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 271: reg = <0x87e0 0x5003880 0x0 0x30>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 276: compatible = "cavium,thunder-8890-mmc"; DT compatible string "cavium,thunder-8890-mmc" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 276: compatible = "cavium,thunder-8890-mmc"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 283: compatible = "mmc-slot"; DT compatible string "mmc-slot" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 303: compatible = "cavium,thunder-8890-twsi"; DT compatible string "cavium,thunder-8890-twsi" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 303: compatible = "cavium,thunder-8890-twsi"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 310: compatible = "idt,82p33914-1"; DT compatible string "idt,82p33914-1" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 310: compatible = "idt,82p33914-1"; DT compatible string vendor "idt" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 318: compatible = "cavium,thunder-8890-twsi"; DT compatible string "cavium,thunder-8890-twsi" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 318: compatible = "cavium,thunder-8890-twsi"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 325: compatible = "atmel,24c256"; DT compatible string "atmel,24c256" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 325: compatible = "atmel,24c256"; DT compatible string vendor "atmel" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 331: compatible = "isil,isl12057"; DT compatible string "isil,isl12057" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 331: compatible = "isil,isl12057"; DT compatible string vendor "isil" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 336: compatible = "infineon,slb9645xq-12"; DT compatible string "infineon,slb9645xq-12" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 336: compatible = "infineon,slb9645xq-12"; DT compatible string vendor "infineon" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 336: compatible = "infineon,slb9645xq-12"; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 344: compatible = "cavium,thunder-8890-bgx"; DT compatible string "cavium,thunder-8890-bgx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 344: compatible = "cavium,thunder-8890-bgx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 349: local-mac-address = [00 00 00 00 00 00]; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 356: compatible = "cavium,thunder-8890-bgx"; DT compatible string "cavium,thunder-8890-bgx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 356: compatible = "cavium,thunder-8890-bgx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 362: local-mac-address = [00 00 00 00 00 00]; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 370: compatible = "cavium,thunder-8890-bgx"; DT compatible string "cavium,thunder-8890-bgx" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 370: compatible = "cavium,thunder-8890-bgx"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 376: compatible = "cavium,thunder-8190-spi"; DT compatible string "cavium,thunder-8190-spi" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 376: compatible = "cavium,thunder-8190-spi"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 383: compatible = "micron,n25q128a13", "spi-flash"; DT compatible string "micron,n25q128a13" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 383: compatible = "micron,n25q128a13", "spi-flash"; DT compatible string vendor "micron" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 383: compatible = "micron,n25q128a13", "spi-flash"; DT compatible string "spi-flash" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 383: compatible = "micron,n25q128a13", "spi-flash"; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 393: compatible = "cavium,thunder-8890-gpio"; DT compatible string "cavium,thunder-8890-gpio" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 393: compatible = "cavium,thunder-8890-gpio"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 404: compatible = "cavium,cn8130-nand"; DT compatible string "cavium,cn8130-nand" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 404: compatible = "cavium,cn8130-nand"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 411: compatible = "cavium,pci-host-thunder-pem"; DT compatible string "cavium,pci-host-thunder-pem" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 411: compatible = "cavium,pci-host-thunder-pem"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 420: reg = <0x8800 0x1f000000 0x0 0x39000000 0x87e0 0xc0000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 421: ranges = <0x1000000 0x0 0x0 0x8830 0x0 0x0 0x10000 0x3000000 0x0 0x10000000 0x8810 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8820 0x0 0x10 0x0 0x3000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 424: interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x10 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x11 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x12 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x13 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 430: compatible = "cavium,pci-host-thunder-pem"; DT compatible string "cavium,pci-host-thunder-pem" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 430: compatible = "cavium,pci-host-thunder-pem"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 439: reg = <0x8840 0x57000000 0x0 0x39000000 0x87e0 0xc1000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 440: ranges = <0x1000000 0x0 0x10000 0x8870 0x10000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8850 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8860 0x0 0x10 0x0 0x3000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 443: interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x14 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x15 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x16 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x17 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 449: compatible = "cavium,pci-host-thunder-pem"; DT compatible string "cavium,pci-host-thunder-pem" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 449: compatible = "cavium,pci-host-thunder-pem"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 458: reg = <0x8880 0x8f000000 0x0 0x39000000 0x87e0 0xc2000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 459: ranges = <0x1000000 0x0 0x20000 0x88b0 0x20000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8890 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x88a0 0x0 0x10 0x0 0x3000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x0 0x1000000>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 462: interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x18 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x19 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x1a 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x1b 0x4>; line over 80 characters https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 470: compatible = "cavium,thunder-8190-tdm"; DT compatible string "cavium,thunder-8190-tdm" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/ https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/gb… PS1, Line 470: compatible = "cavium,thunder-8190-tdm"; DT compatible string vendor "cavium" appears un-documented -- check util/lint/checkpatch.pl/Documentation/devicetree/bindings/vendor-prefixes.txt https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/ma… File src/mainboard/opencellular/elgon/mainboard.h: https://review.coreboot.org/#/c/28024/1/src/mainboard/opencellular/elgon/ma… PS1, Line 18: #define ELGON_GPIO_SPI_MUX 24 please, no space before tabs -- To view, visit https://review.coreboot.org/28024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Gerrit-Change-Number: 28024 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 23:17:37 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mainboard/opencellular/elgon: Add mainboard support
by Philipp Deppenwiese (Code Review) 10 Aug '18

10 Aug '18

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/28024 Change subject: mainboard/opencellular/elgon: Add mainboard support ...................................................................... mainboard/opencellular/elgon: Add mainboard support Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- A src/mainboard/opencellular/elgon/Kconfig A src/mainboard/opencellular/elgon/Kconfig.name A src/mainboard/opencellular/elgon/Makefile.inc A src/mainboard/opencellular/elgon/bdk_devicetree.c A src/mainboard/opencellular/elgon/board.fmd A src/mainboard/opencellular/elgon/board_info.txt A src/mainboard/opencellular/elgon/bootblock.c A src/mainboard/opencellular/elgon/death.c A src/mainboard/opencellular/elgon/devicetree.cb A src/mainboard/opencellular/elgon/gbcv2.dts A src/mainboard/opencellular/elgon/mainboard.c A src/mainboard/opencellular/elgon/mainboard.h A src/mainboard/opencellular/elgon/memlayout.ld A src/mainboard/opencellular/elgon/romstage.c A src/mainboard/opencellular/elgon/vboot.fmd 15 files changed, 1,259 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/28024/1 diff --git a/src/mainboard/opencellular/elgon/Kconfig b/src/mainboard/opencellular/elgon/Kconfig new file mode 100644 index 0000000..bd35e9c --- /dev/null +++ b/src/mainboard/opencellular/elgon/Kconfig @@ -0,0 +1,94 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2018 Facebook, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +if BOARD_OPENCELLULAR_ELGON + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select COMMON_CBFS_SPI_WRAPPER + select RTC + select SOC_CAVIUM_CN81XX + select SPI_FLASH + select SPI_FLASH_WINBOND + select MAINBOARD_HAS_I2C_TPM_GENERIC + select MAINBOARD_HAS_TPM1 + +config VBOOT + select VBOOT_NO_BOARD_SUPPORT + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + +config GBB_HWID + string + depends on VBOOT + default "ELGON" + +config MAINBOARD_DIR + string + default "opencellular/elgon" + +config MAINBOARD_VENDOR + string + default "Open Cellular" + +config DRIVER_TPM_I2C_BUS + hex + default 0x1 + +config DRIVER_TPM_I2C_ADDR + hex + default 0x20 + +config DRAM_SIZE_MB + int + default 4096 + +config BOOT_DEVICE_SPI_FLASH_BUS + int + default 0 + +config CONSOLE_SERIAL_UART_ADDRESS + hex + depends on DRIVERS_UART + default 0x87E028000000 + +config UART_FOR_CONSOLE + int + depends on DRIVERS_UART + default 0 + +config FMDFILE + string + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd" + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot.fmd" if VBOOT + +config MAX_CPUS + default 4 + +########################################################## +#### Update below when adding a new derivative board. #### +########################################################## +config DEVICETREE + string + default "devicetree.cb" + +config MAINBOARD_PART_NUMBER + string + default "Elgon" + +endif diff --git a/src/mainboard/opencellular/elgon/Kconfig.name b/src/mainboard/opencellular/elgon/Kconfig.name new file mode 100644 index 0000000..e0c4290 --- /dev/null +++ b/src/mainboard/opencellular/elgon/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_OPENCELLULAR_ELGON + bool "Elgon" diff --git a/src/mainboard/opencellular/elgon/Makefile.inc b/src/mainboard/opencellular/elgon/Makefile.inc new file mode 100644 index 0000000..26de1cc --- /dev/null +++ b/src/mainboard/opencellular/elgon/Makefile.inc @@ -0,0 +1,41 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2017-present Facebook, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +bootblock-y += bootblock.c +bootblock-y += memlayout.ld +bootblock-y += death.c + +romstage-y += memlayout.ld +romstage-y += romstage.c +romstage-y += bdk_devicetree.c +romstage-y += death.c + +ramstage-y += mainboard.c +ramstage-y += memlayout.ld +ramstage-y += bdk_devicetree.c +ramstage-y += death.c + +verstage-y += memlayout.ld +verstage-y += death.c + +MB_DIR = src/mainboard/$(MAINBOARDDIR) + +LINUX_DTB = gbcv2.dtb +build/$(LINUX_DTB): + dtc -p 4096 -I dts -O dtb -o build/$(LINUX_DTB) -i $(MB_DIR) $(MB_DIR)/$(patsubst %.dtb,%.dts,$(LINUX_DTB)) + +cbfs-files-y += $(LINUX_DTB) +$(LINUX_DTB)-file := build/$(LINUX_DTB) +$(LINUX_DTB)-type := raw diff --git a/src/mainboard/opencellular/elgon/bdk_devicetree.c b/src/mainboard/opencellular/elgon/bdk_devicetree.c new file mode 100644 index 0000000..9f8c64e --- /dev/null +++ b/src/mainboard/opencellular/elgon/bdk_devicetree.c @@ -0,0 +1,106 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +// This file is automatically generated. +// DO NOT EDIT BY HAND. + +#include <bdk-devicetree.h> + +const struct bdk_devicetree_key_value devtree[] = { +{"DDR-CONFIG-DQX-CTL", "0x4"}, +{"DDR-CONFIG-WODT-MASK.RANKS2.DIMMS2", "0xc0c0303"}, +{"DDR-CONFIG-WODT-MASK.RANKS4.DIMMS1", "0x1030203"}, +{"DDR-CONFIG-MODE1-RTT-WR.RANKS1.DIMMS1.RANK0", "0x4"}, +{"DDR-CONFIG-MODE1-RTT-WR.RANKS1.DIMMS2.RANK0", "0x4"}, +{"DDR-CONFIG-MODE1-RTT-WR.RANKS1.DIMMS2.RANK2", "0x4"}, +{"DDR-CONFIG-MODE1-RTT-WR.RANKS2.DIMMS1.RANK0", "0x2"}, +{"DDR-CONFIG-MODE1-RTT-WR.RANKS2.DIMMS1.RANK1", "0x2"}, +{"DDR-CONFIG-MODE1-RTT-WR.RANKS2.DIMMS2", "0x2"}, +{"DDR-CONFIG-MODE1-RTT-WR.RANKS4", "0x1"}, +{"DDR-CONFIG-MODE1-DIC.RANKS4.DIMMS1", "0x1"}, +{"DDR-CONFIG-MODE1-RTT-NOM.RANKS2.DIMMS2", "0x2"}, +{"DDR-CONFIG-MODE1-RTT-NOM.RANKS4.DIMMS1.RANK0", "0x4"}, +{"DDR-CONFIG-MODE1-RTT-NOM.RANKS4.DIMMS1.RANK2", "0x4"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS1.DIMMS1.RANK0", "0x1"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS1.DIMMS2.RANK0", "0x5"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS1.DIMMS2.RANK2", "0x5"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS2.DIMMS1.RANK0", "0x2"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS2.DIMMS1.RANK1", "0x2"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS2.DIMMS2", "0x1"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS4.DIMMS1.RANK0", "0x6"}, +{"DDR-CONFIG-MODE2-RTT-PARK.RANKS4.DIMMS1.RANK1", "0x6"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS1.DIMMS1.RANK0", "0x22"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS1.DIMMS2.RANK0", "0x1f"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS1.DIMMS2.RANK2", "0x1f"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS2.DIMMS1.RANK0", "0x19"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS2.DIMMS1.RANK1", "0x19"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS2.DIMMS2", "0x19"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS4.DIMMS1.RANK0", "0x1f"}, +{"DDR-CONFIG-MODE2-VREF-VALUE.RANKS4.DIMMS1.RANK1", "0x1f"}, +{"DDR-CONFIG-RODT-CTL.RANKS1.DIMMS1", "0x7"}, +{"DDR-CONFIG-RODT-CTL.RANKS1.DIMMS2", "0x3"}, +{"DDR-CONFIG-RODT-CTL.RANKS2.DIMMS1", "0x3"}, +{"DDR-CONFIG-RODT-CTL.RANKS2.DIMMS2", "0x7"}, +{"DDR-CONFIG-RODT-CTL.RANKS4.DIMMS1", "0x7"}, +{"DDR-CONFIG-RODT-MASK.RANKS2.DIMMS2", "0x4080102"}, +{"DDR-CONFIG-RODT-MASK.RANKS4.DIMMS1", "0x1010202"}, +{"DDR-CONFIG-CUSTOM-MIN-RTT-NOM-IDX", "0x1"}, +{"DDR-CONFIG-CUSTOM-MAX-RTT-NOM-IDX", "0x7"}, +{"DDR-CONFIG-CUSTOM-MIN-RODT-CTL", "0x1"}, +{"DDR-CONFIG-CUSTOM-MAX-RODT-CTL", "0x7"}, +{"DDR-CONFIG-CUSTOM-OFFSET-EN", "0x1"}, +{"DDR-CONFIG-CUSTOM-OFFSET", "0x2"}, +{"DDR-CONFIG-CUSTOM-DDR2T", "0x1"}, +{"DDR-CONFIG-CUSTOM-MAXIMUM-ADJACENT-RLEVEL-DELAY-INCREMENT", "0x2"}, +{"DDR-CONFIG-CUSTOM-FPRCH2", "0x2"}, +{"PHY-ADDRESS.N0.BGX0.P0", "0x00001000"}, +{"PHY-ADDRESS.N0.BGX2.P0", "0x00001000"}, +{"BGX-ENABLE.N0.BGX0.P0", "1"}, +{"BGX-ENABLE.N0.BGX0.P1", "0"}, +{"BGX-ENABLE.N0.BGX0.P2", "0"}, +{"BGX-ENABLE.N0.BGX0.P3", "0"}, +{"BGX-ENABLE.N0.BGX1.P0", "0"}, +{"BGX-ENABLE.N0.BGX1.P1", "0"}, +{"BGX-ENABLE.N0.BGX2.P0", "1"}, +{"BDK-NUM-PACKET-BUFFERS", "0x1000"}, +{"BDK-PACKET-BUFFER-SIZE", "0x400"}, +{"BDK-SHOW-LINK-STATUS", "1"}, +{"BDK-COREMASK", "0"}, +{"BDK-BOOT-MENU-TIMEOUT", "0x05"}, +{"BDK-BOOT-PATH-OPTION", "0"}, +{"BDK-CONFIG-TRACE", "1"}, +{"MULTI-NODE", "0"}, +{"QLM-AUTO-CONFIG", "0"}, +{"QLM-DIP-AUTO-CONFIG", "0"}, +{"QLM-MODE.N0.QLM0", "PCIE_1X1"}, +{"QLM-MODE.N0.QLM1", "SGMII_2X1"}, +{"QLM-MODE.N0.QLM2", "PCIE_1X2"}, +{"QLM-MODE.N0.QLM3", "SATA_2X1"}, +{"QLM-FREQ.N0.QLM0", "6000"}, +{"QLM-FREQ.N0.QLM1", "1250"}, +{"QLM-FREQ.N0.QLM2", "6000"}, +{"QLM-FREQ.N0.QLM3", "6000"}, +{"QLM-CLK.N0.QLM0", "2"}, +{"QLM-CLK.N0.QLM1", "2"}, +{"QLM-CLK.N0.QLM2", "2"}, +{"QLM-CLK.N0.QLM3", "2"}, +{"DDR-SPEED.N0", "1600"}, +{"DDR-CONFIG-SPD-ADDR.DIMM0.LMC0", "0x1050"}, +{"USB-REFCLK-SRC.N0.PORT0", "0"}, +{"GPIO-PIN-SELECT-GPIO45", "0x2"}, +{"GPIO-PIN-SELECT-GPIO46", "0x250"}, +{0, 0}, +}; diff --git a/src/mainboard/opencellular/elgon/board.fmd b/src/mainboard/opencellular/elgon/board.fmd new file mode 100644 index 0000000..fb0bf13 --- /dev/null +++ b/src/mainboard/opencellular/elgon/board.fmd @@ -0,0 +1,12 @@ +FLASH@0x0 16M { + WP_RO@0x0 0x1000000 { + RO_SECTION@0x0 0x1000000 { + # bootblock includes trusted/non-trusted CLIB, CSIB, + # and BL1FWs packaged in + # src/soc/cavium/common/Makefile.inc. + BOOTBLOCK@0x10000 0x70000 + FMAP@0x80000 0x1000 + COREBOOT(CBFS)@0x81000 0xf7f000 + } + } +} diff --git a/src/mainboard/opencellular/elgon/board_info.txt b/src/mainboard/opencellular/elgon/board_info.txt new file mode 100644 index 0000000..06dcd35 --- /dev/null +++ b/src/mainboard/opencellular/elgon/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Open Cellular +Board name: Elgon +Category: sbc +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/opencellular/elgon/bootblock.c b/src/mainboard/opencellular/elgon/bootblock.c new file mode 100644 index 0000000..21cc6b2 --- /dev/null +++ b/src/mainboard/opencellular/elgon/bootblock.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <soc/soc.h> +#include <soc/spi.h> +#include <soc/uart.h> +#include <soc/gpio.h> +#include "mainboard.h" + +void bootblock_mainboard_early_init(void) +{ + /* Route UART0 to CON1 */ + gpio_output(ELGON_GPIO_UART_SEL, 0); + + /* Turn off error LED */ + gpio_output(ELGON_GPIO_ERROR_LED, 0); + + if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { + if (!uart_is_enabled(CONFIG_UART_FOR_CONSOLE)) + uart_setup(CONFIG_UART_FOR_CONSOLE, CONFIG_TTYS0_BAUD); + } +} + +static void configure_spi_flash(void) +{ + /* FIXME: Only tested on EM100 Pro */ + spi_init_custom(0, // bus + 12500000, // speed Hz + 0, // idle low disabled + 0, // zero idle cycles between transfers + 0, // MSB first + 0, // Chip select 0 + 1); // assert is high + + /* Route SPI to SoC */ + gpio_output(ELGON_GPIO_SPI_MUX, 1); +} + +void bootblock_mainboard_init(void) +{ + configure_spi_flash(); +} diff --git a/src/mainboard/opencellular/elgon/death.c b/src/mainboard/opencellular/elgon/death.c new file mode 100644 index 0000000..d1b1988 --- /dev/null +++ b/src/mainboard/opencellular/elgon/death.c @@ -0,0 +1,32 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <soc/gpio.h> +#include <console/console.h> +#include <delay.h> +#include "mainboard.h" + +void die_notify(void) +{ + const u32 rate = 1000 / 5; // blink at 5 Hz + + do { + gpio_output(ELGON_GPIO_ERROR_LED, 0); + mdelay(rate); + gpio_output(ELGON_GPIO_ERROR_LED, 1); + mdelay(rate); + } while (1); +} diff --git a/src/mainboard/opencellular/elgon/devicetree.cb b/src/mainboard/opencellular/elgon/devicetree.cb new file mode 100644 index 0000000..07d508a --- /dev/null +++ b/src/mainboard/opencellular/elgon/devicetree.cb @@ -0,0 +1,210 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2017-present Facebook, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +chip soc/cavium/cn81xx + device cpu_cluster 0 on end + + device domain 0 on + chip soc/cavium/common/pci + register "secure" = "0" + device pci 01.0 on # PCI bridge + chip soc/cavium/common/pci + register "secure" = "0" + device pci 00.0 on end # MRML + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 00.1 on end # RESET + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 00.2 on end # DAP + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 00.3 on end # MDIO + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 00.4 on end # FUSE + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 01.2 on end # SGPIO + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 01.3 on end # SMI + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 01.4 on end # MMC + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 01.5 on end # KEY + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 01.6 on end # BOOT BUS + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 01.7 on end # PBUS + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 02.0 on end # XCV + end + device pci 04.0 on end + + chip soc/cavium/common/pci + register "secure" = "0" + device pci 06.0 on end # L2C-TAD + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 07.0 on end # L2C-CBC + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 07.4 on end # L2C-MCI + end + + chip soc/cavium/common/pci + register "secure" = "1" + device pci 08.0 on end # UUA0 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 08.1 on end # UUA1 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 08.2 off end # UUA2 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 08.3 off end # UUA3 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 08.4 on end # VRM + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 09.0 on end # I2C0 + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 09.1 on end # I2C1 + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 0a.0 on end # PCC Bridge + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 0b.0 on end # IOBN + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 0c.0 on end # OCLA0 + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 0c.1 on end # OCLA1 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 0d.0 on end + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 0e.0 on end # PCIe0 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 0e.1 on end # PCIe1 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 0e.2 on end # PCIe2 + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 10.0 on end # bgx0 + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 10.1 off end # bgx1 + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 11.0 on end # rgx0 + end + chip soc/cavium/common/pci + register "secure" = "0" + device pci 12.0 on end # MAC + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 1c.0 on end # GSER0 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 1c.1 on end # GSER1 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 1c.2 on end # GSER2 + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 1c.3 on end # GSER3 + end + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 02.0 on end #SMMU + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 03.0 on end #GIC + end + chip soc/cavium/common/pci + register "secure" = "1" + device pci 04.0 on end #GTI + end + + device pci 05.0 on end # NIC + device pci 06.0 on end # GPIO + device pci 07.0 on end # SPI + device pci 08.0 on end # MIO + device pci 09.0 on end # PCI bridge + device pci 0a.0 on end # PCI bridge + device pci 0b.0 on end # NFC + device pci 0c.0 on end # PCI bridge + device pci 0d.0 on end # PCM + device pci 0e.0 on end # VRM + device pci 0f.0 on end # PCI bridge + + device pci 10.0 on end # USB0 + device pci 11.0 on end # USB1 + device pci 16.0 on end # SATA0 + device pci 17.0 on end # SATA1 + end + end +end diff --git a/src/mainboard/opencellular/elgon/gbcv2.dts b/src/mainboard/opencellular/elgon/gbcv2.dts new file mode 100644 index 0000000..1f8a47b --- /dev/null +++ b/src/mainboard/opencellular/elgon/gbcv2.dts @@ -0,0 +1,495 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/ { + model = "Cavium ThunderX CN81XX board"; + compatible = "cavium,thunder-81xx"; + interrupt-parent = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x2>; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu-map { + + cluster0 { + + core0 { + cpu = <0x2>; + }; + + core1 { + cpu = <0x3>; + }; + + core2 { + cpu = <0x4>; + }; + + core3 { + cpu = <0x5>; + }; + }; + }; + + cpu@0 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + numa-node-id = <0x0>; + next-level-cache = <0x6>; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + numa-node-id = <0x0>; + next-level-cache = <0x6>; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + numa-node-id = <0x0>; + next-level-cache = <0x6>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + numa-node-id = <0x0>; + next-level-cache = <0x6>; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + }; + + l2-cache0 { + compatible = "cache"; + numa-node-id = <0x0>; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x1 0xd 0x4 0x1 0xe 0x4 0x1 0xb 0x4 0x1 0xa 0x4>; + }; + + pmu { + compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; + interrupts = <0x1 0x7 0x4>; + }; + + mmc_supply_3v3 { + compatible = "regulator-fixed"; + regulator-name = "mmc_supply_3v3"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + gpio = <0x7 0x8 0x0>; + enable-active-high; + linux,phandle = <0xf>; + phandle = <0xf>; + }; + + interrupt-controller@801000000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <0x3>; + #address-cells = <0x2>; + #size-cells = <0x2>; + #redistributor-regions = <0x1>; + ranges; + interrupt-controller; + reg = <0x8010 0x0 0x0 0x10000 0x8010 0x80000000 0x0 0x600000>; + interrupts = <0x1 0x9 0x4>; + linux,phandle = <0x1>; + phandle = <0x1>; + + gic-its@801000020000 { + compatible = "arm,gic-v3-its"; + reg = <0x8010 0x20000 0x0 0x200000>; + msi-controller; + numa-node-id = <0x0>; + linux,phandle = <0xd>; + phandle = <0xd>; + }; + }; + + soc@0 { + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + numa-node-id = <0x0>; + + refclkuaa { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x6f3c900>; + clock-output-names = "refclkuaa"; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + sclk { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x2faf0800>; + clock-output-names = "sclk"; + linux,phandle = <0xe>; + phandle = <0xe>; + }; + + serial@87e028000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x28000000 0x0 0x1000>; + interrupts = <0x0 0x5 0x4>; + clocks = <0x8>; + clock-names = "apb_pclk"; + skip-init; + }; + + serial@87e029000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x29000000 0x0 0x1000>; + interrupts = <0x0 0x6 0x4>; + clocks = <0x8>; + clock-names = "apb_pclk"; + skip-init; + }; + + serial@87e02a000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x2a000000 0x0 0x1000>; + interrupts = <0x0 0x7 0x4>; + clocks = <0x8>; + clock-names = "apb_pclk"; + skip-init; + }; + + serial@87e02b000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x2b000000 0x0 0x1000>; + interrupts = <0x0 0x8 0x4>; + clocks = <0x8>; + clock-names = "apb_pclk"; + skip-init; + }; + + watch-dog@8440000a0000 { + compatible = "arm,sbsa-gwdt"; + reg = <0x8440 0xa0000 0x0 0x1000 0x8440 0xb0000 0x0 0x1000>; + interrupts = <0x0 0x9 0x4>; + }; + + smmu0@830000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8300 0x0 0x0 0x2000000>; + #global-interrupts = <0x1>; + interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4>; + mmu-masters = <0x9 0x100 0xa 0x200 0xb 0x300 0xc 0x400>; + }; + + pci@848000000000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + msi-parent = <0xd>; + msi-map = <0x0 0xd 0x0 0x10000>; + bus-range = <0x0 0x1f>; + #size-cells = <0x2>; + #address-cells = <0x3>; + #stream-id-cells = <0x1>; + u-boot,dm-pre-reloc; + dma-coherent; + reg = <0x8480 0x0 0x0 0x2000000>; + ranges = <0x3000000 0x8010 0x0 0x8010 0x0 0x80 0x0 0x3000000 0x8100 0x0 0x8100 0x0 0x80 0x0 0x3000000 0x8680 0x0 0x8680 0x0 0x160 0x28000000 0x3000000 0x87e0 0x2c000000 0x87e0 0x2c000000 0x0 0x94000000 0x3000000 0x8400 0x0 0x8400 0x0 0x10 0x0 0x3000000 0x8430 0x0 0x8430 0x0 0x2 0x0 0x3000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x1f 0x3a000000>; + linux,phandle = <0x9>; + phandle = <0x9>; + + mrml-bridge0@1,0 { + compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; + #size-cells = <0x2>; + #address-cells = <0x3>; + ranges = <0x3000000 0x87e0 0x0 0x3000000 0x87e0 0x0 0x10 0x0>; + reg = <0x800 0x0 0x0 0x0 0x0>; + device_type = "pci"; + u-boot,dm-pre-reloc; + + mdio-nexus@1,3 { + compatible = "cavium,thunder-8890-mdio-nexus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + reg = <0xb00 0x0 0x0 0x0 0x0>; + assigned-addresses = <0x3000000 0x87e0 0x5000000 0x0 0x800000>; + ranges = <0x87e0 0x5000000 0x3000000 0x87e0 0x5000000 0x0 0x800000>; + + mdio0@87e005003800 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x87e0 0x5003800 0x0 0x30>; + }; + + mdio1@87e005003880 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x87e0 0x5003880 0x0 0x30>; + }; + }; + + mmc@1,4 { + compatible = "cavium,thunder-8890-mmc"; + reg = <0xc00 0x0 0x0 0x0 0x0>; + #address-cells = <0x1>; + #size-cells = <0x0>; + clocks = <0xe>; + + mmc-slot@0 { + compatible = "mmc-slot"; + reg = <0x0>; + vmmc-supply = <0xf>; + max-frequency = <0x18cba80>; + no-1-8-v; + bus-width = <0x4>; + disable-wp; + broken-cd; + sd-uhs-sdr25; + sd-uhs-ddr50; + sd-uhs-sdr50; + cap-sd-highspeed; + no-sdio; + no-mmc; + }; + }; + + i2c@9,0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "cavium,thunder-8890-twsi"; + reg = <0x4800 0x0 0x0 0x0 0x0>; + clock-frequency = <0x186a0>; + clocks = <0xe>; + u-boot,dm-pre-reloc; + + idt-ptp@0x52 { + compatible = "idt,82p33914-1"; + reg = <0x52>; + }; + }; + + i2c@9,1 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "cavium,thunder-8890-twsi"; + reg = <0x4900 0x0 0x0 0x0 0x0>; + clock-frequency = <0x186a0>; + clocks = <0xe>; + u-boot,dm-pre-reloc; + + rom@54 { + compatible = "atmel,24c256"; + reg = <0x54>; + pagesize = <0x40>; + }; + + rtc@68 { + compatible = "isil,isl12057"; + reg = <0x68>; + }; + + tpm@0x20 { + compatible = "infineon,slb9645xq-12"; + reg = <0x20>; + }; + }; + + rgx0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "cavium,thunder-8890-bgx"; + reg = <0x9000 0x0 0x0 0x0 0x0>; + + rgmii00 { + reg = <0x0>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; + + bgx0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "cavium,thunder-8890-bgx"; + reg = <0x8000 0x0 0x0 0x0 0x0>; + + sgmii00 { + reg = <0x0>; + qlm-mode = "0x000,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + cavium,disable-autonegotiation; + }; + }; + + bgx1 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "cavium,thunder-8890-bgx"; + reg = <0x8100 0x0 0x0 0x0 0x0>; + }; + }; + + spi@7,0 { + compatible = "cavium,thunder-8190-spi"; + reg = <0x3800 0x0 0x0 0x0 0x0>; + #address-cells = <0x1>; + #size-cells = <0x0>; + clocks = <0xe>; + + flash@0 { + compatible = "micron,n25q128a13", "spi-flash"; + reg = <0x0>; + spi-max-frequency = <0xf42400>; + #address-cells = <0x1>; + #size-cells = <0x1>; + }; + }; + + gpio0@6,0 { + #gpio-cells = <0x2>; + compatible = "cavium,thunder-8890-gpio"; + gpio-controller; + reg = <0x3000 0x0 0x0 0x0 0x0>; + u-boot,dm-pre-reloc; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + nand@b,0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "cavium,cn8130-nand"; + reg = <0x5800 0x0 0x0 0x0 0x0>; + clocks = <0xe>; + }; + }; + + pci@87e0c0000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <0xd>; + msi-map = <0x0 0xd 0x0 0x10000>; + bus-range = <0x1f 0x57>; + #size-cells = <0x2>; + #address-cells = <0x3>; + #stream-id-cells = <0x1>; + dma-coherent; + reg = <0x8800 0x1f000000 0x0 0x39000000 0x87e0 0xc0000000 0x0 0x1000000>; + ranges = <0x1000000 0x0 0x0 0x8830 0x0 0x0 0x10000 0x3000000 0x0 0x10000000 0x8810 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8820 0x0 0x10 0x0 0x3000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x0 0x1000000>; + #interrupt-cells = <0x1>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x10 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x11 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x12 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x13 0x4>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + pci@87e0c1000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <0xd>; + msi-map = <0x0 0xd 0x0 0x10000>; + bus-range = <0x57 0x8f>; + #size-cells = <0x2>; + #address-cells = <0x3>; + #stream-id-cells = <0x1>; + dma-coherent; + reg = <0x8840 0x57000000 0x0 0x39000000 0x87e0 0xc1000000 0x0 0x1000000>; + ranges = <0x1000000 0x0 0x10000 0x8870 0x10000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8850 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8860 0x0 0x10 0x0 0x3000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x0 0x1000000>; + #interrupt-cells = <0x1>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x14 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x15 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x16 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x17 0x4>; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + pci@87e0c2000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <0xd>; + msi-map = <0x0 0xd 0x0 0x10000>; + bus-range = <0x8f 0xc7>; + #size-cells = <0x2>; + #address-cells = <0x3>; + #stream-id-cells = <0x1>; + dma-coherent; + reg = <0x8880 0x8f000000 0x0 0x39000000 0x87e0 0xc2000000 0x0 0x1000000>; + ranges = <0x1000000 0x0 0x20000 0x88b0 0x20000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8890 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x88a0 0x0 0x10 0x0 0x3000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x0 0x1000000>; + #interrupt-cells = <0x1>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x18 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x19 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x1a 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x1b 0x4>; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + + tdm@d,0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "cavium,thunder-8190-tdm"; + reg = <0x6800 0x0 0x0 0x0>; + clocks = <0xe>; + }; + }; + + aliases { + serial0 = "/soc@0/serial@87e028000000"; + serial1 = "/soc@0/serial@87e029000000"; + serial2 = "/soc@0/serial@87e02a000000"; + serial3 = "/soc@0/serial@87e02b000000"; + i2c0 = "/soc@0/pci@848000000000/mrml-bridge0@1,0/i2c@9,0"; + i2c1 = "/soc@0/pci@848000000000/mrml-bridge0@1,0/i2c@9,1"; + spi0 = "/soc@0/pci@848000000000/spi@7,0"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x1400000 0x0 0x7ec00000>; + numa-node-id = <0x0>; + }; +}; diff --git a/src/mainboard/opencellular/elgon/mainboard.c b/src/mainboard/opencellular/elgon/mainboard.c new file mode 100644 index 0000000..9636715 --- /dev/null +++ b/src/mainboard/opencellular/elgon/mainboard.c @@ -0,0 +1,112 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017-2018 Facebook, Inc. + * Copyright 2003-2017 Cavium Inc. (support(a)cavium.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Derived from Cavium's BSD-3 Clause OCTEONTX-SDK-6.2.0. + */ + +#include <device/device.h> +#include <libbdk-hal/bdk-config.h> +#include <libbdk-hal/bdk-twsi.h> +#include <soc/gpio.h> +#include <delay.h> +#include <soc/uart.h> +#include <console/console.h> +#include <soc/clock.h> +#include <soc/gpio.h> +#include <soc/timer.h> +#include <soc/cpu.h> +#include <soc/sdram.h> +#include <libbdk-hal/bdk-config.h> + +static void mainboard_print_info(void) +{ + printk(BIOS_INFO, "MB: trusted boot : %s\n", + gpio_strap_value(10) ? "yes" : "no"); + + const size_t boot_method = gpio_strap_value(0) | + (gpio_strap_value(1) << 1) | + (gpio_strap_value(2) << 2) | + (gpio_strap_value(3) << 3); + + printk(BIOS_INFO, "MB: boot method : "); + switch (boot_method) { + case 0x2: + case 0x3: + printk(BIOS_INFO, "EMMC\n"); + break; + case 0x5: + case 0x6: + printk(BIOS_INFO, "SPI\n"); + break; + case 0x8: + printk(BIOS_INFO, "REMOTE\n"); + break; + case 0xc: + case 0xd: + printk(BIOS_INFO, "PCIe\n"); + break; + default: + printk(BIOS_INFO, "unknown\n"); + } + + printk(BIOS_INFO, "MB: REFclk : %llu MHz\n", + thunderx_get_ref_clock() / 1000000ULL); + + printk(BIOS_INFO, "MB: IOclk : %llu MHz\n", + thunderx_get_io_clock() / 1000000ULL); + + printk(BIOS_INFO, "MB: COREclk : %llu MHz\n", + thunderx_get_core_clock() / 1000000ULL); + + printk(BIOS_INFO, "MB: #CPU cores : %zu\n", + cpu_get_num_available_cores()); + + printk(BIOS_INFO, "MB: RAM : %zu MiB\n", + sdram_size_mb()); +} + +extern const struct bdk_devicetree_key_value devtree[]; + +static void mainboard_init(struct device *dev) +{ + size_t i; + + /* Init UARTs */ + for (i = 0; i < 4; i++) { + if (!uart_is_enabled(i)) + uart_setup(i, 0); + } + + /* Init timer */ + soc_timer_init(); + + /* Init CPUs */ + for (i = 1; i < CONFIG_MAX_CPUS; i++) + start_cpu(i, NULL); +} + +static void mainboard_enable(struct device *dev) +{ + dev->ops->init = &mainboard_init; + + bdk_config_set_fdt(devtree); + + mainboard_print_info(); +} + +struct chip_operations mainboard_ops = { + .name = CONFIG_MAINBOARD_PART_NUMBER, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/opencellular/elgon/mainboard.h b/src/mainboard/opencellular/elgon/mainboard.h new file mode 100644 index 0000000..46e6477 --- /dev/null +++ b/src/mainboard/opencellular/elgon/mainboard.h @@ -0,0 +1,19 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#define ELGON_GPIO_ERROR_LED 11 +#define ELGON_GPIO_SPI_MUX 24 +#define ELGON_GPIO_UART_SEL 26 diff --git a/src/mainboard/opencellular/elgon/memlayout.ld b/src/mainboard/opencellular/elgon/memlayout.ld new file mode 100644 index 0000000..9349362 --- /dev/null +++ b/src/mainboard/opencellular/elgon/memlayout.ld @@ -0,0 +1 @@ + #include <soc/memlayout.ld> diff --git a/src/mainboard/opencellular/elgon/romstage.c b/src/mainboard/opencellular/elgon/romstage.c new file mode 100644 index 0000000..e8e5cd6 --- /dev/null +++ b/src/mainboard/opencellular/elgon/romstage.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <arch/exception.h> +#include <cbmem.h> +#include <romstage_handoff.h> +#include <soc/sdram.h> +#include <soc/timer.h> +#include <soc/mmu.h> +#include <stdlib.h> +#include <console/console.h> +#include <program_loading.h> +#include <libbdk-hal/bdk-config.h> +#include <string.h> + +extern const struct bdk_devicetree_key_value devtree[]; + +void main(void) +{ + watchdog_poke(0); + + console_init(); + exception_init(); + + bdk_config_set_fdt(devtree); + + sdram_init(); + soc_mmu_init(); + + watchdog_poke(0); + + cbmem_initialize_empty(); + run_ramstage(); +} diff --git a/src/mainboard/opencellular/elgon/vboot.fmd b/src/mainboard/opencellular/elgon/vboot.fmd new file mode 100644 index 0000000..e6ac134 --- /dev/null +++ b/src/mainboard/opencellular/elgon/vboot.fmd @@ -0,0 +1,27 @@ +FLASH@0x0 16M { + WP_RO@0x0 0x63d4c0 { + RO_SECTION@0x0 0x6394c0 { + # bootblock includes trusted/non-trusted CLIB, CSIB, + # and BL1FWs packaged in + # src/soc/cavium/common/Makefile.inc. + BOOTBLOCK@0x10000 0x70000 + FMAP@0x80000 0x1000 + COREBOOT(CBFS)@0x81000 0x4c94c0 + GBB@0x54a4c0 0xeef00 + RO_FRID@0x6393c0 0x100 + } + RO_VPD@0x6394c0 0x4000 + } + RW_SECTION_A@0x63d4c0 0x4db5a0 { + VBLOCK_A@0x0 0x2000 + FW_MAIN_A(CBFS)@0x2000 0x4d94a0 + RW_FWID_A@0x4db4a0 0x100 + } + RW_SECTION_B@0xb18a60 0x4db5a0 { + VBLOCK_B@0x0 0x2000 + FW_MAIN_B(CBFS)@0x2000 0x4d94a0 + RW_FWID_B@0x4db4a0 0x100 + } + RW_ELOG@0xff4000 0x4000 + RW_VPD@0xff8000 0x8000 +} -- To view, visit https://review.coreboot.org/28024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Gerrit-Change-Number: 28024 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>

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Change in coreboot[master]: cpu/x86/smm/smm_module_loader.c: Avoid static analysis error "unused ...
by Richard Spiegel (Code Review) 10 Aug '18

10 Aug '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/28023 Change subject: cpu/x86/smm/smm_module_loader.c: Avoid static analysis error "unused value" ...................................................................... cpu/x86/smm/smm_module_loader.c: Avoid static analysis error "unused value" In procedure smm_load_module, variables fxsave_size and fxsave_area are set to 0 and NULL, but if CONFIG_SSE is enabled, they are overwritten. Change the code setting the value to an "else" of the "if" testing CONFIG_SSE, thus avoiding static analysis error. BUG=b:112253891 TEST=Build and boot grunt. Change-Id: I3042b037017a082378b53ee419c769c535632038 Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/cpu/x86/smm/smm_module_loader.c 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/28023/1 diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c index e92fa05..7972686 100644 --- a/src/cpu/x86/smm/smm_module_loader.c +++ b/src/cpu/x86/smm/smm_module_loader.c @@ -371,13 +371,14 @@ base += alignment_size; } - fxsave_size = 0; - fxsave_area = NULL; if (IS_ENABLED(CONFIG_SSE)) { fxsave_size = FXSAVE_SIZE * params->num_concurrent_stacks; /* FXSAVE area below all the stacks stack. */ fxsave_area = params->stack_top; fxsave_area -= total_stack_size + fxsave_size; + } else { + fxsave_size = 0; + fxsave_area = NULL; } /* Does the required amount of memory exceed the SMRAM region size? */ -- To view, visit https://review.coreboot.org/28023 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3042b037017a082378b53ee419c769c535632038 Gerrit-Change-Number: 28023 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

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Change in coreboot[master]: soc/cn81xx: WIP Add VBOOT support
by Philipp Deppenwiese (Code Review) 10 Aug '18

10 Aug '18

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/28022 Change subject: soc/cn81xx: WIP Add VBOOT support ...................................................................... soc/cn81xx: WIP Add VBOOT support * Add VERSTAGE and VBOOT_WORk to memlayout. * Add hard and soft reset. * Add missing makefile and kconfig includes. Change-Id: I0d7e3c220f5c2c50c4ffe59ac929cb865bfac0ad Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- M src/soc/cavium/cn81xx/Kconfig M src/soc/cavium/cn81xx/Makefile.inc M src/soc/cavium/cn81xx/include/soc/memlayout.ld A src/soc/cavium/cn81xx/include/soc/reset.h A src/soc/cavium/cn81xx/reset.c 5 files changed, 82 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/28022/1 diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig index edc9480..0a691cf 100644 --- a/src/soc/cavium/cn81xx/Kconfig +++ b/src/soc/cavium/cn81xx/Kconfig @@ -5,6 +5,7 @@ select ARCH_RAMSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_VERSTAGE_ARMV8_64 + select ARM64_USE_ARM_TRUSTED_FIRMWARE select BOOTBLOCK_CONSOLE select DRIVERS_UART_PL011 select GENERIC_UDELAY @@ -14,9 +15,15 @@ select CAVIUM_BDK_DDR_TUNE_HW_OFFSETS select MMCONF_SUPPORT select PCI + select HAVE_HARD_RESET if SOC_CAVIUM_CN81XX +config VBOOT + select VBOOT_SEPARATE_VERSTAGE + select VBOOT_RETURN_FROM_VERSTAGE + select VBOOT_STARTS_IN_BOOTBLOCK + config ARM64_BL31_EXTERNAL_FILE string default "3rdparty/blobs/soc/cavium/cn81xx/bl31.elf" diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc index 845ac34..c58c07e 100644 --- a/src/soc/cavium/cn81xx/Makefile.inc +++ b/src/soc/cavium/cn81xx/Makefile.inc @@ -25,11 +25,25 @@ bootblock-y += spi.c bootblock-y += uart.c bootblock-y += cpu.c +bootblock-y += reset.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-$(CONFIG_DRIVERS_UART) += uart.c endif ################################################################################ +# verstage + +verstage-y += twsi.c +verstage-y += clock.c +verstage-y += gpio.c +verstage-y += timer.c +verstage-y += spi.c +verstage-y += uart.c +verstage-$(CONFIG_DRIVERS_UART) += uart.c +verstage-y += cbmem.c +verstage-y += reset.c + +################################################################################ # romstage romstage-y += twsi.c @@ -39,16 +53,12 @@ romstage-y += spi.c romstage-y += uart.c romstage-$(CONFIG_DRIVERS_UART) += uart.c -romstage-< += cpu.c +romstage-y += cbmem.c +romstage-y += reset.c romstage-y += sdram.c romstage-y += mmu.c -romstage-y += ../common/cbmem.c -# BDK coreboot interface -romstage-y += ../common/bdk-coreboot.c - - ################################################################################ # ramstage @@ -64,12 +74,11 @@ ramstage-y += cpu.c ramstage-y += cpu_secondary.S ramstage-y += ecam0.c +ramstage-y += cbmem.c +ramstage-y += reset.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c -# BDK coreboot interface -ramstage-y += ../common/bdk-coreboot.c - BL31_MAKEARGS += PLAT=t81 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" ENABLE_SPE_FOR_LOWER_ELS=0 CPPFLAGS_common += -Isrc/soc/cavium/cn81xx/include diff --git a/src/soc/cavium/cn81xx/include/soc/memlayout.ld b/src/soc/cavium/cn81xx/include/soc/memlayout.ld index b80d152..e3bf61f 100644 --- a/src/soc/cavium/cn81xx/include/soc/memlayout.ld +++ b/src/soc/cavium/cn81xx/include/soc/memlayout.ld @@ -28,14 +28,18 @@ /* Insecure region 1MiB - TOP OF DRAM */ /* bootblock-custom.S does setup CAR from SRAM_START to SRAM_END */ SRAM_START(BOOTROM_OFFSET) + STACK(BOOTROM_OFFSET, 16K) TIMESTAMP(BOOTROM_OFFSET + 0x4000, 4K) PRERAM_CBFS_CACHE(BOOTROM_OFFSET + 0x6000, 8K) PRERAM_CBMEM_CONSOLE(BOOTROM_OFFSET + 0x8000, 8K) - BOOTBLOCK(BOOTROM_OFFSET + 0x20000, 64K) + VBOOT2_WORK(BOOTROM_OFFSET + 0x30000, 12K) + VERSTAGE(BOOTROM_OFFSET + 0x33000, 52K) ROMSTAGE(BOOTROM_OFFSET + 0x40000, 256K) + SRAM_END(BOOTROM_OFFSET + 0x80000) + TTB(BOOTROM_OFFSET + 0x80000, 512K) RAMSTAGE(BOOTROM_OFFSET + 0x100000, 512K) /* Stack for secondary CPUs */ diff --git a/src/soc/cavium/cn81xx/include/soc/reset.h b/src/soc/cavium/cn81xx/include/soc/reset.h new file mode 100644 index 0000000..6af3059 --- /dev/null +++ b/src/soc/cavium/cn81xx/include/soc/reset.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __COREBOOT_SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_RESET_H +#define __COREBOOT_SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_RESET_H + +#define RST_SOFT_RST 0x87e006001680 + +void do_soft_reset(void); +void do_hard_reset(void); + +#endif diff --git a/src/soc/cavium/cn81xx/reset.c b/src/soc/cavium/cn81xx/reset.c new file mode 100644 index 0000000..929ed3f --- /dev/null +++ b/src/soc/cavium/cn81xx/reset.c @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <soc/reset.h> +#include <device/i2c_simple.h> + +void do_soft_reset(void) +{ + write64((void *)RST_SOFT_RST, 1); +} + +void do_hard_reset(void) +{ + +} -- To view, visit https://review.coreboot.org/28022 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I0d7e3c220f5c2c50c4ffe59ac929cb865bfac0ad Gerrit-Change-Number: 28022 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>

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Change in coreboot[master]: amd/stoneyridge: Add PMxC0 reset status to boot log
by Edward Hill (Code Review) 10 Aug '18

10 Aug '18

Edward Hill has posted comments on this change. ( https://review.coreboot.org/28020 ) Change subject: amd/stoneyridge: Add PMxC0 reset status to boot log ...................................................................... Patch Set 1: I'm not sure that this is working correctly. I always get: PMxC0 STATUS: 0x40000800 BIT30 BIT11 I tried with an 8 second power button push, but no change to the output. -- To view, visit https://review.coreboot.org/28020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia905bb325a535fd4aa7082011cdfe92f08dff2cb Gerrit-Change-Number: 28020 Gerrit-PatchSet: 1 Gerrit-Owner: Edward Hill <ecgh(a)chromium.org> Gerrit-Reviewer: Edward Hill <ecgh(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Aug 2018 22:48:09 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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