coreboot-gerrit August 2018

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Change in coreboot[master]: Documentation: Fix make rule for sphinx-autobuild
by Patrick Rudolph (Code Review) 24 Aug '18

24 Aug '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/28326 ) Change subject: Documentation: Fix make rule for sphinx-autobuild ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28326 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I725392f1f132101eede8fed75e8d225c972ad1fe Gerrit-Change-Number: 28326 Gerrit-PatchSet: 1 Gerrit-Owner: Tom Hiller <thrilleratplay(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tom Hiller <thrilleratplay(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 24 Aug 2018 06:35:44 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: util/ipqheader: Fix typo
by Elyes HAOUAS (Code Review) 24 Aug '18

24 Aug '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/28329 Change subject: util/ipqheader: Fix typo ...................................................................... util/ipqheader: Fix typo Change-Id: Ibfcb870bb6e7ed747f8875520ab094def49e53cb Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/ipqheader/mbn_tools.py 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/28329/1 diff --git a/util/ipqheader/mbn_tools.py b/util/ipqheader/mbn_tools.py index bc2cdd2..c4d26c1 100755 --- a/util/ipqheader/mbn_tools.py +++ b/util/ipqheader/mbn_tools.py @@ -1165,7 +1165,7 @@ bytes_to_pad = ELF_BLOCK_ALIGN - pad_hash_segment hash_seg_end = hash_tbl_end_addr + bytes_to_pad - # Check if a shifting is required to accomodate for the hash segment. + # Check if a shifting is required to accommodate for the hash segment. # Get the minimum offset by going through the program headers. # Note that the program headers in the input file do not contain # the dummy program header for ELF + Program header, and the -- To view, visit https://review.coreboot.org/28329 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ibfcb870bb6e7ed747f8875520ab094def49e53cb Gerrit-Change-Number: 28329 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: mb/google/octopus: Add missing standby settings.
by build bot (Jenkins) (Code Review) 24 Aug '18

24 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28328 ) Change subject: mb/google/octopus: Add missing standby settings. ...................................................................... Patch Set 1: (9 comments) https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… File src/mainboard/google/octopus/variants/baseboard/gpio.c: https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 120: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_79, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* H1_SLAVE_SPI_CLK_R */ line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 121: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_80, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* H1_SLAVE_SPI_CS_L_R */ line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 247: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD), /* EN_PP3300_WLAN */ line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… File src/mainboard/google/octopus/variants/bip/gpio.c: https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 118: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_79, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* H1_SLAVE_SPI_CLK_R */ line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 119: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_80, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* H1_SLAVE_SPI_CS_L_R */ line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 246: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD), /* EN_PP3300_WLAN */ line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… File src/mainboard/google/octopus/variants/bobba/gpio.c: https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 34: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… File src/mainboard/google/octopus/variants/fleex/gpio.c: https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 49: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), line over 80 characters https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… File src/mainboard/google/octopus/variants/phaser/gpio.c: https://review.coreboot.org/#/c/28328/1/src/mainboard/google/octopus/varian… PS1, Line 36: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), line over 80 characters -- To view, visit https://review.coreboot.org/28328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0a76cd2a1481c828fc092aaf7e870a411624879c Gerrit-Change-Number: 28328 Gerrit-PatchSet: 1 Gerrit-Owner: Shamile Khan <shamile.khan(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 24 Aug 2018 05:28:21 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/octopus: Add missing standby settings.
by Shamile Khan (Code Review) 24 Aug '18

24 Aug '18

Shamile Khan has uploaded this change for review. ( https://review.coreboot.org/28328 Change subject: mb/google/octopus: Add missing standby settings. ...................................................................... mb/google/octopus: Add missing standby settings. Also removed internal pull ups for CX_PREQ_L and CX_PREQ_L signals as they have external pull ups. BUG=b:110654510 TEST=On Yorp Proto 2, flashed image and verified that it boots to OS. Also executed a few suspend resume cycles. Change-Id: I0a76cd2a1481c828fc092aaf7e870a411624879c Signed-off-by: Shamile Khan <shamile.khan(a)intel.com> --- M src/mainboard/google/octopus/variants/baseboard/gpio.c M src/mainboard/google/octopus/variants/bip/gpio.c M src/mainboard/google/octopus/variants/bobba/gpio.c M src/mainboard/google/octopus/variants/fleex/gpio.c M src/mainboard/google/octopus/variants/phaser/gpio.c 5 files changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/28328/1 diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index 64cfe4d..2942601 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -32,8 +32,8 @@ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_3, NONE, DEEP, NF1), /* TDI */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_4, NONE, DEEP, NF1), /* TDO */ PAD_NC(GPIO_5, UP_20K), /* JTAGX -- unused */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_6, UP_20K, DEEP, NF1), /* CX_PREQ_B */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_7, UP_20K, DEEP, NF1), /* CX_PRDY_B */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_6, NONE, DEEP, NF1), /* CX_PREQ_B */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_7, NONE, DEEP, NF1), /* CX_PRDY_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_8, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_CLK_VNN */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_9, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA0_VNN */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_10, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA1_VNN */ @@ -117,8 +117,8 @@ PAD_NC(GPIO_78, UP_20K),/* SVID Clk - unused */ /* LPSS */ - PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK_R */ - PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CS_L_R */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_79, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* H1_SLAVE_SPI_CLK_R */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_80, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* H1_SLAVE_SPI_CS_L_R */ PAD_CFG_GPIO_HI_Z(GPIO_81, UP_20K, DEEP, HIZCRx0, DISPUPD), /* GPIO_81_DEBUG (Boot halt) -- MIPI60 DEBUG */ PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */ PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */ @@ -244,7 +244,7 @@ /* SCC COMMUNITY GPIOS */ PAD_NC(GPIO_176, UP_20K), /* SMB_ALERTB -- unused */ PAD_NC(GPIO_177, UP_20K), /* SMB_CLK -- unused */ - PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD), /* EN_PP3300_WLAN */ PAD_NC(GPIO_179, NONE), /* SDCARD_CLK -- unused */ PAD_NC(GPIO_180, NONE), /* SDCARD_CMD -- unused */ PAD_NC(GPIO_181, UP_20K), /* SDCARD_D0 -- unused */ diff --git a/src/mainboard/google/octopus/variants/bip/gpio.c b/src/mainboard/google/octopus/variants/bip/gpio.c index d929284..647a903 100644 --- a/src/mainboard/google/octopus/variants/bip/gpio.c +++ b/src/mainboard/google/octopus/variants/bip/gpio.c @@ -30,8 +30,8 @@ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_3, NONE, DEEP, NF1), /* TDI */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_4, NONE, DEEP, NF1), /* TDO */ PAD_NC(GPIO_5, UP_20K), /* JTAGX -- unused */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_6, UP_20K, DEEP, NF1), /* CX_PREQ_B */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_7, UP_20K, DEEP, NF1), /* CX_PRDY_B */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_6, NONE, DEEP, NF1), /* CX_PREQ_B */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_7, NONE, DEEP, NF1), /* CX_PRDY_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_8, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_CLK_VNN */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_9, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA0_VNN */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_10, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA1_VNN */ @@ -115,8 +115,8 @@ PAD_NC(GPIO_78, UP_20K),/* SVID Clk - unused */ /* LPSS */ - PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK_R */ - PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CS_L_R */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_79, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* H1_SLAVE_SPI_CLK_R */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_80, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* H1_SLAVE_SPI_CS_L_R */ PAD_CFG_GPIO_HI_Z(GPIO_81, UP_20K, DEEP, HIZCRx0, DISPUPD), /* GPIO_81_DEBUG (Boot halt) -- MIPI60 DEBUG */ PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */ PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */ @@ -243,7 +243,7 @@ /* SCC COMMUNITY GPIOS */ PAD_NC(GPIO_176, UP_20K), /* SMB_ALERTB -- unused */ PAD_NC(GPIO_177, UP_20K), /* SMB_CLK -- unused */ - PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD), /* EN_PP3300_WLAN */ PAD_NC(GPIO_179, NONE), /* SDCARD_CLK -- unused */ PAD_NC(GPIO_180, NONE), /* SDCARD_CMD -- unused */ PAD_NC(GPIO_181, UP_20K), /* SDCARD_D0 -- unused */ diff --git a/src/mainboard/google/octopus/variants/bobba/gpio.c b/src/mainboard/google/octopus/variants/bobba/gpio.c index 20e2230..8ce2c51 100644 --- a/src/mainboard/google/octopus/variants/bobba/gpio.c +++ b/src/mainboard/google/octopus/variants/bobba/gpio.c @@ -31,7 +31,7 @@ DISPUPD), /* EN_PP3300_WLAN_L */ - PAD_CFG_GPO(GPIO_178, 0, DEEP), + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), }; const struct pad_config *variant_override_gpio_table(size_t *num) diff --git a/src/mainboard/google/octopus/variants/fleex/gpio.c b/src/mainboard/google/octopus/variants/fleex/gpio.c index ac68569..741eeaf 100644 --- a/src/mainboard/google/octopus/variants/fleex/gpio.c +++ b/src/mainboard/google/octopus/variants/fleex/gpio.c @@ -46,7 +46,7 @@ PAD_NC(GPIO_161, UP_20K), /* EN_PP3300_WLAN_L */ - PAD_CFG_GPO(GPIO_178, 0, DEEP), + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), PAD_NC(GPIO_213, DN_20K), PAD_NC(GPIO_214, DN_20K), diff --git a/src/mainboard/google/octopus/variants/phaser/gpio.c b/src/mainboard/google/octopus/variants/phaser/gpio.c index 11935d9..fd8777b 100644 --- a/src/mainboard/google/octopus/variants/phaser/gpio.c +++ b/src/mainboard/google/octopus/variants/phaser/gpio.c @@ -33,7 +33,7 @@ PAD_NC(GPIO_161, DN_20K), /* EN_PP3300_WLAN_L */ - PAD_CFG_GPO(GPIO_178, 0, DEEP), + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), PAD_NC(GPIO_213, DN_20K), PAD_NC(GPIO_214, DN_20K), -- To view, visit https://review.coreboot.org/28328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I0a76cd2a1481c828fc092aaf7e870a411624879c Gerrit-Change-Number: 28328 Gerrit-PatchSet: 1 Gerrit-Owner: Shamile Khan <shamile.khan(a)intel.com>

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Change in coreboot[master]: Documentation: Fix formatting
by Tom Hiller (Code Review) 24 Aug '18

24 Aug '18

Tom Hiller has uploaded this change for review. ( https://review.coreboot.org/28327 Change subject: Documentation: Fix formatting ...................................................................... Documentation: Fix formatting Fix formatting and missing close block quotes in nri_registers.md Change-Id: I5fa0136f4d7f05737a0d53ff9da7d2c77b22d675 Signed-off-by: Tom Hiller <thrilleratplay(a)gmail.com> --- M Documentation/northbridge/intel/sandybridge/nri_registers.md 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/28327/1 diff --git a/Documentation/northbridge/intel/sandybridge/nri_registers.md b/Documentation/northbridge/intel/sandybridge/nri_registers.md index 6249560..d5857ec 100644 --- a/Documentation/northbridge/intel/sandybridge/nri_registers.md +++ b/Documentation/northbridge/intel/sandybridge/nri_registers.md @@ -2138,7 +2138,7 @@ | 0:7| Selected multiplier: 100Mhz [7,12], 133Mhz [3,19] | +-----------+------------------------------------------------------------------+ | 8 | - 1: 100Mhz reference clock | -| | - 0: 133Mhz reference clock (Ivy Bridge only) | +| | - 0: 133Mhz reference clock (Ivy Bridge only) | +-----------+------------------------------------------------------------------+ | 31 | PLL busy | +-----------+------------------------------------------------------------------+ @@ -2172,3 +2172,4 @@ +===========+==================================================================+ | 8 | Force RCOMP | +-----------+------------------------------------------------------------------+ +``` -- To view, visit https://review.coreboot.org/28327 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I5fa0136f4d7f05737a0d53ff9da7d2c77b22d675 Gerrit-Change-Number: 28327 Gerrit-PatchSet: 1 Gerrit-Owner: Tom Hiller <thrilleratplay(a)gmail.com>

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Change in coreboot[master]: Documentation: Fix make rule for sphinx-autobuild
by Tom Hiller (Code Review) 24 Aug '18

24 Aug '18

Tom Hiller has uploaded this change for review. ( https://review.coreboot.org/28326 Change subject: Documentation: Fix make rule for sphinx-autobuild ...................................................................... Documentation: Fix make rule for sphinx-autobuild Execute sphinx-autobuild for livesphinx make rule Change-Id: I725392f1f132101eede8fed75e8d225c972ad1fe Signed-off-by: Tom Hiller <thrilleratplay(a)gmail.com> --- M Documentation/Makefile.sphinx 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/28326/1 diff --git a/Documentation/Makefile.sphinx b/Documentation/Makefile.sphinx index 8c10a9f..5236f3e 100644 --- a/Documentation/Makefile.sphinx +++ b/Documentation/Makefile.sphinx @@ -57,7 +57,7 @@ .PHONY: livehtml livehtml: - $(SPHINXBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR) + $(SPHINXAUTOBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR) @echo @echo "Autobuild finished. The HTML pages are in $(BUILDDIR)." -- To view, visit https://review.coreboot.org/28326 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I725392f1f132101eede8fed75e8d225c972ad1fe Gerrit-Change-Number: 28326 Gerrit-PatchSet: 1 Gerrit-Owner: Tom Hiller <thrilleratplay(a)gmail.com>

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Change in coreboot[master]: mb/google/poppy/variants/atlas: Update DPTF parameters
by Todd Broch (Code Review) 24 Aug '18

24 Aug '18

Todd Broch has uploaded this change for review. ( https://review.coreboot.org/28325 Change subject: mb/google/poppy/variants/atlas: Update DPTF parameters ...................................................................... mb/google/poppy/variants/atlas: Update DPTF parameters Reduce the CPU passive threshold sample rate from 5 seconds to 1 second so DPTF will react faster to rapid temperature increases. Signed-off-by: Todd Broch <tbroch(a)chromium.org> BUG=b:113101335 BRANCH=atlas TEST=manual performance/power testing on nocturne. No longer see messages like below in syslog, 'CPU0: Package temperature above threshold' Change-Id: I2dc9d157b54500bae29e123978bb8ad6e05ef619 --- M src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/28325/1 diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl index 685f4dd..85eb891 100644 --- a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl @@ -50,7 +50,7 @@ Name (DTRT, Package () { /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on TSR0 */ Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, -- To view, visit https://review.coreboot.org/28325 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2dc9d157b54500bae29e123978bb8ad6e05ef619 Gerrit-Change-Number: 28325 Gerrit-PatchSet: 1 Gerrit-Owner: Todd Broch <tbroch(a)chromium.org>

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Change in coreboot[master]: build system: Add automatic downloading of FSP mirror repo if requested
by Patrick Georgi (Code Review) 24 Aug '18

24 Aug '18

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/28304 Change subject: build system: Add automatic downloading of FSP mirror repo if requested ...................................................................... build system: Add automatic downloading of FSP mirror repo if requested It only happens if both USE_BLOBS and MAINBOARD_USES_FSP2_0 are enabled. Change-Id: I46843c61d3ddf398a3c058bb571d285b596bf5c1 Signed-off-by: Patrick Georgi <patrick(a)georgi.software> --- M Makefile.inc 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/28304/1 diff --git a/Makefile.inc b/Makefile.inc index b3e246a..68b0eb2 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -195,6 +195,9 @@ # this is necessary because 3rdparty/blobs is update=none, and so is ignored # unless explicitly requested and enabled through --checkout forgetthis:=$(if $(GIT),$(shell git submodule update --init --checkout 3rdparty/blobs)) +ifeq ($(CONFIG_MAINBOARD_USES_FSP2_0),y) +forgetthis:=$(if $(GIT),$(shell git submodule update --init --checkout 3rdparty/fsp)) +endif endif UPDATED_SUBMODULES:=1 COREBOOT_EXPORTS += UPDATED_SUBMODULES -- To view, visit https://review.coreboot.org/28304 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I46843c61d3ddf398a3c058bb571d285b596bf5c1 Gerrit-Change-Number: 28304 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>

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Change in coreboot[master]: submodules: add FSP mirror as non-default submodule
by Patrick Georgi (Code Review) 24 Aug '18

24 Aug '18

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/28303 Change subject: submodules: add FSP mirror as non-default submodule ...................................................................... submodules: add FSP mirror as non-default submodule Like the 3rdparty/blobs repo this isn't checked out by default. Right now you can manually check it out using $ git submodule init --checkout A follow up commit will add some automagic if USE_BLOBS and MAINBOARD_USES_FSP2_0 are enabled. Change-Id: Ie612495abc2a2d5947225e6ab54872aa72d4bec6 Signed-off-by: Patrick Georgi <patrick(a)georgi.software> --- M .gitmodules A 3rdparty/fsp 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/28303/1 diff --git a/.gitmodules b/.gitmodules index c3270e6..f4f7c4f 100644 --- a/.gitmodules +++ b/.gitmodules @@ -21,3 +21,8 @@ [submodule "libgfxinit"] path = 3rdparty/libgfxinit url = ../libgfxinit.git +[submodule "3rdparty/fsp"] + path = 3rdparty/fsp + url = ../fsp.git + update = none + ignore = dirty diff --git a/3rdparty/fsp b/3rdparty/fsp new file mode 160000 index 0000000..7431e4f --- /dev/null +++ b/3rdparty/fsp @@ -0,0 +1 @@ +Subproject commit 7431e4f3399a5081c956753b5fa3bcd764196723 -- To view, visit https://review.coreboot.org/28303 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie612495abc2a2d5947225e6ab54872aa72d4bec6 Gerrit-Change-Number: 28303 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>

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Change in coreboot[master]: drivers/intel/gma: Do not rely on CBLV in OpRegion Mailbox3
by Nico Huber (Code Review) 23 Aug '18

23 Aug '18

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/28301 Change subject: drivers/intel/gma: Do not rely on CBLV in OpRegion Mailbox3 ...................................................................... drivers/intel/gma: Do not rely on CBLV in OpRegion Mailbox3 CBLV is not kept up to date by Linux' i915. We should fix that too, but it will likely take some years until we can always expect it to work. For now read the register values directly. To accomodate that we are not the only one writing those, revise XBQC() to search for the closest value in BRIG (instead of a lower equal one) and round more accurately for better matches. Change-Id: I4e2d8fa34e75463d4cf7242af3e2c67577cfa2a5 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/drivers/intel/gma/acpi/configure_brightness_levels.asl 1 file changed, 36 insertions(+), 51 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/28301/1 diff --git a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl index 72e5466..024360f 100644 --- a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl +++ b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl @@ -93,36 +93,6 @@ Return (Ones) } - - /* - * Get current back-light brightness through mailbox 3 - * - * @Return The current brightness or Ones on error - * Errors: * ASLS is zero - * * Mailbox 3 support not advertised - * * Driver not loaded or not ready - * * CBLV is not marked valid - */ - Method (XBQC, 0, NotSerialized) - { - If (LEqual(ASLS, Zero)) - { - Return (Ones) - } - If (LEqual(And(MBOX, 0x4), Zero)) - { - Return (Ones) - } - If (LEqual(ARDY, Zero)) - { - Return (Ones) - } - If (LEqual(And (CBLV, 0x80000000), Zero)) - { - Return (Ones) - } - Return (And (CBLV, 0xff)) - } } /* @@ -132,29 +102,45 @@ { Name (_ADR, 0) - Method (XBCM, 1, NotSerialized) + /* Divide round closest */ + Method (DRCL, 2) { - Store (Divide (Multiply (Arg0, BCLM), 100), BCLV) + Return (Divide (Add (Arg0, Divide (Arg1, 2)), Arg1)) } + Method (XBCM, 1, NotSerialized) + { + Store (DRCL (Multiply (Arg0, BCLM), 100), BCLV) + } + + /* Find value closest to BCLV in BRIG (which must be ordered) */ Method (XBQC, 0, NotSerialized) { - /* Find value close to BCLV in BRIG (which must be ordered) */ - Store (BCLV, Local0) // Current value - Store (BCLM, Local1) // For calculations - Store (2, Local2) // Loop index - While (LLess (Local2, Subtract (SizeOf (BRIG), 1))) { - Store (DeRefOf (Index (BRIG, Local2)), Local3) - /* Use same calculation as XBCM, to get exact matches */ - Store (Divide (Multiply (Local3, Local1), 100), Local3) + /* Local0: current percentage */ + Store (DRCL (Multiply (BCLV, 100), BCLM), Local0) - If (LLessEqual (Local0, Local3)) { - Return (DeRefOf (Index (BRIG, Local2))) + /* Local1: loop index (selectable values start at 2 in BRIG) */ + Store (2, Local1) + While (LLess (Local1, Subtract (SizeOf (BRIG), 1))) { + /* Local[23]: adjacent values in BRIG */ + Store (DeRefOf (Index (BRIG, Local1)), Local2) + Store (DeRefOf (Index (BRIG, Add (Local1, 1))), Local3) + + If (LLess (Local0, Local3)) { + If (LOr (LLess (Local0, Local2), + LLess (Subtract (Local0, Local2), + Subtract (Local3, Local0)))) { + Return (Local2) + } Else { + Return (Local3) + } } - Add (Local2, 1, Local2) + + Increment (Local1) } + /* Didn't find greater/equal value: use the last */ - Return (DeRefOf (Index (BRIG, Local2))) + Return (Local3) } } @@ -168,11 +154,10 @@ Method (XBQC, 0, NotSerialized) { - Store (^BOX3.XBQC (), Local0) - If (LEqual(Local0, Ones)) - { - Store (^LEGA.XBQC (), Local0) - } - - Return (Local0) + /* + * Always query the hardware directly. Not all OS drivers + * keep CBLV up to date (one is Linux' i915). Some years + * after that is fixed we can probably use CBLV? + */ + Return (^LEGA.XBQC ()) } -- To view, visit https://review.coreboot.org/28301 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4e2d8fa34e75463d4cf7242af3e2c67577cfa2a5 Gerrit-Change-Number: 28301 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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coreboot-gerrit August 2018