coreboot-gerrit June 2018

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Change in coreboot[master]: mb/google/poppy/variants/nocturne: add two new memory options
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27123 ) Change subject: mb/google/poppy/variants/nocturne: add two new memory options ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29095/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/74997/ : SUCCESS -- To view, visit https://review.coreboot.org/27123 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If1322311bd91842d6d32725822d91fd6d9e8077c Gerrit-Change-Number: 27123 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Jun 2018 22:53:31 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variants/nocturne: add two new memory options
by Nick Vaccaro (Code Review) 15 Jun '18

15 Jun '18

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/27123 Change subject: mb/google/poppy/variants/nocturne: add two new memory options ...................................................................... mb/google/poppy/variants/nocturne: add two new memory options - add K4E6E304EC-EGCF and K4EBE304EC-EGCF to memory strapping table - add SPD files for K4E6E304EC-EGCF and K4EBE304EC-EGCF BUG=b:110277021 BRANCH=none TEST=none Change-Id: If1322311bd91842d6d32725822d91fd6d9e8077c Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- A src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EC-EGCF.spd.hex A src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCF.spd.hex M src/mainboard/google/poppy/variants/nocturne/Makefile.inc 3 files changed, 34 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/27123/1 diff --git a/src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EC-EGCF.spd.hex b/src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EC-EGCF.spd.hex new file mode 100644 index 0000000..e979247 --- /dev/null +++ b/src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EC-EGCF.spd.hex @@ -0,0 +1,16 @@ +91 20 F1 03 05 19 05 0B 03 11 01 08 09 00 40 05 +78 78 90 50 90 11 50 E0 90 06 3C 3C 01 90 00 00 +00 00 CA FA 00 00 00 A8 00 88 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 80 CE 01 00 00 55 00 00 00 00 00 +4B 34 45 36 45 33 30 34 45 43 2D 45 47 43 46 20 +20 20 00 00 80 CE 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCF.spd.hex b/src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCF.spd.hex new file mode 100644 index 0000000..2487ddd --- /dev/null +++ b/src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCF.spd.hex @@ -0,0 +1,16 @@ +91 20 F1 03 05 1A 05 0A 03 11 01 08 09 00 40 05 +78 78 90 50 90 11 50 E0 90 06 3C 3C 01 90 00 00 +00 00 CA FA 00 00 00 A8 00 88 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 80 CE 01 00 00 55 00 00 00 00 00 +4B 34 45 42 45 33 30 34 45 43 2D 45 47 43 46 20 +20 20 00 00 80 CE 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/poppy/variants/nocturne/Makefile.inc b/src/mainboard/google/poppy/variants/nocturne/Makefile.inc index fdf05f3..b78b7a3 100644 --- a/src/mainboard/google/poppy/variants/nocturne/Makefile.inc +++ b/src/mainboard/google/poppy/variants/nocturne/Makefile.inc @@ -10,6 +10,8 @@ SPD_SOURCES += micron_dimm_MT52L512M32D2PF-107 # 0b0111 SPD_SOURCES += micron_dimm_MT52L1G32D4PG-107 # 0b1000 SPD_SOURCES += micron_dimm_MT52L256M32D1PF-107 # 0b1001 +SPD_SOURCES += samsung_dimm_K4E6E304EC-EGCF # 0b1010 +SPD_SOURCES += samsung_dimm_K4EBE304EC-EGCF # 0b1011 bootblock-y += gpio.c -- To view, visit https://review.coreboot.org/27123 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If1322311bd91842d6d32725822d91fd6d9e8077c Gerrit-Change-Number: 27123 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com>

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Change in coreboot[master]: mb/*/*: Harmonise FD and devicetree on boards featuring ICH7
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27122 ) Change subject: mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29093/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/74995/ : SUCCESS -- To view, visit https://review.coreboot.org/27122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1692ca5f490ea84e2fc520d3f66044ad7514f76e Gerrit-Change-Number: 27122 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Jun 2018 20:11:59 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/*/*: Harmonise FD and devicetree on boards featuring ICH7
by Arthur Heymans (Code Review) 15 Jun '18

15 Jun '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/27122 Change subject: mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 ...................................................................... mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 On some boards the devicetree and Function Disable register did not match. In this case the FD values are put in the devicetree as these were the values that were actually used in practice. A complete devicetree will make it easier to automatically disable devices in ramstage. Change-Id: I1692ca5f490ea84e2fc520d3f66044ad7514f76e Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/apple/macbook21/devicetree.cb M src/mainboard/asrock/g41c-gs/devicetree.cb M src/mainboard/asus/p5gc-mx/devicetree.cb M src/mainboard/foxconn/g41s-k/devicetree.cb M src/mainboard/getac/p470/devicetree.cb M src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c M src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb M src/mainboard/ibase/mb899/devicetree.cb M src/mainboard/intel/d510mo/devicetree.cb M src/mainboard/intel/d945gclf/devicetree.cb M src/mainboard/kontron/986lcd-m/devicetree.cb M src/mainboard/lenovo/t60/devicetree.cb M src/mainboard/lenovo/x60/devicetree.cb M src/mainboard/lenovo/z61t/devicetree.cb M src/mainboard/roda/rk886ex/devicetree.cb 16 files changed, 92 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/27122/1 diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb index b6e61eb..898aae4 100644 --- a/src/mainboard/apple/macbook21/devicetree.cb +++ b/src/mainboard/apple/macbook21/devicetree.cb @@ -83,6 +83,11 @@ end device pci 1c.0 on end # Ethernet device pci 1c.1 on end # Atheros WLAN + device pci 1c.2 off end # PCIe #3 + device pci 1c.3 off end # PCIe #4 + device pci 1c.4 off end # PCIe #5 + device pci 1c.5 off end # PCIe #6 + device pci 1d.0 on # USB UHCI subsystemid 0x8086 0x7270 end @@ -98,6 +103,9 @@ device pci 1d.7 on # USB2 EHCI subsystemid 0x8086 0x7270 end + device pci 1e.0 on end # PCI bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # PCI-LPC bridge subsystemid 0x8086 0x7270 end diff --git a/src/mainboard/asrock/g41c-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs/devicetree.cb index f58fae7..1e22be6 100644 --- a/src/mainboard/asrock/g41c-gs/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/devicetree.cb @@ -62,6 +62,8 @@ device pci 1c.1 on end # PCIe 2 device pci 1c.2 off end # PCIe 3 device pci 1c.3 off end # PCIe 4 + device pci 1c.4 off end # PCIe 5 + device pci 1c.5 off end # PCIe 6 device pci 1d.0 on # USB subsystemid 0x1849 0x27c8 end @@ -78,6 +80,8 @@ subsystemid 0x1849 0x27cc end device pci 1e.0 on end # PCI bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # ISA bridge subsystemid 0x1849 0x27b8 chip superio/nuvoton/nct6776 @@ -147,9 +151,6 @@ device i2c 69 on end end end - device pci 1f.4 off end - device pci 1f.5 off end - device pci 1f.6 off end end end end diff --git a/src/mainboard/asus/p5gc-mx/devicetree.cb b/src/mainboard/asus/p5gc-mx/devicetree.cb index cefa711..642f1ee 100644 --- a/src/mainboard/asus/p5gc-mx/devicetree.cb +++ b/src/mainboard/asus/p5gc-mx/devicetree.cb @@ -62,10 +62,10 @@ end device pci 1c.0 on end # PCIe device pci 1c.1 on end # PCIe - #device pci 1c.2 off end # PCIe port 3 - #device pci 1c.3 off end # PCIe port 4 - #device pci 1c.4 off end # PCIe port 5 - #device pci 1c.5 off end # PCIe port 6 + device pci 1c.2 off end # PCIe port 3 + device pci 1c.3 off end # PCIe port 4 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 device pci 1d.0 on # USB UHCI ioapic_irq 2 INTA 0x10 end @@ -82,6 +82,8 @@ ioapic_irq 2 INTA 0x10 end device pci 1e.0 on end # PCI bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge ioapic_irq 2 INTA 0x10 diff --git a/src/mainboard/foxconn/g41s-k/devicetree.cb b/src/mainboard/foxconn/g41s-k/devicetree.cb index e57436a..6a5089a 100644 --- a/src/mainboard/foxconn/g41s-k/devicetree.cb +++ b/src/mainboard/foxconn/g41s-k/devicetree.cb @@ -66,6 +66,8 @@ end device pci 1c.2 off end # PCIe 3 device pci 1c.3 off end # PCIe 4 + device pci 1c.4 off end # PCIe 5 + device pci 1c.5 off end # PCIe 6 device pci 1d.0 on # USB subsystemid 0x105b 0x0dda end @@ -82,6 +84,8 @@ subsystemid 0x105b 0x0dda end device pci 1e.0 on end # PCI bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # ISA bridge subsystemid 0x105b 0x0dda chip superio/ite/it8720f # Super I/O @@ -181,9 +185,6 @@ device pci 1f.3 on # SMbus subsystemid 0x105b 0x0dda end - device pci 1f.4 off end - device pci 1f.5 off end - device pci 1f.6 off end end end end diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index ad3b625..a81ef3a 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -68,8 +68,8 @@ device pci 1c.1 on end # PCIe port 2 device pci 1c.2 on end # PCIe port 3 device pci 1c.3 on end # PCIe port 4 - #device pci 1c.4 off end # PCIe port 5 - #device pci 1c.5 off end # PCIe port 6 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 device pci 1d.0 on end # USB UHCI device pci 1d.1 on end # USB UHCI device pci 1d.2 on end # USB UHCI @@ -80,8 +80,8 @@ end end # PCI bridge - #device pci 1e.2 off end # AC'97 Audio - #device pci 1e.3 off end # AC'97 Modem + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge chip superio/smsc/fdc37n972 device pnp 2e.0 off # Floppy @@ -143,7 +143,7 @@ end end - device pci 1f.1 on end # IDE + device pci 1f.1 off end # IDE device pci 1f.2 on end # SATA device pci 1f.3 on end # SMBus end diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb index 6bdc134..7ed4d19 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb @@ -86,10 +86,10 @@ end device pci 1c.0 on end # PCIe device pci 1c.1 on end # PCIe - #device pci 1c.2 off end # PCIe port 3 - #device pci 1c.3 off end # PCIe port 4 - #device pci 1c.4 off end # PCIe port 5 - #device pci 1c.5 off end # PCIe port 6 + device pci 1c.2 off end # PCIe port 3 + device pci 1c.3 off end # PCIe port 4 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 device pci 1d.0 on # USB UHCI ioapic_irq 2 INTA 0x10 end @@ -106,6 +106,8 @@ ioapic_irq 2 INTA 0x10 end device pci 1e.0 on end # PCI bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge ioapic_irq 2 INTA 0x10 diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c index 926a5a7..f30066e 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c @@ -87,7 +87,8 @@ RCBA8(OIC) = 0x03; /* Disable unused devices */ - RCBA32(FD) = 0x003c0061; + RCBA32(FD) = FD_PCIE6 | FD_PCIE5 | FD_PCIE4 | FD_PCIE3 + | FD_ACMOD | FD_ACAUD | 1; /* Enable PCIe Root Port Clock Gate */ RCBA32(CG) = 0x00000001; diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index d948398..9f92d2a 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -62,7 +62,9 @@ end end device pci 1c.2 on end # PCIe 3 - device pci 1c.3 on end # PCIe 4 + device pci 1c.3 off end # PCIe 4 + device pci 1c.4 off end # PCIe 5 + device pci 1c.5 off end # PCIe 6 device pci 1d.0 on # USB subsystemid 0x1458 0x5004 end @@ -79,6 +81,8 @@ subsystemid 0x1458 0x5006 end device pci 1e.0 on end # PCI bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # ISA bridge subsystemid 0x1458 0x5001 chip superio/ite/it8718f # Super I/O @@ -164,9 +168,6 @@ device pci 1f.3 on # SMbus subsystemid 0x1458 0x5001 end - device pci 1f.4 off end - device pci 1f.5 off end - device pci 1f.6 off end end end end diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb index c63e5d6..3544c96 100644 --- a/src/mainboard/ibase/mb899/devicetree.cb +++ b/src/mainboard/ibase/mb899/devicetree.cb @@ -45,17 +45,17 @@ device pci 1c.0 on end # PCIe device pci 1c.1 on end # PCIe device pci 1c.2 on end # PCIe - #device pci 1c.3 off end # PCIe port 4 - #device pci 1c.4 off end # PCIe port 5 - #device pci 1c.5 off end # PCIe port 6 + device pci 1c.3 on end # PCIe port 4 + device pci 1c.4 on end # PCIe port 5 + device pci 1c.5 on end # PCIe port 6 device pci 1d.0 on end # USB UHCI device pci 1d.1 on end # USB UHCI device pci 1d.2 on end # USB UHCI device pci 1d.3 on end # USB UHCI device pci 1d.7 on end # USB2 EHCI device pci 1e.0 on end # PCI bridge - #device pci 1e.2 off end # AC'97 Audio - #device pci 1e.3 off end # AC'97 Modem + device pci 1e.2 on end # AC'97 Audio + device pci 1e.3 on end # AC'97 Modem device pci 1f.0 on # LPC bridge chip superio/winbond/w83627ehg device pnp 4e.0 off end # Floppy @@ -108,7 +108,6 @@ device pci 1f.1 on end # IDE device pci 1f.2 on end # SATA device pci 1f.3 on end # SMBus - # device pci 1f.4 off end # Realtek ID Codec end # chip southbridge/intel/i82801gx end # device domain0 diff --git a/src/mainboard/intel/d510mo/devicetree.cb b/src/mainboard/intel/d510mo/devicetree.cb index 4733038..782adf4 100644 --- a/src/mainboard/intel/d510mo/devicetree.cb +++ b/src/mainboard/intel/d510mo/devicetree.cb @@ -49,12 +49,15 @@ device pci 1c.1 on end # PCIe 2 device pci 1c.2 on end # PCIe 3 device pci 1c.3 on end # PCIe 4 + # (PCIe 5 and 6 not on nm10?) device pci 1d.0 on end # USB device pci 1d.1 on end # USB device pci 1d.2 on end # USB device pci 1d.3 on end # USB device pci 1d.7 on end # USB device pci 1e.0 on end # PCI bridge + #device pci 1e.2 off end # AC'97 Audio (not on nm10?) + #device pci 1e.3 off end # AC'97 Modem (not on nm10?) device pci 1f.0 on # ISA bridge chip superio/winbond/w83627thg # Super I/O device pnp 4e.0 off end # Floppy diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index d9eda6b..eaa26ef 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -55,20 +55,20 @@ register "p_cnt_throttling_supported" = "0" device pci 1b.0 on end # High Definition Audio - device pci 1c.0 on end # PCIe - device pci 1c.1 on end # PCIe - device pci 1c.2 on end # PCIe - #device pci 1c.3 off end # PCIe port 4 - #device pci 1c.4 off end # PCIe port 5 - #device pci 1c.5 off end # PCIe port 6 + device pci 1c.0 on end # PCIe port 1 + device pci 1c.1 off end # PCIe port 2 + device pci 1c.2 on end # PCIe port 3 + device pci 1c.3 on end # PCIe port 4 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 device pci 1d.0 on end # USB UHCI device pci 1d.1 on end # USB UHCI device pci 1d.2 on end # USB UHCI device pci 1d.3 on end # USB UHCI device pci 1d.7 on end # USB2 EHCI device pci 1e.0 on end # PCI bridge - #device pci 1e.2 off end # AC'97 Audio - #device pci 1e.3 off end # AC'97 Modem + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge chip superio/smsc/lpc47m15x device pnp 2e.0 off # Floppy @@ -100,10 +100,9 @@ end end end - #device pci 1f.1 off end # IDE + device pci 1f.1 off end # IDE device pci 1f.2 on end # SATA device pci 1f.3 on end # SMBus - #device pci 1f.4 off end # Realtek ID Codec end end end diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb index c768b64..06f29e0 100644 --- a/src/mainboard/kontron/986lcd-m/devicetree.cb +++ b/src/mainboard/kontron/986lcd-m/devicetree.cb @@ -44,17 +44,17 @@ device pci 1c.0 on end # PCIe device pci 1c.1 on end # PCIe device pci 1c.2 on end # PCIe - #device pci 1c.3 off end # PCIe port 4 - #device pci 1c.4 off end # PCIe port 5 - #device pci 1c.5 off end # PCIe port 6 + device pci 1c.3 off end # PCIe port 4 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 device pci 1d.0 on end # USB UHCI device pci 1d.1 on end # USB UHCI device pci 1d.2 on end # USB UHCI device pci 1d.3 on end # USB UHCI device pci 1d.7 on end # USB2 EHCI device pci 1e.0 on end # PCI bridge - #device pci 1e.2 off end # AC'97 Audio - #device pci 1e.3 off end # AC'97 Modem + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge chip superio/winbond/w83627thg device pnp 2e.0 off # Floppy @@ -128,10 +128,9 @@ end end - #device pci 1f.1 off end # IDE + device pci 1f.1 off end # IDE device pci 1f.2 on end # SATA device pci 1f.3 on end # SMBus - #device pci 1f.4 off end # Realtek ID Codec end end end diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index 053b9d3..7b1721e 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -90,6 +90,11 @@ subsystemid 0x17aa 0x2001 end device pci 1c.1 on end # WLAN + device pci 1c.2 on end # PCIe port 3 + device pci 1c.3 on end # PCIe port 4 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 + device pci 1d.0 on # USB UHCI subsystemid 0x17aa 0x200a end @@ -115,6 +120,8 @@ end end + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # PCI-LPC bridge subsystemid 0x17aa 0x2009 chip ec/lenovo/pmh7 diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index da9bff7..2a60b87 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -82,6 +82,11 @@ end device pci 1c.0 on end # Ethernet device pci 1c.1 on end # Atheros WLAN + device pci 1c.2 on end # PCIe port 3 + device pci 1c.3 on end # PCIe port 4 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 + device pci 1d.0 on # USB UHCI subsystemid 0x17aa 0x200a end @@ -97,6 +102,9 @@ device pci 1d.7 on # USB2 EHCI subsystemid 0x17aa 0x200b end + device pci 1e.0 on end # PCI Bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # PCI-LPC bridge subsystemid 0x17aa 0x2009 chip ec/lenovo/pmh7 diff --git a/src/mainboard/lenovo/z61t/devicetree.cb b/src/mainboard/lenovo/z61t/devicetree.cb index 1c60e6b..92bf3ce 100644 --- a/src/mainboard/lenovo/z61t/devicetree.cb +++ b/src/mainboard/lenovo/z61t/devicetree.cb @@ -97,6 +97,9 @@ device pci 1c.3 on # PCI Express Port 4 subsystemid 0x17aa 0x2011 end + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 + device pci 1d.0 on # USB UHCI subsystemid 0x17aa 0x200a end @@ -122,6 +125,8 @@ end end + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # PCI-LPC bridge subsystemid 0x17aa 0x2009 chip ec/lenovo/pmh7 diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index bb057f1..e3bcc5b 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -64,12 +64,12 @@ register "sata_ahci" = "0x0" device pci 1b.0 on end # High Definition Audio - device pci 1c.0 on end # PCIe - device pci 1c.1 on end # PCIe - device pci 1c.2 on end # PCIe - #device pci 1c.3 off end # PCIe port 4 - #device pci 1c.4 off end # PCIe port 5 - #device pci 1c.5 off end # PCIe port 6 + device pci 1c.0 on end # PCIe port 1 + device pci 1c.1 off end # PCIe port 2 + device pci 1c.2 off end # PCIe port 3 + device pci 1c.3 on end # PCIe port 4 + device pci 1c.4 off end # PCIe port 5 + device pci 1c.5 off end # PCIe port 6 device pci 1d.0 on end # USB UHCI device pci 1d.1 on end # USB UHCI device pci 1d.2 on end # USB UHCI @@ -84,8 +84,8 @@ device pci 3.3 off end # smartcard end end # PCI bridge - #device pci 1e.2 off end # AC'97 Audio - #device pci 1e.3 off end # AC'97 Modem + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge chip superio/smsc/lpc47n227 device pnp 2e.1 on # Parallel port @@ -115,10 +115,9 @@ end end - #device pci 1f.1 off end # IDE + device pci 1f.1 off end # IDE device pci 1f.2 on end # SATA device pci 1f.3 on end # SMBus - #device pci 1f.4 off end # Realtek ID Codec end end end -- To view, visit https://review.coreboot.org/27122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1692ca5f490ea84e2fc520d3f66044ad7514f76e Gerrit-Change-Number: 27122 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: mb/asrock/g41c-gs: Add the revision 1 variant
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

1 0

Change in coreboot[master]: mb/asrock/g41c-gs: Add g41m-gs variant
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23043 ) Change subject: mb/asrock/g41c-gs: Add g41m-gs variant ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29092/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/74994/ : SUCCESS -- To view, visit https://review.coreboot.org/23043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6844efacaae109cf1e0894201852fddd8043a706 Gerrit-Change-Number: 23043 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Jun 2018 19:15:06 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/asrock/g41c-gs: Add the revision 1 variant
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

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Change in coreboot[master]: mb/asrock/g41c-gs: Add g41m-gs variant
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23043 ) Change subject: mb/asrock/g41c-gs: Add g41m-gs variant ...................................................................... Patch Set 3: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/74992/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/29090/ : SUCCESS -- To view, visit https://review.coreboot.org/23043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6844efacaae109cf1e0894201852fddd8043a706 Gerrit-Change-Number: 23043 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Jun 2018 19:09:44 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/asrock/g41c-gs: Add the revision 1 variant
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21292 ) Change subject: mb/asrock/g41c-gs: Add the revision 1 variant ...................................................................... Patch Set 17: (16 comments) https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.c File src/mainboard/asrock/g41c-gs/gpio.c: https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 73: .gpio10 = GPIO_LEVEL_LOW, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 73: .gpio10 = GPIO_LEVEL_LOW, please, no spaces at the start of a line https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 74: .gpio15 = GPIO_LEVEL_LOW, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 74: .gpio15 = GPIO_LEVEL_LOW, please, no spaces at the start of a line https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 75: .gpio16 = GPIO_LEVEL_HIGH, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 75: .gpio16 = GPIO_LEVEL_HIGH, please, no spaces at the start of a line https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 76: .gpio18 = GPIO_LEVEL_LOW, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 76: .gpio18 = GPIO_LEVEL_LOW, please, no spaces at the start of a line https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 77: .gpio20 = GPIO_LEVEL_HIGH, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 77: .gpio20 = GPIO_LEVEL_HIGH, please, no spaces at the start of a line https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 78: .gpio24 = GPIO_LEVEL_HIGH, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 78: .gpio24 = GPIO_LEVEL_HIGH, please, no spaces at the start of a line https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 79: .gpio25 = GPIO_LEVEL_LOW, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 79: .gpio25 = GPIO_LEVEL_LOW, please, no spaces at the start of a line https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 80: .gpio27 = GPIO_LEVEL_LOW, code indent should use tabs where possible https://review.coreboot.org/#/c/21292/17/src/mainboard/asrock/g41c-gs/gpio.… PS17, Line 80: .gpio27 = GPIO_LEVEL_LOW, please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/21292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib69c2ac0a9dc1b5c46220d2d2d5239edc99b0516 Gerrit-Change-Number: 21292 Gerrit-PatchSet: 17 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: AndiR <andir(a)memeware.net> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Comment-Date: Fri, 15 Jun 2018 19:07:34 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mb/lenovo/t400: Enable PCIe port on dock
by build bot (Jenkins) (Code Review) 15 Jun '18

15 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27121 ) Change subject: mb/lenovo/t400: Enable PCIe port on dock ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29088/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/74990/ : SUCCESS -- To view, visit https://review.coreboot.org/27121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2ad8a37988f2b6b5974ce0bdb565a7729e6dd15d Gerrit-Change-Number: 27121 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Jun 2018 18:06:59 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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