coreboot-gerrit May 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/broadwell: decouple PEI memory struct from coreboot header
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26598 ) Change subject: soc/intel/broadwell: decouple PEI memory struct from coreboot header ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73533/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27643/ : SUCCESS -- To view, visit https://review.coreboot.org/26598 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I932b7b41ae1e3fd364d056a8c91f7ed5d25dbafc Gerrit-Change-Number: 26598 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 16:49:09 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/broadwell: decouple PEI memory struct from coreboot header
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26598 ) Change subject: soc/intel/broadwell: decouple PEI memory struct from coreboot header ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/#/c/26598/5/src/soc/intel/broadwell/romstage/ra… File src/soc/intel/broadwell/romstage/raminit.c: https://review.coreboot.org/#/c/26598/5/src/soc/intel/broadwell/romstage/ra… PS5, Line 151: mem_info->dimm[i].module_part_number[DIMM_INFO_PART_NUMBER_SIZE - 1] = '\0'; line over 80 characters -- To view, visit https://review.coreboot.org/26598 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I932b7b41ae1e3fd364d056a8c91f7ed5d25dbafc Gerrit-Change-Number: 26598 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 16:43:09 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: libpayload-x86: i8042: fix i8042_data_ready_ps2 and i8042_data_ready_aux
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26590 ) Change subject: libpayload-x86: i8042: fix i8042_data_ready_ps2 and i8042_data_ready_aux ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73532/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27642/ : SUCCESS -- To view, visit https://review.coreboot.org/26590 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I944b4836005c887a2715717dff2df1b5a220818e Gerrit-Change-Number: 26590 Gerrit-PatchSet: 3 Gerrit-Owner: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 16:38:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: sb/intel/common/firmware: Use the -S flag of me_cleaner
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25508 ) Change subject: sb/intel/common/firmware: Use the -S flag of me_cleaner ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73531/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27641/ : SUCCESS -- To view, visit https://review.coreboot.org/25508 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c12d09124dcc39924d1dc4eaf53a2dc1f69a2ac Gerrit-Change-Number: 25508 Gerrit-PatchSet: 5 Gerrit-Owner: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 15:55:55 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src/sb/intel/common/spi.c: Adapt and link in romstage
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25414 ) Change subject: src/sb/intel/common/spi.c: Adapt and link in romstage ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73530/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27640/ : SUCCESS -- To view, visit https://review.coreboot.org/25414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4671653c0b07ab5c4bf91128f18f142ce4f893cf Gerrit-Change-Number: 25414 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christoph Pomaska <cp_public(a)posteo.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 15:24:02 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: src/sb/intel/common/spi.c: Adapt and link in romstage
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25414 ) Change subject: src/sb/intel/common/spi.c: Adapt and link in romstage ...................................................................... Patch Set 3: (2 comments) https://review.coreboot.org/#/c/25414/3/src/southbridge/intel/common/spi.c File src/southbridge/intel/common/spi.c: https://review.coreboot.org/#/c/25414/3/src/southbridge/intel/common/spi.c@… PS3, Line 321: car_set_var(g_ichspi_lock, readw_(&ich7_spi->spis) & HSFS_FLOCKDN); line over 80 characters https://review.coreboot.org/#/c/25414/3/src/southbridge/intel/common/spi.c@… PS3, Line 957: writel_ (0x1000, &cntlr->ich9_spi->fdoc); space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/25414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4671653c0b07ab5c4bf91128f18f142ce4f893cf Gerrit-Change-Number: 25414 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christoph Pomaska <cp_public(a)posteo.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 15:20:33 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: {cpu, drivers, nb, soc}/intel: Use CACHE_ROM_BASE where appropriate
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26574 ) Change subject: {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73529/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27639/ : SUCCESS -- To view, visit https://review.coreboot.org/26574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibc2392cd2a00fde3e15dda4d44c8b6874d7ac8a3 Gerrit-Change-Number: 26574 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 14:06:02 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/{amd, intel}: Use CACHE_ROM_(BASE|SIZE)
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26575 ) Change subject: soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE) ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73528/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27638/ : SUCCESS -- To view, visit https://review.coreboot.org/26575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I66d36b84ce49c1cb98cb36a4731977baaedf3225 Gerrit-Change-Number: 26575 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 14:02:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiB
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26567 ) Change subject: cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiB ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73527/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27637/ : SUCCESS -- To view, visit https://review.coreboot.org/26567 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5dfa2744190a34c56c86e108a8c50dca9d428268 Gerrit-Change-Number: 26567 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 13:57:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE
by build bot (Jenkins) (Code Review) 29 May '18

29 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26566 ) Change subject: cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73526/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27636/ : SUCCESS -- To view, visit https://review.coreboot.org/26566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d0096f14a9d343c2e646e48175fe2127198a822 Gerrit-Change-Number: 26566 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 May 2018 13:52:06 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit May 2018