Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/23834 )
Change subject: intelmetool: Include <sys/io.h> for musl-libc
......................................................................
intelmetool: Include <sys/io.h> for musl-libc
This allows compiling the program using musl-libc, since otherwise
iopl(2) is undeclared.
Change-Id: Ia27203cf47b9be3f7bf1ad422c8f490caeae8f56
Signed-off-by: Ivan J. <parazyd(a)dyne.org>
Reviewed-on: https://review.coreboot.org/23834
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M util/intelmetool/intelmetool.c
1 file changed, 1 insertion(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Paul Menzel: Looks good to me, but someone else must approve
Philipp Deppenwiese: Looks good to me, approved
diff --git a/util/intelmetool/intelmetool.c b/util/intelmetool/intelmetool.c
index 0b0e509..14cb035 100644
--- a/util/intelmetool/intelmetool.c
+++ b/util/intelmetool/intelmetool.c
@@ -18,6 +18,7 @@
#include <unistd.h>
#include <string.h>
#include <cpuid.h>
+#include <sys/io.h>
#ifdef __NetBSD__
#include <machine/sysarch.h>
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Gerrit-MessageType: merged
Gerrit-Change-Id: Ia27203cf47b9be3f7bf1ad422c8f490caeae8f56
Gerrit-Change-Number: 23834
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Gerrit-Owner: Ivan J. <parazyd(a)dyne.org>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
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Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/23834 )
Change subject: intelmetool: Include <sys/io.h> for musl-libc
......................................................................
Patch Set 4: Code-Review+2
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Gerrit-Owner: Ivan J. <parazyd(a)dyne.org>
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Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/25536
Change subject: mb/google/atlas: [WIP] Add camera ASL files
......................................................................
mb/google/atlas: [WIP] Add camera ASL files
Atlas has one sensor, create a single endpoint to CIO2.
create power resource for enabling/disabling camera.
BUG=None
Branch=None
TEST=NA
Change-Id: If4e8d20b4b059b072fd7c20f3b6b3cf8e9c67d63
Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
---
A src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl
A src/mainboard/google/poppy/variants/atlas/include/variant/acpi/camera.asl
A src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_endpoints.asl
A src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_mainboard.asl
4 files changed, 202 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/25536/1
diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl
new file mode 100644
index 0000000..2589da9
--- /dev/null
+++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl
@@ -0,0 +1,115 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.I2C3)
+{
+ Device (CAM0)
+ {
+ Name (_HID, "SONY258A") /* _HID: Hardware ID */
+ Name (_UID, Zero) /* _UID: Unique ID */
+ Name (_DDN, "SONY IMX258 Camera") /* _DDN: DOS Device Name */
+ Name (CAMD, 0x02)
+
+ Method (_STA, 0, NotSerialized) /* _STA: Status */
+ {
+ Return (0x0F)
+ }
+
+ Name (_DEP, Package() { \_SB.PCI0.I2C2.PMIC })
+ Name (_CRS, ResourceTemplate ()
+ {
+ I2cSerialBus (0x001A, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C2",
+ 0x00, ResourceConsumer, ,
+ )
+ })
+
+ /* Power resource methods for CAM0 */
+ PowerResource (OVTH, 0, 0) {
+ Name (STA, 0)
+ Method (_ON, 0, Serialized) {
+ /* Enable power GPP_D8 */
+ /* Enable Clock GPP_D18 */
+ STA = 1
+ }
+
+ Method (_OFF, 0, Serialized) {
+ /* Disable power GPP_D8 */
+ /* Disable Clock GPP_D18 */
+ STA = 0
+ }
+ Method (_STA, 0, NotSerialized) {
+ Return (STA)
+ }
+ }
+ Name (_PR0, Package () { ^^I2C3.CAM0.OVTH })
+ Name (_PR3, Package () { ^^I2C3.CAM0.OVTH })
+
+ /* Port0 of CAM0 is connected to port0 of CIO2 device */
+ Name (_DSD, Package () {
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "port0", "PRT0" },
+ },
+ })
+
+ Name (PRT0, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port", 0 },
+ },
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "endpoint0", "EP00" },
+ }
+ })
+
+ Name (EP00, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "endpoint", 0 },
+ Package () { "clock-lanes", 0 },
+ Package () { "data-lanes",
+ Package () { 1, 2 }
+ },
+ Package () { "link-frequencies",
+ Package() { 633600000, 320000000 }
+ },
+ Package () { "remote-endpoint",
+ Package() { \_SB.PCI0.CIO2, 0, 0 }
+ },
+ }
+ })
+
+ Method (SSDB, 0, Serialized)
+ {
+ Return (Buffer (0x5E)
+ {
+ /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00,0x00, 0x00,
+ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
+ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03,
+ /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36,
+ /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00
+ })
+ }
+ }
+}
diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/camera.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/camera.asl
new file mode 100644
index 0000000..7993a66
--- /dev/null
+++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/camera.asl
@@ -0,0 +1,19 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "ipu_mainboard.asl"
+#include "ipu_endpoints.asl"
+#include <baseboard/acpi/camera_pmic.asl>
+#include "cam0.asl"
diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_endpoints.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_endpoints.asl
new file mode 100644
index 0000000..5dc747b
--- /dev/null
+++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_endpoints.asl
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.CIO2)
+{
+ Name (EP00, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "endpoint", 0 },
+ Package () { "clock-lanes", 0 },
+ Package () { "data-lanes", Package () { 1, 2 } },
+ Package () { "remote-endpoint",
+ Package() { \_SB.PCI0.I2C3.CAM0, 0, 0 }
+ },
+ }
+ })
+}
diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_mainboard.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_mainboard.asl
new file mode 100644
index 0000000..b21cdcf
--- /dev/null
+++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/ipu_mainboard.asl
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.CIO2)
+{
+ /* Define two ports for CIO2 device where endpoint of port0
+ is connected to CAM0 and endpoint of port1 is connected to CAM1
+ Endpoints can be customized by the variants of the based board */
+
+ Name (_DSD, Package () {
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "port0", "PRT0" },
+ }
+ })
+
+ Name (PRT0, Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port", 0 }, /* csi 0 */
+ },
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "endpoint0", "EP00" },
+ }
+ })
+}
--
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25528 )
Change subject: mainboard: Make OemCustomize.c available at romstage
......................................................................
Patch Set 2:
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/69528/ : SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/23844/ : SUCCESS
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