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Change subject: nb/intel/x4x: Add a convenient macro to loop over bytelanes
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22328 )
Change subject: nb/intel/x4x: Clarify the raminit memory mapping
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22329 )
Change subject: nb/intel/x4x: Implement both read and write training
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Justin TerAvest has uploaded this change for review. ( https://review.coreboot.org/25543
Change subject: drivers/spi/tpm: Add sleep delay after ready cmd.
......................................................................
drivers/spi/tpm: Add sleep delay after ready cmd.
This is analogous to a sleep done in the I2C TPM driver to ensure that
cr50 has time to process the COMMAND_READY command before receiving any
later traffic. This change made the TPM much more reliable (though not
perfect).
BUG=b:75306520
BRANCH=None
TEST=Significantly improved reliability
Signed-off-by: Justin TerAvest
Change-Id: Ia25467dc60c968b3b3892e59f90f0393161375c8
---
M src/drivers/spi/tpm/tpm.c
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/25543/1
diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c
index c0fee46..a7900c6 100644
--- a/src/drivers/spi/tpm/tpm.c
+++ b/src/drivers/spi/tpm/tpm.c
@@ -38,6 +38,7 @@
#define TPM_FW_VER (TPM_LOCALITY_0_SPI_BASE + 0xf90)
#define CR50_TIMEOUT_INIT_MS 30000 /* Very long timeout for TPM init */
+#define CR50_SLEEP_LONG 210 /* in usec */
/* SPI slave structure for TPM device. */
static struct spi_slave g_spi_slave CAR_GLOBAL;
@@ -725,6 +726,8 @@
/* Move the TPM back to idle state. */
write_tpm_sts(TPM_STS_COMMAND_READY);
+ /* Add sleep after sending command ready so TPM has time to process */
+ udelay(CR50_SLEEP_LONG);
return payload_size;
}
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/25540 )
Change subject: ioapic: extend definition name to avoid collision
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Patch Set 1: Code-Review+2
(2 comments)
Looks good other than the minor issues in the commit message.
https://review.coreboot.org/#/c/25540/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/25540/1//COMMIT_MSG@7
PS1, Line 7:
extra space
https://review.coreboot.org/#/c/25540/1//COMMIT_MSG@9
PS1, Line 9: colission
collision
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