build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25687 )
Change subject: clang-format: Update .clang-format to be compliant with linux kernel coding style
......................................................................
Patch Set 2:
No Builds Executed
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I61a32ed951d18d5865be201bb38d18e50dd76f08
Gerrit-Change-Number: 25687
Gerrit-PatchSet: 2
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Mon, 16 Apr 2018 19:41:16 +0000
Gerrit-HasComments: No
Gerrit-HasLabels: No
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/25690
Change subject: mainboard/google/kahlee: Add EC back into grunt devicetree
......................................................................
mainboard/google/kahlee: Add EC back into grunt devicetree
The EC code should not have been removed from devicetree when moving
over from grunt. This was causing various bewildering issues that
would happen on the first boot but not on subsequent reboots.
BUG=b:73235377
TEST=Grunt powers off and stays powered off at dev screen.
Change-Id: I225138fede66c6e189e0e79d1261d0d579f7cbdc
Signed-off-by: Martin Roth <martinroth(a)chromium.org>
---
M src/mainboard/google/kahlee/variants/grunt/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/25690/1
diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
index 55372d4..f55a424 100644
--- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
@@ -73,6 +73,9 @@
device pci 14.0 on # SMbus
end # SMbus
device pci 14.3 on
+ chip ec/google/chromeec
+ device pnp 0c09.0 on end
+ end
end # LPC
device pci 14.7 on end # SD
device pci 18.0 on end
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I225138fede66c6e189e0e79d1261d0d579f7cbdc
Gerrit-Change-Number: 25690
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth(a)google.com>
Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/25322 )
Change subject: drivers/pc80/tpm: Add some optional delay to tis_readresponse()
......................................................................
drivers/pc80/tpm: Add some optional delay to tis_readresponse()
Certain TPMs (observed on Infineon SLB9635 installed on revolve 810 g1)
seem to need some delay between tis_wait_valid() and
tis_has_valid_data(), or tis_has_valid_data() may invalidly return 0,
ending the loop immaturely with some bytes left unread, and fail to
pass the check below, causing the current command not finalized by
tis_command_ready(), and blocking any later tis_wait_ready().
This time the added delay is controlled by a Kconfig option
TPM_RDRESP_NEED_DELAY.
Change-Id: Ic2a2f252e72a0bbce51e2863f8e46647b1570ba5
Signed-off-by: Bill XIE <persmule(a)gmail.com>
Reviewed-on: https://review.coreboot.org/25322
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/drivers/pc80/tpm/Kconfig
M src/drivers/pc80/tpm/tis.c
2 files changed, 17 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Paul Menzel: Looks good to me, but someone else must approve
Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/drivers/pc80/tpm/Kconfig b/src/drivers/pc80/tpm/Kconfig
index 3bd9083..879b4a2 100644
--- a/src/drivers/pc80/tpm/Kconfig
+++ b/src/drivers/pc80/tpm/Kconfig
@@ -46,3 +46,12 @@
depends on LPC_TPM
help
Deactivate TPM by issuing deactivate command.
+
+config TPM_RDRESP_NEED_DELAY
+ bool "Enable Delay Workaround for TPM"
+ default n
+ depends on LPC_TPM
+ help
+ Certain TPMs seem to need some delay when reading response
+ to work around a race-condition-related issue, possibly
+ caused by ill-programmed TPM firmware.
diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c
index 9802654..714b7e5 100644
--- a/src/drivers/pc80/tpm/tis.c
+++ b/src/drivers/pc80/tpm/tis.c
@@ -595,6 +595,14 @@
if (offset == expected_count)
break; /* We got all we need */
+ /*
+ * Certain TPMs seem to need some delay between tis_wait_valid()
+ * and tis_has_valid_data(), or some race-condition-related
+ * issue will occur.
+ */
+ if (IS_ENABLED(CONFIG_TPM_RDRESP_NEED_DELAY))
+ udelay(10);
+
} while (tis_has_valid_data(locality));
/* * Make sure we indeed read all there was. */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: Ic2a2f252e72a0bbce51e2863f8e46647b1570ba5
Gerrit-Change-Number: 25322
Gerrit-PatchSet: 4
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org>