coreboot-gerrit March 2018

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Change in coreboot[master]: mb/scaleway/tagada: Set DIMM slot information from mainboard
by Julien Viard de Galbert (Code Review) 08 Mar '18

08 Mar '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/24912 to look at the new patch set (#2). Change subject: mb/scaleway/tagada: Set DIMM slot information from mainboard ...................................................................... mb/scaleway/tagada: Set DIMM slot information from mainboard This field is not provided by the soc code so adding it. Change-Id: I6fdf3520da62336a5c654575ed8d1f33eb4f4dc5 Signed-off-by: Julien Viard de Galbert <jviarddegalbert(a)online.net> --- M src/mainboard/scaleway/tagada/ramstage.c 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/24912/2 -- To view, visit https://review.coreboot.org/24912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6fdf3520da62336a5c654575ed8d1f33eb4f4dc5 Gerrit-Change-Number: 24912 Gerrit-PatchSet: 2 Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert(a)online.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/denverton_ns: Update UART legacy mode to keep FSP traces
by build bot (Jenkins) (Code Review) 08 Mar '18

08 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23623 ) Change subject: soc/intel/denverton_ns: Update UART legacy mode to keep FSP traces ...................................................................... Patch Set 8: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22807/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68375/ : SUCCESS -- To view, visit https://review.coreboot.org/23623 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id8801e178ffd8eeee78ece07da7bd6b8dbd88538 Gerrit-Change-Number: 23623 Gerrit-PatchSet: 8 Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert(a)online.net> Gerrit-Reviewer: FEI WANG <wangfei.jimei(a)gmail.com> Gerrit-Reviewer: Julien Viard de Galbert <jviarddegalbert(a)online.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shine Liu <shine.liu(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Thu, 08 Mar 2018 10:06:24 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/skylake: Move PCR DMI programming into bootblock
by build bot (Jenkins) (Code Review) 08 Mar '18

08 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23866 ) Change subject: soc/intel/skylake: Move PCR DMI programming into bootblock ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22805/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68374/ : SUCCESS -- To view, visit https://review.coreboot.org/23866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie706735492a450baa653d8a8bb74c6e42f5150b8 Gerrit-Change-Number: 23866 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tung Lun Loo <tung.lun.loo(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Mar 2018 08:50:50 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/common: Enables decoding of the COMB range to LPC based on ...
by build bot (Jenkins) (Code Review) 08 Mar '18

08 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25045 ) Change subject: soc/intel/common: Enables decoding of the COMB range to LPC based on Kconfig ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22806/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68373/ : SUCCESS -- To view, visit https://review.coreboot.org/25045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I884dbcc8a37cf8551001d0ca61910c986b903ebc Gerrit-Change-Number: 25045 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Mar 2018 08:46:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/common: Enables decoding of the COMB range to LPC based on ...
by Subrata Banik (Code Review) 08 Mar '18

08 Mar '18

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/25045 Change subject: soc/intel/common: Enables decoding of the COMB range to LPC based on Kconfig ...................................................................... soc/intel/common: Enables decoding of the COMB range to LPC based on Kconfig By default all Intel platform has enable IO decode range for COMA. With this patch, COMB will get enable based on CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE Kconfig selection. Change-Id: I884dbcc8a37cf8551001d0ca61910c986b903ebc Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/lpc/Kconfig M src/soc/intel/common/block/lpc/lpc_lib.c 2 files changed, 21 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/25045/1 diff --git a/src/soc/intel/common/block/lpc/Kconfig b/src/soc/intel/common/block/lpc/Kconfig index c384c34..27641d3 100644 --- a/src/soc/intel/common/block/lpc/Kconfig +++ b/src/soc/intel/common/block/lpc/Kconfig @@ -3,3 +3,11 @@ help Use common LPC code for platform. Only soc specific code needs to be implemented as per requirement. + +config SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE + depends on SOC_INTEL_COMMON_BLOCK_LPC + bool + default n + help + By default COMA range to LPC is enable. COMB range to LPC is optional + and should select based on platform dedicated selection. diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index b4b3d1b..3570f61 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -225,15 +225,20 @@ void lpc_io_setup_comm_a_b(void) { - /* - * Setup I/O Decode Range Register for LPC - * ComA Range 3F8h-3FFh [2:0] - * ComB Range 2F8h-2FFh [6:4] - */ - pci_write_config16(PCH_DEV_LPC, LPC_IO_DECODE, - LPC_IOD_COMA_RANGE | LPC_IOD_COMB_RANGE); + /* ComA Range 3F8h-3FFh [2:0] */ + uint16_t com_ranges = LPC_IOD_COMA_RANGE; + uint16_t com_enable = LPC_IOE_COMA_EN; + + /* ComB Range 2F8h-2FFh [6:4] */ + if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE)) { + com_ranges |= LPC_IOD_COMB_RANGE; + com_enable |= LPC_IOE_COMB_EN; + } + + /* Setup I/O Decode Range Register for LPC */ + pci_write_config16(PCH_DEV_LPC, LPC_IO_DECODE, com_ranges); /* Enable ComA and ComB Port */ - lpc_enable_fixed_io_ranges(LPC_IOE_COMA_EN | LPC_IOE_COMB_EN); + lpc_enable_fixed_io_ranges(com_enable); } static void lpc_set_gen_decode_range( -- To view, visit https://review.coreboot.org/25045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I884dbcc8a37cf8551001d0ca61910c986b903ebc Gerrit-Change-Number: 25045 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

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Change in coreboot[master]: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan
by build bot (Jenkins) (Code Review) 08 Mar '18

08 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25044 ) Change subject: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68372/ : SUCCESS -- To view, visit https://review.coreboot.org/25044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4c8380e94305ed58453ed18b341b3b923949d7a8 Gerrit-Change-Number: 25044 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Mar 2018 07:36:53 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan
by build bot (Jenkins) (Code Review) 08 Mar '18

08 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25044 ) Change subject: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68371/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/22804/ : SUCCESS -- To view, visit https://review.coreboot.org/25044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4c8380e94305ed58453ed18b341b3b923949d7a8 Gerrit-Change-Number: 25044 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Mar 2018 07:30:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan
by Furquan Shaikh (Code Review) 08 Mar '18

08 Mar '18

Furquan Shaikh has uploaded a new patch set (#2). ( https://review.coreboot.org/25044 ) Change subject: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan ...................................................................... cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan Since the timeout in bsp_do_flight_plan is bumped up to 1 second, this change adds a print to indicate the amount of time it takes for all the APs to check-in. TEST=Verified on Nami that it prints: "bsp_do_flight_plan done after 395 msecs." Change-Id: I4c8380e94305ed58453ed18b341b3b923949d7a8 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/cpu/x86/mp_init.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/25044/2 -- To view, visit https://review.coreboot.org/25044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4c8380e94305ed58453ed18b341b3b923949d7a8 Gerrit-Change-Number: 25044 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan
by Furquan Shaikh (Code Review) 08 Mar '18

08 Mar '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/25044 Change subject: cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan ...................................................................... cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_plan Since the timeout in bsp_do_flight_plan is bumped up to 1 second, this change adds a print to indicate the amount of time it took for all the APs to check-in. TEST=Verified on Nami that it prints: "bsp_do_flight_plan done after 395 msecs." Change-Id: I4c8380e94305ed58453ed18b341b3b923949d7a8 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/cpu/x86/mp_init.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/25044/1 diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 23aea14..409caa5 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -547,6 +547,9 @@ const int timeout_us = 1000000; const int step_us = 100; int num_aps = mp_params->num_cpus - 1; + struct stopwatch sw; + + stopwatch_init(&sw); for (i = 0; i < mp_params->num_records; i++) { struct mp_flight_record *rec = &mp_params->flight_plan[i]; @@ -566,6 +569,9 @@ release_barrier(&rec->barrier); } + + printk(BIOS_INFO, "%s done after %ld msecs.\n", __func__, + stopwatch_duration_msecs(&sw)); return ret; } -- To view, visit https://review.coreboot.org/25044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4c8380e94305ed58453ed18b341b3b923949d7a8 Gerrit-Change-Number: 25044 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: acpi: update a comment referencing ACPI ID
by build bot (Jenkins) (Code Review) 07 Mar '18

07 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25042 ) Change subject: acpi: update a comment referencing ACPI ID ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22803/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68370/ : SUCCESS -- To view, visit https://review.coreboot.org/25042 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I802ce284001b186f6cd8839b8c303d49f42b4d38 Gerrit-Change-Number: 25042 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Mar 2018 04:21:04 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit March 2018