Naresh Solanki has posted comments on this change. ( https://review.coreboot.org/23757 )
Change subject: mb/google/soraka: Set psys_max to 45W
......................................................................
Patch Set 5:
> This should apply to all poppy derivatives, not just soraka.
>
> Otherwise LGTM if the PSYS value matches values from the battery.
I agree with you but I don't have exact data about other variants. Can you please help confirm ? I Assume its 45W
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Hello Sumeet R Pawnikar, Nicolas Boichat, Rizwan Qureshi, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/23757
to look at the new patch set (#5).
Change subject: mb/google/soraka: Set psys_max to 45W
......................................................................
mb/google/soraka: Set psys_max to 45W
Soraka is designed to operate at max power of 45 Watt.
Hence set psys_max to 45W.
BUG=b:66066340
BRANCH=None
TEST=Build and boot soraka.
Change-Id: If6f624733830b462329b5f539c20e2aea664143e
Signed-off-by: Naresh G Solanki <naresh.solanki(a)intel.com>
---
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/23757/5
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23767 )
Change subject: google/gru: Fix GPIO_WP pull and polarity for Scarlet
......................................................................
Patch Set 2: Verified+1
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/67506/ : SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/22039/ : SUCCESS
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23767 )
Change subject: google/gru: Fix GPIO_WP pull and polarity for Scarlet
......................................................................
Patch Set 1: Verified+1
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/67503/ : SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/22036/ : SUCCESS
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David Schneider has posted comments on this change. ( https://review.coreboot.org/23767 )
Change subject: google/gru: Fix GPIO_WP pull and polarity for Scarlet
......................................................................
Patch Set 1: Code-Review+1
I liked the other commit message better, though
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Julius Werner has posted comments on this change. ( https://review.coreboot.org/23767 )
Change subject: google/gru: Fix GPIO_WP pull and polarity for Scarlet
......................................................................
Patch Set 1: Code-Review+2
Since none of you can +2 I'll help myself and check this in tomorrow if there are no objections.
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Hello Lin Huang, David Schneider, Philip Chen,
I'd like you to do a code review. Please visit
https://review.coreboot.org/23767
to review the following change.
Change subject: google/gru: Fix GPIO_WP pull and polarity for Scarlet
......................................................................
google/gru: Fix GPIO_WP pull and polarity for Scarlet
Turns out the write-protect GPIO polarity for Scarlet is different than
for Kevin/Gru, and nobody ever told us. Also, it must not be configured
with an internal pull-up or we'll not read the correct value. This patch
fixes both issues.
BRANCH=scarlet
BUG=b:73356326
TEST=Booted Scarlet, confirmed that crossystem wpsw_boot returns the
right value in all cases.
Change-Id: Idd348ecdf9da8fff7201b83e869ba097b8570f32
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M src/mainboard/google/gru/chromeos.c
1 file changed, 10 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/23767/1
diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c
index ff5368a..55da879 100644
--- a/src/mainboard/google/gru/chromeos.c
+++ b/src/mainboard/google/gru/chromeos.c
@@ -21,15 +21,19 @@
#include "board.h"
+const uint32_t wp_polarity = IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET) ?
+ ACTIVE_LOW : ACTIVE_HIGH;
+
int get_write_protect_state(void)
{
- return gpio_get(GPIO_WP);
+ int raw = gpio_get(GPIO_WP);
+ return wp_polarity == ACTIVE_HIGH ? raw : !raw;
}
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
- {GPIO_WP.raw, ACTIVE_HIGH, get_write_protect_state(),
+ {GPIO_WP.raw, wp_polarity, gpio_get(GPIO_WP),
"write protect"},
{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
#if IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET)
@@ -49,7 +53,10 @@
void setup_chromeos_gpios(void)
{
- gpio_input_pullup(GPIO_WP);
+ if (IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET))
+ gpio_input(GPIO_WP);
+ else
+ gpio_input_pullup(GPIO_WP);
gpio_input_pullup(GPIO_EC_IN_RW);
gpio_input_pullup(GPIO_EC_IRQ);
}
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