coreboot-gerrit February 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: google/nautilus: set oem_id oem_table_id fields of acpi_header_t
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23648 ) Change subject: google/nautilus: set oem_id oem_table_id fields of acpi_header_t ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67184/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21740/ : SUCCESS -- To view, visit https://review.coreboot.org/23648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Gerrit-Change-Number: 23648 Gerrit-PatchSet: 2 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Assignee: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 04:59:06 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/nautilus: set oem_id oem_table_id fields of acpi_header_t
by Furquan Shaikh (Code Review) 08 Feb '18

08 Feb '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/23648 ) Change subject: google/nautilus: set oem_id oem_table_id fields of acpi_header_t ...................................................................... Patch Set 2: Code-Review+1 (1 comment) https://review.coreboot.org/#/c/23648/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/23648/2//COMMIT_MSG@7 PS2, Line 7: google/nautilus mb/google/poppy/variants/nautilus -- To view, visit https://review.coreboot.org/23648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Gerrit-Change-Number: 23648 Gerrit-PatchSet: 2 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Assignee: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 04:57:01 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/nautilus: set oem_id oem_table_id fields of acpi_header_t
by Naveen Manohar (Code Review) 08 Feb '18

08 Feb '18

Hello build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/23648 to look at the new patch set (#2). Change subject: google/nautilus: set oem_id oem_table_id fields of acpi_header_t ...................................................................... google/nautilus: set oem_id oem_table_id fields of acpi_header_t nautilus platform updated these two fields if maxim codec is detected BUG=b:68686020 TEST=Build, Booted nautilus board. Verified kernel read new strings. Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Signed-off-by: Naveen Manohar <naveen.m(a)intel.com> --- M src/mainboard/google/poppy/variants/nautilus/nhlt.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/23648/2 -- To view, visit https://review.coreboot.org/23648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Gerrit-Change-Number: 23648 Gerrit-PatchSet: 2 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Assignee: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: google/nautilus: set oem_id oem_table_id fields of acpi_header_t
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23648 ) Change subject: google/nautilus: set oem_id oem_table_id fields of acpi_header_t ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67183/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21739/ : SUCCESS -- To view, visit https://review.coreboot.org/23648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Gerrit-Change-Number: 23648 Gerrit-PatchSet: 1 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Assignee: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 04:39:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/nautilus: set oem_id oem_table_id fields of acpi_header_t
by Furquan Shaikh (Code Review) 08 Feb '18

08 Feb '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/23648 ) Change subject: google/nautilus: set oem_id oem_table_id fields of acpi_header_t ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/23648/1/src/mainboard/google/poppy/variants… File src/mainboard/google/poppy/variants/nautilus/nhlt.c: https://review.coreboot.org/#/c/23648/1/src/mainboard/google/poppy/variants… PS1, Line 37: __attribute__((weak)) This shouldn't be a weak function. -- To view, visit https://review.coreboot.org/23648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Gerrit-Change-Number: 23648 Gerrit-PatchSet: 1 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Assignee: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Thu, 08 Feb 2018 04:39:06 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: google/nautilus: set oem_id oem_table_id fields of acpi_header_t
by Naveen Manohar (Code Review) 08 Feb '18

08 Feb '18

Naveen Manohar has uploaded this change for review. ( https://review.coreboot.org/23648 Change subject: google/nautilus: set oem_id oem_table_id fields of acpi_header_t ...................................................................... google/nautilus: set oem_id oem_table_id fields of acpi_header_t nautilus platform updated these two fields if maxim codec is detected BUG=b:68686020 TEST=Build, Booted nautilus board. Verified kernel read new strings. Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Signed-off-by: Naveen Manohar <naveen.m(a)intel.com> --- M src/mainboard/google/poppy/variants/nautilus/nhlt.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/23648/1 diff --git a/src/mainboard/google/poppy/variants/nautilus/nhlt.c b/src/mainboard/google/poppy/variants/nautilus/nhlt.c index 690fed5..9461502 100644 --- a/src/mainboard/google/poppy/variants/nautilus/nhlt.c +++ b/src/mainboard/google/poppy/variants/nautilus/nhlt.c @@ -33,3 +33,12 @@ printk(BIOS_ERR, "Couldn't add Maxim_98357 codec.\n"); } + +void __attribute__((weak)) variant_nhlt_oem_overrides(const char **oem_id, + const char **oem_table_id, + uint32_t *oem_revision) +{ + *oem_id = "GOOGLE"; + *oem_table_id = "NAUTILUSMAX"; + *oem_revision = 0; +} -- To view, visit https://review.coreboot.org/23648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I041f2838f07a2525be7a28fdc69b7f1af46d16f1 Gerrit-Change-Number: 23648 Gerrit-PatchSet: 1 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com>

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Change in coreboot[master]: mainboard/google/meowth: Enable ECT back
by Caveh Jalali (Code Review) 08 Feb '18

08 Feb '18

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/23645 ) Change subject: mainboard/google/meowth: Enable ECT back ...................................................................... Patch Set 1: > Patch Set 1: > > Another thought is we can simply remove the override line in memory.c under both Zoombini and Meowth which override - do you mean in cannonlake_lpddr4_init()? is the default in FSP_M_CONFIG to have ECT on? -- To view, visit https://review.coreboot.org/23645 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7dd0a7dfe2993ad9cfaf00050175e5a47468b471 Gerrit-Change-Number: 23645 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 02:55:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/fizz: Set SATA gpios in bootblock
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23647 ) Change subject: mb/google/fizz: Set SATA gpios in bootblock ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67181/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21737/ : SUCCESS -- To view, visit https://review.coreboot.org/23647 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I53913d5b7adaeb43edd0ef2d24a7cad92052d68a Gerrit-Change-Number: 23647 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 02:00:26 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/fizz: Set SATA gpios in bootblock
by Shelley Chen (Code Review) 08 Feb '18

08 Feb '18

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/23647 Change subject: mb/google/fizz: Set SATA gpios in bootblock ...................................................................... mb/google/fizz: Set SATA gpios in bootblock Previously, we were seeing booting into recovery screen with error code 0x5a. This was root caused to the GPIOS not being initialized soon enough, causing the SATA 1 detection to timeout and the device to reboot into recovery with 0x5a. BUG=b:69715162 BRANCH=None TEST=after flashing BIOS, set gbb flags to 0, then type reboot from the OS. Change-Id: I53913d5b7adaeb43edd0ef2d24a7cad92052d68a Signed-off-by: Shelley Chen <shchen(a)chromium.org> --- M src/mainboard/google/fizz/gpio.h 1 file changed, 6 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/23647/1 diff --git a/src/mainboard/google/fizz/gpio.h b/src/mainboard/google/fizz/gpio.h index e6dc3a7..9a94af4 100644 --- a/src/mainboard/google/fizz/gpio.h +++ b/src/mainboard/google/fizz/gpio.h @@ -179,9 +179,9 @@ /* SATAXPCIE2 */ PAD_CFG_NF(GPP_E2, 20K_PU, DEEP, NF1), /* DB_PCIE_SATA#_DET */ /* CPU_GP0 */ PAD_CFG_NC(GPP_E3), -/* SATA_DEVSLP0 */ PAD_CFG_NC(GPP_E4), -/* SATA_DEVSLP1 */ PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1_DB */ -/* SATA_DEVSLP2 */ PAD_CFG_NC(GPP_E6), /* TP328 */ +/* SATA_DEVSLP0 */ PAD_CFG_NC(GPP_E4), /* TP103 */ +/* SATA_DEVSLP1 */ PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1_MB */ +/* SATA_DEVSLP2 */ PAD_CFG_NC(GPP_E6), /* DEVSLP2_DB */ /* CPU_GP1 */ PAD_CFG_NC(GPP_E7), /* SATALED# */ PAD_CFG_NC(GPP_E8), /* TP314 */ /* USB2_OCO# */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* USB-C */ @@ -276,6 +276,9 @@ /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */ /* UART2_CTS# */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, NONE, DEEP), /* SCREW_SPI_WP_STATUS */ +/* SATAXPCIE1 */ PAD_CFG_NF(GPP_E1, NONE, DEEP, + NF1), /* MB_PCIE_SATA#_DET */ +/* SATA_DEVSLP1 */ PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1_MB */ }; #endif -- To view, visit https://review.coreboot.org/23647 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I53913d5b7adaeb43edd0ef2d24a7cad92052d68a Gerrit-Change-Number: 23647 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com>

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Change in coreboot[master]: [DoNotMerge]intel/cannonlake_rvp: Limit to single core
by Lijian Zhao (Code Review) 08 Feb '18

08 Feb '18

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/23646 Change subject: [DoNotMerge]intel/cannonlake_rvp: Limit to single core ...................................................................... [DoNotMerge]intel/cannonlake_rvp: Limit to single core Temporary limited to single core for debugging purpose. Change-Id: If1d2843a423e51af84aafaf9c6574ba280057c8b Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/mainboard/intel/cannonlake_rvp/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/23646/1 diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig index fb6f9b1..8e2dfe3 100644 --- a/src/mainboard/intel/cannonlake_rvp/Kconfig +++ b/src/mainboard/intel/cannonlake_rvp/Kconfig @@ -38,7 +38,7 @@ config MAX_CPUS int - default 8 + default 1 config DEVICETREE string -- To view, visit https://review.coreboot.org/23646 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If1d2843a423e51af84aafaf9c6574ba280057c8b Gerrit-Change-Number: 23646 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com>

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coreboot-gerrit February 2018