coreboot-gerrit February 2018

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Change in coreboot[master]: nb/intel/gm45: Allocate a 8M TSEG region
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23418 ) Change subject: nb/intel/gm45: Allocate a 8M TSEG region ...................................................................... Patch Set 12: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67203/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21758/ : SUCCESS -- To view, visit https://review.coreboot.org/23418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9db7a71608aaec956a7b22649498b97d58f35265 Gerrit-Change-Number: 23418 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 13:22:13 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: nb/intel/gm45: Use common code for SMM in TSEG
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23419 ) Change subject: nb/intel/gm45: Use common code for SMM in TSEG ...................................................................... Patch Set 17: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67204/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21757/ : SUCCESS -- To view, visit https://review.coreboot.org/23419 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic80c65ea42fcf554ea5695772e8828d2f3b00b98 Gerrit-Change-Number: 23419 Gerrit-PatchSet: 17 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 13:20:03 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: src/cpu/amd: Don't hide pointers behind typedefs
by Elyes HAOUAS (Code Review) 08 Feb '18

08 Feb '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/23653 to look at the new patch set (#3). Change subject: src/cpu/amd: Don't hide pointers behind typedefs ...................................................................... src/cpu/amd: Don't hide pointers behind typedefs See Change 7146 Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/agesa/family12/model_12_init.c M src/cpu/amd/agesa/family14/model_14_init.c M src/cpu/amd/agesa/family15tn/model_15_init.c M src/cpu/amd/agesa/family16kb/model_16_init.c M src/cpu/amd/dualcore/amd_sibling.c M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c M src/cpu/amd/family_10h-family_15h/processor_name.c M src/cpu/amd/family_10h-family_15h/ram_calc.c M src/cpu/amd/geode_lx/geode_lx_init.c M src/cpu/amd/model_fxx/model_fxx_init.c M src/cpu/amd/pi/00630F01/model_15_init.c M src/cpu/amd/pi/00660F01/model_15_init.c M src/cpu/amd/pi/00730F01/model_16_init.c 13 files changed, 20 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/23653/3 -- To view, visit https://review.coreboot.org/23653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Gerrit-Change-Number: 23653 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: src/cpu/amd: Don't hide pointers behind typedefs
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23653 ) Change subject: src/cpu/amd: Don't hide pointers behind typedefs ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/67201/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/21756/ : SUCCESS -- To view, visit https://review.coreboot.org/23653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Gerrit-Change-Number: 23653 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 12:59:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src/cpu/amd: Don't hide pointers behind typedefs
by Elyes HAOUAS (Code Review) 08 Feb '18

08 Feb '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/23653 to look at the new patch set (#2). Change subject: src/cpu/amd: Don't hide pointers behind typedefs ...................................................................... src/cpu/amd: Don't hide pointers behind typedefs See Change 7146 Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/agesa/family12/model_12_init.c M src/cpu/amd/agesa/family14/model_14_init.c M src/cpu/amd/agesa/family15tn/model_15_init.c M src/cpu/amd/agesa/family16kb/model_16_init.c M src/cpu/amd/dualcore/amd_sibling.c M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c M src/cpu/amd/family_10h-family_15h/processor_name.c M src/cpu/amd/family_10h-family_15h/ram_calc.c M src/cpu/amd/geode_lx/geode_lx_init.c M src/cpu/amd/model_fxx/model_fxx_init.c M src/cpu/amd/pi/00630F01/model_15_init.c M src/cpu/amd/pi/00660F01/model_15_init.c M src/cpu/amd/pi/00730F01/model_16_init.c 13 files changed, 20 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/23653/2 -- To view, visit https://review.coreboot.org/23653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Gerrit-Change-Number: 23653 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: src/cpu/intel: Don't hide pointers behind typedefs
by Nico Huber (Code Review) 08 Feb '18

08 Feb '18

Nico Huber has posted comments on this change. ( https://review.coreboot.org/23652 ) Change subject: src/cpu/intel: Don't hide pointers behind typedefs ...................................................................... Patch Set 3: (3 comments) https://review.coreboot.org/#/c/23652/3//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/23652/3//COMMIT_MSG@7 PS3, Line 7: src/cpu/intel: Don't hide pointers behind typedefs Please state what this patch does, not why. e.g. cpu/intel: Use struct device or cpu/intel: Get rid off device_t And remove the src/ prefix, that is obvious. https://review.coreboot.org/#/c/23652/3//COMMIT_MSG@9 PS3, Line 9: See Change 7146 7146 has no commit message at all, so why point there??? You could state something like "Use of `device_t` has been abandoned in ramstage." https://review.coreboot.org/#/c/23652/3/src/cpu/intel/haswell/smmrelocate.c File src/cpu/intel/haswell/smmrelocate.c: https://review.coreboot.org/#/c/23652/3/src/cpu/intel/haswell/smmrelocate.c… PS3, Line 312: dev = dev_find_slot(0, PCI_DEVFN(0, 0)); Why split in two lines? -- To view, visit https://review.coreboot.org/23652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I17675b004023453f137abd387cfacd308d9b98b5 Gerrit-Change-Number: 23652 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 12:53:22 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: src/cpu/amd: Don't hide pointers behind typedefs
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23653 ) Change subject: src/cpu/amd: Don't hide pointers behind typedefs ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/67200/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/21755/ : SUCCESS -- To view, visit https://review.coreboot.org/23653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Gerrit-Change-Number: 23653 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 12:44:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src/cpu/amd: Don't hide pointers behind typedefs
by Elyes HAOUAS (Code Review) 08 Feb '18

08 Feb '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/23653 Change subject: src/cpu/amd: Don't hide pointers behind typedefs ...................................................................... src/cpu/amd: Don't hide pointers behind typedefs See Change 7146 Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/agesa/family12/model_12_init.c M src/cpu/amd/agesa/family14/model_14_init.c M src/cpu/amd/agesa/family15tn/model_15_init.c M src/cpu/amd/agesa/family16kb/model_16_init.c M src/cpu/amd/dualcore/amd_sibling.c M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c M src/cpu/amd/family_10h-family_15h/processor_name.c M src/cpu/amd/family_10h-family_15h/ram_calc.c M src/cpu/amd/geode_lx/geode_lx_init.c M src/cpu/amd/model_fxx/model_fxx_init.c M src/cpu/amd/pi/00630F01/model_15_init.c M src/cpu/amd/pi/00660F01/model_15_init.c M src/cpu/amd/pi/00730F01/model_16_init.c 13 files changed, 20 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/23653/1 diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c index 1d414a2..f96ad9e 100644 --- a/src/cpu/amd/agesa/family12/model_12_init.c +++ b/src/cpu/amd/agesa/family12/model_12_init.c @@ -31,7 +31,7 @@ #define MCI_STATUS 0x401 -static void model_12_init(device_t dev) +static void model_12_init(struct device *dev) { printk(BIOS_DEBUG, "Model 12 Init.\n"); diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index a03516d..7fce24f 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -32,7 +32,7 @@ #define MCI_STATUS 0x401 -static void model_14_init(device_t dev) +static void model_14_init(struct device *dev) { u8 i; msr_t msr; diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index e0bff4f..433a331 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -31,7 +31,7 @@ #include <arch/acpi.h> #include <northbridge/amd/agesa/agesa_helper.h> -static void model_15_init(device_t dev) +static void model_15_init(struct device *dev) { printk(BIOS_DEBUG, "Model 15 Init.\n"); diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index d49216a..5c8684b 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -30,7 +30,7 @@ #include <arch/acpi.h> #include <northbridge/amd/agesa/agesa_helper.h> -static void model_16_init(device_t dev) +static void model_16_init(struct device *dev) { printk(BIOS_DEBUG, "Model 16 Init.\n"); diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c index 693ceb8..f45da6a 100644 --- a/src/cpu/amd/dualcore/amd_sibling.c +++ b/src/cpu/amd/dualcore/amd_sibling.c @@ -32,7 +32,7 @@ static int get_max_siblings(int nodes) { - device_t dev; + strcut device *dev; int nodeid; int siblings=0; @@ -51,7 +51,7 @@ static void enable_apic_ext_id(int nodes) { - device_t dev; + struct device *dev; int nodeid; //enable APIC_EXIT_ID all the nodes @@ -67,7 +67,7 @@ unsigned get_apicid_base(unsigned ioapic_num) { - device_t dev; + struct device *dev; int nodes; unsigned apicid_base; int siblings; diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c index f73ce03..0b7ddc6 100644 --- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c +++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c @@ -59,7 +59,7 @@ static volatile uint8_t fam15h_startup_flags[MAX_NODES_SUPPORTED][MAX_CORES_SUPPORTED] = {{ 0 }}; -static void model_10xxx_init(device_t dev) +static void model_10xxx_init(struct device *dev) { u8 i; msr_t msr; diff --git a/src/cpu/amd/family_10h-family_15h/processor_name.c b/src/cpu/amd/family_10h-family_15h/processor_name.c index bda8409..857ea02 100644 --- a/src/cpu/amd/family_10h-family_15h/processor_name.c +++ b/src/cpu/amd/family_10h-family_15h/processor_name.c @@ -236,7 +236,8 @@ if (fam15h) { /* Family 15h or later */ uint32_t dword; - device_t cpu_fn5_dev = dev_find_slot(0, PCI_DEVFN(0x18, 5)); + struct device *cpu_fn5_dev + cpu_fn5_dev = dev_find_slot(0, PCI_DEVFN(0x18, 5)); pci_write_config32(cpu_fn5_dev, 0x194, 0); dword = pci_read_config32(cpu_fn5_dev, 0x198); if (dword == 0) { diff --git a/src/cpu/amd/family_10h-family_15h/ram_calc.c b/src/cpu/amd/family_10h-family_15h/ram_calc.c index 62b7da3..16caad4 100644 --- a/src/cpu/amd/family_10h-family_15h/ram_calc.c +++ b/src/cpu/amd/family_10h-family_15h/ram_calc.c @@ -62,8 +62,8 @@ uint64_t get_cc6_memory_size() { uint8_t enable_cc6; - uint64_t cc6_size = 0; + struct device *dct_dev; if (is_fam15h()) { enable_cc6 = 0; @@ -72,7 +72,7 @@ if (pci_read_config32(PCI_DEV(0, 0x18, 2), 0x118) & (0x1 << 18)) enable_cc6 = 1; #else - device_t dct_dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); + dct_dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); if (pci_read_config32(dct_dev, 0x118) & (0x1 << 18)) enable_cc6 = 1; #endif diff --git a/src/cpu/amd/geode_lx/geode_lx_init.c b/src/cpu/amd/geode_lx/geode_lx_init.c index 8c0cef3..e620131 100644 --- a/src/cpu/amd/geode_lx/geode_lx_init.c +++ b/src/cpu/amd/geode_lx/geode_lx_init.c @@ -33,7 +33,7 @@ ".byte 0x0f, 0x38\n" "pop %ax\n"); } -static void geode_lx_init(device_t dev) +static void geode_lx_init(struct device *dev) { printk(BIOS_DEBUG, "geode_lx_init\n"); diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index f5a6773..21e59de 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -65,7 +65,7 @@ return !is_cpu_pre_e0(); } // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x18 + nodeid, 2)); if (!dev) return 0; @@ -85,7 +85,7 @@ int is_cpu_f0_in_bsp(int nodeid) { uint32_t dword; - device_t dev; + strcut device *dev; if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) return 0; @@ -243,7 +243,7 @@ unsigned long basek; struct mtrr_state mtrr_state; - device_t f1_dev, f2_dev, f3_dev; + struct device *f1_dev, *f2_dev, *f3_dev; int enable_scrubbing; uint32_t dcl; @@ -463,7 +463,7 @@ wrmsr(HWCR_MSR, msr); } -static void model_fxx_init(device_t dev) +static void model_fxx_init(struct device *dev) { unsigned long i; msr_t msr; diff --git a/src/cpu/amd/pi/00630F01/model_15_init.c b/src/cpu/amd/pi/00630F01/model_15_init.c index 5299dca..6c3e594 100644 --- a/src/cpu/amd/pi/00630F01/model_15_init.c +++ b/src/cpu/amd/pi/00630F01/model_15_init.c @@ -31,7 +31,7 @@ #include <cpu/amd/amdfam15.h> #include <arch/acpi.h> -static void model_15_init(device_t dev) +static void model_15_init(struct device *dev) { printk(BIOS_DEBUG, "Model 15 Init.\n"); diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c index abe20c3..8a8a0a7 100644 --- a/src/cpu/amd/pi/00660F01/model_15_init.c +++ b/src/cpu/amd/pi/00660F01/model_15_init.c @@ -47,7 +47,7 @@ LibAmdMsrRead(0xC00110A2, &Tmp64, NULL); } -static void model_15_init(device_t dev) +static void model_15_init(struct device *dev) { printk(BIOS_DEBUG, "Model 15 Init.\n"); diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c index e0eca94..25cb5dc 100644 --- a/src/cpu/amd/pi/00730F01/model_16_init.c +++ b/src/cpu/amd/pi/00730F01/model_16_init.c @@ -30,7 +30,7 @@ #include <cpu/amd/amdfam16.h> #include <arch/acpi.h> -static void model_16_init(device_t dev) +static void model_16_init(struct device *dev) { printk(BIOS_DEBUG, "Model 16 Init.\n"); -- To view, visit https://review.coreboot.org/23653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4b930a191130941c8349861cdd803a5be4219274 Gerrit-Change-Number: 23653 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: src/cpu/intel: Don't hide pointers behind typedefs
by build bot (Jenkins) (Code Review) 08 Feb '18

08 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23652 ) Change subject: src/cpu/intel: Don't hide pointers behind typedefs ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67199/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21754/ : SUCCESS -- To view, visit https://review.coreboot.org/23652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I17675b004023453f137abd387cfacd308d9b98b5 Gerrit-Change-Number: 23652 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Feb 2018 12:30:02 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src/cpu/intel: Don't hide pointers behind typedefs
by Elyes HAOUAS (Code Review) 08 Feb '18

08 Feb '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/23652 to look at the new patch set (#3). Change subject: src/cpu/intel: Don't hide pointers behind typedefs ...................................................................... src/cpu/intel: Don't hide pointers behind typedefs See Change 7146 Change-Id: I17675b004023453f137abd387cfacd308d9b98b5 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/fsp_model_206ax/acpi.c M src/cpu/intel/fsp_model_406dx/acpi.c M src/cpu/intel/haswell/acpi.c M src/cpu/intel/haswell/smmrelocate.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c M src/cpu/intel/speedstep/acpi.c 7 files changed, 8 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/23652/3 -- To view, visit https://review.coreboot.org/23652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I17675b004023453f137abd387cfacd308d9b98b5 Gerrit-Change-Number: 23652 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit February 2018