coreboot-gerrit February 2018

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Change in coreboot[master]: chromeec: Fix ACPI compile warning
by Furquan Shaikh (Code Review) 09 Feb '18

09 Feb '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/23661 ) Change subject: chromeec: Fix ACPI compile warning ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/23661 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iae12c5d1aa749948ef4025c8b5e60c97e1b747a5 Gerrit-Change-Number: 23661 Gerrit-PatchSet: 2 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:58:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: chromeec: Fix ACPI compile warning
by Lijian Zhao (Code Review) 09 Feb '18

09 Feb '18

Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/23661 ) Change subject: chromeec: Fix ACPI compile warning ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/23661/1/src/ec/google/chromeec/acpi/battery… File src/ec/google/chromeec/acpi/battery.asl: https://review.coreboot.org/#/c/23661/1/src/ec/google/chromeec/acpi/battery… PS1, Line 52: } > On dual-battery systems, that will always return an error when asking for the second battery. […] Done -- To view, visit https://review.coreboot.org/23661 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iae12c5d1aa749948ef4025c8b5e60c97e1b747a5 Gerrit-Change-Number: 23661 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:54:18 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: chromeec: Fix ACPI compile warning
by Lijian Zhao (Code Review) 09 Feb '18

09 Feb '18

Hello Nicolas Boichat, Duncan Laurie, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/23661 to look at the new patch set (#2). Change subject: chromeec: Fix ACPI compile warning ...................................................................... chromeec: Fix ACPI compile warning For system without secondary battery, current DSDT will report warning during build time. Add a conditional check to make sure only battery index 0 can return success. TEST=Build pass. Change-Id: Iae12c5d1aa749948ef4025c8b5e60c97e1b747a5 Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/ec/google/chromeec/acpi/battery.asl 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/23661/2 -- To view, visit https://review.coreboot.org/23661 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iae12c5d1aa749948ef4025c8b5e60c97e1b747a5 Gerrit-Change-Number: 23661 Gerrit-PatchSet: 2 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/cannonlake: Update GPIO ASL
by build bot (Jenkins) (Code Review) 09 Feb '18

09 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23664 ) Change subject: soc/intel/cannonlake: Update GPIO ASL ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67257/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21807/ : SUCCESS -- To view, visit https://review.coreboot.org/23664 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I958e0cb71b4e656bec9bfe2d12076b577b57629b Gerrit-Change-Number: 23664 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:22:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src/soc/intel/cannonlake: Add gpio groups
by build bot (Jenkins) (Code Review) 09 Feb '18

09 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22572 ) Change subject: src/soc/intel/cannonlake: Add gpio groups ...................................................................... Patch Set 21: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67256/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21806/ : SUCCESS -- To view, visit https://review.coreboot.org/22572 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I00be5e9bf25f1723a3d9e177588135d63ab89662 Gerrit-Change-Number: 22572 Gerrit-PatchSet: 21 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:18:55 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/cannonlake: Add missing GPIO pin definitions
by build bot (Jenkins) (Code Review) 09 Feb '18

09 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22482 ) Change subject: soc/intel/cannonlake: Add missing GPIO pin definitions ...................................................................... Patch Set 24: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67255/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21805/ : SUCCESS -- To view, visit https://review.coreboot.org/22482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I73b7803c73446660f5c25b1263e47bb50a955c56 Gerrit-Change-Number: 22482 Gerrit-PatchSet: 24 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:15:26 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/common/block/gpio: Change group offset calculation
by build bot (Jenkins) (Code Review) 09 Feb '18

09 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22571 ) Change subject: soc/intel/common/block/gpio: Change group offset calculation ...................................................................... Patch Set 16: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67254/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21804/ : SUCCESS -- To view, visit https://review.coreboot.org/22571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I02ab1d878bc83d32222be074bd2db5e23adaf580 Gerrit-Change-Number: 22571 Gerrit-PatchSet: 16 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:14:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/cannonlake: Update GPIO ASL
by Lijian Zhao (Code Review) 09 Feb '18

09 Feb '18

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/23664 Change subject: soc/intel/cannonlake: Update GPIO ASL ...................................................................... soc/intel/cannonlake: Update GPIO ASL GPIO pin definition had been updated to match Cannonlake PCH-LP EDS, hence the ACPI dsdt table will include those changes as well. BUG=None TEST=Build coreboot image, flah coreboot image into DUT, and target system can boot up into OS. Change-Id: I958e0cb71b4e656bec9bfe2d12076b577b57629b Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/soc/intel/cannonlake/acpi/gpio.asl 1 file changed, 32 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/23664/1 diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl index c2bf8d9..8a990b3 100644 --- a/src/soc/intel/cannonlake/acpi/gpio.asl +++ b/src/soc/intel/cannonlake/acpi/gpio.asl @@ -28,6 +28,8 @@ { Memory32Fixed (ReadWrite, 0, 0, COM0) Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM2) + Memory32Fixed (ReadWrite, 0, 0, COM3) Memory32Fixed (ReadWrite, 0, 0, COM4) Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) { GPIO_IRQ14 } @@ -47,11 +49,24 @@ Store (^^PCRB (PID_GPIOCOM1), BAS1) Store (GPIO_BASE_SIZE, LEN1) + /* GPIO Community 2 */ + CreateDWordField (^RBUF, ^COM2._BAS, BAS2) + CreateDWordField (^RBUF, ^COM2._LEN, LEN2) + Store (^^PCRB (PID_GPIOCOM2), BAS2) + Store (GPIO_BASE_SIZE, LEN2) + + /* GPIO Community 3 */ + CreateDWordField (^RBUF, ^COM3._BAS, BAS3) + CreateDWordField (^RBUF, ^COM3._LEN, LEN3) + Store (^^PCRB (PID_GPIOCOM3), BAS3) + Store (GPIO_BASE_SIZE, LEN3) + + /* GPIO Community 4 */ CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN3) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) Store (^^PCRB (PID_GPIOCOM4), BAS4) - Store (GPIO_BASE_SIZE, LEN3) + Store (GPIO_BASE_SIZE, LEN4) Return (RBUF) } @@ -69,19 +84,31 @@ Method (GADD, 1, NotSerialized) { /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_G7))) + If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPIO_RSVD_11))) { Store (PID_GPIOCOM0, Local0) Subtract (Arg0, GPP_A0, Local1) } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_D0), LLessEqual (Arg0, GPP_H23))) + If (LAnd (LGreaterEqual (Arg0, GPP_D0), LLessEqual (Arg0, GPIO_RSVD_52))) { Store (PID_GPIOCOM1, Local0) Subtract (Arg0, GPP_D0, Local1) } + /* GPIO Community 2 */ + If (LAnd (LGreaterEqual (Arg0, GPD0), LLessEqual (Arg0, GPD11))) + { + Store (PID_GPIOCOM1, Local0) + Subtract (Arg0, GPD0, Local1) + } + /* GPIO Community 3 */ + If (LAnd (LGreaterEqual (Arg0, HDA_BCLK), LLessEqual (Arg0, GPIO_RSVD_78))) + { + Store (PID_GPIOCOM1, Local0) + Subtract (Arg0, HDA_BCLK, Local1) + } /* GPIO Community 04*/ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_E23))) + If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPIO_RSVD_67))) { Store (PID_GPIOCOM4, Local0) Subtract (Arg0, GPP_C0, Local1) -- To view, visit https://review.coreboot.org/23664 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I958e0cb71b4e656bec9bfe2d12076b577b57629b Gerrit-Change-Number: 23664 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com>

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Change in coreboot[master]: chromeec: Fix ACPI compile warning
by Furquan Shaikh (Code Review) 09 Feb '18

09 Feb '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/23661 ) Change subject: chromeec: Fix ACPI compile warning ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/23661/1/src/ec/google/chromeec/acpi/battery… File src/ec/google/chromeec/acpi/battery.asl: https://review.coreboot.org/#/c/23661/1/src/ec/google/chromeec/acpi/battery… PS1, Line 52: } > #ifdef ... […] Or basically what Nicolas said. I did not read his comment before :). -- To view, visit https://review.coreboot.org/23661 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iae12c5d1aa749948ef4025c8b5e60c97e1b747a5 Gerrit-Change-Number: 23661 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:03:11 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: chromeec: Fix ACPI compile warning
by Nicolas Boichat (Code Review) 09 Feb '18

09 Feb '18

Nicolas Boichat has posted comments on this change. ( https://review.coreboot.org/23661 ) Change subject: chromeec: Fix ACPI compile warning ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/23661/1/src/ec/google/chromeec/acpi/battery… File src/ec/google/chromeec/acpi/battery.asl: https://review.coreboot.org/#/c/23661/1/src/ec/google/chromeec/acpi/battery… PS1, Line 52: } > #ifdef ... […] Right, or just use my snippet above and keep the Return (Zero) outside of both #if branches ,-)) -- To view, visit https://review.coreboot.org/23661 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iae12c5d1aa749948ef4025c8b5e60c97e1b747a5 Gerrit-Change-Number: 23661 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 09 Feb 2018 01:02:49 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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coreboot-gerrit February 2018