coreboot-gerrit December 2018

coreboot-gerrit@coreboot.org

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1832 discussions

Change in ...coreboot[master]: ec/google/wilco: Enable COM1 ACPI device
by Patrick Georgi (Code Review) 04 Dec '18

04 Dec '18

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/29672 ) Change subject: ec/google/wilco: Enable COM1 ACPI device ...................................................................... ec/google/wilco: Enable COM1 ACPI device Enable the COM1 ACPI device based on the existing Kconfig option CONFIG_DRIVERS_UART_8250IO instead of expecting the mainboard to also define another value for ACPI. Change-Id: I69361cc2c245cfcad3e4f57567bf56d5a26f0b06 Signed-off-by: Duncan Laurie <dlaurie(a)google.com> Reviewed-on: https://review.coreboot.org/c/29672 Reviewed-by: Furquan Shaikh <furquan(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/ec/google/wilco/acpi/superio.asl 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/ec/google/wilco/acpi/superio.asl b/src/ec/google/wilco/acpi/superio.asl index a8cea78..9c23c49 100644 --- a/src/ec/google/wilco/acpi/superio.asl +++ b/src/ec/google/wilco/acpi/superio.asl @@ -29,7 +29,7 @@ Method (_STA, 0, NotSerialized) { -#ifdef SIO_EC_ENABLE_COM1 +#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) Return (0x0f) #else Return (Zero) -- To view, visit https://review.coreboot.org/c/coreboot/+/29672 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69361cc2c245cfcad3e4f57567bf56d5a26f0b06 Gerrit-Change-Number: 29672 Gerrit-PatchSet: 4 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: drivers/intel/fsp1_1/romstage.c: Fix typo
by Patrick Georgi (Code Review) 04 Dec '18

04 Dec '18

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30016 ) Change subject: drivers/intel/fsp1_1/romstage.c: Fix typo ...................................................................... drivers/intel/fsp1_1/romstage.c: Fix typo Correct typo of 'Initialize' BUG=N/A TEST=N/A Change-Id: I94cfd9c41bb5f9751ef4a18beaeba05108220bc8 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Reviewed-on: https://review.coreboot.org/c/30016 Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/intel/fsp1_1/romstage.c 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index e1910e6..c1bcd84 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -3,6 +3,7 @@ * * Copyright (C) 2014 Google Inc. * Copyright (C) 2015-2016 Intel Corporation. + * Copyright (C) 2018 Eltan B.V. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -188,7 +189,7 @@ { post_code(0x31); - /* Initliaze memory */ + /* Initialize memory */ romstage_common(params); } -- To view, visit https://review.coreboot.org/c/coreboot/+/30016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94cfd9c41bb5f9751ef4a18beaeba05108220bc8 Gerrit-Change-Number: 30016 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
by Bill XIE (Code Review) 04 Dec '18

04 Dec '18

Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30021 ) Change subject: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant ...................................................................... Patch Set 9: (2 comments) https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/hda_verb… File src/mainboard/lenovo/t430s/hda_verb.c: https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/hda_verb… PS8, Line 16: > "unable to make 'build/ramstage/mainboard/lenovo/t430s/hda_verb. […] Removing it will cause "unable to make 'build/ramstage/mainboard/lenovo/t430s/hda_verb.o'" will be complained when invoking make. https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… File src/mainboard/lenovo/t430s/variants/t431s/smihandler.c: https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… PS8, Line 25: > the whole file should be removed. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/30021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Gerrit-Change-Number: 30021 Gerrit-PatchSet: 9 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 04 Dec 2018 09:37:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Bill XIE <persmule(a)gmail.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
by Bill XIE (Code Review) 04 Dec '18

04 Dec '18

Hello Alexander Couzens, Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30021 to look at the new patch set (#9). Change subject: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant ...................................................................... mainboard/lenovo/t430s: Add ThinkPad T431s as a variant The code is based on autoport and that for T430s Tested: - CPU i5-3337U - Slotted DIMM 2GiB - Soldered RAM 4GiB from samsung (There may be more models here) - Camera - pci-e and usb2 on M.2 slot with A key for wlan - sata and usb2 (no superspeed components) on M.2 slot with B key for wwan - On board SDHCI connected to pci-e - USB3 ports - libgfxinit-based graphic init - NVRAM options for North and South bridges - Sound - Thinkpad EC - S3 - TPM1 on LPC - EHCI debug on SSP2 (USB3 port on the left) - Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from Linux payload (Heads), Seabios may also work. Not tested: - Fingerprint reader on USB2 (not present on mine) - Keyboard backlight (not present on mine) - "sticky_fn" flag in nvram Not implemented yet: - Fn locking in nvram (may not be identical to "sticky_fn") - C-based native graphic init (since T431s has eDP instead of LVDS) - Detecting the model of Soldered RAM at runtime, and loading the corresponding SPD datum (3 observed) from CBFS (the mechanism may be similar to that on x1_carbon_gen1 and s230u, but I do not know how to find gpio ports for that, and SPD data stored in vendor firmware.) Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Signed-off-by: Bill XIE <persmule(a)gmail.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/t431s.md A Documentation/mainboard/lenovo/t431s_bc_removed.jpg A Documentation/mainboard/lenovo/t431s_flash_chip.jpg A Documentation/mainboard/lenovo/t431s_programming.jpg M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t430s/Kconfig.name M src/mainboard/lenovo/t430s/Makefile.inc M src/mainboard/lenovo/t430s/board_info.txt M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t430s/hda_verb.c M src/mainboard/lenovo/t430s/romstage.c M src/mainboard/lenovo/t430s/smihandler.c A src/mainboard/lenovo/t430s/variants/t430s/board_info.txt R src/mainboard/lenovo/t430s/variants/t430s/gpio.c A src/mainboard/lenovo/t430s/variants/t430s/hda_verb.c A src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb A src/mainboard/lenovo/t430s/variants/t430s/romstage.c A src/mainboard/lenovo/t430s/variants/t431s/board_info.txt A src/mainboard/lenovo/t430s/variants/t431s/gpio.c A src/mainboard/lenovo/t430s/variants/t431s/hda_verb.c A src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb A src/mainboard/lenovo/t430s/variants/t431s/romstage.c A src/mainboard/lenovo/t430s/variants/t431s/spd/Makefile.inc A src/mainboard/lenovo/t430s/variants/t431s/spd/samsung_4gb.spd.hex 25 files changed, 821 insertions(+), 219 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/30021/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/30021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Gerrit-Change-Number: 30021 Gerrit-PatchSet: 9 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
by Bill XIE (Code Review) 04 Dec '18

04 Dec '18

Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30021 ) Change subject: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant ...................................................................... Patch Set 8: (2 comments) > Patch Set 8: > > (4 comments) > > Do you want to add a data.vbt file ? How? Can it be dumped someway? Currently using that for T430s seems working. https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/hda_verb… File src/mainboard/lenovo/t430s/hda_verb.c: https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/hda_verb… PS8, Line 16: > no need to keep the empty file "unable to make 'build/ramstage/mainboard/lenovo/t430s/hda_verb.o'" will be complained when invoking make. https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… File src/mainboard/lenovo/t430s/variants/t431s/romstage.c: https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… PS8, Line 37: pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, 0x0c06a1); > seems to be same as on t430, why duplicate it ? They are different in the last line of this function. -- To view, visit https://review.coreboot.org/c/coreboot/+/30021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Gerrit-Change-Number: 30021 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 04 Dec 2018 09:14:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: riscv: optimize smp_pause
by Xiang Wang (Code Review) 04 Dec '18

04 Dec '18

Xiang Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30032 Change subject: riscv: optimize smp_pause ...................................................................... riscv: optimize smp_pause Optimize smp_pause to prevent modification of the exception control register. Change-Id: Ib5ab683bc4c96fd8a32768d49ad4ebf8cab1d1a6 Signed-off-by: Xiang Wang <wxjstz(a)126.com> --- M src/arch/riscv/smp.c 1 file changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/30032/1 diff --git a/src/arch/riscv/smp.c b/src/arch/riscv/smp.c index 8d07d39..746c4cb 100644 --- a/src/arch/riscv/smp.c +++ b/src/arch/riscv/smp.c @@ -34,8 +34,8 @@ barrier(); } while (SYNCA != 0x01234567); - clear_csr(mstatus, MSTATUS_MIE); - write_csr(mie, MIP_MSIP); + uintptr_t bkp_mstatus = clear_csr(mstatus, MSTATUS_MIE); + uintptr_t bkp_mie = swap_csr(mie, MIP_MSIP); /* count how many cores enter the halt */ __sync_fetch_and_add(&SYNCB, 1); @@ -45,6 +45,10 @@ __asm__ volatile ("wfi"); } while ((read_csr(mip) & MIP_MSIP) == 0); set_msip(hartid, 0); + + write_csr(mstatus, bkp_mstatus); + write_csr(mie, bkp_mie); + HLS()->entry.fn(HLS()->entry.arg); } else { /* Initialize the counter and -- To view, visit https://review.coreboot.org/c/coreboot/+/30032 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib5ab683bc4c96fd8a32768d49ad4ebf8cab1d1a6 Gerrit-Change-Number: 30032 Gerrit-PatchSet: 1 Gerrit-Owner: Xiang Wang <wxjstz(a)126.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
by Patrick Rudolph (Code Review) 04 Dec '18

04 Dec '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30021 ) Change subject: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant ...................................................................... Patch Set 8: (4 comments) Do you want to add a data.vbt file ? https://review.coreboot.org/#/c/30021/8//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/30021/8//COMMIT_MSG@38 PS8, Line 38: - Detecting the model of Soldered RAM at runtime, and loading the That should be mentioned in the Documentation ! https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/hda_verb… File src/mainboard/lenovo/t430s/hda_verb.c: https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/hda_verb… PS8, Line 16: no need to keep the empty file https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… File src/mainboard/lenovo/t430s/variants/t431s/romstage.c: https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… PS8, Line 37: pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, 0x0c06a1); seems to be same as on t430, why duplicate it ? https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… File src/mainboard/lenovo/t430s/variants/t431s/smihandler.c: https://review.coreboot.org/#/c/30021/8/src/mainboard/lenovo/t430s/variants… PS8, Line 25: /* Enable 0x1600/0x1600 register pair */ the whole file should be removed. The bit can be set by ec/lenovo/h8/h8.c using devicetree values. -- To view, visit https://review.coreboot.org/c/coreboot/+/30021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Gerrit-Change-Number: 30021 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 04 Dec 2018 08:56:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
by Bill XIE (Code Review) 04 Dec '18

04 Dec '18

Hello Alexander Couzens, Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30021 to look at the new patch set (#8). Change subject: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant ...................................................................... mainboard/lenovo/t430s: Add ThinkPad T431s as a variant The code is based on autoport and that for T430s Tested: - CPU i5-3337U - Slotted DIMM 2GiB - Soldered RAM 4GiB from samsung (There may be more models here) - Camera - pci-e and usb2 on M.2 slot with A key for wlan - sata and usb2 (no superspeed components) on M.2 slot with B key for wwan - On board SDHCI connected to pci-e - USB3 ports - libgfxinit-based graphic init - NVRAM options for North and South bridges - Sound - Thinkpad EC - S3 - TPM1 on LPC - EHCI debug on SSP2 (USB3 port on the left) - Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from Linux payload (Heads), Seabios may also work. Not tested: - Fingerprint reader on USB2 (not present on mine) - Keyboard backlight (not present on mine) - "sticky_fn" flag in nvram Not implemented yet: - Fn locking in nvram (may not be identical to "sticky_fn") - C-based native graphic init (since T431s has eDP instead of LVDS) - Detecting the model of Soldered RAM at runtime, and loading the corresponding SPD datum (3 observed) from CBFS (the mechanism may be similar to that on x1_carbon_gen1 and s230u, but I do not know how to find gpio ports for that, and SPD data stored in vendor firmware.) Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Signed-off-by: Bill XIE <persmule(a)gmail.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/t431s.md A Documentation/mainboard/lenovo/t431s_bc_removed.jpg A Documentation/mainboard/lenovo/t431s_flash_chip.jpg A Documentation/mainboard/lenovo/t431s_programming.jpg M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t430s/Kconfig.name M src/mainboard/lenovo/t430s/Makefile.inc M src/mainboard/lenovo/t430s/board_info.txt M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t430s/hda_verb.c M src/mainboard/lenovo/t430s/romstage.c M src/mainboard/lenovo/t430s/smihandler.c A src/mainboard/lenovo/t430s/variants/t430s/board_info.txt R src/mainboard/lenovo/t430s/variants/t430s/gpio.c A src/mainboard/lenovo/t430s/variants/t430s/hda_verb.c A src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb A src/mainboard/lenovo/t430s/variants/t430s/romstage.c A src/mainboard/lenovo/t430s/variants/t430s/smihandler.c A src/mainboard/lenovo/t430s/variants/t431s/board_info.txt A src/mainboard/lenovo/t430s/variants/t431s/gpio.c A src/mainboard/lenovo/t430s/variants/t431s/hda_verb.c A src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb A src/mainboard/lenovo/t430s/variants/t431s/romstage.c A src/mainboard/lenovo/t430s/variants/t431s/smihandler.c A src/mainboard/lenovo/t430s/variants/t431s/spd/Makefile.inc A src/mainboard/lenovo/t430s/variants/t431s/spd/samsung_4gb.spd.hex 27 files changed, 868 insertions(+), 219 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/30021/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/30021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Gerrit-Change-Number: 30021 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
by build bot (Jenkins) (Code Review) 04 Dec '18

04 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30021 ) Change subject: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant ...................................................................... Patch Set 7: (6 comments) https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… File src/mainboard/lenovo/t430s/variants/t430s/hda_verb.c: https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… PS7, Line 92: combo Jack code indent should use tabs where possible https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… PS7, Line 93: Master Port - Port B used for Jack Presence Detect code indent should use tabs where possible https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… PS7, Line 94: Enable Combo Jack Detection */ code indent should use tabs where possible https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… PS7, Line 124: 0x02177a00, /* Digital PCBEEP Gain: 0h=-9db, 1h=-6db ... 4h=+3db, 5h=+6db */ line over 80 characters https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… File src/mainboard/lenovo/t430s/variants/t430s/romstage.c: https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… PS7, Line 57: void mainboard_get_spd(spd_raw_data *spd, bool id_only) { open brace '{' following function definitions go on the next line https://review.coreboot.org/#/c/30021/7/src/mainboard/lenovo/t430s/variants… PS7, Line 62: void mainboard_early_init(int s3resume) { open brace '{' following function definitions go on the next line -- To view, visit https://review.coreboot.org/c/coreboot/+/30021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Gerrit-Change-Number: 30021 Gerrit-PatchSet: 7 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 04 Dec 2018 07:46:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
by Bill XIE (Code Review) 04 Dec '18

04 Dec '18

Hello Alexander Couzens, Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30021 to look at the new patch set (#7). Change subject: mainboard/lenovo/t430s: Add ThinkPad T431s as a variant ...................................................................... mainboard/lenovo/t430s: Add ThinkPad T431s as a variant The code is based on autoport and that for T430s Tested: - CPU i5-3337U - Slotted DIMM 2GiB - Soldered RAM 4GiB from samsung (There may be more models here) - Camera - pci-e and usb2 on M.2 slot with A key for wlan - sata and usb2 (no superspeed components) on M.2 slot with B key for wwan - On board SDHCI connected to pci-e - USB3 ports - libgfxinit-based graphic init - NVRAM options for North and South bridges - Sound - Thinkpad EC - S3 - TPM1 on LPC - EHCI debug on SSP2 (USB3 port on the left) - Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from Linux payload (Heads), Seabios may also work. Not tested: - Fingerprint reader on USB2 (not present on mine) - Keyboard backlight (not present on mine) - "sticky_fn" flag in nvram Not implemented yet: - Fn locking in nvram (may not be identical to "sticky_fn") - C-based native graphic init (since T431s has eDP instead of LVDS) - Detecting the model of Soldered RAM at runtime, and loading the corresponding SPD datum (3 observed) from CBFS (the mechanism may be similar to that on x1_carbon_gen1 and s230u, but I do not know how to find gpio ports for that, and SPD data stored in vendor firmware.) Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Signed-off-by: Bill XIE <persmule(a)gmail.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/t431s.md A Documentation/mainboard/lenovo/t431s_bc_removed.jpg A Documentation/mainboard/lenovo/t431s_flash_chip.jpg A Documentation/mainboard/lenovo/t431s_programming.jpg M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t430s/Kconfig.name M src/mainboard/lenovo/t430s/Makefile.inc M src/mainboard/lenovo/t430s/board_info.txt M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t430s/hda_verb.c M src/mainboard/lenovo/t430s/romstage.c M src/mainboard/lenovo/t430s/smihandler.c A src/mainboard/lenovo/t430s/variants/t430s/board_info.txt R src/mainboard/lenovo/t430s/variants/t430s/gpio.c A src/mainboard/lenovo/t430s/variants/t430s/hda_verb.c A src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb A src/mainboard/lenovo/t430s/variants/t430s/romstage.c A src/mainboard/lenovo/t430s/variants/t430s/smihandler.c A src/mainboard/lenovo/t430s/variants/t431s/board_info.txt A src/mainboard/lenovo/t430s/variants/t431s/gpio.c A src/mainboard/lenovo/t430s/variants/t431s/hda_verb.c A src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb A src/mainboard/lenovo/t430s/variants/t431s/romstage.c A src/mainboard/lenovo/t430s/variants/t431s/smihandler.c A src/mainboard/lenovo/t430s/variants/t431s/spd/Makefile.inc A src/mainboard/lenovo/t430s/variants/t431s/spd/samsung_4gb.spd.hex 27 files changed, 865 insertions(+), 219 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/30021/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/30021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Gerrit-Change-Number: 30021 Gerrit-PatchSet: 7 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2018