coreboot-gerrit November 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: Linuxboot: gitignore build directory
by Marcello Sylvester Bauer (Code Review) 03 Nov '18

03 Nov '18

Marcello Sylvester Bauer has uploaded this change for review. ( https://review.coreboot.org/29444 Change subject: Linuxboot: gitignore build directory ...................................................................... Linuxboot: gitignore build directory Add the Linuxboot build directory to a .gitignore file. Change-Id: Ic11311e2de544a334043a55eda42643d9df3374d Signed-off-by: Marcello Sylvester Bauer <info(a)marcellobauer.com> --- A payloads/external/LinuxBoot/.gitignore 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/29444/1 diff --git a/payloads/external/LinuxBoot/.gitignore b/payloads/external/LinuxBoot/.gitignore new file mode 100644 index 0000000..2e159a8 --- /dev/null +++ b/payloads/external/LinuxBoot/.gitignore @@ -0,0 +1 @@ +linuxboot/* -- To view, visit https://review.coreboot.org/29444 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic11311e2de544a334043a55eda42643d9df3374d Gerrit-Change-Number: 29444 Gerrit-PatchSet: 1 Gerrit-Owner: Marcello Sylvester Bauer <info(a)marcellobauer.com>

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Change in coreboot[master]: Linuxboot: add current kernel releases
by Marcello Sylvester Bauer (Code Review) 03 Nov '18

03 Nov '18

Hello Patrick Rudolph, Philipp Deppenwiese, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29443 to look at the new patch set (#2). Change subject: Linuxboot: add current kernel releases ...................................................................... Linuxboot: add current kernel releases Add current kernel releases instead of hardcode the version number. Also add the option to select a custom version of the kernel. Change-Id: Ieb071696cfbb466521faaef045fc488a06f6db0c Signed-off-by: Marcello Sylvester Bauer <info(a)marcellobauer.com> --- M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/Makefile M payloads/external/Makefile.inc 3 files changed, 45 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/29443/2 -- To view, visit https://review.coreboot.org/29443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ieb071696cfbb466521faaef045fc488a06f6db0c Gerrit-Change-Number: 29443 Gerrit-PatchSet: 2 Gerrit-Owner: Marcello Sylvester Bauer <info(a)marcellobauer.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>

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Change in coreboot[master]: Linuxboot: add kernel release and custom version
by Marcello Sylvester Bauer (Code Review) 03 Nov '18

03 Nov '18

Marcello Sylvester Bauer has uploaded this change for review. ( https://review.coreboot.org/29443 Change subject: Linuxboot: add kernel release and custom version ...................................................................... Linuxboot: add kernel release and custom version Add current kernel releases instead of hardcode the version number. Also add the option to select a custom version of the kernel. Change-Id: Ieb071696cfbb466521faaef045fc488a06f6db0c Signed-off-by: Marcello Sylvester Bauer <info(a)marcellobauer.com> --- M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/Makefile M payloads/external/Makefile.inc 3 files changed, 45 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/29443/1 diff --git a/payloads/external/LinuxBoot/Kconfig b/payloads/external/LinuxBoot/Kconfig index 8acb542..82b2748 100644 --- a/payloads/external/LinuxBoot/Kconfig +++ b/payloads/external/LinuxBoot/Kconfig @@ -46,25 +46,49 @@ default "arm64" if LINUXBOOT_ARM64 choice - prompt "Kernel version" + prompt "Kernel release" default LINUXBOOT_KERNEL_STABLE + help + choose the kernel release. + + select 'custom' if your want to define the kernel version. + for more information about the current 'mainline', 'stable' or 'longterm' + version, visit: https://www.kernel.org/ + +config LINUXBOOT_KERNEL_MAINLINE + bool "mainline" + help + mainline kernel version config LINUXBOOT_KERNEL_STABLE - bool "4.14.67" + bool "stable" help - Stable kernel version + stable kernel version -config LINUXBOOT_KERNEL_LATEST - bool "4.18.5" +config LINUXBOOT_KERNEL_LONGTERM + bool "longterm" help - Latest kernel version + longterm kernel version + +config LINUXBOOT_KERNEL_CUSTOM + bool "custom" + help + Custom kernel version endchoice +config LINUXBOOT_KERNEL_CUSTOM_VERSION + string "kernel version" + default "" + help + kernel version (4.x.x) + config LINUXBOOT_KERNEL_VERSION string - default "4.18.5" if LINUXBOOT_KERNEL_LATEST - default "4.14.67" if LINUXBOOT_KERNEL_STABLE + default "mainline" if LINUXBOOT_KERNEL_MAINLINE + default "stable" if LINUXBOOT_KERNEL_STABLE + default "longterm" if LINUXBOOT_KERNEL_LONGTERM + default "custom" if LINUXBOOT_KERNEL_CUSTOM config LINUXBOOT_KERNEL_CONFIGFILE string "Kernel config file" diff --git a/payloads/external/LinuxBoot/Makefile b/payloads/external/LinuxBoot/Makefile index 8376805..2390ba8 100644 --- a/payloads/external/LinuxBoot/Makefile +++ b/payloads/external/LinuxBoot/Makefile @@ -12,7 +12,16 @@ ## GNU General Public License for more details. ## -kernel_tarball=https://cdn.kernel.org/pub/linux/kernel/v4.x/linux-$(CONFIG_LINUXBOOT_KERNEL_VERSION).tar.xz +ifeq ($(CONFIG_LINUXBOOT_KERNEL_CUSTOM),y) + kernel_version:=$(CONFIG_LINUXBOOT_KERNEL_CUSTOM_VERSION) +else + kernel_version:=$(shell curl -s -k https://www.kernel.org/feeds/kdist.xml | \ + sed -n -e 's@.*<guid isPermaLink="false">$.*$</guid>.*@\1@p' | \ + head -n 3 | \ + awk -F ',' '/$(CONFIG_LINUXBOOT_KERNEL_VERSION)/{ print $$3 }') +endif + +kernel_tarball=https://cdn.kernel.org/pub/linux/kernel/v4.x/linux-$(kernel_version).tar.xz project_dir=linuxboot kernel_dir=$(project_dir)/kernel @@ -42,7 +51,7 @@ fi $(kernel_dir)/.config: - echo " WWW Download Linux $(CONFIG_LINUXBOOT_KERNEL_VERSION)" + echo " WWW Download Linux $(kernel_version) [$(CONFIG_LINUXBOOT_KERNEL_VERSION)]" mkdir -p $(kernel_dir) ifeq ("$(wildcard $(kernel_dir)/README)","") curl -s $(kernel_tarball) | tar xJ -C $(kernel_dir) --strip 1 diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index c730bba..cb806b7 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -268,6 +268,8 @@ $(MAKE) -C payloads/external/LinuxBoot \ CPUS=$(CPUS) \ CONFIG_LINUXBOOT_KERNEL_VERSION=$(CONFIG_LINUXBOOT_KERNEL_VERSION) \ + CONFIG_LINUXBOOT_KERNEL_CUSTOM=$(CONFIG_LINUXBOOT_KERNEL_CUSTOM) \ + CONFIG_LINUXBOOT_KERNEL_CUSTOM_VERSION=$(CONFIG_LINUXBOOT_KERNEL_CUSTOM_VERSION) \ CONFIG_LINUXBOOT_KERNEL_CONFIGFILE=$(CONFIG_LINUXBOOT_KERNEL_CONFIGFILE) \ CONFIG_LINUXBOOT_KERNEL_COMMANDLINE=$(CONFIG_LINUXBOOT_KERNEL_COMMANDLINE) \ CONFIG_LINUXBOOT_UROOT_VERSION=$(CONFIG_LINUXBOOT_UROOT_VERSION) \ -- To view, visit https://review.coreboot.org/29443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ieb071696cfbb466521faaef045fc488a06f6db0c Gerrit-Change-Number: 29443 Gerrit-PatchSet: 1 Gerrit-Owner: Marcello Sylvester Bauer <info(a)marcellobauer.com>

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Change in coreboot[master]: payloads/libpayload/drivers/storage: Get rid of void pointer math
by Richard Spiegel (Code Review) 02 Nov '18

02 Nov '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/29442 Change subject: payloads/libpayload/drivers/storage: Get rid of void pointer math ...................................................................... payloads/libpayload/drivers/storage: Get rid of void pointer math Pointer math with void pointers is illegal in many compilers, though it works with GCC because it assumes size of void to be 1. In this particular situation, dev->buf is already pointer to u8, and there's no need to convert to void *. BUG=b:118484178 TEST=Build libpayload. Change-Id: Ib70b8ce11abc88c35be4092f097cfff385921f46 Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M payloads/libpayload/drivers/storage/ahci_common.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/29442/1 diff --git a/payloads/libpayload/drivers/storage/ahci_common.c b/payloads/libpayload/drivers/storage/ahci_common.c index bcb0ce7..ef9d43d 100644 --- a/payloads/libpayload/drivers/storage/ahci_common.c +++ b/payloads/libpayload/drivers/storage/ahci_common.c @@ -72,7 +72,7 @@ if ((u32)user_buf & 1) { printf("ahci: Odd buffer pointer (%p).\n", user_buf); if (dev->buf) /* orphaned buffer */ - free((void *)dev->buf - *(dev->buf - 1)); + free(dev->buf - *(dev->buf - 1)); dev->buf = malloc(len + 2); if (!dev->buf) return NULL; @@ -100,7 +100,7 @@ if (dev->buf) { if (dev->write_back) memcpy(dev->user_buf, dev->buf, dev->buflen); - free((void *)dev->buf - *(dev->buf - 1)); + free(dev->buf - *(dev->buf - 1)); } dev->buf = NULL; dev->user_buf = NULL; -- To view, visit https://review.coreboot.org/29442 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib70b8ce11abc88c35be4092f097cfff385921f46 Gerrit-Change-Number: 29442 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

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Change in coreboot[master]: mb/google/poppy/variant/nocturne: adjust RcompTarget to fix DRAM corr...
by Nick Vaccaro (Code Review) 02 Nov '18

02 Nov '18

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/29361 ) Change subject: mb/google/poppy/variant/nocturne: adjust RcompTarget to fix DRAM corruption ...................................................................... Patch Set 1: Code-Review-2 Awaiting final test results... -- To view, visit https://review.coreboot.org/29361 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iefc3957f915a39a47ad6018459e65b70d1b34091 Gerrit-Change-Number: 29361 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Comment-Date: Fri, 02 Nov 2018 20:26:53 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variant/nocturne: adjust RcompTarget to fix DRAM corr...
by Nick Vaccaro (Code Review) 02 Nov '18

02 Nov '18

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/29361 ) Change subject: mb/google/poppy/variant/nocturne: adjust RcompTarget to fix DRAM corruption ...................................................................... Patch Set 1: We're running tests against all SKUs as well, will update status once I receive it. -- To view, visit https://review.coreboot.org/29361 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iefc3957f915a39a47ad6018459e65b70d1b34091 Gerrit-Change-Number: 29361 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Comment-Date: Fri, 02 Nov 2018 19:41:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: chromeec: Disable battery remaining capacity workaround
by Daisuke Nojiri (Code Review) 02 Nov '18

02 Nov '18

Daisuke Nojiri has uploaded this change for review. ( https://review.coreboot.org/29441 Change subject: chromeec: Disable battery remaining capacity workaround ...................................................................... chromeec: Disable battery remaining capacity workaround If remaining charge is more than x% of the full capacity, the remaining charge is raised to the full capacity before it's reported to the rest of the system. Some batteries don't update full capacity timely or don't update it at all. On such systems, compensation is required to guarantee the remaining charge will be equal to the full capacity eventually. On some systems, Rohm charger generates audio noise when the battery is fully charged and AC is plugged. A workaround is to do charge- discharge cycles between 93 and 100%. On such systems, compensation was also applied to mask this cycle from users. This used to be done in ACPI, thus, all software components except EC was able to see the compensated charge. This patch is part of the effort of moving the logic to EC. With this and the EC changes, EC can see what the rest of the system sees, thus, can control LEDs synchronously (to the display percentage). Another rationale of this move is EC can perform more granular and precise compensation than ACPI since it has more knowledge about the battery and the charger. CQ-DEPEND=CL:1312204 BUG=b:109954565,b:80270446,chromium:899120 BRANCH=none TEST=Verify charge LED changes to white (full) on Sona synchronously to the display percentage. TEST=Verify charge LED changes to blinking white (low) on Sona within 30 seconds synchronously to the display percentage. Change-Id: I0b51911b90dc2e7fcf5c730c54d9fda1fea76aa9 Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> --- M src/ec/google/chromeec/acpi/battery.asl 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/29441/1 diff --git a/src/ec/google/chromeec/acpi/battery.asl b/src/ec/google/chromeec/acpi/battery.asl index 0a0caec..1ff5099 100644 --- a/src/ec/google/chromeec/acpi/battery.asl +++ b/src/ec/google/chromeec/acpi/battery.asl @@ -294,8 +294,8 @@ }) Name (BSTP, Zero) - // Workaround for full battery status, enabled by default - Name (BFWK, One) + // Workaround for full battery status, disabled by default + Name (BFWK, Zero) // Method to enable full battery workaround Method (BFWE) @@ -384,8 +384,8 @@ }) Name (BSTP, Zero) - // Workaround for full battery status, enabled by default - Name (BFWK, One) + // Workaround for full battery status, disabled by default + Name (BFWK, Zero) // Method to enable full battery workaround Method (BFWE) -- To view, visit https://review.coreboot.org/29441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I0b51911b90dc2e7fcf5c730c54d9fda1fea76aa9 Gerrit-Change-Number: 29441 Gerrit-PatchSet: 1 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org>

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Change in coreboot[master]: util/cbfstool/cbfs_image.c: Get rid of void pointer math
by Richard Spiegel (Code Review) 02 Nov '18

02 Nov '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/29440 Change subject: util/cbfstool/cbfs_image.c: Get rid of void pointer math ...................................................................... util/cbfstool/cbfs_image.c: Get rid of void pointer math Pointer math with void pointers is illegal in many compilers, though it works with GCC because it assumes size of void to be 1. Change the pointers or add parenthesis to force a proper order that will not cause compile errors if compiled with a different compiler, and more importantly, don't have unsuspected side effects. BUG=b:118484178 TEST=Build CBFS with original code, run objdump and saved output. Added modifications, build cbfs again, run objdump again, compared objdump outputs. Change-Id: I30187de8ea24adba41083f3bfbd24c0e363ee4b8 Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M util/cbfstool/cbfs_image.c 1 file changed, 12 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/29440/1 diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 74572a9..2160742 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -430,8 +430,9 @@ * which may be used by the master header pointer. This messes with * the ability to stash something "top-aligned" into the region, but * keeps things simpler. */ - last_entry_size = copy_end - ((void *)dst_entry - buffer_get(dst)) - - cbfs_calculate_file_header_size("") - sizeof(int32_t); + last_entry_size = copy_end - + ((uint8_t *)dst_entry - (uint8_t *)buffer_get(dst)) - + cbfs_calculate_file_header_size("") - sizeof(int32_t); if (last_entry_size < 0) WARN("No room to create the last entry!\n") @@ -467,8 +468,9 @@ * file header. That's either outside the image or exactly the place * where we need to create a new file. */ - int last_entry_size = region_sz - ((void *)entry - buffer_get(region)) - - cbfs_calculate_file_header_size("") - sizeof(int32_t); + int last_entry_size = region_sz - + ((uint8_t *)entry - (uint8_t *)buffer_get(region)) - + cbfs_calculate_file_header_size("") - sizeof(int32_t); if (last_entry_size > 0) { cbfs_create_empty_entry(entry, CBFS_COMPONENT_NULL, @@ -509,10 +511,11 @@ (trailer->type != htonl(CBFS_COMPONENT_DELETED))) { /* nothing to truncate. Return de-facto CBFS size in case it * was already truncated. */ - *size = (void *)entry - buffer_get(region); + *size = (uint32_t)((uint8_t *)entry - + (uint8_t *)buffer_get(region)); return 0; } - *size = (void *)trailer - buffer_get(region); + *size = (uint32_t)((uint8_t *)trailer - (uint8_t *)buffer_get(region)); memset(trailer, 0xff, buffer_size(region) - *size); return 0; @@ -723,8 +726,9 @@ len = addr_next - addr - min_entry_size; /* keep space for master header pointer */ - if ((void *)entry + min_entry_size + len > buffer_get(&image->buffer) + - buffer_size(&image->buffer) - sizeof(int32_t)) { + if (((uint8_t *)entry + min_entry_size + len) > + ((uint8_t *)buffer_get(&image->buffer) + + buffer_size(&image->buffer) - sizeof(int32_t))) { len -= sizeof(int32_t); } cbfs_create_empty_entry(entry, CBFS_COMPONENT_NULL, len, ""); -- To view, visit https://review.coreboot.org/29440 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I30187de8ea24adba41083f3bfbd24c0e363ee4b8 Gerrit-Change-Number: 29440 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

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Change in coreboot[master]: intel/nb/*/gma: Use new common PMBASE API
by Patrick Rudolph (Code Review) 02 Nov '18

02 Nov '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29439 to look at the new patch set (#4). Change subject: intel/nb/*/gma: Use new common PMBASE API ...................................................................... intel/nb/*/gma: Use new common PMBASE API * Introduce common function to enable TCO SCI. * Use new PMBASE functions to get rid of get_pmbase Change-Id: I6b5977b10d1e38b45e09530e9dcabbd5f42facb2 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/northbridge/intel/fsp_sandybridge/gma.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/nehalem/gma.c M src/northbridge/intel/sandybridge/gma.c 4 files changed, 25 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/29439/4 -- To view, visit https://review.coreboot.org/29439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6b5977b10d1e38b45e09530e9dcabbd5f42facb2 Gerrit-Change-Number: 29439 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: intel/nb/*/gma: Use new common PMBASE API
by Patrick Rudolph (Code Review) 02 Nov '18

02 Nov '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29439 to look at the new patch set (#3). Change subject: intel/nb/*/gma: Use new common PMBASE API ...................................................................... intel/nb/*/gma: Use new common PMBASE API * Introduce common function to enable TCO SCI. * Use new PMBASE functions to get rid of get_pmbase Change-Id: I6b5977b10d1e38b45e09530e9dcabbd5f42facb2 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/northbridge/intel/fsp_sandybridge/gma.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/nehalem/gma.c M src/northbridge/intel/sandybridge/gma.c M src/southbridge/intel/common/pmutil.c M src/southbridge/intel/common/pmutil.h 6 files changed, 37 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/29439/3 -- To view, visit https://review.coreboot.org/29439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6b5977b10d1e38b45e09530e9dcabbd5f42facb2 Gerrit-Change-Number: 29439 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit November 2018