Richard Spiegel has abandoned this change. ( https://review.coreboot.org/29256 )
Change subject: soc/amd/stoneyridge: SMBUS access through MMIO
......................................................................
Abandoned
This code has an error, and a new patch was uploaded with a different change ID, with the error fixed.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I1bdfadea128a460422b7e09f119cada691bad34a
Gerrit-Change-Number: 29256
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/29257
Change subject: soc/amd/stoneyridge: SMBUS access through MMIO
......................................................................
soc/amd/stoneyridge: SMBUS access through MMIO
Currently SMBUS registers are accessed through IO, but with stoneyridge
they can be accessed through MMIO. This reduces the time of execution by
a tiny amount (MMIO write is faster than IO write, though MMIO read is about
as fast as IO read) as most of the time consumed is actually transaction
time. Create a CONFIG parameter, so user can decide if they want to use IO
(default) or MMIO when accessing SMBUS.
BUG=b:117754784
TEST=
Change-Id: Id7accc33005a45ef31d260ad2499a4732b567242
Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
---
M src/soc/amd/stoneyridge/include/soc/smbus.h
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/29257/1
diff --git a/src/soc/amd/stoneyridge/include/soc/smbus.h b/src/soc/amd/stoneyridge/include/soc/smbus.h
index e676cc1..58ee1c7 100644
--- a/src/soc/amd/stoneyridge/include/soc/smbus.h
+++ b/src/soc/amd/stoneyridge/include/soc/smbus.h
@@ -20,8 +20,8 @@
#include <soc/iomap.h>
#if IS_ENABLED(CONFIG_STONEYRIDGE_MMIO_SMBUS)
- #define SMB_RD(base, reg) read8((void*)SMBUS_MMIO_BASE + reg)
- #define SMB_WR(value, base, reg) write8((void*)SMBUS_MMIO_BASE + reg, \
+ #define SMB_RD(base, reg) read8((void *)SMBUS_MMIO_BASE + reg)
+ #define SMB_WR(value, base, reg) write8((void *)SMBUS_MMIO_BASE + reg, \
value)
#else
#define SMB_RD(base, reg) inb(base + reg)
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id7accc33005a45ef31d260ad2499a4732b567242
Gerrit-Change-Number: 29257
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
Hello Richard Spiegel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29243
to look at the new patch set (#12).
Change subject: {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
......................................................................
{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/cpu/amd/agesa/family12/fixme.c
M src/cpu/amd/agesa/family14/fixme.c
M src/cpu/amd/agesa/family15tn/fixme.c
M src/cpu/amd/agesa/family16kb/fixme.c
M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
M src/cpu/amd/mtrr/amd_mtrr.c
M src/cpu/amd/pi/00630F01/fixme.c
M src/cpu/amd/pi/00660F01/fixme.c
M src/cpu/amd/pi/00730F01/fixme.c
M src/drivers/amd/agesa/s3_mtrr.c
M src/include/cpu/amd/mtrr.h
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
M src/northbridge/amd/amdmct/mct_ddr3/s3utils.c
M src/southbridge/amd/rs780/gfx.c
M src/southbridge/amd/sr5650/sr5650.c
18 files changed, 63 insertions(+), 44 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/29243/12
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Gerrit-Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Gerrit-Change-Number: 29243
Gerrit-PatchSet: 12
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Martin Roth <martinroth(a)google.com>
Hello Richard Spiegel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29243
to look at the new patch set (#11).
Change subject: {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
......................................................................
{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/cpu/amd/agesa/family12/fixme.c
M src/cpu/amd/agesa/family14/fixme.c
M src/cpu/amd/agesa/family15tn/fixme.c
M src/cpu/amd/agesa/family16kb/fixme.c
M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
M src/cpu/amd/mtrr/amd_mtrr.c
M src/cpu/amd/pi/00630F01/fixme.c
M src/cpu/amd/pi/00660F01/fixme.c
M src/cpu/amd/pi/00730F01/fixme.c
M src/drivers/amd/agesa/s3_mtrr.c
M src/include/cpu/amd/mtrr.h
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
M src/northbridge/amd/amdmct/mct_ddr3/s3utils.c
M src/southbridge/amd/rs780/gfx.c
M src/southbridge/amd/sr5650/sr5650.c
18 files changed, 59 insertions(+), 44 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/29243/11
--
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Gerrit-Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Gerrit-Change-Number: 29243
Gerrit-PatchSet: 11
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Martin Roth <martinroth(a)google.com>
Hello Richard Spiegel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29243
to look at the new patch set (#10).
Change subject: {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
......................................................................
{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/cpu/amd/agesa/family12/fixme.c
M src/cpu/amd/agesa/family14/fixme.c
M src/cpu/amd/agesa/family15tn/fixme.c
M src/cpu/amd/agesa/family16kb/fixme.c
M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
M src/cpu/amd/mtrr/amd_mtrr.c
M src/cpu/amd/pi/00630F01/fixme.c
M src/cpu/amd/pi/00660F01/fixme.c
M src/cpu/amd/pi/00730F01/fixme.c
M src/drivers/amd/agesa/s3_mtrr.c
M src/include/cpu/amd/mtrr.h
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
M src/northbridge/amd/amdmct/mct_ddr3/s3utils.c
M src/southbridge/amd/rs780/gfx.c
M src/southbridge/amd/sr5650/sr5650.c
18 files changed, 57 insertions(+), 44 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/29243/10
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Gerrit-Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Gerrit-Change-Number: 29243
Gerrit-PatchSet: 10
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
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Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29243 )
Change subject: {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/#/c/29243/9/src/northbridge/amd/amdmct/mct/mctd…
File src/northbridge/amd/amdmct/mct/mctdqs_d.c:
https://review.coreboot.org/#/c/29243/9/src/northbridge/amd/amdmct/mct/mctd…
PS9, Line 822: 0xC0010017
> In cpu/amd/mtrr.h replace the declarations (they are wrong): […]
this what I did in "Patch Set 5" but IORR0_MASK is also defined here: vendorcode/amd/pi/00660F01/AGESA.h ...
Please see: https://qa.coreboot.org/job/coreboot-gerrit/81208/console
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Gerrit-Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Gerrit-Change-Number: 29243
Gerrit-PatchSet: 9
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
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Gerrit-Comment-Date: Wed, 24 Oct 2018 18:04:39 +0000
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