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coreboot-gerrit
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Change in coreboot[master]: Makefile: Exclude util directory from project_filelist
by build bot (Jenkins) (Code Review)
26 Sep '17
26 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21698
) Change subject: Makefile: Exclude util directory from project_filelist ...................................................................... Patch Set 1: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/61124/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16292/
: SUCCESS -- To view, visit
https://review.coreboot.org/21698
To unsubscribe, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I390d58ef9ab76ff05062b5fbc1e031b7c6d2f388 Gerrit-Change-Number: 21698 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 16:30:56 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: src/vendorcode/amd: Use AR variable in Makefiles
by Martin Roth (Code Review)
26 Sep '17
26 Sep '17
Martin Roth has uploaded this change for review. (
https://review.coreboot.org/21700
Change subject: src/vendorcode/amd: Use AR variable in Makefiles ...................................................................... src/vendorcode/amd: Use AR variable in Makefiles Change-Id: I5158f1bcc18eb5b15f310d0cf50fb787c12317c8 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/vendorcode/amd/agesa/f12/Makefile.inc M src/vendorcode/amd/agesa/f15/Makefile.inc M src/vendorcode/amd/agesa/f15tn/Makefile.inc M src/vendorcode/amd/agesa/f16kb/Makefile.inc M src/vendorcode/amd/pi/Makefile.inc 5 files changed, 6 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/21700/1 diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index 3445b29..a5817a1 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -58,7 +58,8 @@ $(obj)/libagesa.fam12.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+ + romstage-libs += $(obj)/libagesa.fam12.a ramstage-libs += $(obj)/libagesa.fam12.a diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 0172621..7a29a81 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -49,7 +49,7 @@ $(obj)/libagesa.fam15.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+ romstage-libs += $(obj)/libagesa.fam15.a ramstage-libs += $(obj)/libagesa.fam15.a diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index c5d1eee..114be73 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -63,7 +63,7 @@ $(obj)/libagesa.fam15tn.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+ romstage-libs += $(obj)/libagesa.fam15tn.a ramstage-libs += $(obj)/libagesa.fam15tn.a diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index 3837d8e..a08b5d7 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -63,7 +63,7 @@ $(obj)/libagesa.fam16kb.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+ romstage-libs += $(obj)/libagesa.fam16kb.a ramstage-libs += $(obj)/libagesa.fam16kb.a diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index c4ab131..25b4a9f 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -151,7 +151,7 @@ $(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+ bootblock-libs += $(agesa_output_path)/libagesa.a romstage-libs += $(agesa_output_path)/libagesa.a -- To view, visit
https://review.coreboot.org/21700
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I5158f1bcc18eb5b15f310d0cf50fb787c12317c8 Gerrit-Change-Number: 21700 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>
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Change in coreboot[master]: vendorcode/amd/pi: Put libagesa build all in libagesa directory
by Martin Roth (Code Review)
26 Sep '17
26 Sep '17
Martin Roth has uploaded this change for review. (
https://review.coreboot.org/21699
Change subject: vendorcode/amd/pi: Put libagesa build all in libagesa directory ...................................................................... vendorcode/amd/pi: Put libagesa build all in libagesa directory Half the files were being placed in build/agesa and half in build/libagesa. Change-Id: Ied69dafffe2eb3354bd430789e098a1cb1d40551 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/vendorcode/amd/pi/Makefile.inc 1 file changed, 6 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/21699/1 diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index 0192faa..c4ab131 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -141,20 +141,21 @@ endif agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file))))) -agesa_src_path := $(strip $(obj)/agesa) +agesa_output_path := $(obj)/libagesa +agesa_src_path := $(agesa_output_path) agesa_dirs := $(sort $(abspath $(dir $(call src-to-obj,libagesa,$(agesa_src_files))))) additional-dirs += $(agesa_src_path) $(agesa_dirs) $(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_template,$(file)))) -$(obj)/agesa/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) +$(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) @printf " AGESA $(subst $(obj)/,,$(@))\n" ar rcs $@ $+ -bootblock-libs += $(obj)/agesa/libagesa.a -romstage-libs += $(obj)/agesa/libagesa.a -ramstage-libs += $(obj)/agesa/libagesa.a +bootblock-libs += $(agesa_output_path)/libagesa.a +romstage-libs += $(agesa_output_path)/libagesa.a +ramstage-libs += $(agesa_output_path)/libagesa.a ####################################################################### -- To view, visit
https://review.coreboot.org/21699
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ied69dafffe2eb3354bd430789e098a1cb1d40551 Gerrit-Change-Number: 21699 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>
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Change in coreboot[master]: Makefile: Exclude util directory from project_filelist
by Martin Roth (Code Review)
26 Sep '17
26 Sep '17
Martin Roth has uploaded this change for review. (
https://review.coreboot.org/21698
Change subject: Makefile: Exclude util directory from project_filelist ...................................................................... Makefile: Exclude util directory from project_filelist This list should be about files included in the ROM output, not related files. Change-Id: I390d58ef9ab76ff05062b5fbc1e031b7c6d2f388 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M Makefile 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/21698/1 diff --git a/Makefile b/Makefile index 329eaeb..dedf688 100644 --- a/Makefile +++ b/Makefile @@ -380,8 +380,8 @@ echo "*** Error: Project must be built before generating file list ***"; \ exit 1; \ fi - find $(obj) -name "*.d" -exec cat {} \; | \ - sed 's/[:\\]/ /g' | sed 's/ /\n/g' | sort | uniq | \ + find $(obj) -path "$(obj)/util" -prune -o -name "*.d" -exec cat {} \; | \ + sed "s|$(top)/||" | sed 's/[:\\]/ /g' | sed 's/ /\n/g' | sort | uniq | \ grep -v '\.o$$' > $(obj)/project_filelist.txt filelist: $(obj)/project_filelist.txt -- To view, visit
https://review.coreboot.org/21698
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I390d58ef9ab76ff05062b5fbc1e031b7c6d2f388 Gerrit-Change-Number: 21698 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>
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Change in coreboot[master]: soc/intel/braswell/acpi: Clean OpRegion up
by build bot (Jenkins) (Code Review)
26 Sep '17
26 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20221
) Change subject: soc/intel/braswell/acpi: Clean OpRegion up ...................................................................... Patch Set 7: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/61123/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16291/
: SUCCESS -- To view, visit
https://review.coreboot.org/20221
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibabeb05a9d3d776b73f6885dcca846d5001116e7 Gerrit-Change-Number: 20221 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 16:24:43 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: configs: Add intel/harcuvar FSP 2.0 sample configuration
by build bot (Jenkins) (Code Review)
26 Sep '17
26 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21693
) Change subject: configs: Add intel/harcuvar FSP 2.0 sample configuration ...................................................................... Patch Set 2: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/61122/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16290/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I60ec6921eca17a910cd1b9f8b0b86a1a1bf9bbea Gerrit-Change-Number: 21693 Gerrit-PatchSet: 2 Gerrit-Owner: Mariusz Szafranski Gerrit-Reviewer: FEI WANG <wangfei.jimei(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 16:05:36 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: refactor region-permission-related functions
by build bot (Jenkins) (Code Review)
26 Sep '17
26 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21416
) Change subject: ifdtool: refactor region-permission-related functions ...................................................................... Patch Set 51: Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/61119/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16287/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d34606545db4d970ce3ec202da4bf4c5cbad18c Gerrit-Change-Number: 21416 Gerrit-PatchSet: 51 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Shawn Chang <citypw(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 16:05:35 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: Port the feature to jail ME from me_cleaner
by build bot (Jenkins) (Code Review)
26 Sep '17
26 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21607
) Change subject: ifdtool: Port the feature to jail ME from me_cleaner ...................................................................... Patch Set 16: Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/61118/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16286/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I00533f4e2569c4763fbfc302bb460db1e60e5564 Gerrit-Change-Number: 21607 Gerrit-PatchSet: 16 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 15:58:44 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: device/dram/ddr2.c: fix a hidden syntax error introduced earlier
by build bot (Jenkins) (Code Review)
26 Sep '17
26 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21673
) Change subject: device/dram/ddr2.c: fix a hidden syntax error introduced earlier ...................................................................... Patch Set 6: Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/61121/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16289/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If956435bd0c39b1f3e722c2cfc48d2d0f35abc9b Gerrit-Change-Number: 21673 Gerrit-PatchSet: 6 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 15:56:33 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: improve the "new layout" feature
by build bot (Jenkins) (Code Review)
26 Sep '17
26 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21315
) Change subject: ifdtool: improve the "new layout" feature ...................................................................... Patch Set 60: Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/61117/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16285/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia2b92c3f835f9849a243a48c37588c2dbe7449bf Gerrit-Change-Number: 21315 Gerrit-PatchSet: 60 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Christopher Douglass <cdouglass.orion(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 15:52:21 +0000 Gerrit-HasComments: No
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