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Change in coreboot[master]: ifdtool: refactor region-permission-related feature
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21416
) Change subject: ifdtool: refactor region-permission-related feature ...................................................................... Patch Set 1: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/59927/
: UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/15181/
: SUCCESS -- To view, visit
https://review.coreboot.org/21416
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d34606545db4d970ce3ec202da4bf4c5cbad18c Gerrit-Change-Number: 21416 Gerrit-PatchSet: 1 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Sep 2017 07:23:02 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: refactor region-permission-related feature
by Bill XIE (Code Review)
06 Sep '17
06 Sep '17
Bill XIE has uploaded this change for review. (
https://review.coreboot.org/21416
Change subject: ifdtool: refactor region-permission-related feature ...................................................................... ifdtool: refactor region-permission-related feature combine lock_descriptor() and unlock_descriptor() into one function fmba_toggle_permission(), and port the feature to "remove the ME/TXE Read/Write permissions to the other regions (-d)" of me_cleaner (
https://github.com/corna/me_cleaner/
) here. Change-Id: I4d34606545db4d970ce3ec202da4bf4c5cbad18c Signed-off-by: Bill XIE <persmule(a)gmail.com> --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 97 insertions(+), 69 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/21416/1 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index b213929..a133efb 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -758,83 +758,94 @@ write_image(filename, image, size); } -static void lock_descriptor(const char *filename, char *image, int size) +static void fmba_toggle_permission(fmba_t *fmba, enum toggle_mode lock_fd, + enum toggle_mode jail_me) { int wr_shift, rd_shift; - fmba_t *fmba = find_fmba(image, size); - if (!fmba) - exit(EXIT_FAILURE); /* TODO: Dynamically take Platform Data Region and GbE Region * into regard. */ - if (ifd_version >= IFD_VERSION_2) { wr_shift = FLMSTR_WR_SHIFT_V2; rd_shift = FLMSTR_RD_SHIFT_V2; - - /* Clear non-reserved bits */ - fmba->flmstr1 &= 0xff; - fmba->flmstr2 &= 0xff; - fmba->flmstr3 &= 0xff; } else { wr_shift = FLMSTR_WR_SHIFT_V1; rd_shift = FLMSTR_RD_SHIFT_V1; - - fmba->flmstr1 = 0; - fmba->flmstr2 = 0; - /* Requestor ID */ - fmba->flmstr3 = 0x118; } + if (lock_fd == TM_set) { + if (ifd_version >= IFD_VERSION_2) { + /* Clear non-reserved bits */ + fmba->flmstr1 &= 0xff; + fmba->flmstr2 &= 0xff; + fmba->flmstr3 &= 0xff; + } else { + fmba->flmstr1 = 0; + fmba->flmstr2 = 0; + /* Requestor ID */ + fmba->flmstr3 = 0x118; + } - switch (platform) { - case PLATFORM_APOLLOLAKE: - /* CPU/BIOS can read descriptor and BIOS */ - fmba->flmstr1 |= 0x3 << rd_shift; - /* CPU/BIOS can write BIOS */ - fmba->flmstr1 |= 0x2 << wr_shift; - /* TXE can read descriptor, BIOS and Device Expansion */ - fmba->flmstr2 |= 0x23 << rd_shift; - /* TXE can only write Device Expansion */ - fmba->flmstr2 |= 0x20 << wr_shift; - break; - default: + switch (platform) { + case PLATFORM_APOLLOLAKE: + /* CPU/BIOS can read descriptor and BIOS */ + fmba->flmstr1 |= 0x3 << rd_shift; + /* CPU/BIOS can write BIOS */ + + /* TXE can read descriptor, + * BIOS and Device Expansion + */ + fmba->flmstr2 |= 0x23 << rd_shift; + /* TXE can only write Device + * Expansion + */ + fmba->flmstr2 |= 0x20 << wr_shift; + break; + default: /* CPU/BIOS can read descriptor, BIOS, and GbE. */ - fmba->flmstr1 |= 0xb << rd_shift; - /* CPU/BIOS can write BIOS and GbE. */ - fmba->flmstr1 |= 0xa << wr_shift; - /* ME can read descriptor, ME, and GbE. */ - fmba->flmstr2 |= 0xd << rd_shift; - /* ME can write ME and GbE. */ - fmba->flmstr2 |= 0xc << wr_shift; - /* GbE can write only GbE. */ - fmba->flmstr3 |= 0x8 << rd_shift; - /* GbE can read only GbE. */ - fmba->flmstr3 |= 0x8 << wr_shift; - break; - } - - write_image(filename, image, size); -} - -static void unlock_descriptor(const char *filename, char *image, int size) -{ - fmba_t *fmba = find_fmba(image, size); - if (!fmba) - exit(EXIT_FAILURE); - - if (ifd_version >= IFD_VERSION_2) { - /* Access bits for each region are read: 19:8 write: 31:20 */ - fmba->flmstr1 = 0xffffff00 | (fmba->flmstr1 & 0xff); - fmba->flmstr2 = 0xffffff00 | (fmba->flmstr2 & 0xff); - fmba->flmstr3 = 0xffffff00 | (fmba->flmstr3 & 0xff); + fmba->flmstr1 |= 0xb << rd_shift; + /* CPU/BIOS can write BIOS and GbE. */ + fmba->flmstr1 |= 0xa << wr_shift; + /* ME can read descriptor, ME, and GbE. */ + fmba->flmstr2 |= 0xd << rd_shift; + /* ME can write ME and GbE. */ + fmba->flmstr2 |= 0xc << wr_shift; + /* GbE can write only GbE. */ + fmba->flmstr3 |= 0x8 << rd_shift; + /* GbE can read only GbE. */ + fmba->flmstr3 |= 0x8 << wr_shift; + break; + } } else { - fmba->flmstr1 = 0xffff0000; - fmba->flmstr2 = 0xffff0000; - /* Keep chipset specific Requester ID */ - fmba->flmstr3 = 0x08080000 | (fmba->flmstr3 & 0xffff); + if (ifd_version >= IFD_VERSION_2) { + /* Access bits for each region are read: + * 19:8 write: 31:20 + */ + fmba->flmstr1 = 0xffffff00 | + (fmba->flmstr1 & 0xff); + if (jail_me) { + fmba->flmstr2 &= 0xff; + /* ME can read ME. */ + fmba->flmstr2 |= 0x4 << rd_shift; + /* ME can write ME. */ + fmba->flmstr2 |= 0x4 << wr_shift; + } else { + fmba->flmstr2 = 0xffffff00 | + (fmba->flmstr2 & 0xff); + } + fmba->flmstr3 = 0xffffff00 | + (fmba->flmstr3 & 0xff); + } else { + fmba->flmstr1 = 0xffff0000; + if (jail_me) { + fmba->flmstr2 = 0x04040000; + } else { + fmba->flmstr2 = 0xffff0000; + } + /* Keep chipset specific Requester ID */ + fmba->flmstr3 = 0x08080000 | + (fmba->flmstr3 & 0xffff); + } } - - write_image(filename, image, size); } void inject_region(const char *filename, char *image, int size, unsigned int region_type, @@ -1152,6 +1163,9 @@ " Dual Output Fast Read Support\n" " -l | --lock Lock firmware descriptor and ME region\n" " -u | --unlock Unlock firmware descriptor and ME region\n" + " -j | --jail Unlock firmware descriptor and ME region,\n" + " and remove the ME/TXE's Read/Write permissions\n" + " to the other regions" " -p | --platform Add platform-specific quirks\n" " aplk - Apollo Lake\n" " -v | --version: print the version\n" @@ -1164,7 +1178,7 @@ { int opt, option_index = 0; int mode_dump = 0, mode_extract = 0, mode_inject = 0, mode_spifreq = 0; - int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0; + int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_jail = 0; int mode_layout = 0, mode_newlayout = 0, mode_density = 0; char *region_type_string = NULL, *region_fname = NULL; const char *layout_fname = NULL; @@ -1184,13 +1198,14 @@ {"em100", 0, NULL, 'e'}, {"lock", 0, NULL, 'l'}, {"unlock", 0, NULL, 'u'}, + {"jail", 0, NULL, 'j'}, {"version", 0, NULL, 'v'}, {"help", 0, NULL, 'h'}, {"platform", 0, NULL, 'p'}, {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "df:D:C:xi:n:s:p:eluvh?", + while ((opt = getopt_long(argc, argv, "df:D:C:xi:n:s:p:elujvh?", long_options, &option_index)) != EOF) { switch (opt) { case 'd': @@ -1341,6 +1356,14 @@ exit(EXIT_FAILURE); } break; + case 'j': + mode_unlocked = 1; + mode_jail = 1; + if (mode_locked == 1) { + fprintf(stderr, "Locking/Unlocking FD and ME are mutually exclusive\n"); + exit(EXIT_FAILURE); + } + break; case 'p': if (!strcmp(optarg, "aplk")) { platform = PLATFORM_APOLLOLAKE; @@ -1439,11 +1462,11 @@ if (mode_em100) set_em100_mode(filename, image, size); - if (mode_locked) - lock_descriptor(filename, image, size); - - if (mode_unlocked) - unlock_descriptor(filename, image, size); + if (mode_locked || mode_unlocked) { + fmba_t *fmba = find_fmba(image, size); + fmba_toggle_permission(fmba, mode_locked, mode_jail); + write_image(filename, image, size); + } free(image); diff --git a/util/ifdtool/ifdtool.h b/util/ifdtool/ifdtool.h index a8be820..e0e1886 100644 --- a/util/ifdtool/ifdtool.h +++ b/util/ifdtool/ifdtool.h @@ -1,4 +1,4 @@ -/* +\/* * ifdtool - dump Intel Firmware Descriptor information * * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. @@ -81,6 +81,11 @@ ALD_right }; +enum toggle_mode { + TM_unset = 0, + TM_set = 1 +}; + typedef struct { uint32_t flreg[MAX_REGIONS]; } __attribute__((packed)) frba_t; -- To view, visit
https://review.coreboot.org/21416
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4d34606545db4d970ce3ec202da4bf4c5cbad18c Gerrit-Change-Number: 21416 Gerrit-PatchSet: 1 Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
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Change in coreboot[master]: soc/intel/common/block: Common ACPI
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20630
) Change subject: soc/intel/common/block: Common ACPI ...................................................................... Patch Set 28: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/59916/
: UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/15171/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib6eb6fd5366e6e28fd81bc22d050b0efa05a2e5d Gerrit-Change-Number: 20630 Gerrit-PatchSet: 28 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Sep 2017 06:04:24 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: Add common ACPI support for CNL
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21076
) Change subject: soc/intel/cannonlake: Add common ACPI support for CNL ...................................................................... Patch Set 26: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15170/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59915/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibc16d2afdd3cb9bad2ecb85cf320c88504409707 Gerrit-Change-Number: 21076 Gerrit-PatchSet: 26 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Sep 2017 05:48:17 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Include ChromeOS support
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21281
) Change subject: mainboard/intel/cannonlake_rvp: Include ChromeOS support ...................................................................... Patch Set 4: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/59913/
: UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/15168/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia02407da8ab4aac2c2c33a7796fc71aea12e2925 Gerrit-Change-Number: 21281 Gerrit-PatchSet: 4 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Andrex Andraos <andrex.andraos(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Sep 2017 05:42:56 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: Add Vboot/ChromeOS support
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21280
) Change subject: soc/intel/cannonlake: Add Vboot/ChromeOS support ...................................................................... Patch Set 6: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/59912/
: UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/15167/
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I114a9d6e92b69199ccacc1e7e1535eccc0e2cb99 Gerrit-Change-Number: 21280 Gerrit-PatchSet: 6 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Sep 2017 05:38:38 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Include ChromeOS support
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21281
) Change subject: mainboard/intel/cannonlake_rvp: Include ChromeOS support ...................................................................... Patch Set 3: Verified-1 Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/59911/
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https://qa.coreboot.org/job/coreboot-checkpatch/15166/
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Change in coreboot[master]: driver/i2c/max98927: Add imon and vmon params
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21195
) Change subject: driver/i2c/max98927: Add imon and vmon params ...................................................................... Patch Set 3: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15165/
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https://qa.coreboot.org/job/coreboot-gerrit/59910/
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I21d72ba91af83782587f11018b2d1d1c8d4f676c Gerrit-Change-Number: 21195 Gerrit-PatchSet: 3 Gerrit-Owner: harsha p <harsha.p.n(a)intel.corp-partner.google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HARSHAPRIYA N <harshapriya.n(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: harsha p <harsha.p.n(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Wed, 06 Sep 2017 05:27:10 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Include ChromeOS support
by Lijian Zhao (Code Review)
06 Sep '17
06 Sep '17
Lijian Zhao has uploaded this change for review. (
https://review.coreboot.org/21281
Change subject: mainboard/intel/cannonlake_rvp: Include ChromeOS support ...................................................................... mainboard/intel/cannonlake_rvp: Include ChromeOS support Add ChromeOS related support for cannonlake_rvp paltform. Change-Id: Ia02407da8ab4aac2c2c33a7796fc71aea12e2925 Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/mainboard/intel/cannonlake_rvp/Kconfig M src/mainboard/intel/cannonlake_rvp/Makefile.inc 2 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/21281/3 diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig index 9d2a5f2..f9e45a5 100644 --- a/src/mainboard/intel/cannonlake_rvp/Kconfig +++ b/src/mainboard/intel/cannonlake_rvp/Kconfig @@ -5,6 +5,7 @@ select BOARD_ROMSIZE_KB_16384 select SOC_INTEL_CANNONLAKE select HAVE_ACPI_TABLES + select MAINBOARD_HAS_CHROMEOS select GENERIC_SPD_BIN config MAINBOARD_DIR @@ -55,4 +56,7 @@ int default 512 +config VBOOT + select VBOOT_LID_SWITCH + endif diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc index 2f91e6b..30be699 100644 --- a/src/mainboard/intel/cannonlake_rvp/Makefile.inc +++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc @@ -19,6 +19,12 @@ bootblock-y += bootblock.c bootblock-$(CONFIG_CHROMEOS) += chromeos.c +verstage-$(CONFIG_CHROMEOS) += chromeos.c + +romstage-$(CONFIG_CHROMEOS) += chromeos.c + +ramstage-$(CONFIG_CHROMEOS) += chromeos.c + subdirs-y += variants/baseboard CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia02407da8ab4aac2c2c33a7796fc71aea12e2925 Gerrit-Change-Number: 21281 Gerrit-PatchSet: 3 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Andrex Andraos <andrex.andraos(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
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Change in coreboot[master]: soc/intel/cannonlake: add uart.c to verstage
by build bot (Jenkins) (Code Review)
06 Sep '17
06 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21410
) Change subject: soc/intel/cannonlake: add uart.c to verstage ...................................................................... Patch Set 3: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15159/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59904/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2d420ff7437d25a596ee9a120964f8d4bc413bc4 Gerrit-Change-Number: 21410 Gerrit-PatchSet: 3 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Sep 2017 04:58:02 +0000 Gerrit-HasComments: No
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