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coreboot-gerrit
September 2017
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Change in coreboot[master]: device/dram/ddr2: Fix decoding tRR
by Nico Huber (Code Review)
08 Sep '17
08 Sep '17
Nico Huber has posted comments on this change. (
https://review.coreboot.org/21457
) Change subject: device/dram/ddr2: Fix decoding tRR ...................................................................... Patch Set 1: (4 comments) Have you checked any actual SPD value?
https://review.coreboot.org/#/c/21457/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/21457/1//COMMIT_MSG@9
PS1, Line 9: Bit 7 should not be used in computation. Why? the spec says it should be set?
https://review.coreboot.org/#/c/21457/1/src/device/dram/ddr2.c
File src/device/dram/ddr2.c:
https://review.coreboot.org/#/c/21457/1/src/device/dram/ddr2.c@187
PS1, Line 187: case 0: In my version of the spec this is 0x80.
https://review.coreboot.org/#/c/21457/1/src/device/dram/ddr2.c@189
PS1, Line 189: case 1: 0x81
https://review.coreboot.org/#/c/21457/1/src/device/dram/ddr2.c@191
PS1, Line 191: case 2: ... -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6a698ec9c15a2611a34c5965edf93638553775f0 Gerrit-Change-Number: 21457 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Fri, 08 Sep 2017 22:07:48 +0000 Gerrit-HasComments: Yes
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Change in coreboot[master]: device/dram/ddr2: Fix decoding tRR
by Arthur Heymans (Code Review)
08 Sep '17
08 Sep '17
Arthur Heymans has uploaded this change for review. (
https://review.coreboot.org/21457
Change subject: device/dram/ddr2: Fix decoding tRR ...................................................................... device/dram/ddr2: Fix decoding tRR Bit 7 should not be used in computation. Change-Id: I6a698ec9c15a2611a34c5965edf93638553775f0 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/device/dram/ddr2.c 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/21457/1 diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c index 326b141..babfad7 100644 --- a/src/device/dram/ddr2.c +++ b/src/device/dram/ddr2.c @@ -179,8 +179,11 @@ */ static u32 spd_decode_tRR_time(u8 c) { - switch (c) { + switch (c & ~0x80) { default: + printk(BIOS_DEBUG, + "Unkown tRR value, using default of 15.6us."); + /* Fallthrough */ case 0: return 15625 << 8; case 1: -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6a698ec9c15a2611a34c5965edf93638553775f0 Gerrit-Change-Number: 21457 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
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Change in coreboot[master]: amdfw: Clean up makefiles a bit more
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21451
) Change subject: amdfw: Clean up makefiles a bit more ...................................................................... Patch Set 5: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15347/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/60111/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I194b4c790b3e35353d480d34b60507a00f10ef11 Gerrit-Change-Number: 21451 Gerrit-PatchSet: 5 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 21:40:58 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/amd/stoney: Allow alternative placement for AMD FW directory
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21456
) Change subject: soc/amd/stoney: Allow alternative placement for AMD FW directory ...................................................................... Patch Set 1: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15346/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/60112/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9c95b9805c60ab6204750f7929049c7382e0c6cd Gerrit-Change-Number: 21456 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 21:40:08 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: sb/intel/common/spi.c: Port to i82801gx
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21113
) Change subject: sb/intel/common/spi.c: Port to i82801gx ...................................................................... Patch Set 9: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15345/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/60110/
: SUCCESS -- To view, visit
https://review.coreboot.org/21113
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I39199f3279a8b76e290b6693adc50dc2ac0ccf23 Gerrit-Change-Number: 21113 Gerrit-PatchSet: 9 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 21:28:49 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/amd/stoney: Allow alternative placement for AMD FW directory
by Martin Roth (Code Review)
08 Sep '17
08 Sep '17
Martin Roth has uploaded this change for review. (
https://review.coreboot.org/21456
Change subject: soc/amd/stoney: Allow alternative placement for AMD FW directory ...................................................................... soc/amd/stoney: Allow alternative placement for AMD FW directory Allow the AMD FW directory to be placed at one of the alternative locations within the ROM. BUG=b:65484600 TEST=Assign PSP firmware location, build & test. Change-Id: I9c95b9805c60ab6204750f7929049c7382e0c6cd Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc 2 files changed, 19 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/21456/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 08613fe..791cffb 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -305,4 +305,18 @@ If unsure, answer 'y' +config AMD_FWM_POSITION + hex "Firmware Directory Table location (0x0 for auto)" + default 0x0 + help + Typically this is calculated by the ROM size, but there may + be situations where you want to put the firmware directory + table in a different location. Suggested locations are: + 512 KB - 0xFFFA0000 + 1 MB - 0xFFF20000 + 2 MB - 0xFFE20000 + 4 MB - 0xFFC20000 + 8 MB - 0xFF820000 + 16 MB - 0xFF020000 + endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index b6669f1..8b63395 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -90,7 +90,7 @@ CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/acpi -# ROMSIG At ROMBASE + 0x20000: +# ROMSIG At ROMBASE + 0x20000 - Overridden by CONFIG_AMD_FWM_POSITION # +-----------+---------------+----------------+------------+ # |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | # +-----------+---------------+----------------+------------+ @@ -98,7 +98,11 @@ # +-----------+ # # EC ROM should be 64K aligned. +ifneq ($(CONFIG_AMD_FWM_POSITION),0x0) +STONEYRIDGE_FWM_POSITION=$(CONFIG_AMD_FWM_POSITION) +else STONEYRIDGE_FWM_POSITION=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) 0x20000 1) +endif ### 0 FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))) -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9c95b9805c60ab6204750f7929049c7382e0c6cd Gerrit-Change-Number: 21456 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>
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Change in coreboot[master]: sb/intel/common/spi.c: Port to i82801gx
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21113
) Change subject: sb/intel/common/spi.c: Port to i82801gx ...................................................................... Patch Set 8: Verified-1 Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/60107/
: ABORTED
https://qa.coreboot.org/job/coreboot-checkpatch/15343/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I39199f3279a8b76e290b6693adc50dc2ac0ccf23 Gerrit-Change-Number: 21113 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 21:15:02 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: [wip]soc/intel/cannonlake: Add ramstage uart debug support
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21412
) Change subject: [wip]soc/intel/cannonlake: Add ramstage uart debug support ...................................................................... Patch Set 5: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/60109/
: UNSTABLE -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib773e01d5f5358f13297400075d6920793200b88 Gerrit-Change-Number: 21412 Gerrit-PatchSet: 5 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrex Andraos <andrex.andraos(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 20:54:50 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: [wip]soc/intel/cannonlake: Add ramstage uart debug support
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21412
) Change subject: [wip]soc/intel/cannonlake: Add ramstage uart debug support ...................................................................... Patch Set 4: Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/60108/
: ABORTED
https://qa.coreboot.org/job/coreboot-checkpatch/15344/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib773e01d5f5358f13297400075d6920793200b88 Gerrit-Change-Number: 21412 Gerrit-PatchSet: 4 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrex Andraos <andrex.andraos(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 20:46:49 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: [wip]soc/intel/cannonlake: Add ramstage uart debug support
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21412
) Change subject: [wip]soc/intel/cannonlake: Add ramstage uart debug support ...................................................................... Patch Set 4: Verified-1 Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/60106/
: ABORTED -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib773e01d5f5358f13297400075d6920793200b88 Gerrit-Change-Number: 21412 Gerrit-PatchSet: 4 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrex Andraos <andrex.andraos(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 20:46:49 +0000 Gerrit-HasComments: No
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