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coreboot-gerrit
September 2017
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Change in coreboot[master]: mb/google/soraka: Update DPTF parameters
by Wisley Chen (Code Review)
08 Sep '17
08 Sep '17
Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21453
to look at the new patch set (#3). Change subject: mb/google/soraka: Update DPTF parameters ...................................................................... mb/google/soraka: Update DPTF parameters Cloned from baseboard/dptf.asl and update the parameters for soraka. 1. Update DPTF CPU/TSR0/TSR1/TSR2 passive/critial trigger points. CPU: passive point:85, critial point:100 TSR0: passive point:55, critial point:65 TSR1: passive point:58, critial point:70 TSR2: passive point:60, critial point:75 TSR3: passive point:60, critial point:75 2. Set PL1 Max to 7W, and PL1 Min 4.5W 3. Change sampling period of thermal relationship table (TRT) setting CPU: 5 seconds TSR0: 30 seconds TSR1: 30 seconds TSR2: 8 seconds TSR3: 8 Seconds BUG=b:65467566 TEST=build, boot on soraka, and verified by thermal team. Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 --- M src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl 1 file changed, 78 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/21453/3 -- To view, visit
https://review.coreboot.org/21453
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 Gerrit-Change-Number: 21453 Gerrit-PatchSet: 3 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
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Change in coreboot[master]: mb/google/soraka: Update DPTF parameters
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21453
) Change subject: mb/google/soraka: Update DPTF parameters ...................................................................... Patch Set 2: Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/60086/
: FAILURE
https://qa.coreboot.org/job/coreboot-checkpatch/15325/
: SUCCESS -- To view, visit
https://review.coreboot.org/21453
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 Gerrit-Change-Number: 21453 Gerrit-PatchSet: 2 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 10:15:24 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: mb/google/soraka: Fine-tune USB 2.0 port4
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21403
) Change subject: mb/google/soraka: Fine-tune USB 2.0 port4 ...................................................................... Patch Set 2: Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/60084/
: SUCCESS -- To view, visit
https://review.coreboot.org/21403
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c79e96e2e3dea1364d7b71af19b57f4c9307fcb Gerrit-Change-Number: 21403 Gerrit-PatchSet: 2 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 10:15:24 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: mb/google/soraka: Update DPTF parameters
by Wisley Chen (Code Review)
08 Sep '17
08 Sep '17
Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21453
to look at the new patch set (#2). Change subject: mb/google/soraka: Update DPTF parameters ...................................................................... mb/google/soraka: Update DPTF parameters Cloned from baseboard/dptf.asl and update the parameters for soraka. 1. Update DPTF CPU/TSR0/TSR1/TSR2 passive/critial trigger points. CPU: passive point:85, critial point:100 TSR0: passive point:55, critial point:65 TSR1: passive point:58, critial point:70 TSR2: passive point:60, critial point:75 TSR3: passive point:60, critial point:75 2. Set PL1 Max to 7W, and PL1 Min 4.5W 3. Change sampling period of thermal relationship table (TRT) setting CPU: 5 seconds TSR0: 30 seconds TSR1: 30 seconds TSR2: 8 seconds TSR3: 8 Seconds BUG=b:65467566 TEST=build, boot on soraka, and verified by thermal team. Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 --- M src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl 1 file changed, 78 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/21453/2 -- To view, visit
https://review.coreboot.org/21453
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 Gerrit-Change-Number: 21453 Gerrit-PatchSet: 2 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
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Change in coreboot[master]: mb/google/soraka: Update DPTF parameters
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21453
) Change subject: mb/google/soraka: Update DPTF parameters ...................................................................... Patch Set 1: Verified-1 Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/60085/
: FAILURE
https://qa.coreboot.org/job/coreboot-checkpatch/15324/
: SUCCESS -- To view, visit
https://review.coreboot.org/21453
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 Gerrit-Change-Number: 21453 Gerrit-PatchSet: 1 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 10:12:18 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: mb/google/soraka: Update DPTF parameters
by Wisley Chen (Code Review)
08 Sep '17
08 Sep '17
Wisley Chen has uploaded this change for review. (
https://review.coreboot.org/21453
Change subject: mb/google/soraka: Update DPTF parameters ...................................................................... mb/google/soraka: Update DPTF parameters Cloned from baseboard/dptf.asl and update the parameters for soraka. 1. Update DPTF CPU/TSR0/TSR1/TSR2 passive/critial trigger points. CPU: passive point:85, critial point:100 TSR0: passive point:55, critial point:65 TSR1: passive point:58, critial point:70 TSR2: passive point:60, critial point:75 TSR3: passive point:60, critial point:75 2. Set PL1 Max to 7W, and PL1 Min 4.5W 3. Change sampling period of thermal relationship table (TRT) setting CPU: 5 seconds TSR0: 30 seconds TSR1: 30 seconds TSR2: 8 seconds TSR3: 8 Seconds BUG=b:65467566 TEST=build, boot on soraka, and verified by thermal team. Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 --- M src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl 1 file changed, 78 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/21453/1 diff --git a/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl index a9ec742..ac3e4da 100644 --- a/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl @@ -1,7 +1,8 @@ /* * This file is part of the coreboot project. * - * Copyright 2017 Google Inc. + * Copyright (C) 2016 Google Inc. + * Copyright (C) 2017 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -9,8 +10,82 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include <baseboard/acpi/dptf.asl> +#define DPTF_CPU_PASSIVE 85 +#define DPTF_CPU_CRITICAL 100 + +#define DPTF_TSR0_SENSOR_ID 1 +#define DPTF_TSR0_SENSOR_NAME "Ambient" +#define DPTF_TSR0_PASSIVE 55 +#define DPTF_TSR0_CRITICAL 65 + +#define DPTF_TSR1_SENSOR_ID 2 +#define DPTF_TSR1_SENSOR_NAME "Charger" +#define DPTF_TSR1_PASSIVE 58 +#define DPTF_TSR1_CRITICAL 70 + +#define DPTF_TSR2_SENSOR_ID 3 +#define DPTF_TSR2_SENSOR_NAME "DRAM" +#define DPTF_TSR2_PASSIVE 60 +#define DPTF_TSR2_CRITICAL 75 + +#define DPTF_TSR3_SENSOR_ID 4 +#define DPTF_TSR3_SENSOR_NAME "eMMC" +#define DPTF_TSR3_PASSIVE 60 +#define DPTF_TSR3_CRITICAL 75 + +#define DPTF_ENABLE_CHARGER + +/* Charger performance states, board-specific values from charger and EC */ +Name (CHPS, Package () { + Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ + Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ + Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ + Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */ +}) + +Name (DTRT, Package () { + /* CPU Throttle Effect on CPU */ + Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, + + /* CPU Throttle Effect on Ambient (TSR0) */ + Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 300, 0, 0, 0, 0 }, + +#ifdef DPTF_ENABLE_CHARGER + /* Charger Throttle Effect on Charger (TSR1) */ + Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 300, 0, 0, 0, 0 }, +#endif + + /* CPU Throttle Effect on DRAM (TSR2) */ + Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 80, 0, 0, 0, 0 }, + + /* CPU Throttle Effect on eMMC (TSR3) */ + Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR3, 100, 80, 0, 0, 0, 0 }, +}) + +Name (MPPC, Package () +{ + 0x2, /* Revision */ + Package () { /* Power Limit 1 */ + 0, /* PowerLimitIndex, 0 for Power Limit 1 */ + 4500, /* PowerLimitMinimum */ + 7000, /* PowerLimitMaximum */ + 1000, /* TimeWindowMinimum */ + 1000, /* TimeWindowMaximum */ + 200 /* StepSize */ + }, + Package () { /* Power Limit 2 */ + 1, /* PowerLimitIndex, 1 for Power Limit 2 */ + 15000, /* PowerLimitMinimum */ + 15000, /* PowerLimitMaximum */ + 1000, /* TimeWindowMinimum */ + 1000, /* TimeWindowMaximum */ + 1000 /* StepSize */ + } +}) + +/* Include DPTF */ +#include <soc/intel/skylake/acpi/dptf/dptf.asl> -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590 Gerrit-Change-Number: 21453 Gerrit-PatchSet: 1 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com>
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Change in coreboot[master]: ifdtool: port the feature to set AltMeDisable/HAP bit here
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21437
) Change subject: ifdtool: port the feature to set AltMeDisable/HAP bit here ...................................................................... Patch Set 4: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15323/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/60083/
: SUCCESS -- To view, visit
https://review.coreboot.org/21437
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9a2ecc60cfbb9ee9d96f15be3d53226cb428729a Gerrit-Change-Number: 21437 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 09:28:03 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: optimize some code and data types
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21288
) Change subject: ifdtool: optimize some code and data types ...................................................................... Patch Set 28: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15321/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/60081/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6d05418c8b32fa31dcd038a3e56f9aefe13fa9c4 Gerrit-Change-Number: 21288 Gerrit-PatchSet: 28 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Ronald G. Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 09:27:12 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: refactor region-permission-related feature
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21416
) Change subject: ifdtool: refactor region-permission-related feature ...................................................................... Patch Set 10: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15320/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/60080/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d34606545db4d970ce3ec202da4bf4c5cbad18c Gerrit-Change-Number: 21416 Gerrit-PatchSet: 10 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Shawn Chang <citypw(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 09:24:54 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: refactor region_name(s) and new_layout
by build bot (Jenkins) (Code Review)
08 Sep '17
08 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21315
) Change subject: ifdtool: refactor region_name(s) and new_layout ...................................................................... Patch Set 19: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/15322/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/60082/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia2b92c3f835f9849a243a48c37588c2dbe7449bf Gerrit-Change-Number: 21315 Gerrit-PatchSet: 19 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Sep 2017 09:24:31 +0000 Gerrit-HasComments: No
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