coreboot-gerrit September 2017

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Change in coreboot[master]: drivers/intel/gma/vbt.c: Add GENERAL DEFINITIONS block to fake vbt
by Nico Huber (Code Review) 07 Sep '17

07 Sep '17

Nico Huber has posted comments on this change. ( https://review.coreboot.org/21448 ) Change subject: drivers/intel/gma/vbt.c: Add GENERAL DEFINITIONS block to fake vbt ...................................................................... Patch Set 1: Maybe don't add the general definitions block at all if VGADDC? Other- wise somebody should check if the incomplete general definitions block has any unwanted side effects (e.g. does LVDS still work? DP dual mode? etc.). -- To view, visit https://review.coreboot.org/21448 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5bce00d2e37d77c27cf0022c7dab3444c3699dcf Gerrit-Change-Number: 21448 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Sep 2017 21:10:01 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/stoneyridge: Update amdfw build
by build bot (Jenkins) (Code Review) 07 Sep '17

07 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21450 ) Change subject: soc/amd/stoneyridge: Update amdfw build ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15295/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60049/ : SUCCESS -- To view, visit https://review.coreboot.org/21450 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3091f8af126159488c3c398a6dc881fa05039cff Gerrit-Change-Number: 21450 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Sep 2017 20:13:11 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: amdfw: Clean up makefiles a bit more
by build bot (Jenkins) (Code Review) 07 Sep '17

07 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21451 ) Change subject: amdfw: Clean up makefiles a bit more ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15296/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60050/ : SUCCESS -- To view, visit https://review.coreboot.org/21451 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I194b4c790b3e35353d480d34b60507a00f10ef11 Gerrit-Change-Number: 21451 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Sep 2017 20:12:49 +0000 Gerrit-HasComments: No

1 0

Change in coreboot[master]: amdfw: Clean up makefiles a bit more
by Martin Roth (Code Review) 07 Sep '17

07 Sep '17

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21451 Change subject: amdfw: Clean up makefiles a bit more ...................................................................... amdfw: Clean up makefiles a bit more - Get rid of CONFIG_ prefix from variables that don't come from Kconfig. - Remove 2nd set of variables that are duplicates of the first set. - Delete duplicate set of Prerequisites Change-Id: I194b4c790b3e35353d480d34b60507a00f10ef11 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/soc/amd/stoneyridge/Makefile.inc M src/southbridge/amd/pi/hudson/Makefile.inc 2 files changed, 96 insertions(+), 126 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/21451/1 diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index ee0b489..e7ac1b8 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -105,48 +105,48 @@ FIRMWARE_TYPE=ST ###5 -CONFIG_PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key +PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key ###1 -CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin +PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin ###3 -CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin +PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin ###4 -CONFIG_PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin +PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin ###8 - Check for smu firmware named either *.sbin or *.csbin -CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin -CONFIG_SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin -ifeq ("$(wildcard $(CONFIG_SMUFWM_FILE))","") -CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin -CONFIG_SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin +SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin +SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin +ifeq ("$(wildcard $(SMUFWM_FILE))","") +SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin +SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin endif ###95 -CONFIG_SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin +SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin ###9 -CONFIG_PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key +PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key ifeq ($(CONFIG_USE_PSPSCUREOS),y) ###2 -CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin +PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin ###12 -CONFIG_PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin) +PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin) ###13 -CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin +TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin endif ###18- Check for smu firmware2 named either *.sbin or *.csbin -CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin -CONFIG_SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin -ifeq ("$(wildcard $(CONFIG_SMUFIRMWARE2_FILE))","") -CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin -CONFIG_SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin +SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin +SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin +ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","") +SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin +SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin endif add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) @@ -155,68 +155,38 @@ OPT_STONEYRIDGE_IMC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE), --imc) OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec) -CONFIG_2AMD_PUBKEY_FILE =$(CONFIG_AMD_PUBKEY_FILE) -CONFIG_2PSPBTLDR_FILE =$(CONFIG_PSPBTLDR_FILE) -CONFIG_2SMUFWM_FILE =$(CONFIG_SMUFWM_FILE) -CONFIG_2SMUFWM_FN_FILE =$(CONFIG_SMUFWM_FN_FILE) -CONFIG_2PSPRCVR_FILE =$(CONFIG_PSPRCVR_FILE) -CONFIG_2PUBSIGNEDKEY_FILE =$(CONFIG_PUBSIGNEDKEY_FILE) -CONFIG_2PSPSCUREOS_FILE =$(CONFIG_PSPSCUREOS_FILE) -CONFIG_2PSPNVRAM_FILE =$(CONFIG_PSPNVRAM_FILE) -CONFIG_2PSPSECUREDEBUG_FILE =$(CONFIG_PSPSECUREDEBUG_FILE) -CONFIG_2PSPTRUSTLETS_FILE =$(CONFIG_PSPTRUSTLETS_FILE) -CONFIG_2TRUSTLETKEY_FILE =$(CONFIG_TRUSTLETKEY_FILE) -CONFIG_2SMUFIRMWARE2_FILE =$(CONFIG_SMUFIRMWARE2_FILE) -CONFIG_2SMUFIRMWARE2_FN_FILE =$(CONFIG_SMUFIRMWARE2_FN_FILE) -CONFIG_2SMUSCS_FILE =$(CONFIG_SMUSCS_FILE) - -OPT_2AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_2AMD_PUBKEY_FILE), --pubkey2) -OPT_2PSPBTLDR_FILE=$(call add_opt_prefix, $(CONFIG_2PSPBTLDR_FILE), --bootloader2) -OPT_2SMUFWM_FILE=$(call add_opt_prefix, $(CONFIG_2SMUFWM_FILE), --smufirmware_2) -OPT_2PSPRCVR_FILE=$(call add_opt_prefix, $(CONFIG_2PSPRCVR_FILE), --recovery2) -OPT_2PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(CONFIG_2PUBSIGNEDKEY_FILE), --rtmpubkey2) -OPT_2PSPNVRAM_FILE=$(call add_opt_prefix, $(CONFIG_2PSPNVRAM_FILE), --nvram2) -OPT_2PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(CONFIG_2PSPSECUREDEBUG_FILE), --securedebug2) +OPT_2AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey2) +OPT_2PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader2) +OPT_2SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware_2) +OPT_2PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery2) +OPT_2PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey2) +OPT_2PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram2) +OPT_2PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug2) ifeq ($(CONFIG_USE_PSPSCUREOS),y) -OPT_2PSPSCUREOS_FILE=$(call add_opt_prefix, $(CONFIG_2PSPSCUREOS_FILE), --secureos2) -OPT_2PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(CONFIG_2PSPTRUSTLETS_FILE), --trustlets2) -OPT_2TRUSTLETKEY_FILE=$(call add_opt_prefix, $(CONFIG_2TRUSTLETKEY_FILE), --trustletkey2) +OPT_2PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos2) +OPT_2PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets2) +OPT_2TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey2) endif -OPT_2SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(CONFIG_2SMUFIRMWARE2_FILE), --smufirmware2_2) -OPT_2SMUSCS_FILE=$(call add_opt_prefix, $(CONFIG_2SMUSCS_FILE), --smuscs2) -OPT_2SMUFWM_FN_FILE=$(call add_opt_prefix, $(CONFIG_2SMUFWM_FN_FILE), --smufnfirmware_2) -OPT_2SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(CONFIG_2SMUFIRMWARE2_FN_FILE), --smufnfirmware2_2) +OPT_2SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2_2) +OPT_2SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs2) +OPT_2SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --smufnfirmware_2) +OPT_2SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --smufnfirmware2_2) $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_PUBSIGNEDKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPBTLDR_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPRCVR_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPNVRAM_FILE)) \ - $(call strip_quotes, $(CONFIG_SMUFWM_FILE)) \ - $(call strip_quotes, $(CONFIG_SMUSCS_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPSECUREDEBUG_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(CONFIG_TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_SMUFIRMWARE2_FILE)) \ - $(call strip_quotes, $(CONFIG_2AMD_PUBKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_2PUBSIGNEDKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPBTLDR_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFWM_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFWM_FN_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPRCVR_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPNVRAM_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUSCS_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPSECUREDEBUG_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(CONFIG_2TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFIRMWARE2_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFIRMWARE2_FN_FILE)) \ + $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \ + $(call strip_quotes, $(PSPBTLDR_FILE)) \ + $(call strip_quotes, $(PSPRCVR_FILE)) \ + $(call strip_quotes, $(PSPSCUREOS_FILE)) \ + $(call strip_quotes, $(PSPNVRAM_FILE)) \ + $(call strip_quotes, $(SMUFWM_FILE)) \ + $(call strip_quotes, $(SMUSCS_FILE)) \ + $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \ + $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \ + $(call strip_quotes, $(TRUSTLETKEY_FILE)) \ $(AMDFWTOOL) rm -f $@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index e1d164f..251cb6c 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -89,58 +89,58 @@ endif ###5 -CONFIG_PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key +PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key ###1 ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) -CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader$(FIRMWARE_TYPE).Bypass.sbin +PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader$(FIRMWARE_TYPE).Bypass.sbin else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y) -CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin +PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin endif ###3 ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) -CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecovery$(FIRMWARE_TYPE).sbin +PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecovery$(FIRMWARE_TYPE).sbin else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y) -CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin +PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin endif ###2 ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) -CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs$(FIRMWARE_TYPE).sbin +PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs$(FIRMWARE_TYPE).sbin else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y) -CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin +PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin endif ###4 -CONFIG_PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin +PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin ###8 -CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin -CONFIG_SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin +SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin +SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin ###95 -CONFIG_SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin +SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin ###9 -CONFIG_PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key +PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key ###12 ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) -CONFIG_PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/trustlets.bin +PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/trustlets.bin else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y) -CONFIG_PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspTrustlets_prod_$(FIRMWARE_TYPE).cbin +PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspTrustlets_prod_$(FIRMWARE_TYPE).cbin endif ###13 ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) -CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/Trustlet.tkn.cert +TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/Trustlet.tkn.cert else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y) -CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin +TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin endif ###18 ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y) -CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin +SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin endif endif @@ -152,47 +152,47 @@ OPT_HUDSON_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_HUDSON_GEC_FWM_FILEddd), --gec) OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey) -OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(CONFIG_PSPBTLDR_FILE), --bootloader) -OPT_SMUFWM_FILE=$(call add_opt_prefix, $(CONFIG_SMUFWM_FILE), --smufirmware) -OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(CONFIG_PSPRCVR_FILE), --recovery) -OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(CONFIG_PUBSIGNEDKEY_FILE), --rtmpubkey) -OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(CONFIG_PSPSCUREOS_FILE), --secureos) -OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(CONFIG_PSPNVRAM_FILE), --nvram) -OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(CONFIG_PSPSECUREDEBUG_FILE), --securedebug) -OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(CONFIG_PSPTRUSTLETS_FILE), --trustlets) -OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(CONFIG_TRUSTLETKEY_FILE), --trustletkey) -OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(CONFIG_SMUFIRMWARE2_FILE), --smufirmware2) -OPT_SMUSCS_FILE=$(call add_opt_prefix, $(CONFIG_SMUSCS_FILE), --smuscs) +OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader) +OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware) +OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery) +OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey) +OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos) +OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram) +OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug) +OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets) +OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey) +OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2) +OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs) $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_PUBSIGNEDKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPBTLDR_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPRCVR_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPNVRAM_FILE)) \ - $(call strip_quotes, $(CONFIG_SMUFWM_FILE)) \ - $(call strip_quotes, $(CONFIG_SMUSCS_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPSECUREDEBUG_FILE)) \ - $(call strip_quotes, $(CONFIG_PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(CONFIG_TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_SMUFIRMWARE2_FILE)) \ - $(call strip_quotes, $(CONFIG_2AMD_PUBKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_2PUBSIGNEDKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPBTLDR_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFWM_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFWM_FN_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPRCVR_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPNVRAM_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUSCS_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPSECUREDEBUG_FILE)) \ - $(call strip_quotes, $(CONFIG_2PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(CONFIG_2TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFIRMWARE2_FILE)) \ - $(call strip_quotes, $(CONFIG_2SMUFIRMWARE2_FN_FILE)) \ + $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \ + $(call strip_quotes, $(PSPBTLDR_FILE)) \ + $(call strip_quotes, $(PSPRCVR_FILE)) \ + $(call strip_quotes, $(PSPSCUREOS_FILE)) \ + $(call strip_quotes, $(PSPNVRAM_FILE)) \ + $(call strip_quotes, $(SMUFWM_FILE)) \ + $(call strip_quotes, $(SMUSCS_FILE)) \ + $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \ + $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \ + $(call strip_quotes, $(TRUSTLETKEY_FILE)) \ + $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \ + $(call strip_quotes, $(AMD_PUBKEY2_FILE)) \ + $(call strip_quotes, $(PUBSIGNEDKEY2_FILE)) \ + $(call strip_quotes, $(PSPBTLDR2_FILE)) \ + $(call strip_quotes, $(SMUFWM2_FILE)) \ + $(call strip_quotes, $(SMUFWM2_FN_FILE)) \ + $(call strip_quotes, $(PSPRCVR2_FILE)) \ + $(call strip_quotes, $(PSPSCUREOS2_FILE)) \ + $(call strip_quotes, $(PSPNVRAM2_FILE)) \ + $(call strip_quotes, $(SMUSCS2_FILE)) \ + $(call strip_quotes, $(PSPSECUREDEBUG2_FILE)) \ + $(call strip_quotes, $(PSPTRUSTLETS2_FILE)) \ + $(call strip_quotes, $(TRUSTLETKEY2_FILE)) \ + $(call strip_quotes, $(SMUFIRMWARE2_2_FILE)) \ + $(call strip_quotes, $(SMUFIRMWARE2_2_FN_FILE)) \ $(AMDFWTOOL) rm -f $@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" -- To view, visit https://review.coreboot.org/21451 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I194b4c790b3e35353d480d34b60507a00f10ef11 Gerrit-Change-Number: 21451 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: soc/amd/stoneyridge: Update amdfw build
by Martin Roth (Code Review) 07 Sep '17

07 Sep '17

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21450 Change subject: soc/amd/stoneyridge: Update amdfw build ...................................................................... soc/amd/stoneyridge: Update amdfw build - The SMU firmware used to be named *.sbin, now is named *.csbin. Update the makefile so that the files can be named as they are delivered and don't have to be renamed. - Add a Kconfig option to allow the secure os binaries to be excluded. BUG=b:64932297 TEST=Build with old and new firmware, verify file sizes. Change-Id: I3091f8af126159488c3c398a6dc881fa05039cff Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc 2 files changed, 28 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/21450/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 58500a6..08613fe 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -296,4 +296,13 @@ string default "\\_PR.P%03d" +config USE_PSPSCUREOS + bool "Include PSP SecureOS blobs in AMD firmware" + default y + help + Include the PspSecureOs, PspTrustlet and TrustletKey binaries + in the amdfw section. + + If unsure, answer 'y' + endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 8fa5afb..ee0b489 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -113,15 +113,16 @@ ###3 CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin -###2 -CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin - ###4 CONFIG_PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin -###8 +###8 - Check for smu firmware named either *.sbin or *.csbin +CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin +CONFIG_SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin +ifeq ("$(wildcard $(CONFIG_SMUFWM_FILE))","") CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin CONFIG_SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin +endif ###95 CONFIG_SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin @@ -129,15 +130,24 @@ ###9 CONFIG_PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key +ifeq ($(CONFIG_USE_PSPSCUREOS),y) +###2 +CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin + ###12 -CONFIG_PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspTrustlets_prod_$(FIRMWARE_TYPE).cbin +CONFIG_PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin) ###13 CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin +endif -###18 +###18- Check for smu firmware2 named either *.sbin or *.csbin +CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin +CONFIG_SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin +ifeq ("$(wildcard $(CONFIG_SMUFIRMWARE2_FILE))","") CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin CONFIG_SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin +endif add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) @@ -165,11 +175,13 @@ OPT_2SMUFWM_FILE=$(call add_opt_prefix, $(CONFIG_2SMUFWM_FILE), --smufirmware_2) OPT_2PSPRCVR_FILE=$(call add_opt_prefix, $(CONFIG_2PSPRCVR_FILE), --recovery2) OPT_2PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(CONFIG_2PUBSIGNEDKEY_FILE), --rtmpubkey2) -OPT_2PSPSCUREOS_FILE=$(call add_opt_prefix, $(CONFIG_2PSPSCUREOS_FILE), --secureos2) OPT_2PSPNVRAM_FILE=$(call add_opt_prefix, $(CONFIG_2PSPNVRAM_FILE), --nvram2) OPT_2PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(CONFIG_2PSPSECUREDEBUG_FILE), --securedebug2) +ifeq ($(CONFIG_USE_PSPSCUREOS),y) +OPT_2PSPSCUREOS_FILE=$(call add_opt_prefix, $(CONFIG_2PSPSCUREOS_FILE), --secureos2) OPT_2PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(CONFIG_2PSPTRUSTLETS_FILE), --trustlets2) OPT_2TRUSTLETKEY_FILE=$(call add_opt_prefix, $(CONFIG_2TRUSTLETKEY_FILE), --trustletkey2) +endif OPT_2SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(CONFIG_2SMUFIRMWARE2_FILE), --smufirmware2_2) OPT_2SMUSCS_FILE=$(call add_opt_prefix, $(CONFIG_2SMUSCS_FILE), --smuscs2) OPT_2SMUFWM_FN_FILE=$(call add_opt_prefix, $(CONFIG_2SMUFWM_FN_FILE), --smufnfirmware_2) -- To view, visit https://review.coreboot.org/21450 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3091f8af126159488c3c398a6dc881fa05039cff Gerrit-Change-Number: 21450 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: soc/intel/skylake: Enable common LPC IP
by build bot (Jenkins) (Code Review) 07 Sep '17

07 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20120 ) Change subject: soc/intel/skylake: Enable common LPC IP ...................................................................... Patch Set 8: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/60047/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/15293/ : SUCCESS -- To view, visit https://review.coreboot.org/20120 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I042e459fb7c07f024a7f6a5fe7da13eb5f0dd688 Gerrit-Change-Number: 20120 Gerrit-PatchSet: 8 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Sep 2017 19:36:59 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/skylake:Fix SPI WP disable status check
by build bot (Jenkins) (Code Review) 07 Sep '17

07 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21449 ) Change subject: soc/intel/skylake:Fix SPI WP disable status check ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/60048/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/15294/ : SUCCESS -- To view, visit https://review.coreboot.org/21449 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie79fb4e3e92a4ae777c5d501abbb44a732a9862a Gerrit-Change-Number: 21449 Gerrit-PatchSet: 1 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Sep 2017 19:31:24 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/skylake:Fix SPI WP disable status check
by Ravishankar Sarawadi (Code Review) 07 Sep '17

07 Sep '17

Ravishankar Sarawadi has uploaded this change for review. ( https://review.coreboot.org/21449 Change subject: soc/intel/skylake:Fix SPI WP disable status check ...................................................................... soc/intel/skylake:Fix SPI WP disable status check Use FST SPI write protect disable bit from BIOS_CONTROL register to check write protect status. Change-Id: Ie79fb4e3e92a4ae777c5d501abbb44a732a9862a Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> --- M src/soc/intel/common/block/fast_spi/fast_spi.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h M src/soc/intel/skylake/smihandler.c 3 files changed, 28 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/21449/1 diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 078e0ae..87cafb9 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -274,3 +274,21 @@ /* Initialize SPI to allow BIOS to write/erase on flash. */ fast_spi_init(); } + +/* Read SPI Write Protect disable status. */ +bool fast_spi_wpd_status(void) +{ + return pci_read_config16(PCH_DEV_SPI, SPIBAR_BIOS_CONTROL) & + SPIBAR_BIOS_CONTROL_WPD; +} + +/* Enable SPI Write Protect. */ +void fast_spi_enable_wp(void) +{ + device_t dev = PCH_DEV_SPI; + uint8_t bios_cntl; + + bios_cntl = pci_read_config8(dev, SPIBAR_BIOS_CONTROL); + bios_cntl &= ~SPIBAR_BIOS_CONTROL_WPD; + pci_write_config8(dev, SPIBAR_BIOS_CONTROL, bios_cntl); +} diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index 086143b..6499ca5 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -74,11 +74,18 @@ * Caching. */ void fast_spi_early_init(uintptr_t spi_base_address); - /* * Fast SPI flash controller structure to allow SoCs to define bus-controller * mapping. */ extern const struct spi_ctrlr fast_spi_flash_ctrlr; +/* + * Read SPI Write protect disable bit. + */ +bool fast_spi_wpd_status(void); +/* + * Enable SPI Write protect. + */ +void fast_spi_enable_wp(void); #endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */ diff --git a/src/soc/intel/skylake/smihandler.c b/src/soc/intel/skylake/smihandler.c index 3e79065..7409ed7 100644 --- a/src/soc/intel/skylake/smihandler.c +++ b/src/soc/intel/skylake/smihandler.c @@ -31,7 +31,6 @@ #include <pc80/mc146818rtc.h> #include <spi-generic.h> #include <soc/iomap.h> -#include <soc/lpc.h> #include <soc/nvs.h> #include <soc/pci_devs.h> #include <soc/pch.h> @@ -403,9 +402,7 @@ return; if (tco_sts & (1 << 8)) { /* BIOSWR */ - u8 bios_cntl = pci_read_config16(PCH_DEV_SPI, BIOS_CNTL); - - if (bios_cntl & 1) { + if (fast_spi_wpd_status()) { /* * BWE is RW, so the SMI was caused by a * write to BWE, not by a write to the BIOS @@ -417,8 +414,7 @@ * box. */ printk(BIOS_DEBUG, "Switching back to RO\n"); - pci_write_config32(PCH_DEV_SPI, BIOS_CNTL, - (bios_cntl & ~1)); + fast_spi_enable_wp(); } /* No else for now? */ } else if (tco_sts & (1 << 3)) { /* TIMEOUT */ /* Handle TCO timeout */ -- To view, visit https://review.coreboot.org/21449 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie79fb4e3e92a4ae777c5d501abbb44a732a9862a Gerrit-Change-Number: 21449 Gerrit-PatchSet: 1 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com>

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Change in coreboot[master]: drivers/intel/gma/vbt.c: Add GENERAL DEFINITIONS block to fake vbt
by build bot (Jenkins) (Code Review) 07 Sep '17

07 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21448 ) Change subject: drivers/intel/gma/vbt.c: Add GENERAL DEFINITIONS block to fake vbt ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15292/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60046/ : SUCCESS -- To view, visit https://review.coreboot.org/21448 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5bce00d2e37d77c27cf0022c7dab3444c3699dcf Gerrit-Change-Number: 21448 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Sep 2017 18:50:00 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: drivers/intel/gma/vbt.c: Add GENERAL DEFINITIONS block to fake vbt
by Arthur Heymans (Code Review) 07 Sep '17

07 Sep '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21448 Change subject: drivers/intel/gma/vbt.c: Add GENERAL DEFINITIONS block to fake vbt ...................................................................... drivers/intel/gma/vbt.c: Add GENERAL DEFINITIONS block to fake vbt This is needed for Linux (at least 4.12) to know on which DDC gmbus to probe for VGA edid. TESTED on dg43gt: Use NGI with a payload like grub that doesn't override VBT (seavgabios) with a DVI-I to VGA adapter and observe that Linux can properly modeset the display. Change-Id: I5bce00d2e37d77c27cf0022c7dab3444c3699dcf Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/intel/gma/vbt.c 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/21448/1 diff --git a/src/drivers/intel/gma/vbt.c b/src/drivers/intel/gma/vbt.c index c908eb4..ffb56e9 100644 --- a/src/drivers/intel/gma/vbt.c +++ b/src/drivers/intel/gma/vbt.c @@ -69,6 +69,21 @@ ptr += sizeof (*genfeat); + *ptr++ = BDB_GENERAL_DEFINITIONS; + *ptr++ = sizeof(struct bdb_general_definitions); + *ptr++ = sizeof(struct bdb_general_definitions) >> 8; + struct bdb_general_definitions *const gendef = + (struct bdb_general_definitions *)ptr; + if (IS_ENABLED(CONFIG_GFX_GMA_ANALOG_I2C_HDMI_B)) + gendef->crt_ddc_gmbus_pin = GMBUS_PORT_DPB; + else if (IS_ENABLED(CONFIG_GFX_GMA_ANALOG_I2C_HDMI_C)) + gendef->crt_ddc_gmbus_pin = GMBUS_PORT_DPC; + else if (IS_ENABLED(CONFIG_GFX_GMA_ANALOG_I2C_HDMI_D)) + gendef->crt_ddc_gmbus_pin = GMBUS_PORT_DPD; + else + gendef->crt_ddc_gmbus_pin = GMBUS_PORT_VGADDC; + ptr += sizeof(*gendef); + bdb_head->bdb_size = ptr - (u8 *)bdb_head; head->vbt_size = ptr - (u8 *)head; head->vbt_checksum = 0; -- To view, visit https://review.coreboot.org/21448 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I5bce00d2e37d77c27cf0022c7dab3444c3699dcf Gerrit-Change-Number: 21448 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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coreboot-gerrit September 2017