coreboot-gerrit August 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
by Bill XIE (Code Review) 25 Aug '17

25 Aug '17

Hello Arthur Heymans, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/21178 to look at the new patch set (#3). Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports ...................................................................... sb/intel/bd82x6x: make hotplug map consistent to remapped ports "pcie_port_coalesce" will cause pcie being remapped under certain conditions, but flags within "pcie_hotplug_map" should be updated along with ports. Test on my lenovo t430s. Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad Signed-off-by: Bill XIE <persmule(a)gmail.com> --- M src/southbridge/intel/bd82x6x/pch.c 1 file changed, 28 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/21178/3 -- To view, visit https://review.coreboot.org/21178 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad Gerrit-Change-Number: 21178 Gerrit-PatchSet: 3 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
by Arthur Heymans (Code Review) 25 Aug '17

25 Aug '17

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/21178 ) Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports ...................................................................... Patch Set 2: (3 comments) https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c File src/southbridge/intel/bd82x6x/pch.c: https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c… PS2, Line 266: struct southbridge_intel_bd82x6x_config *config = NULL; : u8 *old_hotplug_map = NULL; you could initialise them here instead of in the loop? https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c… PS2, Line 286: config = dev->chip_info; : old_hotplug_map = config->pcie_hotplug_map; doesn't need to be in the loop? you might want to check if config is NULL https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c… PS2, Line 297: ( no need for parentheses. -- To view, visit https://review.coreboot.org/21178 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad Gerrit-Change-Number: 21178 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 14:51:01 +0000 Gerrit-HasComments: Yes

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Change in coreboot[master]: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
by build bot (Jenkins) (Code Review) 25 Aug '17

25 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21178 ) Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/59308/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/14634/ : SUCCESS -- To view, visit https://review.coreboot.org/21178 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad Gerrit-Change-Number: 21178 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 14:45:47 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
by Bill XIE (Code Review) 25 Aug '17

25 Aug '17

Hello Arthur Heymans, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/21178 to look at the new patch set (#2). Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports ...................................................................... sb/intel/bd82x6x: make hotplug map consistent to remapped ports "pcie_port_coalesce" will cause pcie being remapped under certain conditions, but flags within "pcie_hotplug_map" should be updated along with ports. Test on my lenovo t430s. Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad Signed-off-by: Bill XIE <persmule(a)gmail.com> --- M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/fsp_bd82x6x/pch.c 2 files changed, 42 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/21178/2 -- To view, visit https://review.coreboot.org/21178 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad Gerrit-Change-Number: 21178 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: Fix build with CLANG, avoid GCC only CFLAGS
by build bot (Jenkins) (Code Review) 25 Aug '17

25 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21202 ) Change subject: Fix build with CLANG, avoid GCC only CFLAGS ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14633/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59307/ : SUCCESS -- To view, visit https://review.coreboot.org/21202 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie0250e285b0c5a9f8ee2eb99401aeca875d2789a Gerrit-Change-Number: 21202 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 13:58:32 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Fix build with CLANG, avoid GCC only CFLAGS
by Arthur Heymans (Code Review) 25 Aug '17

25 Aug '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21202 Change subject: Fix build with CLANG, avoid GCC only CFLAGS ...................................................................... Fix build with CLANG, avoid GCC only CFLAGS Commit 7c8d331fbb "Fine-tune compiler flags" added CFLAGS that are not existing on CLANG hence breaking building coreboot with clang. Change-Id: Ie0250e285b0c5a9f8ee2eb99401aeca875d2789a Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/21202/1 diff --git a/Makefile.inc b/Makefile.inc index 679e0ac..ca9711d 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -363,7 +363,9 @@ CFLAGS_common += -Wstrict-aliasing -Wshadow -Wdate-time CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer CFLAGS_common += -ffunction-sections -fdata-sections -fno-pie +ifeq ($(CONFIG_COMPILER_GCC),y) CFLAGS_common += -fno-delete-null-pointer-checks -fconserve-stack +endif ADAFLAGS_common += -gnatg -gnatp ADAFLAGS_common += -Wuninitialized -Wall -Werror -- To view, visit https://review.coreboot.org/21202 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie0250e285b0c5a9f8ee2eb99401aeca875d2789a Gerrit-Change-Number: 21202 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: drivers/i2c/ck505: Add generic driver to configure clockgen
by build bot (Jenkins) (Code Review) 25 Aug '17

25 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20042 ) Change subject: drivers/i2c/ck505: Add generic driver to configure clockgen ...................................................................... Patch Set 16: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14629/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59303/ : SUCCESS -- To view, visit https://review.coreboot.org/20042 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie43c4de7891a39f2f443e78213ecd688134e68d7 Gerrit-Change-Number: 20042 Gerrit-PatchSet: 16 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Korolyov <andrey(a)xdel.ru> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Swift Geek <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 08:18:31 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: drivers/i2c/ck505: Add generic driver to configure clockgen
by build bot (Jenkins) (Code Review) 25 Aug '17

25 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20042 ) Change subject: drivers/i2c/ck505: Add generic driver to configure clockgen ...................................................................... Patch Set 15: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/59292/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/14618/ : SUCCESS -- To view, visit https://review.coreboot.org/20042 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie43c4de7891a39f2f443e78213ecd688134e68d7 Gerrit-Change-Number: 20042 Gerrit-PatchSet: 15 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Korolyov <andrey(a)xdel.ru> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Swift Geek <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:56:17 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/skylake: Remove ABASE lock down programming
by build bot (Jenkins) (Code Review) 25 Aug '17

25 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21201 ) Change subject: soc/intel/skylake: Remove ABASE lock down programming ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14628/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59302/ : SUCCESS -- To view, visit https://review.coreboot.org/21201 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I800e654c7d8dc55cc0e8299501c1f85c57882e9d Gerrit-Change-Number: 21201 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:54:19 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: drivers/intel/fsp2_0: Link Post PCI enumeration Notify with BS_DEV_EN...
by build bot (Jenkins) (Code Review) 25 Aug '17

25 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21084 ) Change subject: drivers/intel/fsp2_0: Link Post PCI enumeration Notify with BS_DEV_ENABLE ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14627/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59301/ : SUCCESS -- To view, visit https://review.coreboot.org/21084 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4cb4eac5256c1ce98f51adad0be6e69f7d05d8e1 Gerrit-Change-Number: 21084 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Kin Wai Ng <kin.wai.ng(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:52:37 +0000 Gerrit-HasComments: No

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coreboot-gerrit August 2017