Keith Hui has uploaded this change for review. ( https://review.coreboot.org/21203
Change subject: nb/intel/i440bx/debug.c: Bugfix and cleanup
......................................................................
nb/intel/i440bx/debug.c: Bugfix and cleanup
Fix dump_pci_device() broken in commit 65b72ab5 (Drop print_ implementation
from non-romcc boards) in 2015 (!) where only one in 16 bytes were being
dumped.
Also remove the #if redundant after commit aef8542 (Compile debug.c only if
CONFIG_DEBUG_RAM_SETUP) as this whole file is only compiled in that case.
Change-Id: I60e272b29417039feb15540e49d7300f86e5ed21
Signed-off-by: Keith Hui <buurin(a)gmail.com>
---
M src/northbridge/intel/i440bx/debug.c
1 file changed, 2 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/21203/1
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index c69725b..a1822e1 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -5,7 +5,6 @@
#include <spd.h>
#include <console/console.h>
-#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP)
void dump_spd_registers(void)
{
int i;
@@ -44,9 +43,9 @@
unsigned char val;
val = pci_read_config8(dev, i);
if ((i & 0x0f) == 0)
- printk(BIOS_DEBUG, "%02x: %02x", i, val);
+ printk(BIOS_DEBUG, "%02x:", i);
+ printk(BIOS_DEBUG, " %02x", val);
if ((i & 0x0f) == 0x0f)
printk(BIOS_DEBUG, "\n");
}
}
-#endif
--
To view, visit https://review.coreboot.org/21203
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I60e272b29417039feb15540e49d7300f86e5ed21
Gerrit-Change-Number: 21203
Gerrit-PatchSet: 1
Gerrit-Owner: Keith Hui <buurin(a)gmail.com>
Nico Huber has posted comments on this change. ( https://review.coreboot.org/21178 )
Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/21178/4/src/southbridge/intel/bd82x6x/pch.c
File src/southbridge/intel/bd82x6x/pch.c:
https://review.coreboot.org/#/c/21178/4/src/southbridge/intel/bd82x6x/pch.c…
PS4, Line 312: old_hotplug_map
Using `config->pcie_hotplug_map` here instead would make it more
clear, IMHO (e.g. you don't need the implicit information where
`old_hotplug_map` points to, to see what is going on).
(The comment doesn't help to see that either.)
https://review.coreboot.org/#/c/21178/4/src/southbridge/intel/bd82x6x/pch.c…
PS4, Line 419: pch_pcie_devicetree_update();
If you pass `config` here, you can probably drop all the if's above.
--
To view, visit https://review.coreboot.org/21178
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad
Gerrit-Change-Number: 21178
Gerrit-PatchSet: 4
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Fri, 25 Aug 2017 16:58:29 +0000
Gerrit-HasComments: Yes
Bill XIE has posted comments on this change. ( https://review.coreboot.org/21178 )
Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c
File src/southbridge/intel/bd82x6x/pch.c:
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c…
PS2, Line 266: struct southbridge_intel_bd82x6x_config *config = NULL;
: u8 *old_hotplug_map = NULL;
> my bad. I did not see that dev is uninitialised here..
this time these two pointers will be initialized only once.
--
To view, visit https://review.coreboot.org/21178
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad
Gerrit-Change-Number: 21178
Gerrit-PatchSet: 4
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Fri, 25 Aug 2017 15:42:20 +0000
Gerrit-HasComments: Yes
Hello Arthur Heymans, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21178
to look at the new patch set (#4).
Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
......................................................................
sb/intel/bd82x6x: make hotplug map consistent to remapped ports
"pcie_port_coalesce" will cause pcie being remapped under certain
conditions, but flags within "pcie_hotplug_map" should be updated
along with ports.
Test on my lenovo t430s.
Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad
Signed-off-by: Bill XIE <persmule(a)gmail.com>
---
M src/southbridge/intel/bd82x6x/pch.c
1 file changed, 28 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/21178/4
--
To view, visit https://review.coreboot.org/21178
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad
Gerrit-Change-Number: 21178
Gerrit-PatchSet: 4
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/21178 )
Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c
File src/southbridge/intel/bd82x6x/pch.c:
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c…
PS2, Line 266: struct southbridge_intel_bd82x6x_config *config = NULL;
: u8 *old_hotplug_map = NULL;
> and the last memcpy out of the loop need access to old_hotplug_map.
my bad. I did not see that dev is uninitialised here..
--
To view, visit https://review.coreboot.org/21178
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad
Gerrit-Change-Number: 21178
Gerrit-PatchSet: 3
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Fri, 25 Aug 2017 15:27:08 +0000
Gerrit-HasComments: Yes
Bill XIE has posted comments on this change. ( https://review.coreboot.org/21178 )
Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c
File src/southbridge/intel/bd82x6x/pch.c:
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c…
PS2, Line 266: struct southbridge_intel_bd82x6x_config *config = NULL;
: u8 *old_hotplug_map = NULL;
> you could initialise them here instead of in the loop?
and the last memcpy out of the loop need access to old_hotplug_map.
--
To view, visit https://review.coreboot.org/21178
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad
Gerrit-Change-Number: 21178
Gerrit-PatchSet: 3
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Fri, 25 Aug 2017 15:15:28 +0000
Gerrit-HasComments: Yes
Bill XIE has posted comments on this change. ( https://review.coreboot.org/21178 )
Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c
File src/southbridge/intel/bd82x6x/pch.c:
https://review.coreboot.org/#/c/21178/2/src/southbridge/intel/bd82x6x/pch.c…
PS2, Line 266: struct southbridge_intel_bd82x6x_config *config = NULL;
: u8 *old_hotplug_map = NULL;
> you could initialise them here instead of in the loop?
for I have to get access to sizeof(config->pcie_hotplug_map) in order to define new_hotplug_map.
--
To view, visit https://review.coreboot.org/21178
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad
Gerrit-Change-Number: 21178
Gerrit-PatchSet: 3
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Fri, 25 Aug 2017 15:13:19 +0000
Gerrit-HasComments: Yes