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coreboot-gerrit
August 2017
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Change in coreboot[master]: soc/intel/skylake: Move SPI lock down config after resource allocation
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21064
) Change subject: soc/intel/skylake: Move SPI lock down config after resource allocation ...................................................................... Patch Set 7: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14626/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59300/
: SUCCESS -- To view, visit
https://review.coreboot.org/21064
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8f5a952656e51d3bf365917b90d3056b46f899c5 Gerrit-Change-Number: 21064 Gerrit-PatchSet: 7 Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:50:30 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/common: Add function to DLOCK PR registers
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21063
) Change subject: soc/intel/common: Add function to DLOCK PR registers ...................................................................... Patch Set 7: Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14625/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59299/
: SUCCESS -- To view, visit
https://review.coreboot.org/21063
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I46e1948315ea9489932efdf7d60d6d78ab3948a6 Gerrit-Change-Number: 21063 Gerrit-PatchSet: 7 Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:49:35 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/skylake: Move PMC lock down config after resource allocation
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21029
) Change subject: soc/intel/skylake: Move PMC lock down config after resource allocation ...................................................................... Patch Set 9: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14622/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59296/
: SUCCESS -- To view, visit
https://review.coreboot.org/21029
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibd86a38fa78752ce007da63a9ccdd991ca21ab92 Gerrit-Change-Number: 21029 Gerrit-PatchSet: 9 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:48:11 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/skylake: Remove TCO lock down programming
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21031
) Change subject: soc/intel/skylake: Remove TCO lock down programming ...................................................................... Patch Set 8: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14624/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59298/
: SUCCESS -- To view, visit
https://review.coreboot.org/21031
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iec9e3075df01862f8558b303a458126c68202bff Gerrit-Change-Number: 21031 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:46:14 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/skylake: Move DMI lock down config after resource allocation
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21030
) Change subject: soc/intel/skylake: Move DMI lock down config after resource allocation ...................................................................... Patch Set 8: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14623/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59297/
: SUCCESS -- To view, visit
https://review.coreboot.org/21030
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie66701d5bd8c8f389e23fb30c8595dd83cf6b1ae Gerrit-Change-Number: 21030 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:43:02 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/skylake: Move LPC lock down config after resource allocation
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21000
) Change subject: soc/intel/skylake: Move LPC lock down config after resource allocation ...................................................................... Patch Set 11: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14621/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59295/
: SUCCESS -- To view, visit
https://review.coreboot.org/21000
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I705a3a3c6ddc72ae7895419442d67b82f541edee Gerrit-Change-Number: 21000 Gerrit-PatchSet: 11 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:40:43 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/common: Move update_mrc_cache after BS_DEV_ENUMERATE
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21028
) Change subject: soc/intel/common: Move update_mrc_cache after BS_DEV_ENUMERATE ...................................................................... Patch Set 10: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14620/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59294/
: SUCCESS -- To view, visit
https://review.coreboot.org/21028
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8ee26b5cc70433438cf4e45e707b8a54f89cf9b0 Gerrit-Change-Number: 21028 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kin Wai Ng <kin.wai.ng(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:39:27 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/skylake: Add LPC and SPI lock down config option
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21068
) Change subject: soc/intel/skylake: Add LPC and SPI lock down config option ...................................................................... Patch Set 8: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14619/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59293/
: SUCCESS -- To view, visit
https://review.coreboot.org/21068
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If174915b4d0c581f36b54b2b8cd970a93c6454bc Gerrit-Change-Number: 21068 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:37:12 +0000 Gerrit-HasComments: No
1
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Change in coreboot[master]: google/Bruce: Add Raydium touch screen support
by build bot (Jenkins) (Code Review)
25 Aug '17
25 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21200
) Change subject: google/Bruce: Add Raydium touch screen support ...................................................................... Patch Set 4: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/59291/
: SUCCESS -- To view, visit
https://review.coreboot.org/21200
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ifb63f3a7f6c7f2fd1ccb17204dcda73a2ade495c Gerrit-Change-Number: 21200 Gerrit-PatchSet: 4 Gerrit-Owner: Pan Sheng-Liang <sl.pan.quantw(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Chen <Tim-Chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 25 Aug 2017 07:34:33 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/skylake: Remove ABASE lock down programming
by Subrata Banik (Code Review)
25 Aug '17
25 Aug '17
Subrata Banik has uploaded this change for review. (
https://review.coreboot.org/21201
Change subject: soc/intel/skylake: Remove ABASE lock down programming ...................................................................... soc/intel/skylake: Remove ABASE lock down programming FSP is doing PMC ABASE lock inside Post PCI bus enumeration NotifyPhase(). Hence remove ABASE Lock down programming from coreboot. TEST= Ensure GEN_PMCON_B offset 0xA4 bit 17, 18 is set. Change-Id: I800e654c7d8dc55cc0e8299501c1f85c57882e9d Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/skylake/finalize.c 1 file changed, 1 insertion(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/21201/1 diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index a793e95..2fb37ca 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -126,12 +126,6 @@ tcocnt |= TCO_LOCK; outw(tcocnt, tcobase + TCO1_CNT); - /* Lock down ABASE and sleep stretching policy */ - dev = PCH_DEV_PMC; - reg32 = pci_read_config32(dev, GEN_PMCON_B); - reg32 |= (SLP_STR_POL_LOCK | ACPI_BASE_LOCK); - pci_write_config32(dev, GEN_PMCON_B, reg32); - /* PMSYNC */ pmcbase = pmc_mmio_regs(); pmsyncreg = read32(pmcbase + PMSYNC_TPR_CFG); @@ -141,7 +135,7 @@ /* Display me status before we hide it */ intel_me_status(); - /* we should disable Heci1 based on the devicetree policy */ + dev = PCH_DEV_PMC; config = dev->chip_info; /* -- To view, visit
https://review.coreboot.org/21201
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I800e654c7d8dc55cc0e8299501c1f85c57882e9d Gerrit-Change-Number: 21201 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com>
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