Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21223
to look at the new patch set (#2).
Change subject: ec/lenovo/h8/acpi/thermal: Add support for passive cooling
......................................................................
ec/lenovo/h8/acpi/thermal: Add support for passive cooling
The ACPI spec requires _TSP, _TC1, _TC2 and _PSL for passive cooling.
_TSP already has been added in a previous commit.
Copy the coefficients used on google devices to activate the feature and add
_PSL for SandyBridge, IvyBridge and IbexPeak based Thinkpads.
On older Thinkpads the PPKG method needs to be implemented first.
Tested on Lenovo T430:
The CPU is throttled once the passive threshold has been reached.
Change-Id: I922923a9029de77158988ac254bab4aad9536935
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
---
M src/ec/lenovo/h8/acpi/thermal.asl
1 file changed, 30 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/21223/2
--
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To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I922923a9029de77158988ac254bab4aad9536935
Gerrit-Change-Number: 21223
Gerrit-PatchSet: 2
Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21224
Change subject: soc/intel/skylake: Fix FSP1.1 booting issue with HW based dram top calculation
......................................................................
soc/intel/skylake: Fix FSP1.1 booting issue with HW based dram top calculation
This patch ensures skylake device using FSP1.1 can use HW based
DRAM top calculation which was broken due to skylake fsp1.1 not
honoring any UPD to know PRMMR size and default reserving 1MB for PRMRR size.
This WA is not needed for FSP2.0 implementation due to
PrmrrSize UPD is available and considering into hw based dram top
calculation.
BRANCH=none
BUG=b:63974384
TEST=Build and boot lars which is using skylake 1.1 fsp.
Change-Id: Iade0d2cb2a290fc4c9f0e6b1eaadc8afff2fa581
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/skylake/memmap.c
1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/21224/1
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index d5d3724..5014edc 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -178,8 +178,11 @@
dev = dev_find_slot(0, PCI_DEVFN(SA_DEV_SLOT_ROOT, 0));
config = dev->chip_info;
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)
+ prmrr_size = 1*MiB;
+#else
prmrr_size = config->PrmrrSize;
-
+#endif
if (prmrr_size > 0) {
/*
* PRMRR Sizes that are > 1MB and < 32MB are
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iade0d2cb2a290fc4c9f0e6b1eaadc8afff2fa581
Gerrit-Change-Number: 21224
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/21223
Change subject: ec/lenovo/h8/acpi/thermal: Add coefficients for passive cooling
......................................................................
ec/lenovo/h8/acpi/thermal: Add coefficients for passive cooling
The GNU/Linux kernel requires _TSP, _TC1, _TC2 and _PSL for passive cooling.
_TSP already has been added in a previous commit.
Copy the coefficients used on google devices to activate the feature and add
_PSL for SandyBridge and IvyBridge based Thinkpads.
On older Thinkpads the PPKG method needs to be implemented first.
Tested on Lenovo T430:
The CPU is throttled once the passive threshold has been reached.
Change-Id: I922923a9029de77158988ac254bab4aad9536935
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
---
M src/ec/lenovo/h8/acpi/thermal.asl
1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/21223/1
diff --git a/src/ec/lenovo/h8/acpi/thermal.asl b/src/ec/lenovo/h8/acpi/thermal.asl
index 84e23f9..a40043c 100644
--- a/src/ec/lenovo/h8/acpi/thermal.asl
+++ b/src/ec/lenovo/h8/acpi/thermal.asl
@@ -40,6 +40,20 @@
/* Thermal sampling period for passive cooling: 10 seconds */
Name (_TSP, 100)
+ /* Coefficients for passive cooling */
+ Name (_TC1, 0x02)
+ Name (_TC2, 0x05)
+
+ /* FIXME: Add support for other CPUs as well */
+#if IS_ENABLED(CONFIG_CPU_INTEL_MODEL_206AX) || \
+ IS_ENABLED(CONFIG_CPU_INTEL_MODEL_306AX)
+ /* Processors used for passive cooling */
+ Method (_PSL, 0, Serialized)
+ {
+ Return (\PPKG ())
+ }
+#endif
+
Method(_CRT, 0, NotSerialized) {
Store (\TCRT, Local0)
if (LGreater(Local0, Zero)) {
@@ -76,6 +90,20 @@
/* Thermal sampling period for passive cooling: 10 seconds */
Name (_TSP, 100)
+ /* Coefficients for passive cooling */
+ Name (_TC1, 0x02)
+ Name (_TC2, 0x05)
+
+ /* FIXME: Add support for other CPUs as well */
+#if IS_ENABLED(CONFIG_CPU_INTEL_MODEL_206AX) || \
+ IS_ENABLED(CONFIG_CPU_INTEL_MODEL_306AX)
+ /* Processors used for passive cooling */
+ Method (_PSL, 0, Serialized)
+ {
+ Return (\PPKG ())
+ }
+#endif
+
Method(_CRT, 0, NotSerialized) {
Return (C2K(99))
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I922923a9029de77158988ac254bab4aad9536935
Gerrit-Change-Number: 21223
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21222
to look at the new patch set (#4).
Change subject: mb/intel/d510mo: Use common ramstage driver to configure the ck505
......................................................................
mb/intel/d510mo: Use common ramstage driver to configure the ck505
Untested.
Change-Id: Icfa22daf90f9e2eff13b4fc5994664e96903dd1e
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/intel/d510mo/Kconfig
M src/mainboard/intel/d510mo/devicetree.cb
M src/mainboard/intel/d510mo/romstage.c
3 files changed, 14 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/21222/4
--
To view, visit https://review.coreboot.org/21222
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Icfa22daf90f9e2eff13b4fc5994664e96903dd1e
Gerrit-Change-Number: 21222
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>