coreboot-gerrit June 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/skylake: Use Intel timer common code
by Aamir Bohra (Code Review) 01 Jun '17

01 Jun '17

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/19912 ) Change subject: soc/intel/skylake: Use Intel timer common code ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/#/c/19912/4/src/soc/intel/skylake/Kconfig File src/soc/intel/skylake/Kconfig: PS4, Line 164: PCR_BASE_ADDRESS > Why isn't this option deleted completely? It's also not even being used asi Done.Removed references to this config from mainboard in this patch https://review.coreboot.org/#/c/20002/1. please review. -- To view, visit https://review.coreboot.org/19912 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/intel/common: Add common Intel timer code
by Aamir Bohra (Code Review) 01 Jun '17

01 Jun '17

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/19911 ) Change subject: soc/intel/common: Add common Intel timer code ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/19911/2/src/soc/intel/common/block/timer/ti… File src/soc/intel/common/block/timer/timer.c: Line 21: #define CPU_BCLK 100 > I saw this define in the common cpu CL. Ok.Do you suggest on using definition from intelblocks/cpu.h, Did not use that as it would expose function declarations under cpu.h here and it would not be used. -- To view, visit https://review.coreboot.org/19911 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ifd4b24735c74c636348fc32afbcc267e384cb610 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-HasComments: Yes

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Change in coreboot[master]: mainboard/google/poppy: Enable H1 I2C TPM
by Nicolas Boichat (Code Review) 01 Jun '17

01 Jun '17

Nicolas Boichat has posted comments on this change. ( https://review.coreboot.org/19926 ) Change subject: mainboard/google/poppy: Enable H1 I2C TPM ...................................................................... Patch Set 2: Code-Review+1 Verified. Thanks. -- To view, visit https://review.coreboot.org/19926 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4c6c94fa05abf9f5374505ded5956e879ac79726 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: src/mainboard: Remove MONOTONIC_TIMER_MSR selection
by Arthur Heymans (Code Review) 01 Jun '17

01 Jun '17

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/20002 ) Change subject: src/mainboard: Remove MONOTONIC_TIMER_MSR selection ...................................................................... Patch Set 1: Code-Review+2 (3 comments) https://review.coreboot.org/#/c/20002/1//COMMIT_MSG Commit Message: Line 7: src/mainboard: Remove MONOTONIC_TIMER_MSR selection mainboard/*/*/Kconfig? Line 10: Konfigs,as it only does a reduntant selection of space after ',' Line 11: HAVE_MONOTONIC_TIMER config,already selected under space -- To view, visit https://review.coreboot.org/20002 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ib3177ceb9e8b6c16ce0e437a4a02b94f215af58f Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-HasComments: Yes

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Change in coreboot[master]: src/mainboard: Remove MONOTONIC_TIMER_MSR selection
by Aamir Bohra (Code Review) 01 Jun '17

01 Jun '17

Aamir Bohra has uploaded a new change for review. ( https://review.coreboot.org/20002 ) Change subject: src/mainboard: Remove MONOTONIC_TIMER_MSR selection ...................................................................... src/mainboard: Remove MONOTONIC_TIMER_MSR selection Remove MONOTONIC_TIMER_MSR selection from mainboard Konfigs,as it only does a reduntant selection of HAVE_MONOTONIC_TIMER config,already selected under skylake soc Kconfig. Change-Id: Ib3177ceb9e8b6c16ce0e437a4a02b94f215af58f Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/google/chell/Kconfig M src/mainboard/google/glados/Kconfig M src/mainboard/google/lars/Kconfig M src/mainboard/intel/kblrvp/Kconfig M src/mainboard/intel/kunimitsu/Kconfig 5 files changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/20002/1 diff --git a/src/mainboard/google/chell/Kconfig b/src/mainboard/google/chell/Kconfig index 01423a7..d353b44 100644 --- a/src/mainboard/google/chell/Kconfig +++ b/src/mainboard/google/chell/Kconfig @@ -17,7 +17,6 @@ select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM - select MONOTONIC_TIMER_MSR select SOC_INTEL_SKYLAKE config VBOOT diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig index 102a8c1..254e54a 100644 --- a/src/mainboard/google/glados/Kconfig +++ b/src/mainboard/google/glados/Kconfig @@ -17,7 +17,6 @@ select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM - select MONOTONIC_TIMER_MSR select SOC_INTEL_SKYLAKE config VBOOT diff --git a/src/mainboard/google/lars/Kconfig b/src/mainboard/google/lars/Kconfig index 78db8b2..24e3880 100644 --- a/src/mainboard/google/lars/Kconfig +++ b/src/mainboard/google/lars/Kconfig @@ -19,7 +19,6 @@ select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM - select MONOTONIC_TIMER_MSR select SOC_INTEL_SKYLAKE config VBOOT diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig index 6aa4ad5..66087b9 100644 --- a/src/mainboard/intel/kblrvp/Kconfig +++ b/src/mainboard/intel/kblrvp/Kconfig @@ -8,7 +8,6 @@ select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_SMI_HANDLER - select MONOTONIC_TIMER_MSR select SOC_INTEL_SKYLAKE select MAINBOARD_USES_FSP2_0 select MAINBOARD_HAS_CHROMEOS diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig index aec394b..71b465d 100644 --- a/src/mainboard/intel/kunimitsu/Kconfig +++ b/src/mainboard/intel/kunimitsu/Kconfig @@ -18,7 +18,6 @@ select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM - select MONOTONIC_TIMER_MSR select SOC_INTEL_SKYLAKE choice -- To view, visit https://review.coreboot.org/20002 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ib3177ceb9e8b6c16ce0e437a4a02b94f215af58f Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com>

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Change in coreboot[master]: soc/intel/apollolake: Use Intel timer common code
by Aamir Bohra (Code Review) 01 Jun '17

01 Jun '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19913 to look at the new patch set (#2). Change subject: soc/intel/apollolake: Use Intel timer common code ...................................................................... soc/intel/apollolake: Use Intel timer common code Change-Id: I7b415711d01ddc0d998eba62de2c2139045efa80 Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/apollolake/tsc_freq.c 3 files changed, 1 insertion(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/19913/2 -- To view, visit https://review.coreboot.org/19913 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I7b415711d01ddc0d998eba62de2c2139045efa80 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com>

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Change in coreboot[master]: soc/intel/skylake: Use Intel timer common code
by Aamir Bohra (Code Review) 01 Jun '17

01 Jun '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19912 to look at the new patch set (#5). Change subject: soc/intel/skylake: Use Intel timer common code ...................................................................... soc/intel/skylake: Use Intel timer common code Use timer code from soc/intel/common. This code removes monotonic timer refrence w.r.t MSR 24Mhz counter(0x637) and use tsc timer. Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc D src/soc/intel/skylake/monotonic_timer.c D src/soc/intel/skylake/tsc_freq.c 4 files changed, 2 insertions(+), 86 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/19912/5 -- To view, visit https://review.coreboot.org/19912 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com>

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Change in coreboot[master]: mainboard/google/poppy: Enable H1 I2C TPM
by Furquan Shaikh (Code Review) 01 Jun '17

01 Jun '17

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/19926 ) Change subject: mainboard/google/poppy: Enable H1 I2C TPM ...................................................................... Patch Set 2: -Code-Review Verified that this CL works fine. Removing the -1. -- To view, visit https://review.coreboot.org/19926 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4c6c94fa05abf9f5374505ded5956e879ac79726 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x/raminit: Rework receive enable calibration
by build bot (Jenkins) (Code Review) 01 Jun '17

01 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18692 ) Change subject: nb/intel/x4x/raminit: Rework receive enable calibration ...................................................................... Patch Set 21: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/54699/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/10404/ : SUCCESS -- To view, visit https://review.coreboot.org/18692 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I0c970455e609d3ce96a262cbf110336a2079da4d Gerrit-PatchSet: 21 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x/raminit: Rework receive enable calibration
by Arthur Heymans (Code Review) 01 Jun '17

01 Jun '17

Hello Paul Menzel, build bot (Jenkins), coreboot org, Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/18692 to look at the new patch set (#21). Change subject: nb/intel/x4x/raminit: Rework receive enable calibration ...................................................................... nb/intel/x4x/raminit: Rework receive enable calibration Moves receive enable calibration to a separate file to lighten raminit.c a bit. Receive enable calibration is quite similar to gm45 so it reuses some of its function names. The functional changes are: * start at coarse at CAS + 1 instead of CAS - 1. Other Intel northbridges do this too and register dumps from vendor bios further support this; * the minimum coarse is now reset for each channel; * on the second fine search for DQS high, TAP overflow is handled by increasing medium; * some settings that are not close to edges are noisy. To improve the results, multiple samples are taken and the next finer settings is also tested for consistency of the result; * Use a struct for settings, which could be used to simplify the code that restores these settings on S3 resume or hot reset. This change might improve stability. Change-Id: I0c970455e609d3ce96a262cbf110336a2079da4d Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/x4x/Makefile.inc M src/northbridge/intel/x4x/raminit_ddr2.c A src/northbridge/intel/x4x/rcven.c M src/northbridge/intel/x4x/x4x.h 4 files changed, 397 insertions(+), 282 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/18692/21 -- To view, visit https://review.coreboot.org/18692 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I0c970455e609d3ce96a262cbf110336a2079da4d Gerrit-PatchSet: 21 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com>

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coreboot-gerrit June 2017