coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs...
by Bill XIE (Code Review) 29 May '17

29 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19980 to look at the new patch set (#3). Change subject: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs_r2_0) ...................................................................... mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs_r2_0) The supported "G41C-GS" with a nuvoton nct6776 superio is actually G41C-GS R2.0, which is different with the more easily-found revision G41C-GS (R1.0) with Winbond W83627DHG superio, and should be ported separately. Photos for the two revision: R1.0: http://www.asrock.com/mb/photo/G41C-GS%28L1%29.jpg R2.0: http://www.asrock.com/mb/photo/G41C-GS%20R2.0%28L2%29.jpg Change-Id: If60a694bcf0652ab32c0ac75ceec7e27e11fe9eb Signed-off-by: Bill XIE <persmule(a)gmail.com> --- D src/mainboard/asrock/g41c-gs/Kconfig.name R src/mainboard/asrock/g41c-gs_r2_0/Kconfig A src/mainboard/asrock/g41c-gs_r2_0/Kconfig.name R src/mainboard/asrock/g41c-gs_r2_0/Makefile.inc R src/mainboard/asrock/g41c-gs_r2_0/acpi/ec.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/ich7_pci_irqs.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/platform.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/superio.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/x4x_pci_irqs.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi_tables.c R src/mainboard/asrock/g41c-gs_r2_0/board_info.txt R src/mainboard/asrock/g41c-gs_r2_0/cmos.default R src/mainboard/asrock/g41c-gs_r2_0/cmos.layout R src/mainboard/asrock/g41c-gs_r2_0/cstates.c R src/mainboard/asrock/g41c-gs_r2_0/devicetree.cb R src/mainboard/asrock/g41c-gs_r2_0/dsdt.asl R src/mainboard/asrock/g41c-gs_r2_0/gpio.c R src/mainboard/asrock/g41c-gs_r2_0/hda_verb.c R src/mainboard/asrock/g41c-gs_r2_0/romstage.c 19 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/19980/3 -- To view, visit https://review.coreboot.org/19980 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If60a694bcf0652ab32c0ac75ceec7e27e11fe9eb Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs...
by build bot (Jenkins) (Code Review) 29 May '17

29 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19980 ) Change subject: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs_r2_0) ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/54534/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/10253/ : SUCCESS -- To view, visit https://review.coreboot.org/19980 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: If60a694bcf0652ab32c0ac75ceec7e27e11fe9eb Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs...
by Bill XIE (Code Review) 29 May '17

29 May '17

Bill XIE has uploaded a new patch set (#2). ( https://review.coreboot.org/19980 ) Change subject: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs_r2_0) ...................................................................... mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs_r2_0) The supported "G41C-GS" with a nuvoton nct6776 superio is actually G41C-GS R2.0, which is different with the more easily-found revision G41C-GS (R1.0) with Winbond W83627DHG suoerio, and should be ported separately. Photos for the two revision: R1.0: http://www.asrock.com/mb/photo/G41C-GS%28L1%29.jpg R2.0: http://www.asrock.com/mb/photo/G41C-GS%20R2.0%28L2%29.jpg Change-Id: If60a694bcf0652ab32c0ac75ceec7e27e11fe9eb Signed-off-by: Bill XIE <persmule(a)gmail.com> --- D src/mainboard/asrock/g41c-gs/Kconfig.name R src/mainboard/asrock/g41c-gs_r2_0/Kconfig A src/mainboard/asrock/g41c-gs_r2_0/Kconfig.name R src/mainboard/asrock/g41c-gs_r2_0/Makefile.inc R src/mainboard/asrock/g41c-gs_r2_0/acpi/ec.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/ich7_pci_irqs.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/platform.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/superio.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/x4x_pci_irqs.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi_tables.c R src/mainboard/asrock/g41c-gs_r2_0/board_info.txt R src/mainboard/asrock/g41c-gs_r2_0/cmos.default R src/mainboard/asrock/g41c-gs_r2_0/cmos.layout R src/mainboard/asrock/g41c-gs_r2_0/cstates.c R src/mainboard/asrock/g41c-gs_r2_0/devicetree.cb R src/mainboard/asrock/g41c-gs_r2_0/dsdt.asl R src/mainboard/asrock/g41c-gs_r2_0/gpio.c R src/mainboard/asrock/g41c-gs_r2_0/hda_verb.c R src/mainboard/asrock/g41c-gs_r2_0/romstage.c 19 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/19980/2 -- To view, visit https://review.coreboot.org/19980 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If60a694bcf0652ab32c0ac75ceec7e27e11fe9eb Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Bill XIE <persmule(a)gmail.com>

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Change in coreboot[master]: purism/librem13v1: Rename librem13 to librem13v1
by Youness Alaoui (Code Review) 29 May '17

29 May '17

Youness Alaoui has posted comments on this change. ( https://review.coreboot.org/19931 ) Change subject: purism/librem13v1: Rename librem13 to librem13v1 ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/19931/1/src/mainboard/purism/librem13v1/boa… File src/mainboard/purism/librem13v1/board_info.txt: Line 4: Board URL: https://puri.sm/librem-13/ > Drop this? The current page is about the wrong model (v2?). I don't think it's necessary to drop this, that URL is still better than no URL at all. It also does point to the librem 13, just a different hw revision. + we plan on having info on previous revisions as well on the website, and it doesn't make sense to remove links whenever a page is updated. -- To view, visit https://review.coreboot.org/19931 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I23fa977717230c2001868741bb684e9633a2c0bb Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs...
by Bill XIE (Code Review) 29 May '17

29 May '17

Bill XIE has uploaded a new change for review. ( https://review.coreboot.org/19980 ) Change subject: mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs_r2_0). ...................................................................... mb/asrock/g41c-gs: Rename the board to G41C-GS R2.0 (g41c-gs_r2_0). The supported "G41C-GS" with a nuvoton nct6776 superio is actually G41C-GS R2.0, which is different with the more easily-found revision G41C-GS (R1.0) with Winbond W83627DHG suoerio, and should be ported separately. Photos for the two revision: R1.0: http://www.asrock.com/mb/photo/G41C-GS%28L1%29.jpg R2.0: http://www.asrock.com/mb/photo/G41C-GS%20R2.0%28L2%29.jpg Change-Id: If60a694bcf0652ab32c0ac75ceec7e27e11fe9eb Signed-off-by: Bill XIE <persmule(a)gmail.com> --- D src/mainboard/asrock/g41c-gs/Kconfig.name R src/mainboard/asrock/g41c-gs_r2_0/Kconfig A src/mainboard/asrock/g41c-gs_r2_0/Kconfig.name R src/mainboard/asrock/g41c-gs_r2_0/Makefile.inc R src/mainboard/asrock/g41c-gs_r2_0/acpi/ec.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/ich7_pci_irqs.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/platform.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/superio.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi/x4x_pci_irqs.asl R src/mainboard/asrock/g41c-gs_r2_0/acpi_tables.c R src/mainboard/asrock/g41c-gs_r2_0/board_info.txt R src/mainboard/asrock/g41c-gs_r2_0/cmos.default R src/mainboard/asrock/g41c-gs_r2_0/cmos.layout R src/mainboard/asrock/g41c-gs_r2_0/cstates.c R src/mainboard/asrock/g41c-gs_r2_0/devicetree.cb R src/mainboard/asrock/g41c-gs_r2_0/dsdt.asl R src/mainboard/asrock/g41c-gs_r2_0/gpio.c R src/mainboard/asrock/g41c-gs_r2_0/hda_verb.c R src/mainboard/asrock/g41c-gs_r2_0/romstage.c 19 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/19980/1 diff --git a/src/mainboard/asrock/g41c-gs/Kconfig.name b/src/mainboard/asrock/g41c-gs/Kconfig.name deleted file mode 100644 index 3511047..0000000 --- a/src/mainboard/asrock/g41c-gs/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_ASROCK_G41C_GS - bool "G41C-GS" diff --git a/src/mainboard/asrock/g41c-gs/Kconfig b/src/mainboard/asrock/g41c-gs_r2_0/Kconfig similarity index 90% rename from src/mainboard/asrock/g41c-gs/Kconfig rename to src/mainboard/asrock/g41c-gs_r2_0/Kconfig index 669d8a5..45dd33e 100644 --- a/src/mainboard/asrock/g41c-gs/Kconfig +++ b/src/mainboard/asrock/g41c-gs_r2_0/Kconfig @@ -14,7 +14,7 @@ # GNU General Public License for more details. # -if BOARD_ASROCK_G41C_GS +if BOARD_ASROCK_G41C_GS_R2_0 config BOARD_SPECIFIC_OPTIONS def_bool y @@ -37,14 +37,14 @@ config MAINBOARD_DIR string - default "asrock/g41c-gs" + default "asrock/g41c-gs_r2_0" config MAINBOARD_PART_NUMBER string - default "G41C-GS" + default "G41C-GS R2.0" config MAX_CPUS int default 4 -endif # BOARD_ASROCK_G41C_GS +endif # BOARD_ASROCK_G41C_GS_R2_0 diff --git a/src/mainboard/asrock/g41c-gs_r2_0/Kconfig.name b/src/mainboard/asrock/g41c-gs_r2_0/Kconfig.name new file mode 100644 index 0000000..5cf5887 --- /dev/null +++ b/src/mainboard/asrock/g41c-gs_r2_0/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_ASROCK_G41C_GS_R2_0 + bool "G41C-GS R2.0" diff --git a/src/mainboard/asrock/g41c-gs/Makefile.inc b/src/mainboard/asrock/g41c-gs_r2_0/Makefile.inc similarity index 100% rename from src/mainboard/asrock/g41c-gs/Makefile.inc rename to src/mainboard/asrock/g41c-gs_r2_0/Makefile.inc diff --git a/src/mainboard/asrock/g41c-gs/acpi/ec.asl b/src/mainboard/asrock/g41c-gs_r2_0/acpi/ec.asl similarity index 100% rename from src/mainboard/asrock/g41c-gs/acpi/ec.asl rename to src/mainboard/asrock/g41c-gs_r2_0/acpi/ec.asl diff --git a/src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl b/src/mainboard/asrock/g41c-gs_r2_0/acpi/ich7_pci_irqs.asl similarity index 100% rename from src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl rename to src/mainboard/asrock/g41c-gs_r2_0/acpi/ich7_pci_irqs.asl diff --git a/src/mainboard/asrock/g41c-gs/acpi/platform.asl b/src/mainboard/asrock/g41c-gs_r2_0/acpi/platform.asl similarity index 100% rename from src/mainboard/asrock/g41c-gs/acpi/platform.asl rename to src/mainboard/asrock/g41c-gs_r2_0/acpi/platform.asl diff --git a/src/mainboard/asrock/g41c-gs/acpi/superio.asl b/src/mainboard/asrock/g41c-gs_r2_0/acpi/superio.asl similarity index 100% rename from src/mainboard/asrock/g41c-gs/acpi/superio.asl rename to src/mainboard/asrock/g41c-gs_r2_0/acpi/superio.asl diff --git a/src/mainboard/asrock/g41c-gs/acpi/x4x_pci_irqs.asl b/src/mainboard/asrock/g41c-gs_r2_0/acpi/x4x_pci_irqs.asl similarity index 100% rename from src/mainboard/asrock/g41c-gs/acpi/x4x_pci_irqs.asl rename to src/mainboard/asrock/g41c-gs_r2_0/acpi/x4x_pci_irqs.asl diff --git a/src/mainboard/asrock/g41c-gs/acpi_tables.c b/src/mainboard/asrock/g41c-gs_r2_0/acpi_tables.c similarity index 100% rename from src/mainboard/asrock/g41c-gs/acpi_tables.c rename to src/mainboard/asrock/g41c-gs_r2_0/acpi_tables.c diff --git a/src/mainboard/asrock/g41c-gs/board_info.txt b/src/mainboard/asrock/g41c-gs_r2_0/board_info.txt similarity index 65% rename from src/mainboard/asrock/g41c-gs/board_info.txt rename to src/mainboard/asrock/g41c-gs_r2_0/board_info.txt index 96fe80e..eaf0770 100644 --- a/src/mainboard/asrock/g41c-gs/board_info.txt +++ b/src/mainboard/asrock/g41c-gs_r2_0/board_info.txt @@ -1,5 +1,5 @@ Category: desktop -Board URL: http://www.asrock.com/mb/intel/g41c-gs/ +Board URL: http://www.asrock.com/mb/Intel/G41C-GS%20R2.0/ ROM package: DIP-8 ROM protocol: SPI ROM socketed: y diff --git a/src/mainboard/asrock/g41c-gs/cmos.default b/src/mainboard/asrock/g41c-gs_r2_0/cmos.default similarity index 100% rename from src/mainboard/asrock/g41c-gs/cmos.default rename to src/mainboard/asrock/g41c-gs_r2_0/cmos.default diff --git a/src/mainboard/asrock/g41c-gs/cmos.layout b/src/mainboard/asrock/g41c-gs_r2_0/cmos.layout similarity index 100% rename from src/mainboard/asrock/g41c-gs/cmos.layout rename to src/mainboard/asrock/g41c-gs_r2_0/cmos.layout diff --git a/src/mainboard/asrock/g41c-gs/cstates.c b/src/mainboard/asrock/g41c-gs_r2_0/cstates.c similarity index 100% rename from src/mainboard/asrock/g41c-gs/cstates.c rename to src/mainboard/asrock/g41c-gs_r2_0/cstates.c diff --git a/src/mainboard/asrock/g41c-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs_r2_0/devicetree.cb similarity index 100% rename from src/mainboard/asrock/g41c-gs/devicetree.cb rename to src/mainboard/asrock/g41c-gs_r2_0/devicetree.cb diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs_r2_0/dsdt.asl similarity index 100% rename from src/mainboard/asrock/g41c-gs/dsdt.asl rename to src/mainboard/asrock/g41c-gs_r2_0/dsdt.asl diff --git a/src/mainboard/asrock/g41c-gs/gpio.c b/src/mainboard/asrock/g41c-gs_r2_0/gpio.c similarity index 100% rename from src/mainboard/asrock/g41c-gs/gpio.c rename to src/mainboard/asrock/g41c-gs_r2_0/gpio.c diff --git a/src/mainboard/asrock/g41c-gs/hda_verb.c b/src/mainboard/asrock/g41c-gs_r2_0/hda_verb.c similarity index 100% rename from src/mainboard/asrock/g41c-gs/hda_verb.c rename to src/mainboard/asrock/g41c-gs_r2_0/hda_verb.c diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs_r2_0/romstage.c similarity index 100% rename from src/mainboard/asrock/g41c-gs/romstage.c rename to src/mainboard/asrock/g41c-gs_r2_0/romstage.c -- To view, visit https://review.coreboot.org/19980 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: If60a694bcf0652ab32c0ac75ceec7e27e11fe9eb Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Bill XIE <persmule(a)gmail.com>

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Change in coreboot[master]: console/flashsconsole: Add spi flash console for debugging
by build bot (Jenkins) (Code Review) 29 May '17

29 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19849 ) Change subject: console/flashsconsole: Add spi flash console for debugging ...................................................................... Patch Set 10: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/10252/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54533/ : SUCCESS -- To view, visit https://review.coreboot.org/19849 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3 Gerrit-PatchSet: 10 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: console/flashsconsole: Add spi flash console for debugging
by Youness Alaoui (Code Review) 29 May '17

29 May '17

Youness Alaoui has posted comments on this change. ( https://review.coreboot.org/19849 ) Change subject: console/flashsconsole: Add spi flash console for debugging ...................................................................... Patch Set 10: I've updated the commit so it now generates the CONSOLE FMAP area automatically (and no area if the option is disabled). I also simplified the use of the tx_flush and removed the CBFS support. I've just tried to test flashconsole on broadwell and it doesn't compile (the lack of monotonic_clock in romstage, and all the global vars in the spi drivers), so I don't know if I should leave it like that, or make the option depend on the FAST_SPI driver (which means skylake+ and no other archs) or if you have a better suggestion, let me know. -- To view, visit https://review.coreboot.org/19849 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3 Gerrit-PatchSet: 10 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: console/flashsconsole: Add spi flash console for debugging
by Youness Alaoui (Code Review) 29 May '17

29 May '17

Hello Aaron Durbin, Philippe Mathieu-Daudé, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19849 to look at the new patch set (#10). Change subject: console/flashsconsole: Add spi flash console for debugging ...................................................................... console/flashsconsole: Add spi flash console for debugging If CONSOLE_SPI_FLASH config is enabled, we write the cbmem messages to the 'CONSOLE' area in FMAP which allows us to grab the log when we read the flash. This is useful when you don't have usb debugging, and UART lines are hard to find. Since a failure to boot would require a hardware flasher anyways, we can get the log at the same time. This feature should only be used when no alternative is found and only when we can't boot the system, because excessive writes to the flash is not recommended. This has been tested on purism/librem13 v2 and librem 15 v3 which run Intel Skylake hardware. It has not been tested on other archs or with a driver other than the fast_spi. Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3 Signed-off-by: Youness Alaoui <youness.alaoui(a)puri.sm> --- M Makefile.inc M src/console/Kconfig M src/console/console.c M src/drivers/spi/Makefile.inc A src/drivers/spi/flashconsole.c A src/include/console/flash.h M util/cbfstool/default-x86.fmd M util/cbfstool/default.fmd 8 files changed, 257 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/19849/10 -- To view, visit https://review.coreboot.org/19849 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3 Gerrit-PatchSet: 10 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/sandybridge: Remove unecessary reserved resources
by Matt DeVillier (Code Review) 29 May '17

29 May '17

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/19977 ) Change subject: nb/intel/sandybridge: Remove unecessary reserved resources ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/19977/1//COMMIT_MSG Commit Message: Line 11: on SNB, but that bug has long since been fixed. Commit > I thought this is about a silicon bug. Can you elaborate on the fix? I thought so too, but with these reserved regions removed I am unable to reproduce the issue described in the original ChromeOS patches working around the issue; have been using this patch in my tree for 6+ mos now without issue. -- To view, visit https://review.coreboot.org/19977 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I9e14a73dbdb9d62dfd7d942a79659a5997f97971 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: console/flashsconsole: Add spi flash console for debugging
by Youness Alaoui (Code Review) 29 May '17

29 May '17

Youness Alaoui has posted comments on this change. ( https://review.coreboot.org/19849 ) Change subject: console/flashsconsole: Add spi flash console for debugging ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/19849/2/src/console/Kconfig File src/console/Kconfig: Line 258: region in the CBFS. > Can't you just put something like ##CONSOLE_ENTRY## and replace it either w Oh yeah, that would work. Such an obvious solution too! :) Thanks. I'll take care of it right now. I think with an automatic fmap integration, we won't need to keep the cbfs portion anymore. -- To view, visit https://review.coreboot.org/19849 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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coreboot-gerrit May 2017