coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: nb/intel/sandybridge/pcie: Disable unused bridges
by Patrick Rudolph (Code Review) 23 May '17

23 May '17

Hello Arthur Heymans, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19819 to look at the new patch set (#3). Change subject: nb/intel/sandybridge/pcie: Disable unused bridges ...................................................................... nb/intel/sandybridge/pcie: Disable unused bridges Add a PCI Express Root Port driver. Disable unused bridges that are not hot-plug capable. Reduces idle power by ~1 Watt, as the PEG slot gets disabled. Tested on Lenovo T430. Change-Id: If67bafdea6a60986ecca2ecdb93c7f72359c4537 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/northbridge/intel/sandybridge/Makefile.inc A src/northbridge/intel/sandybridge/pcie.c M src/northbridge/intel/sandybridge/sandybridge.h 3 files changed, 81 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/19819/3 -- To view, visit https://review.coreboot.org/19819 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If67bafdea6a60986ecca2ecdb93c7f72359c4537 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: sb/intel/bd82x6x: Disable unused bridges
by Patrick Rudolph (Code Review) 23 May '17

23 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19818 to look at the new patch set (#3). Change subject: sb/intel/bd82x6x: Disable unused bridges ...................................................................... sb/intel/bd82x6x: Disable unused bridges Disable unused bridges that are not marked as hot-plugable. Reduces idle power consumtion by ~200mWatt for each port. Tested on Lenovo T430. Change-Id: I6ee5e5f33824acdbca0f6ed28e90beab7fe10002 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/southbridge/intel/bd82x6x/pcie.c 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/19818/3 -- To view, visit https://review.coreboot.org/19818 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6ee5e5f33824acdbca0f6ed28e90beab7fe10002 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: device/device_util: Add function to determine bridge state
by Patrick Rudolph (Code Review) 23 May '17

23 May '17

Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19817 to look at the new patch set (#3). Change subject: device/device_util: Add function to determine bridge state ...................................................................... device/device_util: Add function to determine bridge state Add a method to get the state of a bridge device. Return true if at least one enabled device on the secondary bus is found. Useful to disable non hotplugable bridges without any devices attached. Change-Id: Ic8fe539d233031d4d177b03dd2c03edb5ab8c88d Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/device/device_util.c M src/include/device/device.h 2 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/19817/3 -- To view, visit https://review.coreboot.org/19817 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ic8fe539d233031d4d177b03dd2c03edb5ab8c88d Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/sandybridge/pcie: Disable unused bridges
by Patrick Rudolph (Code Review) 23 May '17

23 May '17

Hello Arthur Heymans, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19819 to look at the new patch set (#2). Change subject: nb/intel/sandybridge/pcie: Disable unused bridges ...................................................................... nb/intel/sandybridge/pcie: Disable unused bridges Add a PCI Express Root Port driver. Disable unused bridges that are not hot-plug capable. Reduces idle power by ~1 Watt, as the PEG slot gets disabled. Tested on Lenovo T430. Change-Id: If67bafdea6a60986ecca2ecdb93c7f72359c4537 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/northbridge/intel/sandybridge/Makefile.inc A src/northbridge/intel/sandybridge/pcie.c M src/northbridge/intel/sandybridge/sandybridge.h 3 files changed, 81 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/19819/2 -- To view, visit https://review.coreboot.org/19819 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If67bafdea6a60986ecca2ecdb93c7f72359c4537 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: sb/intel/bd82x6x: Disable unused bridges
by Patrick Rudolph (Code Review) 23 May '17

23 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19818 to look at the new patch set (#2). Change subject: sb/intel/bd82x6x: Disable unused bridges ...................................................................... sb/intel/bd82x6x: Disable unused bridges Disable unused bridges that are not marked as hot-plugable. Reduces idle power consumtion by ~200mWatt for each port. Tested on Lenovo T430. Change-Id: I6ee5e5f33824acdbca0f6ed28e90beab7fe10002 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/southbridge/intel/bd82x6x/pcie.c 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/19818/2 -- To view, visit https://review.coreboot.org/19818 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6ee5e5f33824acdbca0f6ed28e90beab7fe10002 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: device/device_util: Add function to determine bridge state
by Patrick Rudolph (Code Review) 23 May '17

23 May '17

Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19817 to look at the new patch set (#2). Change subject: device/device_util: Add function to determine bridge state ...................................................................... device/device_util: Add function to determine bridge state Add a method to get the state of a bridge device. Return true if at least one enabled device on the secondary bus is found. Useful to disable non hotplugable bridges without any devices attached. Change-Id: Ic8fe539d233031d4d177b03dd2c03edb5ab8c88d Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/device/device_util.c M src/include/device/device.h 2 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/19817/2 -- To view, visit https://review.coreboot.org/19817 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ic8fe539d233031d4d177b03dd2c03edb5ab8c88d Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/apollolake: enable MONITOR/MWAIT for GLK
by Cole Nelson (Code Review) 23 May '17

23 May '17

Hello Aaron Durbin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19718 to look at the new patch set (#7). Change subject: soc/intel/apollolake: enable MONITOR/MWAIT for GLK ...................................................................... soc/intel/apollolake: enable MONITOR/MWAIT for GLK Make MONITOR/MWAIT based C-states the default for GLK and disable IO-Redirection based C-states. Tested on GLK w/kernel 4.11.0 using turbostat to observe C-state residencies with and without load. Tested for S0ix entry and exit using: "echo freeze > /sys/power/state". Change-Id: If648c25a9b26c04b278dce4af241d439790288ca Signed-off-by: Cole Nelson <colex.nelson(a)intel.com> --- M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cpu.c 2 files changed, 7 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/19718/7 -- To view, visit https://review.coreboot.org/19718 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If648c25a9b26c04b278dce4af241d439790288ca Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/apollolake: enable MONITOR/MWAIT for GLK
by Cole Nelson (Code Review) 23 May '17

23 May '17

Hello Aaron Durbin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19718 to look at the new patch set (#6). Change subject: soc/intel/apollolake: enable MONITOR/MWAIT for GLK ...................................................................... soc/intel/apollolake: enable MONITOR/MWAIT for GLK Make MONITOR/MWAIT based C-states the default for GLK and disable IO-Redirection based C-states. Tested on GLK w/kernel 4.11.0 using turbostat to observe C-state residencies with and without load. Tested for S0ix entry and exit using: "echo freeze > /sys/power/state". Change-Id: If648c25a9b26c04b278dce4af241d439790288ca Signed-off-by: Cole Nelson <colex.nelson(a)intel.com> --- M src/soc/intel/apollolake/chip.c 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/19718/6 -- To view, visit https://review.coreboot.org/19718 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If648c25a9b26c04b278dce4af241d439790288ca Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot
by Arthur Heymans (Code Review) 23 May '17

23 May '17

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19820 ) Change subject: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot ...................................................................... Patch Set 1: (5 comments) Change looks good, just pci_def.h macros that could be used a bit more. https://review.coreboot.org/#/c/19820/1/src/mainboard/asus/kgpe-d16/romstag… File src/mainboard/asus/kgpe-d16/romstage.c: PS1, Line 92: uint32_t base_memory = 0xfc000000; : uint32_t memory_limit = 0xfc800000; Use macros? PS1, Line 101: 0x01 #define TEMP_PCI_BUS 0x1 PS1, Line 101: 0x19 PCI_SECUNDARY_BUS PS1, Line 102: 0x1a PCI_SUBORDINATE_BUS PS1, Line 103: 0x20 PCI_BASE_ADDRESS_4 -- To view, visit https://review.coreboot.org/19820 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac5 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Add northbridge support
by Marc Jones (Code Review) 23 May '17

23 May '17

Marc Jones has posted comments on this change. ( https://review.coreboot.org/19724 ) Change subject: soc/amd/stoneyridge: Add northbridge support ...................................................................... Patch Set 3: > total: 34 errors, 155 warnings, 1938 lines checked > + true > ``` Agreed, I think we should do it as a separate patch that will follow this, but could be squashed to this one. -- To view, visit https://review.coreboot.org/19724 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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coreboot-gerrit May 2017