Hello Marshall Dawson, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19755
to look at the new patch set (#2).
Change subject: WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
......................................................................
WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
Add dedicated CAR setup and teardown functions and, Kconfig
options to force their inclusion into the build. The .S files
are effectively duplicated code from the cache_as_ram.inc file.
The .S files use global proc names in anticipation for use with
the Kconfig symbols C_ENVIRONMENT_BOOTBLOCK and POSTCAR_STAGE.
Move the mainboard romstage functionality into the soc directory
and change the function name to be compatible with the call
from assembly_entry.S.
Move InitReset and InitEarly to bootblock. These AGESA entry
points set some default settings, and release/recapture the
AP cores.
todo:
* clean up BioCallouts.c file
* preserve BIST
* look for ways to refactor to further clean up files used
in bootblock?
Change-Id: I811c7ef875b980874f3c4b1f234f969ae5618c44
Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
---
M src/cpu/x86/lapic/Makefile.inc
M src/mainboard/amd/gardenia/BiosCallOuts.c
M src/mainboard/amd/gardenia/Makefile.inc
M src/mainboard/amd/gardenia/romstage.c
M src/soc/amd/common/Makefile.inc
A src/soc/amd/common/block/cpu/Kconfig
A src/soc/amd/common/block/cpu/Makefile.inc
A src/soc/amd/common/block/cpu/car/cache_as_ram.S
A src/soc/amd/common/block/cpu/car/exit_car.S
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
A src/soc/amd/stoneyridge/bootblock.c
M src/soc/amd/stoneyridge/include/soc/northbridge.h
A src/soc/amd/stoneyridge/romstage.c
M src/vendorcode/amd/pi/Makefile.inc
15 files changed, 366 insertions(+), 68 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/19755/2
--
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I811c7ef875b980874f3c4b1f234f969ae5618c44
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19725
to look at the new patch set (#3).
Change subject: amd/gardenia: Switch to soc/amd/stoneyridge
......................................................................
amd/gardenia: Switch to soc/amd/stoneyridge
Switch Garnenia mainboard to single soc/ directory structure.
Change-Id: I095804d603bcccf324d3244965081a9dccba62ae
Signed-off-by: Marc Jones <marcj303(a)gmail.com>
---
M src/mainboard/amd/gardenia/BiosCallOuts.c
D src/mainboard/amd/gardenia/BiosCallOuts.h
M src/mainboard/amd/gardenia/Kconfig
M src/mainboard/amd/gardenia/Makefile.inc
M src/mainboard/amd/gardenia/OemCustomize.c
M src/mainboard/amd/gardenia/acpi_tables.c
M src/mainboard/amd/gardenia/devicetree.cb
M src/mainboard/amd/gardenia/dsdt.asl
M src/mainboard/amd/gardenia/fchec.h
M src/mainboard/amd/gardenia/mainboard.c
M src/mainboard/amd/gardenia/mptable.c
M src/mainboard/amd/gardenia/romstage.c
12 files changed, 75 insertions(+), 134 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/19725/3
--
To view, visit https://review.coreboot.org/19725
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I095804d603bcccf324d3244965081a9dccba62ae
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19724
to look at the new patch set (#3).
Change subject: soc/amd/stoneyridge: Add northbridge support
......................................................................
soc/amd/stoneyridge: Add northbridge support
Copy northbridge files from northbridge/amd/pi/00670F00
to soc/amd/stoneyridge and soc/amd/common.
Changes:
- update chip_ops and device_ops
- remove multi-node support
- cleanup Kconfig and Makefile
Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993
Signed-off-by: Marc Jones <marcj303(a)gmail.com>
---
M src/northbridge/amd/pi/Kconfig
A src/soc/amd/common/BiosCallOuts.h
M src/soc/amd/common/Makefile.inc
A src/soc/amd/common/agesawrapper.c
A src/soc/amd/common/agesawrapper.h
A src/soc/amd/common/agesawrapper_call.h
M src/soc/amd/common/amd_late_init.c
A src/soc/amd/common/def_callouts.c
A src/soc/amd/common/dimmSpd.h
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
A src/soc/amd/stoneyridge/acpi/northbridge.asl
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/chip.h
A src/soc/amd/stoneyridge/dimmSpd.c
M src/soc/amd/stoneyridge/fixme.c
M src/soc/amd/stoneyridge/include/soc/gpio.h
A src/soc/amd/stoneyridge/include/soc/northbridge.h
A src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/vendorcode/amd/pi/Makefile.inc
21 files changed, 1,814 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/19724/3
--
To view, visit https://review.coreboot.org/19724
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>