coreboot-gerrit December 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: google/fizz: Enable ec sw sync gbb by default
by build bot (Jenkins) (Code Review) 20 Dec '17

20 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22962 ) Change subject: google/fizz: Enable ec sw sync gbb by default ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19632/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64856/ : SUCCESS -- To view, visit https://review.coreboot.org/22962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib73e4619b13f6b7c2d01598c926fbbd7d7eb9bef Gerrit-Change-Number: 22962 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 20 Dec 2017 23:58:12 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/fizz: Enable ec sw sync gbb by default
by Daisuke Nojiri (Code Review) 20 Dec '17

20 Dec '17

Daisuke Nojiri has posted comments on this change. ( https://review.coreboot.org/22962 ) Change subject: google/fizz: Enable ec sw sync gbb by default ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/22962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib73e4619b13f6b7c2d01598c926fbbd7d7eb9bef Gerrit-Change-Number: 22962 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Comment-Date: Wed, 20 Dec 2017 23:54:31 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/fizz: Enable ec sw sync gbb by default
by Shelley Chen (Code Review) 20 Dec '17

20 Dec '17

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/22962 Change subject: google/fizz: Enable ec sw sync gbb by default ...................................................................... google/fizz: Enable ec sw sync gbb by default firmware test team is requesting that default gbb flags set to 0x39 rather than 0x239 so that it's consistent with the default gbb flags of other platforms. BUG=b:70392534 BRANCH=None TEST=emerge-fizz coreboot chromeos-bootimage gbb_utility --get --flags image-fizz.bin and make sure that it returns 0x39 instead of 0x239 Change-Id: Ib73e4619b13f6b7c2d01598c926fbbd7d7eb9bef Signed-off-by: Shelley Chen <shchen(a)chromium.org> --- M src/mainboard/google/fizz/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/22962/1 diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index 3424260..1ca3090 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -24,7 +24,6 @@ config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES - select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC select VBOOT_EC_EFS select VBOOT_PHYSICAL_REC_SWITCH select HAS_RECOVERY_MRC_CACHE -- To view, visit https://review.coreboot.org/22962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib73e4619b13f6b7c2d01598c926fbbd7d7eb9bef Gerrit-Change-Number: 22962 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com>

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Change in coreboot[master]: soc/amd/stoneyridge: select RTC
by build bot (Jenkins) (Code Review) 20 Dec '17

20 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22961 ) Change subject: soc/amd/stoneyridge: select RTC ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19631/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64855/ : SUCCESS -- To view, visit https://review.coreboot.org/22961 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d820fbe11043e7e3153d67159f52274d5f14bae Gerrit-Change-Number: 22961 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 20 Dec 2017 23:45:33 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: select RTC
by Marc Jones (Code Review) 20 Dec '17

20 Dec '17

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/22961 Change subject: soc/amd/stoneyridge: select RTC ...................................................................... soc/amd/stoneyridge: select RTC Stoneyridge has an RTC. Elog requires it for timestamps. BUG=b:65485690 TEST=Build Kahlee with Elog. Check mosys eventlog list for timestamps. Change-Id: I4d820fbe11043e7e3153d67159f52274d5f14bae Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- M src/soc/amd/stoneyridge/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/22961/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 4455f54..deef8af 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -64,6 +64,7 @@ select POSTCAR_CONSOLE select SSE select SSE2 + select RTC config VBOOT select VBOOT_SEPARATE_VERSTAGE -- To view, visit https://review.coreboot.org/22961 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4d820fbe11043e7e3153d67159f52274d5f14bae Gerrit-Change-Number: 22961 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>

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Change in coreboot[master]: kahlee: Enable TPM
by build bot (Jenkins) (Code Review) 20 Dec '17

20 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22960 ) Change subject: kahlee: Enable TPM ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/64854/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/19630/ : SUCCESS -- To view, visit https://review.coreboot.org/22960 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia866f80de0164d8cec84e204a5fe93bb53df547f Gerrit-Change-Number: 22960 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Ching <chingcodes(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 20 Dec 2017 23:08:43 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: kahlee: Enable TPM
by Chris Ching (Code Review) 20 Dec '17

20 Dec '17

Chris Ching has uploaded this change for review. ( https://review.coreboot.org/22960 Change subject: kahlee: Enable TPM ...................................................................... kahlee: Enable TPM BUG=b:69416132 BRANCH=none TEST=make all Change-Id: Ia866f80de0164d8cec84e204a5fe93bb53df547f Signed-off-by: Chris Ching <chingcodes(a)chromium.org> --- M src/mainboard/google/kahlee/Kconfig 1 file changed, 17 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/22960/1 diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index 80cfe88..91274d4 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -28,7 +28,7 @@ select GFXUMA select GOOGLE_SMBIOS_MAINBOARD_VERSION select MAINBOARD_HAS_CHROMEOS - select MAINBOARD_HAS_LPC_TPM + select MAINBOARD_HAS_LPC_TPM if BOARD_GOOGLE_KAHLEE select SERIRQ_CONTINUOUS_MODE select STONEYRIDGE_UART @@ -99,4 +99,20 @@ int default 1 +# Select this option to enable use of cr50 I2C TPM on kahlee +config KAHLEE_USE_I2C_TPM + bool + default y if !BOARD_GOOGLE_KAHLEE + select I2C_TPM + select MAINBOARD_HAS_I2C_TPM_CR50 + select TPM2 + +config DRIVER_TPM_I2C_BUS + depends on KAHLEE_USE_I2C_TPM + default 0x01 if BOARD_GOOGLE_GRUNT + +config DRIVER_TPM_I2C_ADDR + depends on KAHLEE_USE_I2C_TPM + default XXX + endif # BOARD_GOOGLE_KAHLEE || BOARD_GOOGLE_GRUNT -- To view, visit https://review.coreboot.org/22960 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia866f80de0164d8cec84e204a5fe93bb53df547f Gerrit-Change-Number: 22960 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Ching <chingcodes(a)chromium.org>

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Change in coreboot[master]: soc/amd/stoneyridge: Add I2C support
by Chris Ching (Code Review) 20 Dec '17

20 Dec '17

Chris Ching has uploaded this change for review. ( https://review.coreboot.org/22959 Change subject: soc/amd/stoneyridge: Add I2C support ...................................................................... soc/amd/stoneyridge: Add I2C support BUG=b:69416132 BRANCH=none TEST=make all Change-Id: Id940af917c9525aba7bc25eea0821f5f36a36653 Signed-off-by: Chris Ching <chingcodes(a)chromium.org> --- A src/soc/amd/common/block/i2c/Kconfig M src/soc/amd/stoneyridge/Kconfig 2 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/22959/1 diff --git a/src/soc/amd/common/block/i2c/Kconfig b/src/soc/amd/common/block/i2c/Kconfig new file mode 100644 index 0000000..6b6d4c0 --- /dev/null +++ b/src/soc/amd/common/block/i2c/Kconfig @@ -0,0 +1,11 @@ +config SOC_AMD_COMMON_BLOCK_I2C + bool + select DRIVERS_I2C_DESIGNWARE + help + AMD Processor I2C support + +config SOC_AMD_COMMON_BLOCK_I2C_DEBUG + bool + depends on SOC_AMD_COMMON_BLOCK_I2C + help + Enable debug output for I2C diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 816de89..921c169 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -46,6 +46,7 @@ select SOC_AMD_PI select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK + select SOC_AMD_COMMON_BLOCK_I2C select SOC_AMD_COMMON_BLOCK_PCI select SOC_AMD_COMMON_BLOCK_PI select SOC_AMD_COMMON_BLOCK_PSP @@ -370,4 +371,8 @@ depends on CHROMEOS default "apu/amdfw" +config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ + int + default 133 + endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 -- To view, visit https://review.coreboot.org/22959 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Id940af917c9525aba7bc25eea0821f5f36a36653 Gerrit-Change-Number: 22959 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Ching <chingcodes(a)chromium.org>

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Change in coreboot[master]: ic2/designware: Move Intel i2c logic to shared driver
by build bot (Jenkins) (Code Review) 20 Dec '17

20 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22822 ) Change subject: ic2/designware: Move Intel i2c logic to shared driver ...................................................................... Patch Set 8: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19628/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64852/ : SUCCESS -- To view, visit https://review.coreboot.org/22822 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Idb453a4d2411163e6b4a8422310bf272eac5d379 Gerrit-Change-Number: 22822 Gerrit-PatchSet: 8 Gerrit-Owner: Chris Ching <chingcodes(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Chris Ching <chingcodes(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 20 Dec 2017 21:38:32 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xce
by build bot (Jenkins) (Code Review) 20 Dec '17

20 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22957 ) Change subject: nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xce ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/64850/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/19626/ : SUCCESS -- To view, visit https://review.coreboot.org/22957 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ifb8aa43b6545482bc7fc136a90c4bbaa18d46089 Gerrit-Change-Number: 22957 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 20 Dec 2017 20:36:07 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit December 2017