coreboot-gerrit November 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/skylake: Make use of Intel common PMC common block
by build bot (Jenkins) (Code Review) 23 Nov '17

23 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22565 ) Change subject: soc/intel/skylake: Make use of Intel common PMC common block ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/18607/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/63714/ : SUCCESS -- To view, visit https://review.coreboot.org/22565 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I042bf62407b0acee3d24fbba2de2d482c3fbff9a Gerrit-Change-Number: 22565 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Thu, 23 Nov 2017 08:54:17 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Initialize PMC controller
by build bot (Jenkins) (Code Review) 23 Nov '17

23 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22566 ) Change subject: soc/intel/cannonlake: Initialize PMC controller ...................................................................... Patch Set 5: No Builds Executed -- To view, visit https://review.coreboot.org/22566 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ife7389f0f035b66837aace89d6e6b866e494cbe4 Gerrit-Change-Number: 22566 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Thu, 23 Nov 2017 08:52:42 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Initialize PMC controller
by build bot (Jenkins) (Code Review) 23 Nov '17

23 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22566 ) Change subject: soc/intel/cannonlake: Initialize PMC controller ...................................................................... Patch Set 4: No Builds Executed -- To view, visit https://review.coreboot.org/22566 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ife7389f0f035b66837aace89d6e6b866e494cbe4 Gerrit-Change-Number: 22566 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Thu, 23 Nov 2017 08:51:44 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Initialize PMC controller
by build bot (Jenkins) (Code Review) 23 Nov '17

23 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22566 ) Change subject: soc/intel/cannonlake: Initialize PMC controller ...................................................................... Patch Set 3: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/63715/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/18608/ : SUCCESS -- To view, visit https://review.coreboot.org/22566 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ife7389f0f035b66837aace89d6e6b866e494cbe4 Gerrit-Change-Number: 22566 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Thu, 23 Nov 2017 08:45:01 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: acpi/tpm: remove non-existent IRQ for Infineon TPM chip
by build bot (Jenkins) (Code Review) 22 Nov '17

22 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22582 ) Change subject: acpi/tpm: remove non-existent IRQ for Infineon TPM chip ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/18604/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/63711/ : SUCCESS -- To view, visit https://review.coreboot.org/22582 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id510c73cfdc14b7f82b0cc695691b55423185a0b Gerrit-Change-Number: 22582 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 23 Nov 2017 06:25:37 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: acpi/tpm: update TPM preprocessor guards
by build bot (Jenkins) (Code Review) 22 Nov '17

22 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22581 ) Change subject: acpi/tpm: update TPM preprocessor guards ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/18603/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/63710/ : SUCCESS -- To view, visit https://review.coreboot.org/22581 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia4c0d67dd3b044fe468002dff9eeb4f75f9934f9 Gerrit-Change-Number: 22581 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 23 Nov 2017 06:14:14 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: acpi/tpm: update TPM preprocessor guards
by Matt DeVillier (Code Review) 22 Nov '17

22 Nov '17

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/22581 Change subject: acpi/tpm: update TPM preprocessor guards ...................................................................... acpi/tpm: update TPM preprocessor guards Replace '#ifdef ENABLE_TPM' with '#if IS_ENABLED(CONFIG_LPC_TPM)' for platforms which use a TPM on the LPC bus, so that the TPM ACPI code isn't included when the Kconfig option is deselected. Change-Id: Ia4c0d67dd3b044fe468002dff9eeb4f75f9934f9 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/baytrail/acpi/lpc.asl M src/soc/intel/braswell/acpi/lpc.asl M src/soc/intel/fsp_baytrail/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/lynxpoint/acpi/lpc.asl 5 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/22581/1 diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl index 9512032..23048f2 100644 --- a/src/soc/intel/baytrail/acpi/lpc.asl +++ b/src/soc/intel/baytrail/acpi/lpc.asl @@ -136,7 +136,7 @@ // Include mainboard's superio.asl file. #include "acpi/superio.asl" -#ifdef ENABLE_TPM +#if IS_ENABLED(CONFIG_LPC_TPM) Device (TPM) // Trusted Platform Module { Name(_HID, EISAID("IFX0102")) diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl index bf0ba4b..e6b8cc9 100644 --- a/src/soc/intel/braswell/acpi/lpc.asl +++ b/src/soc/intel/braswell/acpi/lpc.asl @@ -138,7 +138,7 @@ /* Include mainboard's superio.asl file. */ #include "acpi/superio.asl" -#ifdef ENABLE_TPM +#if IS_ENABLED(CONFIG_LPC_TPM) Device (TPM) /* Trusted Platform Module */ { Name(_HID, EISAID("IFX0102")) diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl index 9512032..23048f2 100644 --- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl +++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl @@ -136,7 +136,7 @@ // Include mainboard's superio.asl file. #include "acpi/superio.asl" -#ifdef ENABLE_TPM +#if IS_ENABLED(CONFIG_LPC_TPM) Device (TPM) // Trusted Platform Module { Name(_HID, EISAID("IFX0102")) diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl index 67cbc05..f080b6a 100644 --- a/src/southbridge/intel/i82801gx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl @@ -199,7 +199,7 @@ #include "acpi/superio.asl" -#ifdef ENABLE_TPM +#if IS_ENABLED(CONFIG_LPC_TPM) Device (TPM) // Trusted Platform Module { Name(_HID, EISAID("IFX0102")) diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl index aa83981..3e13ac3 100644 --- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl +++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl @@ -224,7 +224,7 @@ #include "acpi/superio.asl" -#ifdef ENABLE_TPM +#if IS_ENABLED(CONFIG_LPC_TPM) Device (TPM) // Trusted Platform Module { Name(_HID, EISAID("IFX0102")) -- To view, visit https://review.coreboot.org/22581 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia4c0d67dd3b044fe468002dff9eeb4f75f9934f9 Gerrit-Change-Number: 22581 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>

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Change in coreboot[master]: acpi/tpm: remove non-existent IRQ for Infineon TPM chip
by Matt DeVillier (Code Review) 22 Nov '17

22 Nov '17

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/22582 Change subject: acpi/tpm: remove non-existent IRQ for Infineon TPM chip ...................................................................... acpi/tpm: remove non-existent IRQ for Infineon TPM chip The Infineon TPM chip used on these platforms doesn't use an IRQ line; the Linux kernel has patched to work around this, but better to remove it completely. Change-Id: Id510c73cfdc14b7f82b0cc695691b55423185a0b Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/baytrail/acpi/lpc.asl M src/soc/intel/braswell/acpi/lpc.asl M src/soc/intel/fsp_baytrail/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/lynxpoint/acpi/lpc.asl 5 files changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/22582/1 diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl index 23048f2..17d6f43 100644 --- a/src/soc/intel/baytrail/acpi/lpc.asl +++ b/src/soc/intel/baytrail/acpi/lpc.asl @@ -155,7 +155,6 @@ IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - IRQ (Edge, Activehigh, Exclusive) { 6 } }) } #endif diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl index e6b8cc9..eb4a16a 100644 --- a/src/soc/intel/braswell/acpi/lpc.asl +++ b/src/soc/intel/braswell/acpi/lpc.asl @@ -157,7 +157,6 @@ IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - IRQ (Edge, Activehigh, Exclusive) { 6 } }) } #endif diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl index 23048f2..17d6f43 100644 --- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl +++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl @@ -155,7 +155,6 @@ IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - IRQ (Edge, Activehigh, Exclusive) { 6 } }) } #endif diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl index f080b6a..2bcd06f 100644 --- a/src/southbridge/intel/i82801gx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl @@ -218,7 +218,6 @@ IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - IRQ (Edge, Activehigh, Exclusive) { 6 } }) } #endif diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl index 3e13ac3..1df49e3 100644 --- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl +++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl @@ -243,7 +243,6 @@ IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - IRQ (Edge, Activehigh, Exclusive) { 6 } }) } #endif -- To view, visit https://review.coreboot.org/22582 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Id510c73cfdc14b7f82b0cc695691b55423185a0b Gerrit-Change-Number: 22582 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>

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Change in coreboot[master]: lib/spd_bin: Only build when CONFIG option is set
by build bot (Jenkins) (Code Review) 22 Nov '17

22 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22575 ) Change subject: lib/spd_bin: Only build when CONFIG option is set ...................................................................... Patch Set 3: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/63709/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/18602/ : SUCCESS -- To view, visit https://review.coreboot.org/22575 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I97a4d810199c96912d13737046e6041b74315164 Gerrit-Change-Number: 22575 Gerrit-PatchSet: 3 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 23 Nov 2017 05:47:05 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: lib/spd_bin: Only build when CONFIG option is set
by build bot (Jenkins) (Code Review) 22 Nov '17

22 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22575 ) Change subject: lib/spd_bin: Only build when CONFIG option is set ...................................................................... Patch Set 2: Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/63708/ : UNSTABLE -- To view, visit https://review.coreboot.org/22575 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I97a4d810199c96912d13737046e6041b74315164 Gerrit-Change-Number: 22575 Gerrit-PatchSet: 2 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 23 Nov 2017 05:37:43 +0000 Gerrit-HasComments: No

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coreboot-gerrit November 2017