coreboot-gerrit January 2017

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: amd/mct/ddr3: Free malloced resources in failure branches
by Timothy Pearson 10 Jan '17

10 Jan '17

Timothy Pearson (tpearson(a)raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18074 -gerrit commit ca319c536629a4075ab3c8b73386ccfd9184668f Author: Timothy Pearson <tpearson(a)raptorengineering.com> Date: Mon Jan 9 14:54:24 2017 -0600 amd/mct/ddr3: Free malloced resources in failure branches Malloced resources were not freed in failure branches during S3 parameter save. Clean up Coverity warnings by freeing resources in failure branches. Found-by: Coverity Scan #1347344 Change-Id: I5f119874e52ef2090ca1579db170a49a2a6a0a2a Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> --- src/northbridge/amd/amdmct/mct_ddr3/s3utils.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index 4013c2e..f69b6c4 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -1123,13 +1123,16 @@ int8_t save_mct_information_to_nvram(void) set_option("allow_spd_nvram_cache_restore", &nvram); printk(BIOS_DEBUG, "Hardware configuration unchanged since last boot; skipping write\n"); + free(persistent_data); return 0; } /* Obtain CBFS file offset */ s3nv_offset = get_s3nv_file_offset(); - if (s3nv_offset == -1) + if (s3nv_offset == -1) { + free(persistent_data); return -1; + } /* Align flash pointer to nearest boundary */ s3nv_offset &= ~(CONFIG_S3_DATA_SIZE-1);

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Patch set updated for coreboot: amd/mct/ddr3: Rework memory speed to clock value conversion logic
by Timothy Pearson 10 Jan '17

10 Jan '17

Timothy Pearson (tpearson(a)raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18073 -gerrit commit 3effce5b037612642ecd4925e838c0d4c7fc7f85 Author: Timothy Pearson <tpearson(a)raptorengineering.com> Date: Mon Jan 9 14:27:09 2017 -0600 amd/mct/ddr3: Rework memory speed to clock value conversion logic The existing DRAM clock speed to configuration value logic contained an error resulting in a theoretical out of bounds read. While this would not be hit on real hardware, it was prudent to clean up the logic to avoid the associated Coverity warning. Found-by: Coverity Scan #1347353 Change-Id: Ic3de3074f51d52be112a2d6f2d68e35dc881dd2e Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> --- src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 7b9fa65..f726345 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -256,11 +256,11 @@ static uint16_t fam15h_mhz_to_memclk_config(uint16_t freq) /* Compute the index value for the given frequency */ for (iter = 0; iter <= 0x16; iter++) { - if (fam15h_freq_tab[iter] == freq) + if (fam15h_freq_tab[iter] == freq) { + freq = iter; break; + } } - if (fam15h_freq_tab[iter] == freq) - freq = iter; if (freq == 0) freq = 0x4; @@ -274,11 +274,11 @@ static uint16_t fam10h_mhz_to_memclk_config(uint16_t freq) /* Compute the index value for the given frequency */ for (iter = 0; iter <= 0x6; iter++) { - if (fam10h_freq_tab[iter] == freq) + if (fam10h_freq_tab[iter] == freq) { + freq = iter; break; + } } - if (fam10h_freq_tab[iter] == freq) - freq = iter; if (freq == 0) freq = 0x3;

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Patch set updated for coreboot: amd/mct/ddr3: Correctly program maximum read latency
by Timothy Pearson 10 Jan '17

10 Jan '17

Timothy Pearson (tpearson(a)raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18072 -gerrit commit 867b0c6f01379b21cef1848d91df72e5e3cf205b Author: Timothy Pearson <tpearson(a)raptorengineering.com> Date: Mon Jan 9 14:19:37 2017 -0600 amd/mct/ddr3: Correctly program maximum read latency The existing code inadvertently calculated the maximum read latency for nonexistent channel 2 instead of for channels 0 and 1 as intended. Fix the calls to the maximum read latency training function. Found-by: Coverity Scan #1347354 Change-Id: If34b204ac73cd20859102cc3b2f40bc99c2ce471 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> --- src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c index fd8a8e7..984f604 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c @@ -1484,8 +1484,9 @@ static void dqsTrainRcvrEn_SW_Fam15(struct MCTStatStruc *pMCTstat, } } - /* Calculate and program MaxRdLatency */ - Calc_SetMaxRdLatency_D_Fam15(pMCTstat, pDCTstat, Channel, 0); + /* Calculate and program MaxRdLatency for both channels */ + Calc_SetMaxRdLatency_D_Fam15(pMCTstat, pDCTstat, 0, 0); + Calc_SetMaxRdLatency_D_Fam15(pMCTstat, pDCTstat, 1, 0); if (_DisableDramECC) { mct_EnableDimmEccEn_D(pMCTstat, pDCTstat, _DisableDramECC);

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Patch merged into coreboot/master: SPI: Fix command-response behavior
by gerrit＠coreboot.org 10 Jan '17

10 Jan '17

the following patch was just integrated into master: commit 85b2b27e3309fcd783b825682dd715bee089ad01 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Jan 10 06:25:57 2017 +0200 SPI: Fix command-response behavior Fix SPI flash ops regressions after commit: c2973d1 spi: Get rid of SPI_ATOMIC_SEQUENCING When spi_flash_cmd() is called with argument response==NULL, only send out command without reading back the response. Change-Id: I28a94f208b4a1983d45d69d46db41391e267891d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/18082 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson(a)raptorengineering.com> Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/18082 for details. -gerrit

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Patch set updated for coreboot: drivers/net/rt8168: Add a macaddress cbfsfile using Kconfig
by Arthur Heymans 10 Jan '17

10 Jan '17

Arthur Heymans (arthur(a)aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18088 -gerrit commit 814b3f3993488e4fbc52892e42469fd8a31d0a61 Author: Arthur Heymans <arthur(a)aheymans.xyz> Date: Tue Jan 10 15:44:47 2017 +0100 drivers/net/rt8168: Add a macaddress cbfsfile using Kconfig The default macaddress in rt8168.c can be changed with a cbfsfile called macaddress. This patch makes it possible to add such a file using Kconfig at build time. This also changes the name of the cbfsfile from "macaddress" to "rt8168-macaddress" to avoid confusion. Change-Id: I24674d8df11845167b837b79344427ce0c67f4fb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- src/drivers/net/Kconfig | 10 ++++++++++ src/drivers/net/Makefile.inc | 9 +++++++++ src/drivers/net/r8168.c | 2 +- 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/src/drivers/net/Kconfig b/src/drivers/net/Kconfig index e9c6e71..274a591 100644 --- a/src/drivers/net/Kconfig +++ b/src/drivers/net/Kconfig @@ -3,3 +3,13 @@ config REALTEK_8168_RESET help This forces a realtek 10ec:8168 card to reset to ensure power state is correct at boot. + +config REALTEK_8168_MACADDRESS + string "Realtek rt8168 mac address" + depends on REALTEK_8168_RESET + default "00:e0:4c:00:c0:b0" + help + This is a string to set the mac address on a Realtek rt8168 card. + It must be in the form of "xx:xx:xx:xx:xx:xx", where x is a + hexadecimal number for it to be valid. Failing to do so will + result in the default macaddress being used. diff --git a/src/drivers/net/Makefile.inc b/src/drivers/net/Makefile.inc index e435d48..bde2cbb 100644 --- a/src/drivers/net/Makefile.inc +++ b/src/drivers/net/Makefile.inc @@ -1,3 +1,12 @@ romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c ramstage-$(CONFIG_REALTEK_8168_RESET) += r8168.c + +$(obj)/rt8168-macaddress: + echo " Creating a file holding the rt8168 macaddress" + printf %s $(CONFIG_REALTEK_8168_MACADDRESS) > $@ + +cbfs-files-$(CONFIG_REALTEK_8168_RESET) += rt8168-macaddress +rt8168-macaddress-file := $(obj)/rt8168-macaddress +rt8168-macaddress-type := raw + diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 90171d5..b226a74 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -88,7 +88,7 @@ static void program_mac_address(struct device *dev, u16 io_base) int i = 0; u8 mac[6] = { 0x00, 0xe0, 0x4c, 0x00, 0xc0, 0xb0 }; - if (!cbfs_boot_locate(&fh, "macaddress", &matchraw)) { + if (!cbfs_boot_locate(&fh, "rt8168-macaddress", &matchraw)) { if (rdev_readat(&fh.data, macstrbuf, 0, MACLEN) == MACLEN) get_mac_address(mac, macstrbuf); else

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Patch merged into coreboot/master: amd/mct/ddr3: Allow critical delay delta to go negative
by gerrit＠coreboot.org 10 Jan '17

10 Jan '17

the following patch was just integrated into master: commit 5153cbfeb3498b75efdde6c7aa312d5920541702 Author: Timothy Pearson <tpearson(a)raptorengineering.com> Date: Mon Jan 9 14:10:25 2017 -0600 amd/mct/ddr3: Allow critical delay delta to go negative The critical delay delta was incorrectly specified as an unsigned short. Use a signed short instead. Found-by: Coverity Scan #1347355 Change-Id: I37d769afb8c8af85a0375ae459e9d4ab0adcca74 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> Reviewed-on: https://review.coreboot.org/18071 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> See https://review.coreboot.org/18071 for details. -gerrit

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Patch merged into coreboot/master: amd/mct/ddr3: Correctly configure CsMux45
by gerrit＠coreboot.org 10 Jan '17

10 Jan '17

the following patch was just integrated into master: commit cf1cb5b2d4f528e7eab55ee9393cf72016bac888 Author: Timothy Pearson <tpearson(a)raptorengineering.com> Date: Mon Jan 9 13:19:29 2017 -0600 amd/mct/ddr3: Correctly configure CsMux45 The existing logic to set up CsMux45 used an incorrect mask and comparison value due to a copy + paste editing error. Use the correct mask and comparison value for the last two values. Found-by: Coverity Scan #1347385 Change-Id: Ic08a52977df90b9952e434e71cd12dbc6d7e1443 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> Reviewed-on: https://review.coreboot.org/18070 Reviewed-by: Martin Roth <martinroth(a)google.com> Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See https://review.coreboot.org/18070 for details. -gerrit

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Patch merged into coreboot/master: amd/mct/ddr3: Wait for northbridge P-state transitions
by gerrit＠coreboot.org 10 Jan '17

10 Jan '17

the following patch was just integrated into master: commit aeaabd3fa36950756f1cb818882ccafe8ff2c1f5 Author: Timothy Pearson <tpearson(a)raptorengineering.com> Date: Mon Jan 9 12:33:22 2017 -0600 amd/mct/ddr3: Wait for northbridge P-state transitions The existing code waiting for northbridge P-state transitions contained a logical error preventing correct operation. Fix the logical error and force coreboot to wait for the P-state transitions per the BKDG. Found-by: Coverity Scan #1347388 Change-Id: I35f498c836db1439734abe684354c18c8e160368 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> Reviewed-on: https://review.coreboot.org/18069 Reviewed-by: Martin Roth <martinroth(a)google.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> See https://review.coreboot.org/18069 for details. -gerrit

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Patch set updated for coreboot: drivers/net: Change cbfsfile from macaddress to rt8168-macaddress
by Arthur Heymans 10 Jan '17

10 Jan '17

Arthur Heymans (arthur(a)aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18089 -gerrit commit 250a2d1c78aff7d41005cc42a58e4d0b48fc8e71 Author: Arthur Heymans <arthur(a)aheymans.xyz> Date: Tue Jan 10 15:48:38 2017 +0100 drivers/net: Change cbfsfile from macaddress to rt8168-macaddress The name macaddress is quite generic and could confuse users that it can override the macaddress of a arbitrary networking devices. Change-Id: Idffa7ea0ca8a11f472baea59d1e81191aaa022b2 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- src/drivers/net/Makefile.inc | 7 ++++--- src/drivers/net/r8168.c | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/src/drivers/net/Makefile.inc b/src/drivers/net/Makefile.inc index fdb85cc..ff98e5b 100644 --- a/src/drivers/net/Makefile.inc +++ b/src/drivers/net/Makefile.inc @@ -6,6 +6,7 @@ $(obj)/macaddress: echo " Creating a file holding the rt8168 macaddress" printf %s $(CONFIG_REALTEK_8168_MACADDRESS) > $@ -cbfs-files-$(CONFIG_REALTEK_8168_RESET) += macaddress -macaddress-file := $(obj)/macaddress -macaddress-type := raw +cbfs-files-$(CONFIG_REALTEK_8168_RESET) += rt8168-macaddress +rt8168-macaddress-file := $(obj)/rt8168-macaddress +rt8168-macaddress-type := raw + diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 90171d5..b226a74 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -88,7 +88,7 @@ static void program_mac_address(struct device *dev, u16 io_base) int i = 0; u8 mac[6] = { 0x00, 0xe0, 0x4c, 0x00, 0xc0, 0xb0 }; - if (!cbfs_boot_locate(&fh, "macaddress", &matchraw)) { + if (!cbfs_boot_locate(&fh, "rt8168-macaddress", &matchraw)) { if (rdev_readat(&fh.data, macstrbuf, 0, MACLEN) == MACLEN) get_mac_address(mac, macstrbuf); else

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Patch set updated for coreboot: drivers/net/rt8168: Add a macaddress cbfsfile using Kconfig
by Arthur Heymans 10 Jan '17

10 Jan '17

Arthur Heymans (arthur(a)aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18088 -gerrit commit f33ec95f4df48400c5bdb08876dd62ca102f9fe1 Author: Arthur Heymans <arthur(a)aheymans.xyz> Date: Tue Jan 10 15:44:47 2017 +0100 drivers/net/rt8168: Add a macaddress cbfsfile using Kconfig The default macaddress in rt8168.c can be changed with a cbfsfile called macaddress. This patch makes it possible to add such a file using Kconfig at build time. Change-Id: I24674d8df11845167b837b79344427ce0c67f4fb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- src/drivers/net/Kconfig | 10 ++++++++++ src/drivers/net/Makefile.inc | 8 ++++++++ 2 files changed, 18 insertions(+) diff --git a/src/drivers/net/Kconfig b/src/drivers/net/Kconfig index e9c6e71..274a591 100644 --- a/src/drivers/net/Kconfig +++ b/src/drivers/net/Kconfig @@ -3,3 +3,13 @@ config REALTEK_8168_RESET help This forces a realtek 10ec:8168 card to reset to ensure power state is correct at boot. + +config REALTEK_8168_MACADDRESS + string "Realtek rt8168 mac address" + depends on REALTEK_8168_RESET + default "00:e0:4c:00:c0:b0" + help + This is a string to set the mac address on a Realtek rt8168 card. + It must be in the form of "xx:xx:xx:xx:xx:xx", where x is a + hexadecimal number for it to be valid. Failing to do so will + result in the default macaddress being used. diff --git a/src/drivers/net/Makefile.inc b/src/drivers/net/Makefile.inc index e435d48..fdb85cc 100644 --- a/src/drivers/net/Makefile.inc +++ b/src/drivers/net/Makefile.inc @@ -1,3 +1,11 @@ romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c ramstage-$(CONFIG_REALTEK_8168_RESET) += r8168.c + +$(obj)/macaddress: + echo " Creating a file holding the rt8168 macaddress" + printf %s $(CONFIG_REALTEK_8168_MACADDRESS) > $@ + +cbfs-files-$(CONFIG_REALTEK_8168_RESET) += macaddress +macaddress-file := $(obj)/macaddress +macaddress-type := raw

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coreboot-gerrit January 2017