the following patch was just integrated into master:
commit 6fcfd919f1f6231bb03eefcff01cc39cb18abb90
Author: Shaunak Saha <shaunak.saha(a)intel.com>
Date: Mon Sep 19 14:55:24 2016 -0700
soc/apollolake: Correct the comment section in gpio.asl
This patch corrects the comment section in gpio.asl for
GPE method.
Change-Id: I45771a295ee1eda00b9699f42cddd120223ff7bf
Signed-off-by: Shaunak Saha <shaunak.saha(a)intel.com>
Reviewed-on: https://review.coreboot.org/16647
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16647 for details.
-gerrit
the following patch was just integrated into master:
commit 401bd31b2d9efed119d82eb4c153bd273fe64b49
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 17:24:55 2016 -0700
mainboard/google/reef: Enable cr50 TPM interrupt
Enable the cr50 TPM and interrupt as GPE0_DW1_28 for use during
verstage. The interrupt is left in APIC mode as the GPE is
still latched when the GPIO is pulled low.
BUG=chrome-os-partner:53336
Change-Id: Ib0247653bdcbaccb645cd16b81d7ec3c38f669af
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16673
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16673 for details.
-gerrit
the following patch was just integrated into master:
commit 94cc485338a30c50c74a7bb02d14a52f35ff41c3
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 17:22:10 2016 -0700
drivers/i2c/tpm/cr50: Support interrupts for status
Support reading the ACPI GPE status (on x86) to determine when
the cr50 is ready to return response data or is done processing
written data. If the interrupt is not defined by Kconfig then
it will continue to use the safe delay.
This was tested with reef hardware and a modified cr50 image
that generates interrupts at the intended points.
BUG=chrome-os-partner:53336
Change-Id: Ic8f805159650c45382cacac8840450a1f8b4d7a1
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16672
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16672 for details.
-gerrit
the following patch was just integrated into master:
commit 2e79009503bcb0bc324ca60f9d4a9121dcdcbf84
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 12:05:49 2016 -0700
soc/intel/apollolake: Add function to read and clear GPE status
Implement the generic acpi_get_gpe() function to read and clear
the GPE status for a specific GPE.
Tested by watching GPE status in a loop while generating interrupts
manually from the EC console.
BUG=chrome-os-partner:53336
Change-Id: I482ff52051a48441333b573f1cd0fa7f7579a6ab
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16671
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16671 for details.
-gerrit
the following patch was just integrated into master:
commit a673d1cd2d4d74fdc6f373952f14667f51908f1d
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 12:02:54 2016 -0700
soc/intel/apollolake: Initialize GPEs in bootblock
Initialize the GPEs from mainboard config in bootblock, so they
can be used in verstage to query latched interrupt status.
I still left it called in ramstage just to be sure that the
configuration was not overwritten in FSP stages.
Tested by reading and reporting GPE status in a loop in verstage
and manually triggering an interrupt on EC console.
BUG=chrome-os-partner:53336
Change-Id: Iacd0483e4b3229aca602bb5bb40586eedf35a6ea
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16670
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16670 for details.
-gerrit
the following patch was just integrated into master:
commit 1f6e6813554606bb23481fe64401809ab43bdcc7
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 12:04:19 2016 -0700
x86: acpi: Add function for querying GPE status
Add a function that can be implemented by the SOC to read
and clear the status of a single GPE. This can be used
during firmware to poll for interrupt status.
BUG=chrome-os-partner:53336
Change-Id: I551276f36ff0d2eb5b5ea13f019cdf4a3c749a09
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16669
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16669 for details.
-gerrit
the following patch was just integrated into master:
commit f235a9b1b06a6374d473c9f610eb945cf4633c74
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 17:19:10 2016 -0700
drivers/i2c/tpm/cr50: Improve data handling and function names
Unify the function names to be consistent throughout the driver
and improve the handling while waiting for data available and
data expected flags from the TPM.
BUG=chrome-os-partner:53336
Change-Id: Ie2dfb7ede1bcda0e77070df945c47c1428115907
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16668
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16668 for details.
-gerrit
the following patch was just integrated into master:
commit d3920e71d61e76d4e8ae30bd8466d22b7bf3432c
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 17:09:01 2016 -0700
drivers/i2c/tpm/cr50: Clean up locality functions
Clean up the mask and timeout handling in the locality functions
that were copied from the original driver.
BUG=chrome-os-partner:53336
Change-Id: Ifdcb3be0036b2c02bfbd1bcd326e9519d3726ee0
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16667
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16667 for details.
-gerrit
the following patch was just integrated into master:
commit 510cb6a1444d4b85dd6d374280322e35044e16d3
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 17:05:45 2016 -0700
drivers/i2c/tpm/cr50: Rename i2c read/write functions
Rename the low-level functions from iic_tpm_read/write to
cr50_i2c_read/write to better match the driver name, and pass in the
tpm_chip structure to the low-level read/write functions as it will
be needed in future changes.
BUG=chrome-os-partner:53336
Change-Id: I826a7f024f8d137453af86ba920e0a3a734f7349
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16666
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16666 for details.
-gerrit
the following patch was just integrated into master:
commit 1dc036ce4878db80d0ed9ae223b06c5d417fd03a
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 16:49:23 2016 -0700
drivers/i2c/tpm/cr50: Clean up timeouts
Use two different timeouts in the driver. The 2ms timeout is needed
to be safe for cr50 to cover the extended timeout that is seen with
some commands. The other at 2 seconds which is a TPM spec timeout.
BUG=chrome-os-partner:53336
Change-Id: Ia396fc48b8fe6e56e7071db9d74561de02b5b50e
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/16665
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/16665 for details.
-gerrit