Patch set updated for coreboot: mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage
by Timothy Pearson 25 Apr '16
by Timothy Pearson 25 Apr '16
25 Apr '16
Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14502
-gerrit
commit 9e77dba0329372fbf688113d8948e2766a839eac
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Sun Apr 24 20:33:29 2016 -0500
mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage
The existing memory test routine was insufficient to detect certain types
of bus instability related to multiple incompatible RDIMMs on one channel.
Add a PRNG second stage test to the memory test routine. This second stage
test reliably detects faults in memory setup for RDIMM configurations that
also fail under the proprietary BIOS.
Change-Id: I44721447ce4c2b728d4a8f328ad1a3eb8f324d3d
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/mainboard/asus/kcma-d8/romstage.c | 62 ++++++++++++++++++++++++++++++----
src/mainboard/asus/kgpe-d16/romstage.c | 62 ++++++++++++++++++++++++++++++----
2 files changed, 110 insertions(+), 14 deletions(-)
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index c217ff3..9d1d95f 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2015 Raptor Engineering
+ * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
*
* Copyright (C) 2007 AMD
* Written by Yinghai Lu <yinghailu(a)amd.com> for AMD.
@@ -246,28 +246,76 @@ static void execute_memory_test(void)
{
/* Test DRAM functionality */
uint32_t i;
+ uint32_t v;
+ uint32_t w;
+ uint32_t x;
+ uint32_t y;
+ uint32_t z;
uint32_t* dataptr;
- printk(BIOS_DEBUG, "Writing test patterns to memory...\n");
+ uint32_t readback;
+ uint32_t start = 0x300000;
+ printk(BIOS_DEBUG, "Writing test pattern 1 to memory...\n");
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
*dataptr = 0x55555555;
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
*dataptr = 0xaaaaaaaa;
}
printk(BIOS_DEBUG, "Done!\n");
printk(BIOS_DEBUG, "Testing memory...\n");
- uint32_t readback;
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
readback = *dataptr;
if (readback != 0x55555555)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0x55555555);
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
readback = *dataptr;
if (readback != 0xaaaaaaaa)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0xaaaaaaaa);
}
printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Writing test pattern 2 to memory...\n");
+ /* Set up the PRNG seeds for initial write */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ *dataptr = w;
+ }
+ printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Testing memory...\n");
+ /* Reset the PRNG seeds for readback */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ readback = *dataptr;
+ if (readback != w)
+ printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, w);
+ }
+ printk(BIOS_DEBUG, "Done!\n");
}
#endif
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index e6bd91c..5a7400e 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
*
* Copyright (C) 2007 AMD
* Written by Yinghai Lu <yinghailu(a)amd.com> for AMD.
@@ -287,28 +287,76 @@ static void execute_memory_test(void)
{
/* Test DRAM functionality */
uint32_t i;
+ uint32_t v;
+ uint32_t w;
+ uint32_t x;
+ uint32_t y;
+ uint32_t z;
uint32_t* dataptr;
- printk(BIOS_DEBUG, "Writing test patterns to memory...\n");
+ uint32_t readback;
+ uint32_t start = 0x300000;
+ printk(BIOS_DEBUG, "Writing test pattern 1 to memory...\n");
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
*dataptr = 0x55555555;
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
*dataptr = 0xaaaaaaaa;
}
printk(BIOS_DEBUG, "Done!\n");
printk(BIOS_DEBUG, "Testing memory...\n");
- uint32_t readback;
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
readback = *dataptr;
if (readback != 0x55555555)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0x55555555);
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
readback = *dataptr;
if (readback != 0xaaaaaaaa)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0xaaaaaaaa);
}
printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Writing test pattern 2 to memory...\n");
+ /* Set up the PRNG seeds for initial write */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ *dataptr = w;
+ }
+ printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Testing memory...\n");
+ /* Reset the PRNG seeds for readback */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ readback = *dataptr;
+ if (readback != w)
+ printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, w);
+ }
+ printk(BIOS_DEBUG, "Done!\n");
}
#endif
1
0
New patch to review for coreboot: mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage
by Timothy Pearson 25 Apr '16
by Timothy Pearson 25 Apr '16
25 Apr '16
Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14502
-gerrit
commit 28c34fe669fe7eda0d51a4ddc9d2b1446a783a40
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Sun Apr 24 20:33:29 2016 -0500
mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage
The existing memory test routine was insufficient to detect certain types
of bus instability related to multiple incompatible RDIMMs on one channel.
Add a PRNG second stage test to the memory test routine. This second stage
test reliably detects faults in memory setup for RDIMM configurations that
also fail under the proprietary BIOS.
Change-Id: I44721447ce4c2b728d4a8f328ad1a3eb8f324d3d
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/mainboard/asus/kcma-d8/romstage.c | 60 ++++++++++++++++++++++++++++++----
src/mainboard/asus/kgpe-d16/romstage.c | 60 ++++++++++++++++++++++++++++++----
2 files changed, 108 insertions(+), 12 deletions(-)
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index c217ff3..fa5f226 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -246,28 +246,76 @@ static void execute_memory_test(void)
{
/* Test DRAM functionality */
uint32_t i;
+ uint32_t v;
+ uint32_t w;
+ uint32_t x;
+ uint32_t y;
+ uint32_t z;
uint32_t* dataptr;
- printk(BIOS_DEBUG, "Writing test patterns to memory...\n");
+ uint32_t readback;
+ uint32_t start = 0x300000;
+ printk(BIOS_DEBUG, "Writing test pattern 1 to memory...\n");
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
*dataptr = 0x55555555;
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
*dataptr = 0xaaaaaaaa;
}
printk(BIOS_DEBUG, "Done!\n");
printk(BIOS_DEBUG, "Testing memory...\n");
- uint32_t readback;
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
readback = *dataptr;
if (readback != 0x55555555)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0x55555555);
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
readback = *dataptr;
if (readback != 0xaaaaaaaa)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0xaaaaaaaa);
}
printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Writing test pattern 2 to memory...\n");
+ /* Set up the PRNG seeds for initial write */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ *dataptr = w;
+ }
+ printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Testing memory...\n");
+ /* Reset the PRNG seeds for readback */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ readback = *dataptr;
+ if (readback != w)
+ printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, w);
+ }
+ printk(BIOS_DEBUG, "Done!\n");
}
#endif
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index e6bd91c..8bd64d2 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -287,28 +287,76 @@ static void execute_memory_test(void)
{
/* Test DRAM functionality */
uint32_t i;
+ uint32_t v;
+ uint32_t w;
+ uint32_t x;
+ uint32_t y;
+ uint32_t z;
uint32_t* dataptr;
- printk(BIOS_DEBUG, "Writing test patterns to memory...\n");
+ uint32_t readback;
+ uint32_t start = 0x300000;
+ printk(BIOS_DEBUG, "Writing test pattern 1 to memory...\n");
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
*dataptr = 0x55555555;
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
*dataptr = 0xaaaaaaaa;
}
printk(BIOS_DEBUG, "Done!\n");
printk(BIOS_DEBUG, "Testing memory...\n");
- uint32_t readback;
for (i=0; i < 0x1000000; i = i + 8) {
- dataptr = (void *)(0x300000 + i);
+ dataptr = (void *)(start + i);
readback = *dataptr;
if (readback != 0x55555555)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0x55555555);
- dataptr = (void *)(0x300000 + i + 4);
+ dataptr = (void *)(start + i + 4);
readback = *dataptr;
if (readback != 0xaaaaaaaa)
printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0xaaaaaaaa);
}
printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Writing test pattern 2 to memory...\n");
+ /* Set up the PRNG seeds for initial write */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ *dataptr = w;
+ }
+ printk(BIOS_DEBUG, "Done!\n");
+ printk(BIOS_DEBUG, "Testing memory...\n");
+ /* Reset the PRNG seeds for readback */
+ w = 0x55555555;
+ x = 0xaaaaaaaa;
+ y = 0x12345678;
+ z = 0x87654321;
+ for (i=0; i < 0x1000000; i = i + 4) {
+ /* Use Xorshift as a PRNG to stress test the bus */
+ v = x;
+ v ^= v << 11;
+ v ^= v >> 8;
+ x = y;
+ y = z;
+ z = w;
+ w ^= w >> 19;
+ w ^= v;
+ dataptr = (void *)(start + i);
+ readback = *dataptr;
+ if (readback != w)
+ printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, w);
+ }
+ printk(BIOS_DEBUG, "Done!\n");
}
#endif
1
0
New patch to review for coreboot: nb/amd/mct_ddr3: Report correct DIMM in MRS setup routines
by Timothy Pearson 25 Apr '16
by Timothy Pearson 25 Apr '16
25 Apr '16
Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14501
-gerrit
commit a8f5544e2db482c3cad132b161178541d70b6908
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Sun Apr 24 20:27:28 2016 -0500
nb/amd/mct_ddr3: Report correct DIMM in MRS setup routines
The wrong DIMM number was used in the initial non-target MRS
setup routines. This had no functional impact other than to
print the wrong DIMM number in the DDR3 verbose debug output.
Change-Id: I480118ed00e1786a06e641a56f0fb19cd87f92eb
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
index 6e1c850..c6ec905 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
- * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -779,7 +779,7 @@ void prepareDimms(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat,
/* Retrieve normal settings of the MRS control word and clear Rtt_Nom */
if (is_fam15h()) {
- tempW = mct_MR1(pMCTstat, pDCTstat, dct, dimm*2+rank) & 0xffff;
+ tempW = mct_MR1(pMCTstat, pDCTstat, dct, currDimm*2+rank) & 0xffff;
tempW &= ~(0x0244);
} else {
/* Set TDQS=1b for x8 DIMM, TDQS=0b for x4 DIMM, when mixed x8 & x4 */
@@ -862,7 +862,7 @@ void prepareDimms(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat,
/* Retrieve normal settings of the MRS control word and clear Rtt_WR */
if (is_fam15h()) {
- tempW = mct_MR2(pMCTstat, pDCTstat, dct, dimm*2+rank) & 0xffff;
+ tempW = mct_MR2(pMCTstat, pDCTstat, dct, currDimm*2+rank) & 0xffff;
tempW &= ~(0x0600);
} else {
/* program MrsAddress[7,6,5:3]=SRT,ASR,CWL,
1
0
New patch to review for coreboot: nb/amd/mct_ddr3: Fix a number of minor errors in RDIMM setup
by Timothy Pearson 25 Apr '16
by Timothy Pearson 25 Apr '16
25 Apr '16
Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14500
-gerrit
commit c132949afc35ea9d32fb256b8885baaa72574e06
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Sun Apr 24 20:22:28 2016 -0500
nb/amd/mct_ddr3: Fix a number of minor errors in RDIMM setup
The existing RDIMM RC control word send routines were a hodgepodge
of various AGESA chunks with different ways of handling the same
task. Unify the control word chip select setup, use precise timing
routines on Family 15h, fix a couple of incorrect masks, and add
additional debugging statements.
It is believed that this patch is cosmetic and does not significantly
alter existing functionality.
Change-Id: Ie4ec7b6a7be7fce09e89f9eec146cc98b15b6160
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/northbridge/amd/amdmct/mct_ddr3/mctrci.c | 89 ++++++++++++++++++++++------
1 file changed, 72 insertions(+), 17 deletions(-)
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
index f5d488a..951a712 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
- * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -128,6 +128,7 @@ static uint8_t fam15h_rdimm_rc2_ibt_code(struct DCTStatStruc *pDCTstat, uint8_t
*/
}
+ printk(BIOS_SPEW, "%s: DCT %d IBT code: %01x\n", __func__, dct, control_code);
return control_code;
}
@@ -184,7 +185,7 @@ static u32 mct_ControlRC(struct MCTStatStruc *pMCTstat,
uint8_t package_type = mctGet_NVbits(NV_PACK_TYPE);
uint8_t MaxDimmsInstallable = mctGet_NVbits(NV_MAX_DIMMS_PER_CH);
- DimmNum = (MrsChipSel >> rc_word_chip_select_lower_bit()) & 0xfe;
+ DimmNum = (MrsChipSel >> rc_word_chip_select_lower_bit()) & 0x7;
if (dct == 1)
DimmNum++;
@@ -225,6 +226,10 @@ static u32 mct_ControlRC(struct MCTStatStruc *pMCTstat,
val = (pDCTstat->CtrlWrd4 >> (DimmNum << 2)) & 0xff;
} else if (CtrlWordNum == 5) {
val = (pDCTstat->CtrlWrd5 >> (DimmNum << 2)) & 0xff;
+ } else if (CtrlWordNum == 6) {
+ val = ((pDCTstat->spd_data.spd_bytes[DimmNum][72] & 0xf) >> (DimmNum << 2)) & 0xff;
+ } else if (CtrlWordNum == 7) {
+ val = (((pDCTstat->spd_data.spd_bytes[DimmNum][72] >> 4) & 0xf) >> (DimmNum << 2)) & 0xff;
} else if (CtrlWordNum == 8) {
if (is_fam15h()) {
val = (fam15h_rdimm_rc2_ibt_code(pDCTstat, dct) & 0xe) >> 1;
@@ -253,12 +258,18 @@ static u32 mct_ControlRC(struct MCTStatStruc *pMCTstat,
val = 0x1; /* 1.35V */
else
val = 0x0; /* 1.5V */
- } else if (CtrlWordNum >= 12) {
- val = 0x0; /* Unset */
+ } else if (CtrlWordNum == 12) {
+ val = ((pDCTstat->spd_data.spd_bytes[DimmNum][75] & 0xf) >> (DimmNum << 2)) & 0xff;
+ } else if (CtrlWordNum == 13) {
+ val = (((pDCTstat->spd_data.spd_bytes[DimmNum][75] >> 4) & 0xf) >> (DimmNum << 2)) & 0xff;
+ } else if (CtrlWordNum == 14) {
+ val = ((pDCTstat->spd_data.spd_bytes[DimmNum][76] & 0xf) >> (DimmNum << 2)) & 0xff;
+ } else if (CtrlWordNum == 15) {
+ val = (((pDCTstat->spd_data.spd_bytes[DimmNum][76] >> 4) & 0xf) >> (DimmNum << 2)) & 0xff;
}
val &= 0xf;
- printk(BIOS_SPEW, "Preparing to send DCT %d DIMM RC%d: %02x\n", dct, CtrlWordNum, val);
+ printk(BIOS_SPEW, "%s: Preparing to send DCT %d DIMM %d RC%d: %02x\n", __func__, dct, DimmNum >> 1, CtrlWordNum, val);
val = MrsChipSel | rc_word_value_to_ctl_bits(val);
val |= rc_word_address_to_ctl_bits(CtrlWordNum);
@@ -287,9 +298,12 @@ void mct_DramControlReg_Init_D(struct MCTStatStruc *pMCTstat,
u32 dev = pDCTstat->dev_dct;
u32 val, cw;
- mct_Wait(1600);
+ printk(BIOS_SPEW, "%s: Start\n", __func__);
- mct_Wait(1200);
+ if (!is_fam15h()) {
+ mct_Wait(1600);
+ mct_Wait(1200);
+ }
pDCTstat->CSPresent = pDCTstat->CSPresent_DCT[dct];
if (pDCTstat->GangedMode & 1)
@@ -304,21 +318,33 @@ void mct_DramControlReg_Init_D(struct MCTStatStruc *pMCTstat,
case 0:
case 1:
val |= 3 << 8;
+ break;
case 2:
case 3:
val |= (3 << 2) << 8;
+ break;
case 4:
case 5:
val |= (3 << 4) << 8;
+ break;
case 6:
case 7:
val |= (3 << 6) << 8;
+ break;
}
Set_NB32_DCT(dev, dct, 0xa8, val);
+ printk(BIOS_SPEW, "%s: F2xA8: %08x\n", __func__, val);
- for (cw=0; cw <=15; cw ++) {
- mct_Wait(1600);
- if (!(cw==6 || cw==7)) {
+ if (is_fam15h()) {
+ for (cw=0; cw <=15; cw ++) {
+ val = mct_ControlRC(pMCTstat, pDCTstat, dct, MrsChipSel << rc_word_chip_select_lower_bit(), cw);
+ mct_SendCtrlWrd(pMCTstat, pDCTstat, dct, val);
+ if ((cw == 2) || (cw == 8) || (cw == 10))
+ precise_ndelay_fam15(pMCTstat, 6000);
+ }
+ } else {
+ for (cw=0; cw <=15; cw ++) {
+ mct_Wait(1600);
val = mct_ControlRC(pMCTstat, pDCTstat, dct, MrsChipSel << rc_word_chip_select_lower_bit(), cw);
mct_SendCtrlWrd(pMCTstat, pDCTstat, dct, val);
}
@@ -327,6 +353,8 @@ void mct_DramControlReg_Init_D(struct MCTStatStruc *pMCTstat,
}
mct_Wait(1200);
+
+ printk(BIOS_SPEW, "%s: Done\n", __func__);
}
void FreqChgCtrlWrd(struct MCTStatStruc *pMCTstat,
@@ -344,12 +372,30 @@ void FreqChgCtrlWrd(struct MCTStatStruc *pMCTstat,
pDCTstat->DIMMAutoSpeed = pDCTstat->TargetFreq;
mem_freq = memclk_to_freq(pDCTstat->TargetFreq);
- for (MrsChipSel=0; MrsChipSel < 8; MrsChipSel++, MrsChipSel++) {
+ for (MrsChipSel = 0; MrsChipSel < 8; MrsChipSel += 2) {
if (pDCTstat->CSPresent & (1 << MrsChipSel)) {
/* 2. Program F2x[1, 0]A8[CtrlWordCS]=bit mask for target chip selects. */
val = Get_NB32_DCT(dev, dct, 0xa8);
val &= ~(0xff << 8);
- val |= (0x3 << (MrsChipSel & ~0x1)) << 8;
+
+ switch (MrsChipSel) {
+ case 0:
+ case 1:
+ val |= 3 << 8;
+ break;
+ case 2:
+ case 3:
+ val |= (3 << 2) << 8;
+ break;
+ case 4:
+ case 5:
+ val |= (3 << 4) << 8;
+ break;
+ case 6:
+ case 7:
+ val |= (3 << 6) << 8;
+ break;
+ }
Set_NB32_DCT(dev, dct, 0xa8, val);
/* Resend control word 10 */
@@ -374,23 +420,32 @@ void FreqChgCtrlWrd(struct MCTStatStruc *pMCTstat,
break;
}
- printk(BIOS_SPEW, "Preparing to send DCT %d DIMM RC%d: %02x\n", dct, 10, freq_ctl_val);
+ printk(BIOS_SPEW, "Preparing to send DCT %d DIMM %d RC%d: %02x (F2xA8: %08x)\n", dct, MrsChipSel >> 1, 10, freq_ctl_val, val);
- mct_SendCtrlWrd(pMCTstat, pDCTstat, dct, MrsChipSel << rc_word_chip_select_lower_bit() | rc_word_address_to_ctl_bits(10) | rc_word_value_to_ctl_bits(freq_ctl_val));
+ mct_SendCtrlWrd(pMCTstat, pDCTstat, dct, (MrsChipSel << rc_word_chip_select_lower_bit()) | rc_word_address_to_ctl_bits(10) | rc_word_value_to_ctl_bits(freq_ctl_val));
- mct_Wait(1600);
+ if (is_fam15h())
+ precise_ndelay_fam15(pMCTstat, 6000);
+ else
+ mct_Wait(1600);
/* Resend control word 2 */
val = mct_ControlRC(pMCTstat, pDCTstat, dct, MrsChipSel << rc_word_chip_select_lower_bit(), 2);
mct_SendCtrlWrd(pMCTstat, pDCTstat, dct, val);
- mct_Wait(1600);
+ if (is_fam15h())
+ precise_ndelay_fam15(pMCTstat, 6000);
+ else
+ mct_Wait(1600);
/* Resend control word 8 */
val = mct_ControlRC(pMCTstat, pDCTstat, dct, MrsChipSel << rc_word_chip_select_lower_bit(), 8);
mct_SendCtrlWrd(pMCTstat, pDCTstat, dct, val);
- mct_Wait(1600);
+ if (is_fam15h())
+ precise_ndelay_fam15(pMCTstat, 6000);
+ else
+ mct_Wait(1600);
}
}
pDCTstat->DIMMAutoSpeed = SaveSpeed;
1
0
Patch set updated for coreboot: nb/amd/mct_ddr3: Scale lane delays for each DIMM after MEMCLK change
by Timothy Pearson 25 Apr '16
by Timothy Pearson 25 Apr '16
25 Apr '16
Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14479
-gerrit
commit 80859b5c9567dab398859f525afb190f78422988
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Fri Apr 22 22:16:45 2016 -0500
nb/amd/mct_ddr3: Scale lane delays for each DIMM after MEMCLK change
When more than one DIMM is installed on a DCT, only the first DIMM
delay values are scaled to the new memory clock frequency after a
memory clock change during write leveling.
Store the previous memory clock of each DIMM during write leveling
to ensure that every DIMM has its delay values rescaled.
Change-Id: I56e816d3d3256925598219d92783246f5f4ab567
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
---
src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c | 4 ++--
src/northbridge/amd/amdmct/mct_ddr3/mwlc_d.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
index 9702126..6e1c850 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
@@ -1212,7 +1212,7 @@ void procConfig(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, ui
((pDCTData->WLGrossDelayPrevPass[lane_count*dimm+ByteLane] & 0x1f) << 5);
SeedTotalPreScaling[ByteLane] = (SeedTotal[ByteLane] - RegisterDelay - (0x20 * WrDqDqsEarly));
SeedTotal[ByteLane] = (int32_t) (RegisterDelay + ((((int64_t) SeedTotalPreScaling[ByteLane]) *
- fam15h_freq_tab[MemClkFreq] * 100) / (fam15h_freq_tab[pDCTData->WLPrevMemclkFreq] * 100)));
+ fam15h_freq_tab[MemClkFreq] * 100) / (fam15h_freq_tab[pDCTData->WLPrevMemclkFreq[dimm]] * 100)));
}
/* Generate register values from seeds */
@@ -1326,7 +1326,7 @@ void procConfig(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, ui
}
}
- pDCTData->WLPrevMemclkFreq = MemClkFreq;
+ pDCTData->WLPrevMemclkFreq[dimm] = MemClkFreq;
setWLByteDelay(pDCTstat, dct, ByteLane, dimm, 0, pass, lane_count);
}
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mwlc_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mwlc_d.h
index 28359a1..ca04d28 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mwlc_d.h
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mwlc_d.h
@@ -145,7 +145,7 @@ typedef struct _sDCTStruct
int32_t WLCriticalGrossDelayFirstPass;
int32_t WLCriticalGrossDelayPrevPass;
int32_t WLCriticalGrossDelayFinalPass;
- uint16_t WLPrevMemclkFreq;
+ uint16_t WLPrevMemclkFreq[MAX_TOTAL_DIMMS];
u16 RegMan1Present;
u8 DimmPresent[MAX_TOTAL_DIMMS];/* Indicates which DIMMs are present */
/* from Total Number of DIMMs(per Node)*/
1
0
New patch to review for coreboot: vendorcode/intel: Move FSP code out of drivers and into vendorcode
by Stefan Reinauer 24 Apr '16
by Stefan Reinauer 24 Apr '16
24 Apr '16
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14499
-gerrit
commit 6faa9c8bcfa70d308fd1462c87fe73b6093a7657
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Sun Apr 24 11:26:37 2016 -0700
vendorcode/intel: Move FSP code out of drivers and into vendorcode
Intel's vendorcode, despite not being a driver, was originally committed into
drivers. In order to keep FSP code from being spread all across the code base,
move the common FSP code from src/drivers/fsp<version>/ over into the vendor
code at src/vendorcode/intel/fsp/fsp<version>/common.
This also fixes an outstanding issue where Intel's FSP Kconfig options started
showing up twice, once in the SOC sub menu (where they belong), and once under
the drivers sub menu.
Change-Id: Ia70ee8d6afb7990aaf92b1b6ed9547ced65d53cd
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
---
src/Kconfig | 6 +-
src/drivers/intel/fsp1_0/Kconfig | 127 -------
src/drivers/intel/fsp1_0/Makefile.inc | 49 ---
src/drivers/intel/fsp1_0/cache_as_ram.inc | 124 ------
src/drivers/intel/fsp1_0/fastboot_cache.c | 257 -------------
src/drivers/intel/fsp1_0/fsp_util.c | 348 -----------------
src/drivers/intel/fsp1_0/fsp_util.h | 131 -------
src/drivers/intel/fsp1_0/fsp_values.h | 37 --
src/drivers/intel/fsp1_0/hob.c | 265 -------------
src/drivers/intel/fsp1_1/Kconfig | 118 ------
src/drivers/intel/fsp1_1/Makefile.inc | 59 ---
src/drivers/intel/fsp1_1/after_raminit.S | 171 ---------
src/drivers/intel/fsp1_1/cache_as_ram.inc | 225 -----------
src/drivers/intel/fsp1_1/car.c | 123 ------
src/drivers/intel/fsp1_1/fsp_gop.c | 96 -----
src/drivers/intel/fsp1_1/fsp_relocate.c | 53 ---
src/drivers/intel/fsp1_1/fsp_util.c | 299 ---------------
src/drivers/intel/fsp1_1/hob.c | 325 ----------------
src/drivers/intel/fsp1_1/include/fsp/api.h | 35 --
src/drivers/intel/fsp1_1/include/fsp/car.h | 49 ---
src/drivers/intel/fsp1_1/include/fsp/gma.h | 178 ---------
src/drivers/intel/fsp1_1/include/fsp/gop.h | 23 --
src/drivers/intel/fsp1_1/include/fsp/memmap.h | 47 ---
src/drivers/intel/fsp1_1/include/fsp/ramstage.h | 36 --
src/drivers/intel/fsp1_1/include/fsp/romstage.h | 98 -----
src/drivers/intel/fsp1_1/include/fsp/soc_binding.h | 39 --
src/drivers/intel/fsp1_1/include/fsp/stack.h | 31 --
.../intel/fsp1_1/include/fsp/uefi_binding.h | 35 --
src/drivers/intel/fsp1_1/include/fsp/util.h | 102 -----
src/drivers/intel/fsp1_1/raminit.c | 320 ----------------
src/drivers/intel/fsp1_1/ramstage.c | 223 -----------
src/drivers/intel/fsp1_1/romstage.c | 420 ---------------------
src/drivers/intel/fsp1_1/romstage_after_verstage.S | 48 ---
src/drivers/intel/fsp1_1/stack.c | 178 ---------
src/drivers/intel/fsp1_1/stage_cache.c | 28 --
src/drivers/intel/fsp1_1/vbt.c | 42 ---
src/drivers/intel/fsp1_1/verstage.c | 24 --
src/drivers/intel/fsp2_0/Kconfig | 6 -
src/drivers/intel/fsp2_0/Makefile.inc | 28 --
src/drivers/intel/fsp2_0/graphics.c | 105 ------
src/drivers/intel/fsp2_0/hand_off_block.c | 305 ---------------
src/drivers/intel/fsp2_0/include/fsp/api.h | 110 ------
src/drivers/intel/fsp2_0/include/fsp/info_header.h | 56 ---
src/drivers/intel/fsp2_0/include/fsp/util.h | 42 ---
src/drivers/intel/fsp2_0/memory_init.c | 73 ----
src/drivers/intel/fsp2_0/notify.c | 40 --
src/drivers/intel/fsp2_0/silicon_init.c | 59 ---
src/drivers/intel/fsp2_0/util.c | 138 -------
src/vendorcode/intel/Kconfig | 4 +
src/vendorcode/intel/Makefile.inc | 4 +
src/vendorcode/intel/fsp/fsp1_0/common/Kconfig | 127 +++++++
.../intel/fsp/fsp1_0/common/Makefile.inc | 49 +++
.../intel/fsp/fsp1_0/common/cache_as_ram.inc | 124 ++++++
.../intel/fsp/fsp1_0/common/fastboot_cache.c | 257 +++++++++++++
src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.c | 348 +++++++++++++++++
src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.h | 131 +++++++
.../intel/fsp/fsp1_0/common/fsp_values.h | 37 ++
src/vendorcode/intel/fsp/fsp1_0/common/hob.c | 265 +++++++++++++
src/vendorcode/intel/fsp/fsp1_1/common/Kconfig | 118 ++++++
.../intel/fsp/fsp1_1/common/Makefile.inc | 59 +++
.../intel/fsp/fsp1_1/common/after_raminit.S | 171 +++++++++
.../intel/fsp/fsp1_1/common/cache_as_ram.inc | 225 +++++++++++
src/vendorcode/intel/fsp/fsp1_1/common/car.c | 123 ++++++
src/vendorcode/intel/fsp/fsp1_1/common/fsp_gop.c | 96 +++++
.../intel/fsp/fsp1_1/common/fsp_relocate.c | 53 +++
src/vendorcode/intel/fsp/fsp1_1/common/fsp_util.c | 299 +++++++++++++++
src/vendorcode/intel/fsp/fsp1_1/common/hob.c | 325 ++++++++++++++++
.../intel/fsp/fsp1_1/common/include/fsp/api.h | 35 ++
.../intel/fsp/fsp1_1/common/include/fsp/car.h | 49 +++
.../intel/fsp/fsp1_1/common/include/fsp/gma.h | 178 +++++++++
.../intel/fsp/fsp1_1/common/include/fsp/gop.h | 23 ++
.../intel/fsp/fsp1_1/common/include/fsp/memmap.h | 47 +++
.../intel/fsp/fsp1_1/common/include/fsp/ramstage.h | 36 ++
.../intel/fsp/fsp1_1/common/include/fsp/romstage.h | 98 +++++
.../fsp/fsp1_1/common/include/fsp/soc_binding.h | 39 ++
.../intel/fsp/fsp1_1/common/include/fsp/stack.h | 31 ++
.../fsp/fsp1_1/common/include/fsp/uefi_binding.h | 35 ++
.../intel/fsp/fsp1_1/common/include/fsp/util.h | 102 +++++
src/vendorcode/intel/fsp/fsp1_1/common/raminit.c | 320 ++++++++++++++++
src/vendorcode/intel/fsp/fsp1_1/common/ramstage.c | 223 +++++++++++
src/vendorcode/intel/fsp/fsp1_1/common/romstage.c | 420 +++++++++++++++++++++
.../fsp/fsp1_1/common/romstage_after_verstage.S | 48 +++
src/vendorcode/intel/fsp/fsp1_1/common/stack.c | 178 +++++++++
.../intel/fsp/fsp1_1/common/stage_cache.c | 28 ++
src/vendorcode/intel/fsp/fsp1_1/common/vbt.c | 42 +++
src/vendorcode/intel/fsp/fsp1_1/common/verstage.c | 24 ++
src/vendorcode/intel/fsp/fsp2_0/common/Kconfig | 6 +
.../intel/fsp/fsp2_0/common/Makefile.inc | 28 ++
src/vendorcode/intel/fsp/fsp2_0/common/graphics.c | 105 ++++++
.../intel/fsp/fsp2_0/common/hand_off_block.c | 305 +++++++++++++++
.../intel/fsp/fsp2_0/common/include/fsp/api.h | 110 ++++++
.../fsp/fsp2_0/common/include/fsp/info_header.h | 56 +++
.../intel/fsp/fsp2_0/common/include/fsp/util.h | 42 +++
.../intel/fsp/fsp2_0/common/memory_init.c | 73 ++++
src/vendorcode/intel/fsp/fsp2_0/common/notify.c | 40 ++
.../intel/fsp/fsp2_0/common/silicon_init.c | 59 +++
src/vendorcode/intel/fsp/fsp2_0/common/util.c | 138 +++++++
97 files changed, 5737 insertions(+), 5727 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index b656bbf..d7b53cf 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -432,10 +432,11 @@ source "src/superio/*/Kconfig"
comment "Embedded Controllers"
source "src/ec/acpi/Kconfig"
source "src/ec/*/*/Kconfig"
-# FIXME move to vendorcode
-source "src/drivers/intel/fsp1_0/Kconfig"
+# FIXME, move two lines below to src/vendorcode/intel/Kconfig
+source "src/vendorcode/intel/fsp1_0/common/Kconfig"
source "src/southbridge/intel/common/firmware/Kconfig"
+
source "src/vendorcode/*/Kconfig"
source "src/arch/*/Kconfig"
@@ -445,6 +446,7 @@ endmenu
source "src/device/Kconfig"
menu "Generic Drivers"
+# FIXME: convert remaining drivers to */* and remove following line:
source "src/drivers/*/Kconfig"
source "src/drivers/*/*/Kconfig"
endmenu
diff --git a/src/drivers/intel/fsp1_0/Kconfig b/src/drivers/intel/fsp1_0/Kconfig
deleted file mode 100644
index 6aa8949..0000000
--- a/src/drivers/intel/fsp1_0/Kconfig
+++ /dev/null
@@ -1,127 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2014 Sage Electronic Engineering, LLC.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-if PLATFORM_USES_FSP1_0
-
-comment "Intel FSP"
-
-config HAVE_FSP_BIN
- bool "Use Intel Firmware Support Package"
- help
- Select this option to add an Intel FSP binary to
- the resulting coreboot image.
-
- Note: Without this binary, coreboot builds relying on the FSP
- will not boot
-
-config DCACHE_RAM_BASE
- hex
- default 0xfef00000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x4000
-
-if HAVE_FSP_BIN
-
-config FSP_FILE
- string "Intel FSP binary path and filename"
- help
- The path and filename of the Intel FSP binary for this platform.
-
-endif #HAVE_FSP_BIN
-
-config FSP_LOC
- hex "Intel FSP Binary location in CBFS"
- help
- The location in CBFS that the FSP is located. This must match the
- value that is set in the FSP binary. If the FSP needs to be moved,
- rebase the FSP with Intel's BCT (tool).
-
-config ENABLE_FSP_FAST_BOOT
- bool "Enable Fast Boot"
- select ENABLE_MRC_CACHE
- default n
- help
- Enabling this feature will force the MRC data to be cached in NV
- storage to be used for speeding up boot time on future reboots
- and/or power cycles.
-
-config ENABLE_MRC_CACHE
- bool
- default y if HAVE_ACPI_RESUME
- default n
- help
- Enabling this feature will cause MRC data to be cached in NV storage.
- This can either be used for fast boot, or just because the FSP wants
- it to be saved.
-
-config MRC_CACHE_FMAP
- bool "Use MRC Cache in FMAP"
- depends on ENABLE_MRC_CACHE
- default n
- help
- Use the region "RW_MRC_CACHE" in FMAP instead of "mrc.cache" in CBFS.
- You must define a region in your FMAP named "RW_MRC_CACHE".
-
-config MRC_CACHE_SIZE
- hex "Fast Boot Data Cache Size"
- default 0x10000
- depends on ENABLE_MRC_CACHE
- depends on !MRC_CACHE_FMAP
- help
- This is the amount of space in NV storage that is reserved for the
- fast boot data cache storage.
-
- WARNING: Because this area will be erased and re-written, the size
- should be a full sector of the flash ROM chip and nothing else should
- be included in CBFS in any sector that the fast boot cache data is in.
-
-config VIRTUAL_ROM_SIZE
- hex "Virtual ROM Size"
- default ROM_SIZE
- depends on ENABLE_MRC_CACHE
- help
- This is used to calculate the offset of the MRC data cache in NV
- Storage for fast boot. If in doubt, leave this set to the default
- which sets the virtual size equal to the ROM size.
-
- Example: Cougar Canyon 2 has two 8 MB SPI ROMs. When the SPI ROMs are
- loaded with a 4 MB coreboot image, the virtual ROM size is 8 MB. When
- the SPI ROMs are loaded with an 8 MB coreboot image, the virtual ROM
- size is 16 MB.
-
-config CACHE_ROM_SIZE_OVERRIDE
- hex "Cache ROM Size"
- default CBFS_SIZE
- help
- This is the size of the cachable area that is passed into the FSP in
- the early initialization. Typically this should be the size of the CBFS
- area, but the size must be a power of 2 whereas the CBFS size does not
- have this limitation.
-
-config USE_GENERIC_FSP_CAR_INC
- bool
- default n
- help
- The chipset can select this to use a generic cache_as_ram.inc file
- that should be good for all FSP based platforms.
-
-config FSP_USES_UPD
- bool
- default n
- help
- If this FSP uses UPD/VPD data regions, select this in the chipset Kconfig.
-endif #PLATFORM_USES_FSP1_0
diff --git a/src/drivers/intel/fsp1_0/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc
deleted file mode 100644
index 4ff1068..0000000
--- a/src/drivers/intel/fsp1_0/Makefile.inc
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2014 Sage Electronic Engineering, LLC.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-ifeq ($(CONFIG_PLATFORM_USES_FSP1_0),y)
-
-ramstage-y += fsp_util.c hob.c
-romstage-y += fsp_util.c hob.c
-
-ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
-romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
-
-CPPFLAGS_common += -Isrc/drivers/intel/fsp1_0 -I$(objgenerated)
-
-cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc
-
-ifeq ($(CONFIG_HAVE_FSP_BIN),y)
-cbfs-files-y += fsp.bin
-fsp.bin-file := $(call strip_quotes,$(CONFIG_FSP_FILE))
-fsp.bin-position := $(CONFIG_FSP_LOC)
-fsp.bin-type := fsp
-endif
-
-ifeq ($(CONFIG_ENABLE_MRC_CACHE),y)
-ifneq ($(CONFIG_MRC_CACHE_FMAP),y)
-$(obj)/mrc.cache:
- dd if=/dev/zero count=1 \
- bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \
- tr '\000' '\377' > $@
-
-cbfs-files-y += mrc.cache
-mrc.cache-file := $(obj)/mrc.cache
-mrc.cache-align := 0x10000
-mrc.cache-type := mrc_cache
-endif
-endif
-
-endif
diff --git a/src/drivers/intel/fsp1_0/cache_as_ram.inc b/src/drivers/intel/fsp1_0/cache_as_ram.inc
deleted file mode 100644
index e79c3c1..0000000
--- a/src/drivers/intel/fsp1_0/cache_as_ram.inc
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich(a)gmail.com>
- * Copyright (C) 2007-2008 coresystems GmbH
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cpu/x86/mtrr.h>
-#include <cpu/x86/cache.h>
-#include <cpu/x86/post_code.h>
-#include <cbmem.h>
-
- cmp $0, %eax
- je cache_as_ram
- mov $0xa0, %eax
- jmp .Lhlt
-
-cache_as_ram:
- post_code(0x20)
-
- /*
- * Find the FSP binary in cbfs.
- * Make a fake stack that has the return value back to this code.
- */
- lea fake_fsp_stack, %esp
- jmp find_fsp
-find_fsp_ret:
- /* Save the FSP location */
- mov %eax, %ebp
- cmp $CONFIG_FSP_LOC, %eax
- jae find_fsp_ok
- mov $0xb0, %eax
- jmp .Lhlt
-
-find_fsp_ok:
- post_code(POST_FSP_TEMP_RAM_INIT)
-
- /* Calculate entry into FSP */
- mov 0x30(%ebp), %eax /* Load TempRamInitEntry */
- add 0x1c(%ebp), %eax /* add in the offset for the FSP base address */
-
- /*
- * Pass early init variables on a fake stack (no memory yet)
- * as well as the return location
- */
- lea CAR_init_stack, %esp
-
- /* call FSP binary to setup temporary stack */
- jmp *%eax
-
-CAR_init_done:
- addl $4, %esp
- cmp $0, %eax
- je car_init_ok
- add $0xc0, %eax
- jmp .Lhlt
-
-car_init_ok:
-
- /* Save FSP_INFO_HEADER location in ebx */
- mov %ebp, %ebx
-
- /*
- * set up bootloader stack
- * ecx: stack base
- * edx: stack top
- */
- mov %edx, %esp
- movl %esp, %ebp
-
- /* Clear the cbmem CAR memory region. */
- movl %ecx, %edi
- movl %edx, %ecx
- sub %edi, %ecx
- shr $2, %ecx
- xorl %eax, %eax
- rep stosl
-
-before_romstage:
- post_code(0x23)
-
- /* Call romstage.c main function. */
- pushl %ebx /* main takes FSP_INFO_HEADER as its argument */
- call main /* does not return */
- movb $0xB8, %ah
- jmp .Lhlt
-
-.Lhlt:
-#if IS_ENABLED(CONFIG_POST_IO)
- outb %al, $CONFIG_POST_IO_PORT
-#endif
- hlt
- jmp .Lhlt
-
-/*
- * esp is set to this location so that the call into and return from the FSP
- * in find_fsp will work.
- */
- .align 4
-fake_fsp_stack:
- .long find_fsp_ret
-
-CAR_init_params:
- .long dummy_microcode
- .long 0
- .long 0xFFFFFFFF - CACHE_ROM_SIZE + 1 /* Firmware Location */
- .long CACHE_ROM_SIZE /* Total Firmware Length */
-
-CAR_init_stack:
- .long CAR_init_done
- .long CAR_init_params
-
-dummy_microcode:
- .long 0
diff --git a/src/drivers/intel/fsp1_0/fastboot_cache.c b/src/drivers/intel/fsp1_0/fastboot_cache.c
deleted file mode 100644
index 68150f9..0000000
--- a/src/drivers/intel/fsp1_0/fastboot_cache.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <bootstate.h>
-#include <console/console.h>
-#include <cbfs.h>
-#include <fmap.h>
-#include <ip_checksum.h>
-#include <device/device.h>
-#include <cbmem.h>
-#include <spi-generic.h>
-#include <spi_flash.h>
-#include <lib.h> // hexdump
-#include "fsp_util.h"
-
-/* convert a pointer to flash area into the offset inside the flash */
-static inline u32 to_flash_offset(void *p) {
- return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE);
-}
-
-static struct mrc_data_container *next_mrc_block(
- struct mrc_data_container *mrc_cache)
-{
- /* MRC data blocks are aligned within the region */
- u32 mrc_size = sizeof(*mrc_cache) + mrc_cache->mrc_data_size;
- if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
- mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
- mrc_size += MRC_DATA_ALIGN;
- }
-
- u8 *region_ptr = (u8*)mrc_cache;
- region_ptr += mrc_size;
- return (struct mrc_data_container *)region_ptr;
-}
-
-static int is_mrc_cache(struct mrc_data_container *mrc_cache)
-{
- return (!!mrc_cache) && (mrc_cache->mrc_signature == MRC_DATA_SIGNATURE);
-}
-
-static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
-{
- size_t region_size;
-
- if (IS_ENABLED(CONFIG_MRC_CACHE_FMAP)) {
- struct region_device rdev;
- if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {
- *mrc_region_ptr = rdev_mmap_full(&rdev);
- return region_device_sz(&rdev);
- }
- *mrc_region_ptr = NULL;
- return 0;
- } else {
- *mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache",
- CBFS_TYPE_MRC_CACHE,
- ®ion_size);
-
- return region_size;
- }
-}
-
-/*
- * Find the largest index block in the MRC cache. Return NULL if none is
- * found.
- */
-static struct mrc_data_container *find_current_mrc_cache_local
- (struct mrc_data_container *mrc_cache, u32 region_size)
-{
- u32 region_end;
- u32 entry_id = 0;
- struct mrc_data_container *mrc_next = mrc_cache;
-
- region_end = (u32) mrc_cache + region_size;
-
- /* Search for the last filled entry in the region */
- while (is_mrc_cache(mrc_next)) {
- entry_id++;
- mrc_cache = mrc_next;
- mrc_next = next_mrc_block(mrc_next);
- if ((u32)mrc_next >= region_end) {
- /* Stay in the MRC data region */
- break;
- }
- }
-
- if (entry_id == 0) {
- printk(BIOS_ERR, "%s: No valid fast boot cache found.\n", __func__);
- return NULL;
- }
-
- /* Verify checksum */
- if (mrc_cache->mrc_checksum !=
- compute_ip_checksum(mrc_cache->mrc_data,
- mrc_cache->mrc_data_size)) {
- printk(BIOS_ERR, "%s: fast boot cache checksum mismatch\n", __func__);
- return NULL;
- }
-
- printk(BIOS_DEBUG, "%s: picked entry %u from cache block\n", __func__,
- entry_id - 1);
-
- return mrc_cache;
-}
-
-/* SPI code needs malloc/free.
- * Also unknown if writing flash from XIP-flash code is a good idea
- */
-#if !defined(__PRE_RAM__)
-/* find the first empty block in the MRC cache area.
- * If there's none, return NULL.
- *
- * @mrc_cache_base - base address of the MRC cache area
- * @mrc_cache - current entry (for which we need to find next)
- * @region_size - total size of the MRC cache area
- */
-static struct mrc_data_container *find_next_mrc_cache
- (struct mrc_data_container *mrc_cache_base,
- struct mrc_data_container *mrc_cache,
- u32 region_size)
-{
- u32 region_end = (u32) mrc_cache_base + region_size;
- u32 mrc_data_size = mrc_cache->mrc_data_size;
-
- mrc_cache = next_mrc_block(mrc_cache);
- if (((u32)mrc_cache + mrc_data_size) >= region_end) {
- /* Crossed the boundary */
- mrc_cache = NULL;
- printk(BIOS_DEBUG, "%s: no available entries found\n",
- __func__);
- } else {
- printk(BIOS_DEBUG,
- "%s: picked next entry from cache block at %p\n",
- __func__, mrc_cache);
- }
-
- return mrc_cache;
-}
-
-void update_mrc_cache(void *unused)
-{
- printk(BIOS_DEBUG, "Updating fast boot cache data.\n");
- struct mrc_data_container *current = cbmem_find(CBMEM_ID_MRCDATA);
- struct mrc_data_container *cache, *cache_base;
- u32 cache_size;
-
- if (!current) {
- printk(BIOS_ERR, "No fast boot cache in cbmem. Can't update flash.\n");
- return;
- }
- if (current->mrc_data_size == -1) {
- printk(BIOS_ERR, "Fast boot cache data in cbmem invalid.\n");
- return;
- }
-
- cache_size = get_mrc_cache_region(&cache_base);
- if (cache_base == NULL) {
- printk(BIOS_ERR, "%s: could not find fast boot cache area\n",
- __func__);
- return;
- }
-
- /*
- * we need to:
- * 0. compare MRC data to last mrc-cache block (exit if same)
- */
- cache = find_current_mrc_cache_local(cache_base, cache_size);
-
- if (cache && (cache->mrc_data_size == current->mrc_data_size) &&
- (memcmp(cache, current, cache->mrc_data_size) == 0)) {
- printk(BIOS_DEBUG,
- "MRC data in flash is up to date. No update.\n");
- return;
- }
-
- /* 1. use spi_flash_probe() to find the flash, then... */
- spi_init();
- struct spi_flash *flash = spi_flash_probe(0, 0);
- if (!flash) {
- printk(BIOS_DEBUG, "Could not find SPI device\n");
- return;
- }
-
- /* 2. look up the first unused block */
- if (cache)
- cache = find_next_mrc_cache(cache_base, cache, cache_size);
-
- /*
- * 3. if no such place exists, erase entire mrc-cache range & use
- * block 0. First time around the erase is not needed, but this is a
- * small overhead for simpler code.
- */
- if (!cache) {
- printk(BIOS_DEBUG,
- "Need to erase the MRC cache region of %d bytes at %p\n",
- cache_size, cache_base);
-
- flash->erase(flash, to_flash_offset(cache_base), cache_size);
-
- /* we will start at the beginning again */
- cache = cache_base;
- }
- /* 4. write mrc data with flash->write() */
- printk(BIOS_DEBUG, "Write MRC cache update to flash at %p\n",
- cache);
- flash->write(flash, to_flash_offset(cache),
- current->mrc_data_size + sizeof(*current), current);
-}
-
-#endif /* !defined(__PRE_RAM__) */
-
-void * find_and_set_fastboot_cache(void)
-{
- struct mrc_data_container *mrc_cache = NULL;
- if (((mrc_cache = find_current_mrc_cache()) == NULL) ||
- (mrc_cache->mrc_data_size == -1UL)) {
- printk(BIOS_DEBUG, "FSP MRC cache not present.\n");
- return NULL;
- }
- printk(BIOS_DEBUG, "FSP MRC cache present at %x.\n", (u32)mrc_cache);
- printk(BIOS_SPEW, "Saved MRC data:\n");
- hexdump32(BIOS_SPEW, (void *)mrc_cache->mrc_data, (mrc_cache->mrc_data_size) / 4);
- return (void *) mrc_cache->mrc_data;
-}
-
-struct mrc_data_container *find_current_mrc_cache(void)
-{
- struct mrc_data_container *cache_base;
- u32 cache_size;
-
- cache_size = get_mrc_cache_region(&cache_base);
- if (cache_base == NULL) {
- printk(BIOS_ERR, "%s: could not find fast boot cache area\n",
- __func__);
- return NULL;
- }
-
- /*
- * we need to:
- * 0. compare MRC data to last mrc-cache block (exit if same)
- */
- return find_current_mrc_cache_local(cache_base, cache_size);
-}
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
deleted file mode 100644
index a3fef2d..0000000
--- a/src/drivers/intel/fsp1_0/fsp_util.c
+++ /dev/null
@@ -1,348 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <string.h>
-#include <console/console.h>
-#include <bootstate.h>
-#include <cbmem.h>
-#include "fsp_util.h"
-#include <lib.h> // hexdump
-#include <ip_checksum.h>
-#include <timestamp.h>
-
-#ifndef __PRE_RAM__
-/* Globals pointers for FSP structures */
-void *FspHobListPtr = NULL;
-FSP_INFO_HEADER *fsp_header_ptr = NULL;
-
-void FspNotify (u32 Phase)
-{
- FSP_NOTFY_PHASE NotifyPhaseProc;
- NOTIFY_PHASE_PARAMS NotifyPhaseParams;
- EFI_STATUS Status;
-
- if (fsp_header_ptr == NULL) {
- fsp_header_ptr = (void *)find_fsp();
- if ((u32)fsp_header_ptr < 0xff) {
- post_code(0x4F); /* output something in case there is no serial */
- die("Can't find the FSP!\n");
- }
- }
-
- /* call FSP PEI to Notify PostPciEnumeration */
- NotifyPhaseProc = (FSP_NOTFY_PHASE)(fsp_header_ptr->ImageBase +
- fsp_header_ptr->NotifyPhaseEntry);
- NotifyPhaseParams.Phase = Phase;
-
- timestamp_add_now(Phase == EnumInitPhaseReadyToBoot ?
- TS_FSP_BEFORE_FINALIZE : TS_FSP_BEFORE_ENUMERATE);
-
- Status = NotifyPhaseProc (&NotifyPhaseParams);
-
- timestamp_add_now(Phase == EnumInitPhaseReadyToBoot ?
- TS_FSP_AFTER_FINALIZE : TS_FSP_AFTER_ENUMERATE);
-
- if (Status != 0)
- printk(BIOS_ERR,"FSP API NotifyPhase failed for phase 0x%x with status: 0x%x\n", Phase, Status);
-}
-#endif /* #ifndef __PRE_RAM__ */
-
-#ifdef __PRE_RAM__
-
-/*
- * Call the FSP to do memory init. The FSP doesn't return to this function.
- * The FSP returns to the romstage_main_continue().
- */
-void __attribute__ ((noreturn)) fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
-{
- FSP_FSP_INIT FspInitApi;
- FSP_INIT_PARAMS FspInitParams;
- FSP_INIT_RT_BUFFER FspRtBuffer;
-#if IS_ENABLED(CONFIG_FSP_USES_UPD)
- UPD_DATA_REGION fsp_upd_data;
-#endif
-
- memset((void*)&FspRtBuffer, 0, sizeof(FSP_INIT_RT_BUFFER));
- FspRtBuffer.Common.StackTop = (u32 *)CONFIG_RAMTOP;
- FspInitParams.NvsBufferPtr = NULL;
-
-#if IS_ENABLED(CONFIG_FSP_USES_UPD)
- FspRtBuffer.Common.UpdDataRgnPtr = &fsp_upd_data;
-#endif
- FspInitParams.RtBufferPtr = (FSP_INIT_RT_BUFFER *)&FspRtBuffer;
- FspInitParams.ContinuationFunc = (CONTINUATION_PROC)ChipsetFspReturnPoint;
- FspInitApi = (FSP_FSP_INIT)(fsp_ptr->ImageBase + fsp_ptr->FspInitEntry);
-
- /* Call the chipset code to fill in the chipset specific structures */
- chipset_fsp_early_init(&FspInitParams, fsp_ptr);
-
- /* Call back to romstage for board specific changes */
- romstage_fsp_rt_buffer_callback(&FspRtBuffer);
-
- post_code(POST_FSP_MEMORY_INIT);
- FspInitApi(&FspInitParams);
-
- /* Should never return. Control will continue from ContinuationFunc */
- die("Uh Oh! FspInitApi returned");
-}
-#endif /* __PRE_RAM__ */
-
-volatile u8 * find_fsp ()
-{
-
-#ifdef __PRE_RAM__
- volatile register u8 *fsp_ptr asm ("eax");
-
- /* Entry point for CAR assembly routine */
- __asm__ __volatile__ (
- ".global find_fsp\n\t"
- "find_fsp:\n\t"
- );
-#else
- volatile u8 *fsp_ptr;
-#endif /* __PRE_RAM__ */
-
- /* The FSP is stored in CBFS */
- fsp_ptr = (u8 *) CONFIG_FSP_LOC;
-
- /* Check the FV signature, _FVH */
- if (((EFI_FIRMWARE_VOLUME_HEADER *)fsp_ptr)->Signature == 0x4856465F) {
- /* Go to the end of the FV header and align the address. */
- fsp_ptr += ((EFI_FIRMWARE_VOLUME_HEADER *)fsp_ptr)->ExtHeaderOffset;
- fsp_ptr += ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)fsp_ptr)->ExtHeaderSize;
- fsp_ptr = (u8 *)(((u32)fsp_ptr + 7) & 0xFFFFFFF8);
- } else {
- fsp_ptr = (u8*)ERROR_NO_FV_SIG;
- }
-
- /* Check the FFS GUID */
- if (((u32)fsp_ptr > 0xff) &&
- (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[0] == 0x912740BE) &&
- (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[1] == 0x47342284) &&
- (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[2] == 0xB08471B9) &&
- (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[3] == 0x0C3F3527)) {
- /* Add the FFS Header size to the base to find the Raw section Header */
- fsp_ptr += sizeof(EFI_FFS_FILE_HEADER);
- } else {
- fsp_ptr = (u8 *)ERROR_NO_FFS_GUID;
- }
-
- if (((u32)fsp_ptr > 0xff) &&
- ((EFI_RAW_SECTION *)fsp_ptr)->Type == EFI_SECTION_RAW) {
- /* Add the Raw Header size to the base to find the FSP INFO Header */
- fsp_ptr += sizeof(EFI_RAW_SECTION);
- } else {
- fsp_ptr = (u8 *)ERROR_NO_INFO_HEADER;
- }
-
- /* Verify that the FSP is set to the base address we're expecting.*/
- if (((u32)fsp_ptr > 0xff) &&
- (*(u32*)(fsp_ptr + FSP_IMAGE_BASE_LOC) != CONFIG_FSP_LOC)) {
- fsp_ptr = (u8 *)ERROR_IMAGEBASE_MISMATCH;
- }
-
- /* Verify the FSP Signature */
- if (((u32)fsp_ptr > 0xff) &&
- (*(u32*)(fsp_ptr + FSP_IMAGE_SIG_LOC) != FSP_SIG)){
- fsp_ptr = (u8 *)ERROR_INFO_HEAD_SIG_MISMATCH;
- }
-
- /* Verify the FSP ID */
- if (((u32)fsp_ptr > 0xff) &&
- ((*(u32 *)(fsp_ptr + FSP_IMAGE_ID_LOC) != FSP_IMAGE_ID_DWORD0) ||
- (*(u32 *)(fsp_ptr + (FSP_IMAGE_ID_LOC + 4)) != FSP_IMAGE_ID_DWORD1))) {
- fsp_ptr = (u8 *)ERROR_FSP_SIG_MISMATCH;
- }
-
- return (fsp_ptr);
-}
-
-/** finds the saved temporary memory information in the FSP HOB list
- *
- * @param hob_list_ptr pointer to the start of the hob list
- * @return pointer to saved CAR MEM or NULL if not found.
- */
-void * find_saved_temp_mem(void *hob_list_ptr)
-{
- EFI_GUID temp_hob_guid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
- EFI_HOB_GUID_TYPE *saved_mem_hob =
- (EFI_HOB_GUID_TYPE *) find_hob_by_guid(
- hob_list_ptr, &temp_hob_guid);
-
- if (saved_mem_hob == NULL)
- return NULL;
-
- return (void *) ((char *) saved_mem_hob + sizeof(EFI_HOB_GUID_TYPE));
-}
-
-#ifndef FSP_RESERVE_MEMORY_SIZE
-/** @brief locates the HOB containing the location of the fsp reserved mem area
- *
- * @param hob_list_ptr pointer to the start of the hob list
- * @return pointer to the start of the FSP reserved memory or NULL if not found.
- */
-void * find_fsp_reserved_mem(void *hob_list_ptr)
-{
- EFI_GUID fsp_reserved_guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
- EFI_HOB_RESOURCE_DESCRIPTOR *fsp_reserved_mem =
- (EFI_HOB_RESOURCE_DESCRIPTOR *) find_hob_by_guid(
- hob_list_ptr, &fsp_reserved_guid);
-
- if (fsp_reserved_mem == NULL)
- return NULL;
-
- return (void *)((uintptr_t)fsp_reserved_mem->PhysicalStart);
-}
-#endif /* FSP_RESERVE_MEMORY_SIZE */
-
-#ifndef __PRE_RAM__ /* Only parse HOB data in ramstage */
-
-void print_fsp_info(void) {
-
- if (fsp_header_ptr == NULL)
- fsp_header_ptr = (void *)find_fsp();
-
- if ((u32)fsp_header_ptr < 0xff) {
- post_code(0x4F); /* post code in case there is no serial */
- die("Can't find the FSP!\n");
- }
-
- if (FspHobListPtr == NULL) {
- FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
- }
-
- printk(BIOS_SPEW,"fsp_header_ptr: %p\n", fsp_header_ptr);
- printk(BIOS_INFO,"FSP Header Version: %d\n", fsp_header_ptr->HeaderRevision);
- printk(BIOS_INFO,"FSP Revision: %d.%d\n",
- (u8)((fsp_header_ptr->ImageRevision >> 8) & 0xff),
- (u8)(fsp_header_ptr->ImageRevision & 0xff));
-}
-
-
-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
-/**
- * Save the FSP memory HOB (mrc data) to the MRC area in CBMEM
- */
-int save_mrc_data(void *hob_start)
-{
- u32 *mrc_hob;
- u32 *mrc_hob_data;
- u32 mrc_hob_size;
- struct mrc_data_container *mrc_data;
- int output_len;
- const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
-
- mrc_hob = GetNextGuidHob(&mrc_guid, hob_start);
- if (mrc_hob == NULL){
- printk(BIOS_DEBUG, "Memory Configure Data Hob is not present\n");
- return(0);
- }
-
- mrc_hob_data = GET_GUID_HOB_DATA (mrc_hob);
- mrc_hob_size = (u32) GET_HOB_LENGTH(mrc_hob);
-
- printk(BIOS_DEBUG, "Memory Configure Data Hob at %p (size = 0x%x).\n",
- (void *)mrc_hob_data, mrc_hob_size);
-
- output_len = ALIGN(mrc_hob_size, 16);
-
- /* Save the MRC S3/fast boot/ADR restore data to cbmem */
- mrc_data = cbmem_add (CBMEM_ID_MRCDATA,
- output_len + sizeof(struct mrc_data_container));
-
- /* Just return if there was a problem with getting CBMEM */
- if (mrc_data == NULL) {
- printk(BIOS_WARNING, "CBMEM was not available to save the fast boot cache data.\n");
- return 0;
- }
-
- printk(BIOS_DEBUG, "Copy FSP MRC DATA to HOB (source addr %p, dest addr %p, %u bytes)\n",
- (void *)mrc_hob_data, mrc_data, output_len);
-
- mrc_data->mrc_signature = MRC_DATA_SIGNATURE;
- mrc_data->mrc_data_size = output_len;
- mrc_data->reserved = 0;
- memcpy(mrc_data->mrc_data, (const void *)mrc_hob_data, mrc_hob_size);
-
- /* Zero the unused space in aligned buffer. */
- if (output_len > mrc_hob_size)
- memset((mrc_data->mrc_data + mrc_hob_size), 0,
- output_len - mrc_hob_size);
-
- mrc_data->mrc_checksum = compute_ip_checksum(mrc_data->mrc_data,
- mrc_data->mrc_data_size);
-
- printk(BIOS_SPEW, "Fast boot data (includes align and checksum):\n");
- hexdump32(BIOS_SPEW, (void *)mrc_data->mrc_data, output_len / 4);
- return (1);
-}
-#endif /* CONFIG_ENABLE_MRC_CACHE */
-
-static void find_fsp_hob_update_mrc(void *unused)
-{
- /* Set the global HOB list pointer */
- FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
-
- if (!FspHobListPtr){
- printk(BIOS_ERR, "ERROR: Could not find FSP HOB pointer in CBFS!\n");
- } else {
- /* 0x0000: Print all types */
- print_hob_type_structure(0x000, FspHobListPtr);
-
- #if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
- if(save_mrc_data(FspHobListPtr))
- update_mrc_cache(NULL);
- else
- printk(BIOS_DEBUG,"Not updating MRC data in flash.\n");
- #endif
- }
-}
-
-/** @brief Notify FSP for PostPciEnumeration
- *
- * @param unused
- */
-static void fsp_after_pci_enum(void *unused)
-{
- /* This call needs to be done before resource allocation. */
- printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
- post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
- FspNotify(EnumInitPhaseAfterPciEnumeration);
- printk(BIOS_DEBUG,
- "Returned from FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
-}
-
-/** @brief Notify FSP for ReadyToBoot
- *
- * @param unused
- */
-static void fsp_finalize(void *unused)
-{
- printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseReadyToBoot)\n");
- print_fsp_info();
- post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
- FspNotify(EnumInitPhaseReadyToBoot);
- printk(BIOS_DEBUG, "Returned from FspNotify(EnumInitPhaseReadyToBoot)\n");
-}
-
-/* Set up for the ramstage FSP calls */
-BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_EXIT, fsp_after_pci_enum, NULL);
-BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, fsp_finalize, NULL);
-
-/* Update the MRC/fast boot cache as part of the late table writing stage */
-BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
- find_fsp_hob_update_mrc, NULL);
-#endif /* #ifndef __PRE_RAM__ */
diff --git a/src/drivers/intel/fsp1_0/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h
deleted file mode 100644
index bbdd4de..0000000
--- a/src/drivers/intel/fsp1_0/fsp_util.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef FSP_UTIL_H
-#define FSP_UTIL_H
-
-#include <chipset_fsp_util.h>
-#include "fsp_values.h"
-
-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
-int save_mrc_data(void *hob_start);
-void * find_and_set_fastboot_cache(void);
-#endif
-
-volatile u8 * find_fsp (void);
-void fsp_early_init(FSP_INFO_HEADER *fsp_info);
-void FspNotify(u32 Phase);
-void FspNotifyReturnPoint(EFI_STATUS Status, VOID *HobListPtr);
-void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer);
-void print_fsp_info(void);
-void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams,
- FSP_INFO_HEADER *fsp_ptr);
-void ChipsetFspReturnPoint(EFI_STATUS Status, VOID *HobListPtr);
-void * find_saved_temp_mem(void *hob_list_ptr);
-void * find_fsp_reserved_mem(void *hob_list_ptr);
-
-/* functions in hob.c */
-void print_hob_mem_attributes(void *Hobptr);
-void print_hob_type_structure(u16 Hobtype, void *Hoblistptr);
-void print_hob_resource_attributes(void *Hobptr);
-void print_guid_type_attributes(void *Hobptr);
-const char * get_hob_type_string(void *Hobptr);
-void * find_hob_by_guid(void *Hoblistptr, EFI_GUID *guid1);
-uint8_t guids_are_equal(EFI_GUID *guid1, EFI_GUID *guid2);
-void printguid(EFI_GUID *guid);
-
-/* Additional HOB types not included in the FSP:
- * #define EFI_HOB_TYPE_HANDOFF 0x0001
- * #define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
- * #define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
- * #define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
- * #define EFI_HOB_TYPE_FV 0x0005
- * #define EFI_HOB_TYPE_CPU 0x0006
- * #define EFI_HOB_TYPE_MEMORY_POOL 0x0007
- * #define EFI_HOB_TYPE_CV 0x0008
- * #define EFI_HOB_TYPE_UNUSED 0xFFFE
- * #define EFI_HOB_TYPE_END_OF_HOB_LIST 0xffff
- */
-#define EFI_HOB_TYPE_HANDOFF 0x0001
-#define EFI_HOB_TYPE_MEMORY_POOL 0x0007
-
-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
-#define MRC_DATA_ALIGN 0x1000
-#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24))
-
-struct mrc_data_container {
- u32 mrc_signature; // "MRCD"
- u32 mrc_data_size; // Actual total size of this structure
- u32 mrc_checksum; // IP style checksum
- u32 reserved; // For header alignment
- u8 mrc_data[0]; // Variable size, platform/run time dependent.
-} __attribute__ ((packed));
-
-struct mrc_data_container *find_current_mrc_cache(void);
-
-#if !defined(__PRE_RAM__)
-void update_mrc_cache(void *unused);
-#endif
-
-#endif
-
-/* The offset in bytes from the start of the info structure */
-#define FSP_IMAGE_SIG_LOC 0
-#define FSP_IMAGE_ID_LOC 16
-#define FSP_IMAGE_BASE_LOC 28
-
-#define FSP_SIG 0x48505346 /* 'FSPH' */
-
-#define ERROR_NO_FV_SIG 1
-#define ERROR_NO_FFS_GUID 2
-#define ERROR_NO_INFO_HEADER 3
-#define ERROR_IMAGEBASE_MISMATCH 4
-#define ERROR_INFO_HEAD_SIG_MISMATCH 5
-#define ERROR_FSP_SIG_MISMATCH 6
-
-#ifndef __PRE_RAM__
-extern void *FspHobListPtr;
-#endif
-
-#define UPD_DEFAULT_CHECK(member) \
- if (config->member != UPD_DEFAULT) { \
- UpdData->member = config->member - 1; \
- } \
- printk(FSP_INFO_LEVEL, #member ":\t\t0x%02x %s\n", UpdData->member, \
- config->member ? "(set)" : "(default)");
-
-#define UPD_SPD_CHECK(member) \
- if (config->member == UPD_SPD_ADDR_DISABLED) { \
- UpdData->member = 0x00; \
- } else if (config->member != UPD_SPD_ADDR_DEFAULT) { \
- UpdData->member = config->member; \
- } \
- printk(FSP_INFO_LEVEL, #member ":\t\t0x%02x %s\n", UpdData->member, \
- config->member ? "(set)" : "(default)");
-
-#define UPD_DEVICE_CHECK(devicename, member, statement) \
- case devicename: \
- UpdData->member = dev->enabled; \
- printk(FSP_INFO_LEVEL, statement "%s\n", \
- UpdData->member?"Enabled":"Disabled"); \
- break;
-
-
-#ifndef FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID
-#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
- { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } };
-#endif
-
-#endif /* FSP_UTIL_H */
diff --git a/src/drivers/intel/fsp1_0/fsp_values.h b/src/drivers/intel/fsp1_0/fsp_values.h
deleted file mode 100644
index 337e751..0000000
--- a/src/drivers/intel/fsp1_0/fsp_values.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef FSP_VALUES_H
-#define FSP_VALUES_H
-
-#ifndef FSP_DEBUG_LEVEL
-# define FSP_DEBUG_LEVEL BIOS_SPEW
-#endif
-
-#ifndef FSP_INFO_LEVEL
-# define FSP_INFO_LEVEL BIOS_DEBUG
-#endif
-
-#define INCREMENT_FOR_DEFAULT(x) (x+1)
-
-#define UPD_DEFAULT 0x00
-#define UPD_DISABLE INCREMENT_FOR_DEFAULT(0)
-#define UPD_ENABLE INCREMENT_FOR_DEFAULT(1)
-#define UPD_USE_DEVICETREE 0xff
-
-#define UPD_SPD_ADDR_DEFAULT UPD_DEFAULT
-#define UPD_SPD_ADDR_DISABLED 0xFF
-
-#endif
diff --git a/src/drivers/intel/fsp1_0/hob.c b/src/drivers/intel/fsp1_0/hob.c
deleted file mode 100644
index 4aac147..0000000
--- a/src/drivers/intel/fsp1_0/hob.c
+++ /dev/null
@@ -1,265 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <string.h>
-#include <console/console.h>
-#include <lib.h> // hexdump
-#include "fsp_util.h"
-
-
-/** Displays a GUID's address and value
- *
- * @param guid pointer to the GUID to display
- */
-void printguid(EFI_GUID *guid)
-{
- printk(BIOS_SPEW,"Address: %p Guid: %08lx-%04x-%04x-",
- guid, (unsigned long)guid->Data1,
- guid->Data2, guid->Data3);
- printk(BIOS_SPEW,"%02x%02x%02x%02x%02x%02x%02x%02x\n",
- guid->Data4[0], guid->Data4[1],
- guid->Data4[2], guid->Data4[3],
- guid->Data4[4], guid->Data4[5],
- guid->Data4[6], guid->Data4[7] );
-}
-
-void print_hob_mem_attributes(void *Hobptr)
-{
- EFI_HOB_MEMORY_ALLOCATION *HobMemoryPtr = (EFI_HOB_MEMORY_ALLOCATION *)Hobptr;
- EFI_MEMORY_TYPE Hobmemtype = HobMemoryPtr->AllocDescriptor.MemoryType;
- u64 Hobmemaddr = HobMemoryPtr->AllocDescriptor.MemoryBaseAddress;
- u64 Hobmemlength = HobMemoryPtr->AllocDescriptor.MemoryLength;
- const char * Hobmemtypenames[15];
-
- Hobmemtypenames[0] = "EfiReservedMemoryType";
- Hobmemtypenames[1] = "EfiLoaderCode";
- Hobmemtypenames[2] = "EfiLoaderData";
- Hobmemtypenames[3] = "EfiBootServicesCode";
- Hobmemtypenames[4] = "EfiBootServicesData";
- Hobmemtypenames[5] = "EfiRuntimeServicesCode";
- Hobmemtypenames[6] = "EfiRuntimeServicesData";
- Hobmemtypenames[7] = "EfiConventionalMemory";
- Hobmemtypenames[8] = "EfiUnusableMemory";
- Hobmemtypenames[9] = "EfiACPIReclaimMemory";
- Hobmemtypenames[10] = "EfiACPIMemoryNVS";
- Hobmemtypenames[11] = "EfiMemoryMappedIO";
- Hobmemtypenames[12] = "EfiMemoryMappedIOPortSpace";
- Hobmemtypenames[13] = "EfiPalCode";
- Hobmemtypenames[14] = "EfiMaxMemoryType";
-
- printk(BIOS_SPEW, " Memory type %s (0x%x)\n",
- Hobmemtypenames[(u32)Hobmemtype], (u32) Hobmemtype);
- printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
- (unsigned long)Hobmemaddr, (unsigned long)Hobmemlength);
-}
-
-void print_hob_resource_attributes(void *Hobptr)
-{
- EFI_HOB_RESOURCE_DESCRIPTOR *HobResourcePtr =
- (EFI_HOB_RESOURCE_DESCRIPTOR *)Hobptr;
- u32 Hobrestype = HobResourcePtr->ResourceType;
- u32 Hobresattr = HobResourcePtr->ResourceAttribute;
- u64 Hobresaddr = HobResourcePtr->PhysicalStart;
- u64 Hobreslength = HobResourcePtr->ResourceLength;
- const char *Hobrestypestr = NULL;
-
- // HOB Resource Types
- switch (Hobrestype) {
- case EFI_RESOURCE_SYSTEM_MEMORY:
- Hobrestypestr = "EFI_RESOURCE_SYSTEM_MEMORY"; break;
- case EFI_RESOURCE_MEMORY_MAPPED_IO:
- Hobrestypestr = "EFI_RESOURCE_MEMORY_MAPPED_IO"; break;
- case EFI_RESOURCE_IO:
- Hobrestypestr = "EFI_RESOURCE_IO"; break;
- case EFI_RESOURCE_FIRMWARE_DEVICE:
- Hobrestypestr = "EFI_RESOURCE_FIRMWARE_DEVICE"; break;
- case EFI_RESOURCE_MEMORY_MAPPED_IO_PORT:
- Hobrestypestr = "EFI_RESOURCE_MEMORY_MAPPED_IO_PORT"; break;
- case EFI_RESOURCE_MEMORY_RESERVED:
- Hobrestypestr = "EFI_RESOURCE_MEMORY_RESERVED"; break;
- case EFI_RESOURCE_IO_RESERVED:
- Hobrestypestr = "EFI_RESOURCE_IO_RESERVED"; break;
- case EFI_RESOURCE_MAX_MEMORY_TYPE:
- Hobrestypestr = "EFI_RESOURCE_MAX_MEMORY_TYPE"; break;
- default:
- Hobrestypestr = "EFI_RESOURCE_UNKNOWN"; break;
- }
-
- printk(BIOS_SPEW, " Resource %s (0x%0x) has attributes 0x%0x\n",
- Hobrestypestr, Hobrestype, Hobresattr);
- printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
- (unsigned long)Hobresaddr, (unsigned long)Hobreslength);
-}
-
-const char * get_hob_type_string(void *Hobptr)
-{
- EFI_HOB_GENERIC_HEADER *HobHeaderPtr = (EFI_HOB_GENERIC_HEADER *)Hobptr;
- u16 Hobtype = HobHeaderPtr->HobType;
- const char *Hobtypestring = NULL;
-
- switch (Hobtype) {
- case EFI_HOB_TYPE_HANDOFF:
- Hobtypestring = "EFI_HOB_TYPE_HANDOFF"; break;
- case EFI_HOB_TYPE_MEMORY_ALLOCATION:
- Hobtypestring = "EFI_HOB_TYPE_MEMORY_ALLOCATION"; break;
- case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
- Hobtypestring = "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR"; break;
- case EFI_HOB_TYPE_GUID_EXTENSION:
- Hobtypestring = "EFI_HOB_TYPE_GUID_EXTENSION"; break;
- case EFI_HOB_TYPE_MEMORY_POOL:
- Hobtypestring = "EFI_HOB_TYPE_MEMORY_POOL"; break;
- case EFI_HOB_TYPE_UNUSED:
- Hobtypestring = "EFI_HOB_TYPE_UNUSED"; break;
- case EFI_HOB_TYPE_END_OF_HOB_LIST:
- Hobtypestring = "EFI_HOB_TYPE_END_OF_HOB_LIST"; break;
- default:
- Hobtypestring = "EFI_HOB_TYPE_UNRECOGNIZED"; break;
- }
-
- return Hobtypestring;
-}
-
-/** Displays the length, location, and GUID value of a GUID extension
- *
- * The EFI_HOB_GUID_TYPE is very basic - it just contains the standard
- * HOB header containing the HOB type and length, and a GUID for
- * identification. The rest of the data is undefined and must be known
- * based on the GUID.
- *
- * This displays the entire HOB length, and the location of the start
- * of the HOB, *NOT* the length of or the start of the data inside the HOB.
- *
- * @param Hobptr
- */
-void print_guid_type_attributes(void *Hobptr)
-{
- printk(BIOS_SPEW, " at location %p with length0x%0lx\n ",
- Hobptr, (unsigned long)(((EFI_PEI_HOB_POINTERS *) \
- Hobptr)->Guid->Header.HobLength));
- printguid(&(((EFI_HOB_GUID_TYPE *)Hobptr)->Name));
-
-}
-
-/* Print out a structure of all the HOBs
- * that match a certain type:
- * Print all types (0x0000)
- * EFI_HOB_TYPE_HANDOFF (0x0001)
- * EFI_HOB_TYPE_MEMORY_ALLOCATION (0x0002)
- * EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (0x0003)
- * EFI_HOB_TYPE_GUID_EXTENSION (0x0004)
- * EFI_HOB_TYPE_MEMORY_POOL (0x0007)
- * EFI_HOB_TYPE_UNUSED (0xFFFE)
- * EFI_HOB_TYPE_END_OF_HOB_LIST (0xFFFF)
- */
-void print_hob_type_structure(u16 Hobtype, void *Hoblistptr)
-{
- u32 *Currenthob;
- u32 *Nexthob = 0;
- u8 Lasthob = 0;
- u32 Currenttype;
- const char *Currenttypestr;
-
- Currenthob = Hoblistptr;
-
- /* Print out HOBs of our desired type until
- * the end of the HOB list
- */
- printk(BIOS_DEBUG, "\n=== FSP HOB Data Structure ===\n");
- printk(BIOS_DEBUG, "FSP Hoblistptr: 0x%0x\n",
- (u32) Hoblistptr);
- do {
- EFI_HOB_GENERIC_HEADER *CurrentHeaderPtr =
- (EFI_HOB_GENERIC_HEADER *)Currenthob;
- Currenttype = CurrentHeaderPtr->HobType; /* Get the type of this HOB */
- Currenttypestr = get_hob_type_string(Currenthob);
-
- if (Currenttype == Hobtype || Hobtype == 0x0000) {
- printk(BIOS_DEBUG, "HOB 0x%0x is an %s (type 0x%0x)\n",
- (u32) Currenthob, Currenttypestr, Currenttype);
- switch (Currenttype) {
- case EFI_HOB_TYPE_MEMORY_ALLOCATION:
- print_hob_mem_attributes(Currenthob); break;
- case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
- print_hob_resource_attributes(Currenthob); break;
- case EFI_HOB_TYPE_GUID_EXTENSION:
- print_guid_type_attributes(Currenthob); break;
- }
- }
-
- Lasthob = END_OF_HOB_LIST(Currenthob); /* Check for end of HOB list */
- if (!Lasthob) {
- Nexthob = GET_NEXT_HOB(Currenthob); /* Get next HOB pointer */
- Currenthob = Nexthob; // Start on next HOB
- }
- } while (!Lasthob);
- printk(BIOS_DEBUG, "=== End of FSP HOB Data Structure ===\n\n");
-}
-
-
-/** Finds a HOB entry based on type and guid
- *
- * @param current_hob pointer to the start of the HOB list
- * @param guid the GUID of the HOB entry to find
- * @return pointer to the start of the requested HOB or NULL if not found.
- */
-void * find_hob_by_guid(void *current_hob, EFI_GUID *guid)
-{
- do {
- switch (((EFI_HOB_GENERIC_HEADER *)current_hob)->HobType) {
-
- case EFI_HOB_TYPE_MEMORY_ALLOCATION:
- if (guids_are_equal(guid, &(((EFI_HOB_MEMORY_ALLOCATION *) \
- current_hob)->AllocDescriptor.Name)))
- return current_hob;
- break;
- case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
- if (guids_are_equal(guid,
- &(((EFI_HOB_RESOURCE_DESCRIPTOR *) \
- current_hob)->Owner)))
- return current_hob;
- break;
- case EFI_HOB_TYPE_GUID_EXTENSION:
- if (guids_are_equal(guid, &(((EFI_HOB_GUID_TYPE *) \
- current_hob)->Name)))
- return current_hob;
- break;
- }
-
- if (!END_OF_HOB_LIST(current_hob))
- current_hob = GET_NEXT_HOB(current_hob); /* Get next HOB pointer */
- } while (!END_OF_HOB_LIST(current_hob));
-
- return NULL;
-}
-
-/** Compares a pair of GUIDs to see if they are equal
- *
- * GUIDs are 128 bits long, so compare them as pairs of quadwords.
- *
- * @param guid1 pointer to the first of the GUIDs to compare
- * @param guid2 pointer to the second of the GUIDs to compare
- * @return 1 if the GUIDs were equal, 0 if GUIDs were not equal
- */
-uint8_t guids_are_equal(EFI_GUID *guid1, EFI_GUID *guid2)
-{
- uint64_t* guid_1 = (void *) guid1;
- uint64_t* guid_2 = (void *) guid2;
-
- if ((*(guid_1) != *(guid_2)) || (*(guid_1 + 1) != *(guid_2 + 1)))
- return 0;
-
- return 1;
-}
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
deleted file mode 100644
index 9b2c463..0000000
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ /dev/null
@@ -1,118 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2014 Sage Electronic Engineering, LLC.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config PLATFORM_USES_FSP1_1
- bool
- select UEFI_2_4_BINDING
- help
- Does the code require the Intel Firmware Support Package?
-
-if PLATFORM_USES_FSP1_1
-
-comment "Intel FSP 1.1"
-
-config HAVE_FSP_BIN
- bool "Should the Intel FSP binary be added to the flash image"
- help
- Select this option to add an Intel FSP binary to
- the resulting coreboot image.
-
- Note: Without this binary, coreboot builds relying on the FSP
- will not boot
-
-config CPU_MICROCODE_CBFS_LEN
- hex "Microcode update region length in bytes"
- default 0
- help
- The length in bytes of the microcode update region.
-
-config CPU_MICROCODE_CBFS_LOC
- hex "Microcode update base address in CBFS"
- default 0
- help
- The location (base address) in CBFS that contains the microcode update
- binary.
-
-config FSP_FILE
- string "Intel FSP binary path and filename"
- help
- The path and filename of the Intel FSP binary for this platform.
-
-config FSP_IMAGE_ID_STRING
- string "8 byte platform string identifying the FSP platform"
- default "$XXXFSP$"
- help
- 8 ASCII character byte signature string that will help match the FSP
- binary to a supported hardware configuration.
-
-config FSP_LOC
- hex "Intel FSP Binary location in CBFS"
- default 0xffee0000
- help
- The location in CBFS that the FSP is located. This must match the
- value that is set in the FSP binary. If the FSP needs to be moved,
- rebase the FSP with Intel's BCT (tool).
-
-config DISPLAY_FAST_BOOT_DATA
- bool "Display fast boot data"
- default n
-
-config DISPLAY_HOBS
- bool "Display hand-off-blocks (HOBs)"
- default n
-
-config DISPLAY_VBT
- bool "Display Video BIOS Table (VBT)"
- default n
-
-config DISPLAY_FSP_ENTRY_POINTS
- bool "Display FSP entry points"
- default n
-
-config DISPLAY_UPD_DATA
- bool "Display UPD data"
- default n
- help
- Display the user specified product data prior to memory
- initialization.
-
-config FSP_USES_UPD
- bool
- default n
- help
- If this FSP uses UPD/VPD data regions, select this in the chipset
- Kconfig.
-
-config GOP_SUPPORT
- bool "Enable GOP support"
- default n
-
-config ROMSTAGE_RAM_STACK_SIZE
- hex "Size of the romstage RAM stack in bytes"
- default 0x5000
-
-config USE_GENERIC_FSP_CAR_INC
- bool
- default n
- help
- The chipset can select this to use a generic cache_as_ram.inc file
- that should be good for all FSP based platforms.
-
-config VBT_FILE
- string "GOP Video BIOS table binary path"
- depends on GOP_SUPPORT
- default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/vbt.bin"
-
-endif #PLATFORM_USES_FSP1_1
diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc
deleted file mode 100644
index 3f214cb..0000000
--- a/src/drivers/intel/fsp1_1/Makefile.inc
+++ /dev/null
@@ -1,59 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2014 Sage Electronic Engineering, LLC.
-# Copyright (C) 2015 Intel Corp.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y)
-
-verstage-y += car.c
-verstage-y += fsp_util.c
-verstage-y += verstage.c
-
-romstage-y += car.c
-romstage-y += fsp_util.c
-romstage-y += hob.c
-romstage-y += raminit.c
-romstage-y += romstage.c
-romstage-$(CONFIG_SEPARATE_VERSTAGE) += romstage_after_verstage.S
-romstage-y += stack.c
-romstage-y += stage_cache.c
-
-ramstage-$(CONFIG_GOP_SUPPORT) += fsp_gop.c
-ramstage-y += fsp_relocate.c
-ramstage-y += fsp_util.c
-ramstage-y += hob.c
-ramstage-y += ramstage.c
-ramstage-y += stage_cache.c
-ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
-
-CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include
-
-cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_1/cache_as_ram.inc
-
-
-# Add the GOP Video BIOS Table to the cbfs image
-cbfs-files-$(CONFIG_GOP_SUPPORT) += vbt.bin
-vbt.bin-file := $(call strip_quotes,$(CONFIG_VBT_FILE))
-vbt.bin-type := optionrom
-
-
-# Add the FSP binary to the cbfs image
-ifeq ($(CONFIG_HAVE_FSP_BIN),y)
-cbfs-files-y += fsp.bin
-fsp.bin-file := $(call strip_quotes,$(CONFIG_FSP_FILE))
-fsp.bin-position := $(CONFIG_FSP_LOC)
-fsp.bin-type := fsp
-endif
-
-endif
diff --git a/src/drivers/intel/fsp1_1/after_raminit.S b/src/drivers/intel/fsp1_1/after_raminit.S
deleted file mode 100644
index 122c0bf..0000000
--- a/src/drivers/intel/fsp1_1/after_raminit.S
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich(a)gmail.com>
- * Copyright (C) 2007-2008 coresystems GmbH
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cpu/x86/mtrr.h>
-#include <cpu/x86/cache.h>
-#include <cpu/x86/post_code.h>
-
-/*
- * This is the common entry point after DRAM has been initialized.
- */
- /*
- * eax: New stack address
- */
-
- /* Switch to the stack in RAM */
- movl %eax, %esp
-
-#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
-
- /* SOC specific NEM */
- #include <soc/car_teardown.S>
-
-#else
-.extern fih_car
-
- post_code(POST_FSP_TEMP_RAM_EXIT)
-
- /* Calculate TempRamExit entry into FSP */
- movl fih_car, %ebp
- mov 0x40(%ebp), %eax
- add 0x1c(%ebp), %eax
-
- /* Build the call frame */
- pushl $0
-
- /* Call TempRamExit */
- call *%eax
- add $4, %esp
- cmp $0, %eax
- jz 1f
- /*
- * Failures for post code BC - failed in TempRamExit
- *
- * 0x00 - FSP_SUCCESS: Temp RAM Exit completed successfully.
- * 0x02 - FSP_INVALID_PARAMETER: Input parameters are invalid.
- * 0x03 - FSP_UNSUPPORTED: The FSP calling conditions were not met.
- * 0x07 - FSP_DEVICE_ERROR: Temp RAM Exit failed.
- */
- movb $0xBC, %ah
- jmp .Lhlt
-1:
-#endif
- /* Display the MTRRs */
- call soc_display_mtrrs
-
- /*
- * The stack contents are initialized in src/soc/intel/common/stack.c
- * to be the following:
- *
- * *
- * *
- * *
- * +36: MTRR mask 1 63:32
- * +32: MTRR mask 1 31:0
- * +28: MTRR base 1 63:32
- * +24: MTRR base 1 31:0
- * +20: MTRR mask 0 63:32
- * +16: MTRR mask 0 31:0
- * +12: MTRR base 0 63:32
- * +8: MTRR base 0 31:0
- * +4: Number of MTRRs to setup (described above)
- * +0: Number of variable MTRRs to clear
- */
-
-#if IS_ENABLED(CONFIG_SOC_SETS_MTRRS)
- push %esp
- call soc_set_mtrrs
-
- /* eax: new top_of_stack with setup_stack_and_mtrrs data removed */
- movl %eax, %esp
-#else
- /* Clear all of the variable MTRRs. */
- popl %ebx
- movl $MTRR_PHYS_BASE(0), %ecx
- clr %eax
- clr %edx
-
-1:
- testl %ebx, %ebx
- jz 1f
- wrmsr /* Write MTRR base. */
- inc %ecx
- wrmsr /* Write MTRR mask. */
- inc %ecx
- dec %ebx
- jmp 1b
-
-1:
- /* Get number of MTRRs. */
- popl %ebx
- movl $MTRR_PHYS_BASE(0), %ecx
-2:
- testl %ebx, %ebx
- jz 2f
-
- /* Low 32 bits of MTRR base. */
- popl %eax
- /* Upper 32 bits of MTRR base. */
- popl %edx
- /* Write MTRR base. */
- wrmsr
- inc %ecx
- /* Low 32 bits of MTRR mask. */
- popl %eax
- /* Upper 32 bits of MTRR mask. */
- popl %edx
- /* Write MTRR mask. */
- wrmsr
- inc %ecx
-
- dec %ebx
- jmp 2b
-2:
-#endif /* CONFIG_SOC_SETS_MTRRS */
-
- post_code(0x39)
-
- /* And enable cache again after setting MTRRs. */
- movl %cr0, %eax
- andl $~(CR0_CacheDisable | CR0_NoWriteThrough), %eax
- movl %eax, %cr0
-
- post_code(0x3a)
-
-#if IS_ENABLED(CONFIG_SOC_SETS_MTRRS)
- call soc_enable_mtrrs
-#else
- /* Enable MTRR. */
- movl $MTRR_DEF_TYPE_MSR, %ecx
- rdmsr
- orl $MTRR_DEF_TYPE_EN, %eax
- wrmsr
-#endif /* CONFIG_SOC_SETS_MTRRS */
-
- post_code(0x3b)
-
- /* Invalidate the cache again. */
- invd
-
- post_code(0x3c)
-
-__main:
- post_code(POST_PREPARE_RAMSTAGE)
- cld /* Clear direction flag. */
- call after_cache_as_ram
-
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
deleted file mode 100644
index 6e7e50b..0000000
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ /dev/null
@@ -1,225 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich(a)gmail.com>
- * Copyright (C) 2007-2008 coresystems GmbH
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/*
- * Replacement for cache_as_ram.inc when using the FSP binary. This code
- * locates the FSP binary, initializes the cache as RAM and performs the
- * first stage of initialization. Next this code switches the stack from
- * the cache to RAM and then disables the cache as RAM. Finally this code
- * performs the final stage of initialization.
- */
-
-#include <rules.h>
-
-#define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */
-
- /*
- * eax: BIST value
- * mm0: low 32-bits of TSC value
- * mm1: high 32-bits of TSC value
- */
- movl %eax, %edi
-cache_as_ram:
- post_code(0x20)
-
-#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
-
- /*
- * SOC specific setup
- * NOTE: This has to preserve the registers
- * mm0, mm1 and edi.
- */
- #include <soc/car_setup.S>
-
- post_code(0x28)
-
-#endif
-
- /*
- * Find the FSP binary in cbfs.
- * Make a fake stack that has the return value back to this code.
- */
- lea fake_fsp_stack, %esp
- jmp find_fsp
-find_fsp_ret:
- /* Save the FSP location */
- mov %eax, %ebp
-
- /*
- * Only when a valid FSP binary is found at CONFIG_FSP_LOC is
- * the returned FSP_INFO_HEADER structure address above the base
- * address of FSP binary specified by the CONFIG_FSP_LOC value.
- * All of the error values are in the 0x8xxxxxxx range which are
- * below the CONFIG_FSP_LOC value.
- */
- cmp $CONFIG_FSP_LOC, %eax
- jbe halt1
-
- post_code(POST_FSP_TEMP_RAM_INIT)
-
- /* Calculate entry into FSP */
- mov 0x30(%ebp), %eax /* Load TempRamInitEntry */
- add 0x1c(%ebp), %eax /* add in the offset for FSP */
-
- /*
- * Pass early init variables on a fake stack (no memory yet)
- * as well as the return location
- */
- lea CAR_init_stack, %esp
-
- /*
- * BIST value is zero
- * eax: TempRamInitApi address
- * ebp: FSP_INFO_HEADER address
- * edi: BIST value
- * esi: Not used
- * mm0: low 32-bits of TSC value
- * mm1: high 32-bits of TSC value
- */
-
- /* call FSP binary to setup temporary stack */
- jmp *%eax
-
-CAR_init_done:
- addl $4, %esp
-
- /*
- * ebp: FSP_INFO_HEADER address
- * ecx: Temp RAM base
- * edx: Temp RAM top
- * edi: BIST value
- * mm0: low 32-bits of TSC value
- * mm1: high 32-bits of TSC value
- */
-
- cmp $0, %eax
- jne halt2
-
- /* Setup bootloader stack */
- movl %edx, %esp
-
- /*
- * ebp: FSP_INFO_HEADER address
- * ecx: Temp RAM base
- * edx: Temp RAM top
- * edi: BIST value
- * esp: Top of stack in temp RAM
- * mm0: low 32-bits of TSC value
- * mm1: high 32-bits of TSC value
- */
-
- /* Create cache_as_ram_params on stack */
- pushl %edx /* bootloader CAR end */
- pushl %ecx /* bootloader CAR begin */
- pushl %ebp /* FSP_INFO_HEADER */
- pushl %edi /* bist */
- movd %mm1, %eax
- pushl %eax /* tsc[63:32] */
- movd %mm0, %eax
- pushl %eax /* tsc[31:0] */
- pushl %esp /* pointer to cache_as_ram_params */
-
- /* Save FSP_INFO_HEADER location in ebx */
- mov %ebp, %ebx
-
- /* Coreboot assumes stack/heap region will be zero */
- cld
- movl %ecx, %edi
- neg %ecx
- /* Only clear up to current stack value. */
- add %esp, %ecx
- shrl $2, %ecx
- xorl %eax, %eax
- rep stosl
-
-before_romstage:
- post_code(0x2A)
-
- /* Call cache_as_ram_main(struct cache_as_ram_params *) */
- call cache_as_ram_main
-
-/* One will never return from cache_as_ram_main() in verstage so there's
- * no such thing as after ram init. */
-#if !ENV_VERSTAGE
-#include "after_raminit.S"
-#endif
-
- movb $0x69, %ah
- jmp .Lhlt
-
-halt1:
- /*
- * Failures for postcode 0xBA - failed in fsp_fih_early_find()
- *
- * Values are:
- * 0x01 - FV signature, "_FVH" not present
- * 0x02 - FFS GUID not present
- * 0x03 - FSP INFO Header not found
- * 0x04 - ImageBase does not equal CONFIG_FSP_LOC - Is the FSP rebased to
- * a different location, or does it need to be?
- * 0x05 - FSP INFO Header signature "FSPH" not found
- * 0x06 - FSP Image ID is not the expected ID.
- */
- movb $0xBA, %ah
- jmp .Lhlt
-
-halt2:
- /*
- * Failures for postcode 0xBB - failed in the FSP:
- *
- * 0x00 - FSP_SUCCESS: Temp RAM was initialized successfully.
- * 0x02 - FSP_INVALID_PARAMETER: Input parameters are invalid.
- * 0x03 - FSP_UNSUPPORTED: The FSP calling conditions were not met.
- * 0x07 - FSP_DEVICE_ERROR: Temp RAM initialization failed
- * 0x0E - FSP_NOT_FOUND: No valid microcode was found in the microcode region.
- * 0x14 - FSP_ALREADY_STARTED: Temp RAM initialization has been invoked
- */
- movb $0xBB, %ah
- jmp .Lhlt
-
-.Lhlt:
- xchg %al, %ah
-#if IS_ENABLED(CONFIG_POST_IO)
- outb %al, $CONFIG_POST_IO_PORT
-#else
- post_code(POST_DEAD_CODE)
-#endif
- movl $LHLT_DELAY, %ecx
-.Lhlt_Delay:
- outb %al, $0xED
- loop .Lhlt_Delay
- jmp .Lhlt
-
-/*
- * esp is set to this location so that the call into and return from the FSP
- * in find_fsp will work.
- */
- .align 4
-fake_fsp_stack:
- .long find_fsp_ret
- .long CONFIG_FSP_LOC /* FSP base address */
-
-CAR_init_params:
- .long CONFIG_CPU_MICROCODE_CBFS_LOC /* Microcode Location */
- .long CONFIG_CPU_MICROCODE_CBFS_LEN /* Microcode Length */
- .long 0xFFFFFFFF - CONFIG_ROM_SIZE + 1 /* Firmware Location */
- .long CONFIG_ROM_SIZE /* Total Firmware Length */
-
-CAR_init_stack:
- .long CAR_init_done
- .long CAR_init_params
diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c
deleted file mode 100644
index b525a62..0000000
--- a/src/drivers/intel/fsp1_1/car.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/early_variables.h>
-#include <console/console.h>
-#include <ec/google/chromeec/ec.h>
-#include <fsp/car.h>
-#include <fsp/util.h>
-#include <program_loading.h>
-#include <soc/intel/common/util.h>
-#include <timestamp.h>
-
-FSP_INFO_HEADER *fih_car CAR_GLOBAL;
-
-/* Save FSP_INFO_HEADER for TempRamExit() call in assembly. */
-static inline void set_fih_car(FSP_INFO_HEADER *fih)
-{
- /* This variable is written in the raw form because it's only
- * ever accessed in code that that has the cache-as-ram enabled. The
- * assembly routine which tears down cache-as-ram utilizes this
- * variable for determining where to find FSP. */
- fih_car = fih;
-}
-
-asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params)
-{
- /* Initialize timestamp book keeping only once. */
- timestamp_init(car_params->tsc);
-
- /* Call into pre-console init code then initialize console. */
- car_soc_pre_console_init();
- car_mainboard_pre_console_init();
- console_init();
-
- printk(BIOS_DEBUG, "FSP TempRamInit successful\n");
-
- printk(BIOS_SPEW, "bist: 0x%08x\n", car_params->bist);
- printk(BIOS_SPEW, "tsc: 0x%016llx\n", car_params->tsc);
-
- if (car_params->bootloader_car_start != CONFIG_DCACHE_RAM_BASE ||
- car_params->bootloader_car_end !=
- (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)) {
- printk(BIOS_INFO, "CAR mismatch: %08x--%08x vs %08lx--%08lx\n",
- CONFIG_DCACHE_RAM_BASE,
- CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE,
- (long)car_params->bootloader_car_start,
- (long)car_params->bootloader_car_end);
- }
-
- car_soc_post_console_init();
- car_mainboard_post_console_init();
-
- /* Ensure the EC is in the right mode for recovery */
- if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) &&
- !IS_ENABLED(CONFIG_SEPARATE_VERSTAGE))
- google_chromeec_early_init();
-
- set_fih_car(car_params->fih);
-
- /* Return new stack value in ram back to assembly stub. */
- return cache_as_ram_stage_main(car_params->fih);
-}
-
-/* Entry point taken when romstage is called after a separate verstage. */
-asmlinkage void *romstage_after_verstage(void)
-{
- /* Need to locate the current FSP_INFO_HEADER. The cache-as-ram
- * is still enabled. We can directly access work buffer here. */
- FSP_INFO_HEADER *fih;
- struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin");
-
- console_init();
-
- if (prog_locate(&fsp)) {
- fih = NULL;
- printk(BIOS_ERR, "Unable to locate %s\n", prog_name(&fsp));
- } else
- /* This leaks a mapping which this code assumes is benign as
- * the flash is memory mapped CPU's address space. */
- fih = find_fsp((uintptr_t)rdev_mmap_full(prog_rdev(&fsp)));
-
- set_fih_car(fih);
-
- /* Return new stack value in ram back to assembly stub. */
- return cache_as_ram_stage_main(fih);
-}
-
-asmlinkage void after_cache_as_ram(void *chipset_context)
-{
- timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_END);
- printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n");
- soc_display_mtrrs();
-
- after_cache_as_ram_stage();
-}
-
-void __attribute__((weak)) car_mainboard_pre_console_init(void)
-{
-}
-
-void __attribute__((weak)) car_soc_pre_console_init(void)
-{
-}
-
-void __attribute__((weak)) car_mainboard_post_console_init(void)
-{
-}
-
-void __attribute__((weak)) car_soc_post_console_init(void)
-{
-}
diff --git a/src/drivers/intel/fsp1_1/fsp_gop.c b/src/drivers/intel/fsp1_1/fsp_gop.c
deleted file mode 100644
index f531d76..0000000
--- a/src/drivers/intel/fsp1_1/fsp_gop.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <boot/coreboot_tables.h>
-#include <cbfs.h>
-#include <console/console.h>
-#include <fsp/util.h>
-#include <lib.h>
-
-/* Reading VBT table from flash */
-const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len)
-{
- size_t vbt_size;
- union {
- const optionrom_vbt_t *data;
- uint32_t *signature;
- } vbt;
-
- /* Locate the vbt file in cbfs */
- vbt.data = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_OPTIONROM,
- &vbt_size);
- if (!vbt.data) {
- printk(BIOS_INFO,
- "FSP_INFO: VBT data file (vbt.bin) not found in CBFS");
- return NULL;
- }
-
- /* Validate the vbt file */
- if (*vbt.signature != VBT_SIGNATURE) {
- printk(BIOS_WARNING,
- "FSP_WARNING: Invalid signature in VBT data file (vbt.bin)!\n");
- return NULL;
- }
- *vbt_len = vbt_size;
- printk(BIOS_DEBUG, "FSP_INFO: VBT found at %p, 0x%08x bytes\n",
- vbt.data, *vbt_len);
-
-#if IS_ENABLED(CONFIG_DISPLAY_VBT)
- /* Display the vbt file contents */
- printk(BIOS_DEBUG, "VBT Data:\n");
- hexdump(vbt.data, *vbt_len);
- printk(BIOS_DEBUG, "\n");
-#endif
-
- /* Return the pointer to the vbt file data */
- return vbt.data;
-}
-
-void lb_framebuffer(struct lb_header *header)
-{
- struct lb_framebuffer *framebuffer;
- framebuffer = (struct lb_framebuffer *)lb_new_record(header);
-
- VOID *hob_list_ptr;
- hob_list_ptr = get_hob_list();
- const EFI_GUID vbt_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
- u32 *vbt_hob;
- EFI_PEI_GRAPHICS_INFO_HOB *vbt_gop;
- vbt_hob = get_next_guid_hob(&vbt_guid, hob_list_ptr);
- if (vbt_hob == NULL) {
- printk(BIOS_ERR, "FSP_ERR: Graphics Data HOB is not present\n");
- return;
- } else {
- printk(BIOS_DEBUG, "FSP_DEBUG: Graphics Data HOB present\n");
- vbt_gop = GET_GUID_HOB_DATA(vbt_hob);
- }
-
- framebuffer->physical_address = vbt_gop->FrameBufferBase;
- framebuffer->x_resolution = vbt_gop->GraphicsMode.HorizontalResolution;
- framebuffer->y_resolution = vbt_gop->GraphicsMode.VerticalResolution;
- framebuffer->bytes_per_line = vbt_gop->GraphicsMode.PixelsPerScanLine
- * 4;
- framebuffer->bits_per_pixel = 32;
- framebuffer->red_mask_pos = 16;
- framebuffer->red_mask_size = 8;
- framebuffer->green_mask_pos = 8;
- framebuffer->green_mask_size = 8;
- framebuffer->blue_mask_pos = 0;
- framebuffer->blue_mask_size = 8;
- framebuffer->reserved_mask_pos = 24;
- framebuffer->reserved_mask_size = 8;
- framebuffer->tag = LB_TAG_FRAMEBUFFER;
- framebuffer->size = sizeof(*framebuffer);
-}
diff --git a/src/drivers/intel/fsp1_1/fsp_relocate.c b/src/drivers/intel/fsp1_1/fsp_relocate.c
deleted file mode 100644
index 89d7cd9..0000000
--- a/src/drivers/intel/fsp1_1/fsp_relocate.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <cbmem.h>
-#include <commonlib/fsp1_1.h>
-#include <fsp/util.h>
-
-int fsp_relocate(struct prog *fsp_relocd, const struct region_device *fsp_src)
-{
- void *new_loc;
- void *fih;
- ssize_t fih_offset;
- size_t size = region_device_sz(fsp_src);
-
- new_loc = cbmem_add(CBMEM_ID_REFCODE, size);
-
- if (new_loc == NULL) {
- printk(BIOS_ERR, "ERROR: Unable to load FSP into memory.\n");
- return -1;
- }
-
- if (rdev_readat(fsp_src, new_loc, 0, size) != size) {
- printk(BIOS_ERR, "ERROR: Can't read FSP's region device.\n");
- return -1;
- }
-
- fih_offset = fsp1_1_relocate((uintptr_t)new_loc, new_loc, size);
-
- if (fih_offset <= 0) {
- printk(BIOS_ERR, "ERROR: FSP relocation faiulre.\n");
- return -1;
- }
-
- fih = (void *)((uint8_t *)new_loc + fih_offset);
-
- prog_set_area(fsp_relocd, new_loc, size);
- prog_set_entry(fsp_relocd, fih, NULL);
-
- return 0;
-}
diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c
deleted file mode 100644
index 1aa3aec..0000000
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <bootstate.h>
-#include <cbmem.h>
-#include <console/console.h>
-#include <fsp/util.h>
-#include <timestamp.h>
-
-/* Locate the FSP binary in the coreboot filesystem */
-FSP_INFO_HEADER *find_fsp(uintptr_t fsp_base_address)
-{
- union {
- EFI_FFS_FILE_HEADER *ffh;
- FSP_INFO_HEADER *fih;
- EFI_FIRMWARE_VOLUME_EXT_HEADER *fveh;
- EFI_FIRMWARE_VOLUME_HEADER *fvh;
- EFI_RAW_SECTION *rs;
- u8 *u8;
- u32 u32;
- } fsp_ptr;
- static const union {
- char str_id[8];
- u32 int_id[2];
- } fsp_id = {
- .str_id = CONFIG_FSP_IMAGE_ID_STRING
- };
-
- u32 *image_id;
-
- for (;;) {
- /* Get the FSP binary base address in CBFS */
- fsp_ptr.u32 = fsp_base_address;
-
- /* Check the FV signature, _FVH */
- if (fsp_ptr.fvh->Signature != 0x4856465F) {
- fsp_ptr.u8 = (u8 *)ERROR_NO_FV_SIG;
- break;
- }
-
- /* Locate the file header which follows the FV header. */
- fsp_ptr.u8 += fsp_ptr.fvh->ExtHeaderOffset;
- fsp_ptr.u8 += fsp_ptr.fveh->ExtHeaderSize;
- fsp_ptr.u8 = (u8 *)ALIGN_UP(fsp_ptr.u32, 8);
-
- /* Check the FFS GUID */
- if ((((u32 *)&fsp_ptr.ffh->Name)[0] != 0x912740BE)
- || (((u32 *)&fsp_ptr.ffh->Name)[1] != 0x47342284)
- || (((u32 *)&fsp_ptr.ffh->Name)[2] != 0xB08471B9)
- || (((u32 *)&fsp_ptr.ffh->Name)[3] != 0x0C3F3527)) {
- fsp_ptr.u8 = (u8 *)ERROR_NO_FFS_GUID;
- break;
- }
-
- /* Locate the Raw Section Header */
- fsp_ptr.u8 += sizeof(EFI_FFS_FILE_HEADER);
-
- if (fsp_ptr.rs->Type != EFI_SECTION_RAW) {
- fsp_ptr.u8 = (u8 *)ERROR_NO_INFO_HEADER;
- break;
- }
-
- /* Locate the FSP INFO Header which follows the Raw Header. */
- fsp_ptr.u8 += sizeof(EFI_RAW_SECTION);
-
- /* Verify that the FSP base address.*/
- if (fsp_ptr.fih->ImageBase != fsp_base_address) {
- fsp_ptr.u8 = (u8 *)ERROR_IMAGEBASE_MISMATCH;
- break;
- }
-
- /* Verify the FSP Signature */
- if (fsp_ptr.fih->Signature != FSP_SIG) {
- fsp_ptr.u8 = (u8 *)ERROR_INFO_HEAD_SIG_MISMATCH;
- break;
- }
-
- /* Verify the FSP ID */
- image_id = (u32 *)&fsp_ptr.fih->ImageId[0];
- if ((image_id[0] != fsp_id.int_id[0])
- || (image_id[1] != fsp_id.int_id[1]))
- fsp_ptr.u8 = (u8 *)ERROR_FSP_SIG_MISMATCH;
- break;
- }
-
- return fsp_ptr.fih;
-}
-
-void print_fsp_info(FSP_INFO_HEADER *fsp_header)
-{
- u8 *fsp_base;
-
- fsp_base = (u8 *)fsp_header->ImageBase;
- printk(BIOS_SPEW, "FSP_INFO_HEADER: %p\n", fsp_header);
- printk(BIOS_INFO, "FSP Signature: %c%c%c%c%c%c%c%c\n",
- fsp_header->ImageId[0], fsp_header->ImageId[1],
- fsp_header->ImageId[2], fsp_header->ImageId[3],
- fsp_header->ImageId[4], fsp_header->ImageId[5],
- fsp_header->ImageId[6], fsp_header->ImageId[7]);
- printk(BIOS_INFO, "FSP Header Version: %d\n",
- fsp_header->HeaderRevision);
- printk(BIOS_INFO, "FSP Revision: %d.%d.%d.%d\n",
- (u8)((fsp_header->ImageRevision >> 24) & 0xff),
- (u8)((fsp_header->ImageRevision >> 16) & 0xff),
- (u8)((fsp_header->ImageRevision >> 8) & 0xff),
- (u8)(fsp_header->ImageRevision & 0xff));
-#if IS_ENABLED(CONFIG_DISPLAY_FSP_ENTRY_POINTS)
- printk(BIOS_SPEW, "FSP Entry Points:\n");
- printk(BIOS_SPEW, " 0x%p: Image Base\n", fsp_base);
- printk(BIOS_SPEW, " 0x%p: TempRamInit\n",
- &fsp_base[fsp_header->TempRamInitEntryOffset]);
- printk(BIOS_SPEW, " 0x%p: FspInit\n",
- &fsp_base[fsp_header->FspInitEntryOffset]);
- if (fsp_header->HeaderRevision >= FSP_HEADER_REVISION_2) {
- printk(BIOS_SPEW, " 0x%p: MemoryInit\n",
- &fsp_base[fsp_header->FspMemoryInitEntryOffset]);
- printk(BIOS_SPEW, " 0x%p: TempRamExit\n",
- &fsp_base[fsp_header->TempRamExitEntryOffset]);
- printk(BIOS_SPEW, " 0x%p: SiliconInit\n",
- &fsp_base[fsp_header->FspSiliconInitEntryOffset]);
- }
- printk(BIOS_SPEW, " 0x%p: NotifyPhase\n",
- &fsp_base[fsp_header->NotifyPhaseEntryOffset]);
- printk(BIOS_SPEW, " 0x%p: Image End\n",
- &fsp_base[fsp_header->ImageSize]);
-#endif
-}
-
-void fsp_notify(u32 phase)
-{
- FSP_NOTIFY_PHASE notify_phase_proc;
- NOTIFY_PHASE_PARAMS notify_phase_params;
- EFI_STATUS status;
- FSP_INFO_HEADER *fsp_header_ptr;
-
- fsp_header_ptr = fsp_get_fih();
- if (fsp_header_ptr == NULL) {
- fsp_header_ptr = (void *)find_fsp(CONFIG_FSP_LOC);
- if ((u32)fsp_header_ptr < 0xff) {
- /* output something in case there is no serial */
- post_code(0x4F);
- die("Can't find the FSP!\n");
- }
- }
-
- /* call FSP PEI to Notify PostPciEnumeration */
- notify_phase_proc = (FSP_NOTIFY_PHASE)(fsp_header_ptr->ImageBase +
- fsp_header_ptr->NotifyPhaseEntryOffset);
- notify_phase_params.Phase = phase;
-
- if (phase == EnumInitPhaseReadyToBoot) {
- timestamp_add_now(TS_FSP_BEFORE_FINALIZE);
- post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
- } else {
- timestamp_add_now(TS_FSP_BEFORE_ENUMERATE);
- post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
- }
-
- status = notify_phase_proc(¬ify_phase_params);
-
- timestamp_add_now(phase == EnumInitPhaseReadyToBoot ?
- TS_FSP_AFTER_FINALIZE : TS_FSP_AFTER_ENUMERATE);
-
- if (status != 0)
- printk(BIOS_ERR, "FSP API NotifyPhase failed for phase 0x%x with status: 0x%x\n",
- phase, status);
-}
-
-static void fsp_notify_boot_state_callback(void *arg)
-{
- u32 phase = (u32)arg;
-
- printk(BIOS_SPEW, "Calling FspNotify(0x%08x)\n", phase);
- fsp_notify(phase);
-}
-
-BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT,
- fsp_notify_boot_state_callback,
- (void *)EnumInitPhaseAfterPciEnumeration);
-BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
- fsp_notify_boot_state_callback,
- (void *)EnumInitPhaseReadyToBoot);
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
- fsp_notify_boot_state_callback,
- (void *)EnumInitPhaseReadyToBoot);
-
-struct fsp_runtime {
- uint32_t fih;
- uint32_t hob_list;
-} __attribute__((packed));
-
-
-void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list)
-{
- struct fsp_runtime *fspr;
-
- fspr = cbmem_add(CBMEM_ID_FSP_RUNTIME, sizeof(*fspr));
-
- if (fspr == NULL)
- die("Can't save FSP runtime information.\n");
-
- fspr->fih = (uintptr_t)fih;
- fspr->hob_list = (uintptr_t)hob_list;
-}
-
-FSP_INFO_HEADER *fsp_get_fih(void)
-{
- struct fsp_runtime *fspr;
-
- fspr = cbmem_find(CBMEM_ID_FSP_RUNTIME);
-
- if (fspr == NULL)
- return NULL;
-
- return (void *)(uintptr_t)fspr->fih;
-}
-
-void *fsp_get_hob_list(void)
-{
- struct fsp_runtime *fspr;
-
- fspr = cbmem_find(CBMEM_ID_FSP_RUNTIME);
-
- if (fspr == NULL)
- return NULL;
-
- return (void *)(uintptr_t)fspr->hob_list;
-}
-
-void fsp_update_fih(FSP_INFO_HEADER *fih)
-{
- struct fsp_runtime *fspr;
-
- fspr = cbmem_find(CBMEM_ID_FSP_RUNTIME);
-
- if (fspr == NULL)
- die("Can't update FSP runtime information.\n");
-
- fspr->fih = (uintptr_t)fih;
-}
-
-void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
- uint64_t new)
-{
- if (old == new) {
- switch (size) {
- case 1:
- printk(BIOS_SPEW, " 0x%02llx: %s\n", new, name);
- break;
-
- case 2:
- printk(BIOS_SPEW, " 0x%04llx: %s\n", new, name);
- break;
-
- case 4:
- printk(BIOS_SPEW, " 0x%08llx: %s\n", new, name);
- break;
-
- case 8:
- printk(BIOS_SPEW, " 0x%016llx: %s\n", new, name);
- break;
- }
- } else {
- switch (size) {
- case 1:
- printk(BIOS_SPEW, " 0x%02llx --> 0x%02llx: %s\n", old,
- new, name);
- break;
-
- case 2:
- printk(BIOS_SPEW, " 0x%04llx --> 0x%04llx: %s\n", old,
- new, name);
- break;
-
- case 4:
- printk(BIOS_SPEW, " 0x%08llx --> 0x%08llx: %s\n", old,
- new, name);
- break;
-
- case 8:
- printk(BIOS_SPEW, " 0x%016llx --> 0x%016llx: %s\n",
- old, new, name);
- break;
- }
- }
-}
diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c
deleted file mode 100644
index c0816e9..0000000
--- a/src/drivers/intel/fsp1_1/hob.c
+++ /dev/null
@@ -1,325 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/early_variables.h>
-#include <arch/hlt.h>
-#include <bootstate.h>
-#include <cbmem.h>
-#include <console/console.h>
-#include <fsp/util.h>
-#include <ip_checksum.h>
-#include <lib.h> // hexdump
-#include <string.h>
-
-/* Compares two EFI GUIDs. Returns true of the GUIDs match, false otherwise. */
-static bool compare_guid(const EFI_GUID *guid1, const EFI_GUID *guid2)
-{
- return !memcmp(guid1, guid2, sizeof(EFI_GUID));
-}
-
-/* Returns the pointer to the HOB list. */
-void *get_hob_list(void)
-{
- void *hob_list;
-
- hob_list = fsp_get_hob_list();
- if (hob_list == NULL)
- die("Call fsp_set_runtime() before this call!\n");
- return hob_list;
-}
-
-/* Returns the next instance of a HOB type from the starting HOB. */
-void *get_next_hob(uint16_t type, const void *hob_start)
-{
- EFI_PEI_HOB_POINTERS hob;
-
- if (!hob_start)
- return NULL;
-
- hob.Raw = (UINT8 *)hob_start;
-
- /* Parse the HOB list until end of list or matching type is found. */
- while (!END_OF_HOB_LIST(hob.Raw)) {
- if (hob.Header->HobType == type)
- return hob.Raw;
- if (GET_HOB_LENGTH(hob.Raw) < sizeof(*hob.Header))
- break;
- hob.Raw = GET_NEXT_HOB(hob.Raw);
- }
- return NULL;
-}
-
-/* Returns the first instance of a HOB type among the whole HOB list. */
-void *get_first_hob(uint16_t type)
-{
- return get_next_hob(type, get_hob_list());
-}
-
-/* Returns the next instance of the matched GUID HOB from the starting HOB. */
-void *get_next_guid_hob(const EFI_GUID * guid, const void *hob_start)
-{
- EFI_PEI_HOB_POINTERS hob;
-
- hob.Raw = (uint8_t *)hob_start;
- while ((hob.Raw = get_next_hob(EFI_HOB_TYPE_GUID_EXTENSION, hob.Raw))
- != NULL) {
- if (compare_guid(guid, &hob.Guid->Name))
- break;
- hob.Raw = GET_NEXT_HOB(hob.Raw);
- }
- return hob.Raw;
-}
-
-/*
- * Returns the first instance of the matched GUID HOB among the whole HOB list.
- */
-void *get_first_guid_hob(const EFI_GUID *guid)
-{
- return get_next_guid_hob(guid, get_hob_list());
-}
-
-/*
- * Returns the next instance of the matching resource HOB from the starting HOB.
- */
-void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start)
-{
- EFI_PEI_HOB_POINTERS hob;
-
- hob.Raw = (UINT8 *)hob_start;
- while ((hob.Raw = get_next_hob(EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
- hob.Raw)) != NULL) {
- if (compare_guid(guid, &hob.ResourceDescriptor->Owner))
- break;
- hob.Raw = GET_NEXT_HOB(hob.Raw);
- }
- return hob.Raw;
-}
-
-/*
- * Returns the first instance of the matching resource HOB among the whole HOB
- * list.
- */
-void *get_first_resource_hob(const EFI_GUID *guid)
-{
- return get_next_resource_hob(guid, get_hob_list());
-}
-
-static void print_hob_mem_attributes(void *hob_ptr)
-{
- EFI_MEMORY_TYPE hob_mem_type;
- EFI_HOB_MEMORY_ALLOCATION *hob_memory_ptr = hob_ptr;
- u64 hob_mem_addr = hob_memory_ptr->AllocDescriptor.MemoryBaseAddress;
- u64 hob_mem_length = hob_memory_ptr->AllocDescriptor.MemoryLength;
-
- hob_mem_type = hob_memory_ptr->AllocDescriptor.MemoryType;
-
- static const char *hob_mem_type_names[15] = {
- [EfiReservedMemoryType] = "EfiReservedMemoryType",
- [EfiLoaderCode] = "EfiLoaderCode",
- [EfiLoaderData] = "EfiLoaderData",
- [EfiBootServicesCode] = "EfiBootServicesCode",
- [EfiBootServicesData] = "EfiBootServicesData",
- [EfiRuntimeServicesCode] = "EfiRuntimeServicesCode",
- [EfiRuntimeServicesData] = "EfiRuntimeServicesData",
- [EfiConventionalMemory] = "EfiConventionalMemory",
- [EfiUnusableMemory] = "EfiUnusableMemory",
- [EfiACPIReclaimMemory] = "EfiACPIReclaimMemory",
- [EfiACPIMemoryNVS] = "EfiACPIMemoryNVS",
- [EfiMemoryMappedIO] = "EfiMemoryMappedIO",
- [EfiMemoryMappedIOPortSpace] = "EfiMemoryMappedIOPortSpace",
- [EfiPalCode] = "EfiPalCode",
- [EfiMaxMemoryType] = "EfiMaxMemoryType",
- };
-
- if (hob_mem_type >= ARRAY_SIZE(hob_mem_type_names))
- hob_mem_type = EfiReservedMemoryType;
-
- printk(BIOS_SPEW, " Memory type %s (0x%x)\n",
- hob_mem_type_names[hob_mem_type],
- (u32)hob_mem_type);
- printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
- (unsigned long)hob_mem_addr,
- (unsigned long)hob_mem_length);
-}
-
-static void print_hob_resource_attributes(void *hob_ptr)
-{
- EFI_HOB_RESOURCE_DESCRIPTOR *hob_resource_ptr =
- (EFI_HOB_RESOURCE_DESCRIPTOR *)hob_ptr;
- u32 hob_res_type = hob_resource_ptr->ResourceType;
- u32 hob_res_attr = hob_resource_ptr->ResourceAttribute;
- u64 hob_res_addr = hob_resource_ptr->PhysicalStart;
- u64 hob_res_length = hob_resource_ptr->ResourceLength;
- const char *hob_res_type_str = NULL;
-
- /* HOB Resource Types */
- switch (hob_res_type) {
- case EFI_RESOURCE_SYSTEM_MEMORY:
- hob_res_type_str = "EFI_RESOURCE_SYSTEM_MEMORY";
- break;
- case EFI_RESOURCE_MEMORY_MAPPED_IO:
- hob_res_type_str = "EFI_RESOURCE_MEMORY_MAPPED_IO";
- break;
- case EFI_RESOURCE_IO:
- hob_res_type_str = "EFI_RESOURCE_IO";
- break;
- case EFI_RESOURCE_FIRMWARE_DEVICE:
- hob_res_type_str = "EFI_RESOURCE_FIRMWARE_DEVICE";
- break;
- case EFI_RESOURCE_MEMORY_MAPPED_IO_PORT:
- hob_res_type_str = "EFI_RESOURCE_MEMORY_MAPPED_IO_PORT";
- break;
- case EFI_RESOURCE_MEMORY_RESERVED:
- hob_res_type_str = "EFI_RESOURCE_MEMORY_RESERVED";
- break;
- case EFI_RESOURCE_IO_RESERVED:
- hob_res_type_str = "EFI_RESOURCE_IO_RESERVED";
- break;
- case EFI_RESOURCE_MAX_MEMORY_TYPE:
- hob_res_type_str = "EFI_RESOURCE_MAX_MEMORY_TYPE";
- break;
- default:
- hob_res_type_str = "EFI_RESOURCE_UNKNOWN";
- break;
- }
-
- printk(BIOS_SPEW, " Resource %s (0x%0x) has attributes 0x%0x\n",
- hob_res_type_str, hob_res_type, hob_res_attr);
- printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
- (unsigned long)hob_res_addr,
- (unsigned long)hob_res_length);
-}
-
-static const char *get_hob_type_string(void *hob_ptr)
-{
- EFI_PEI_HOB_POINTERS hob;
- const char *hob_type_string;
- const EFI_GUID fsp_reserved_guid =
- FSP_RESERVED_MEMORY_RESOURCE_HOB_GUID;
- const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
- const EFI_GUID bootldr_tmp_mem_guid =
- FSP_BOOTLOADER_TEMP_MEMORY_HOB_GUID;
- const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID;
- const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
- const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
-
- hob.Header = (EFI_HOB_GENERIC_HEADER *)hob_ptr;
- switch (hob.Header->HobType) {
- case EFI_HOB_TYPE_HANDOFF:
- hob_type_string = "EFI_HOB_TYPE_HANDOFF";
- break;
- case EFI_HOB_TYPE_MEMORY_ALLOCATION:
- hob_type_string = "EFI_HOB_TYPE_MEMORY_ALLOCATION";
- break;
- case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
- if (compare_guid(&fsp_reserved_guid, &hob.Guid->Name))
- hob_type_string = "FSP_RESERVED_MEMORY_RESOURCE_HOB";
- else if (compare_guid(&bootldr_tolum_guid, &hob.Guid->Name))
- hob_type_string = "FSP_BOOTLOADER_TOLUM_HOB_GUID";
- else
- hob_type_string = "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR";
- break;
- case EFI_HOB_TYPE_GUID_EXTENSION:
- if (compare_guid(&bootldr_tmp_mem_guid, &hob.Guid->Name))
- hob_type_string = "FSP_BOOTLOADER_TEMP_MEMORY_HOB";
- else if (compare_guid(&mrc_guid, &hob.Guid->Name))
- hob_type_string = "FSP_NON_VOLATILE_STORAGE_HOB";
- else if (compare_guid(&graphics_info_guid, &hob.Guid->Name))
- hob_type_string = "EFI_PEI_GRAPHICS_INFO_HOB_GUID";
- else if (compare_guid(&memory_info_hob_guid, &hob.Guid->Name))
- hob_type_string = "FSP_SMBIOS_MEMORY_INFO_GUID";
- else
- hob_type_string = "EFI_HOB_TYPE_GUID_EXTENSION";
- break;
- case EFI_HOB_TYPE_MEMORY_POOL:
- hob_type_string = "EFI_HOB_TYPE_MEMORY_POOL";
- break;
- case EFI_HOB_TYPE_UNUSED:
- hob_type_string = "EFI_HOB_TYPE_UNUSED";
- break;
- case EFI_HOB_TYPE_END_OF_HOB_LIST:
- hob_type_string = "EFI_HOB_TYPE_END_OF_HOB_LIST";
- break;
- default:
- hob_type_string = "EFI_HOB_TYPE_UNRECOGNIZED";
- break;
- }
-
- return hob_type_string;
-}
-
-/*
- * Print out a structure of all the HOBs
- * that match a certain type:
- * Print all types (0x0000)
- * EFI_HOB_TYPE_HANDOFF (0x0001)
- * EFI_HOB_TYPE_MEMORY_ALLOCATION (0x0002)
- * EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (0x0003)
- * EFI_HOB_TYPE_GUID_EXTENSION (0x0004)
- * EFI_HOB_TYPE_MEMORY_POOL (0x0007)
- * EFI_HOB_TYPE_UNUSED (0xFFFE)
- * EFI_HOB_TYPE_END_OF_HOB_LIST (0xFFFF)
- */
-void print_hob_type_structure(u16 hob_type, void *hob_list_ptr)
-{
- u32 *current_hob;
- u32 *next_hob = 0;
- u8 last_hob = 0;
- u32 current_type;
- const char *current_type_str;
-
- current_hob = hob_list_ptr;
-
- /*
- * Print out HOBs of our desired type until
- * the end of the HOB list
- */
- printk(BIOS_DEBUG, "\n=== FSP HOB Data Structure ===\n");
- printk(BIOS_DEBUG, "0x%p: hob_list_ptr\n", hob_list_ptr);
- do {
- EFI_HOB_GENERIC_HEADER *current_header_ptr =
- (EFI_HOB_GENERIC_HEADER *)current_hob;
-
- /* Get the type of this HOB */
- current_type = current_header_ptr->HobType;
- current_type_str = get_hob_type_string(current_hob);
-
- if (current_type == hob_type || hob_type == 0x0000) {
- printk(BIOS_DEBUG, "HOB %p is an %s (type 0x%0x)\n",
- current_hob, current_type_str,
- current_type);
- switch (current_type) {
- case EFI_HOB_TYPE_MEMORY_ALLOCATION:
- print_hob_mem_attributes(current_hob);
- break;
- case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
- print_hob_resource_attributes(current_hob);
- break;
- }
- }
-
- /* Check for end of HOB list */
- last_hob = END_OF_HOB_LIST(current_hob);
- if (!last_hob) {
- /* Get next HOB pointer */
- next_hob = GET_NEXT_HOB(current_hob);
-
- /* Start on next HOB */
- current_hob = next_hob;
- }
- } while (!last_hob);
- printk(BIOS_DEBUG, "=== End of FSP HOB Data Structure ===\n\n");
-}
diff --git a/src/drivers/intel/fsp1_1/include/fsp/api.h b/src/drivers/intel/fsp1_1/include/fsp/api.h
deleted file mode 100644
index 773b3c3..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/api.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _FSP1_1_API_H_
-#define _FSP1_1_API_H_
-
-/* All the FSP headers need to have UEFI types provided before inclusion. */
-#include <fsp/uefi_binding.h>
-
-/*
- * Intel's code does not have a handle on changing global packing state.
- * Therefore, one needs to protect against packing policies that are set
- * globally for a compliation unit just by including a header file.
- */
-#pragma pack(push)
-
-#include <vendorcode/intel/fsp/fsp1_1/IntelFspPkg/Include/FspApi.h>
-#include <vendorcode/intel/fsp/fsp1_1/IntelFspPkg/Include/FspInfoHeader.h>
-
-/* Restore original packing policy. */
-#pragma pack(pop)
-
-#endif
diff --git a/src/drivers/intel/fsp1_1/include/fsp/car.h b/src/drivers/intel/fsp1_1/include/fsp/car.h
deleted file mode 100644
index 56400a7..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/car.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef FSP1_1_CAR_H
-#define FSP1_1_CAR_H
-
-#include <arch/cpu.h>
-#include <fsp/api.h>
-#include <stdint.h>
-
-/* cache-as-ram support for FSP 1.1. */
-struct cache_as_ram_params {
- uint64_t tsc;
- uint32_t bist;
- FSP_INFO_HEADER *fih;
- uintptr_t bootloader_car_start;
- uintptr_t bootloader_car_end;
-};
-
-/* Entry points from the cache-as-ram assembly code. */
-asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params);
-asmlinkage void after_cache_as_ram(void *chipset_context);
-asmlinkage void *romstage_after_verstage(void);
-/* Per stage calls from the above two functions. The void * return from
- * cache_as_ram_stage_main() is the stack pointer to use in ram after
- * exiting cache-as-ram mode. */
-void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih);
-void after_cache_as_ram_stage(void);
-
-/* Mainboard and SoC initialization prior to console. */
-void car_mainboard_pre_console_init(void);
-void car_soc_pre_console_init(void);
-/* Mainboard and SoC initialization post console initialization. */
-void car_mainboard_post_console_init(void);
-void car_soc_post_console_init(void);
-
-#endif
diff --git a/src/drivers/intel/fsp1_1/include/fsp/gma.h b/src/drivers/intel/fsp1_1/include/fsp/gma.h
deleted file mode 100644
index 8797932..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/gma.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Chromium OS Authors
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _GMA_H_
-#define _GMA_H_
-
-#include <types.h>
-
-/* IGD PCI Configuration register */
-#define ASLS 0xfc /* OpRegion Base */
-#define SWSCI 0xe8 /* SWSCI Register */
-#define GSSCIE (1 << 0) /* SCI Event trigger */
-#define SMISCISEL (1 << 15) /* Select SMI or SCI event source */
-
-/* mailbox 0: header */
-typedef struct {
- u8 signature[16];
- u32 size;
- u32 version;
- u8 sbios_version[32];
- u8 vbios_version[16];
- u8 driver_version[16];
- u32 mailboxes;
- u8 reserved[164];
-} __attribute__((packed)) opregion_header_t;
-
-#define IGD_OPREGION_SIGNATURE "IntelGraphicsMem"
-#define IGD_OPREGION_VERSION 2
-
-#define IGD_MBOX1 (1 << 0)
-#define IGD_MBOX2 (1 << 1)
-#define IGD_MBOX3 (1 << 2)
-#define IGD_MBOX4 (1 << 3)
-#define IGD_MBOX5 (1 << 4)
-
-#define MAILBOXES_MOBILE (IGD_MBOX1 | IGD_MBOX2 | IGD_MBOX3 | \
- IGD_MBOX4 | IGD_MBOX5)
-#define MAILBOXES_DESKTOP (IGD_MBOX2 | IGD_MBOX4)
-
-#define SBIOS_VERSION_SIZE 32
-
-/* mailbox 1: public acpi methods */
-typedef struct {
- u32 drdy;
- u32 csts;
- u32 cevt;
- u8 reserved1[20];
- u32 didl[8];
- u32 cpdl[8];
- u32 cadl[8];
- u32 nadl[8];
- u32 aslp;
- u32 tidx;
- u32 chpd;
- u32 clid;
- u32 cdck;
- u32 sxsw;
- u32 evts;
- u32 cnot;
- u32 nrdy;
- u8 reserved2[60];
-} __attribute__((packed)) opregion_mailbox1_t;
-
-/* mailbox 2: software sci interface */
-typedef struct {
- u32 scic;
- u32 parm;
- u32 dslp;
- u8 reserved[244];
-} __attribute__((packed)) opregion_mailbox2_t;
-
-/* mailbox 3: power conservation */
-typedef struct {
- u32 ardy;
- u32 aslc;
- u32 tche;
- u32 alsi;
- u32 bclp;
- u32 pfit;
- u32 cblv;
- u16 bclm[20];
- u32 cpfm;
- u32 epfm;
- u8 plut[74];
- u32 pfmb;
- u32 ccdv;
- u32 pcft;
- u8 reserved[94];
-} __attribute__((packed)) opregion_mailbox3_t;
-
-#define IGD_BACKLIGHT_BRIGHTNESS 0xff
-#define IGD_INITIAL_BRIGHTNESS 0x64
-
-#define IGD_FIELD_VALID (1 << 31)
-#define IGD_WORD_FIELD_VALID (1 << 15)
-#define IGD_PFIT_STRETCH 6
-
-/* mailbox 4: vbt */
-typedef struct {
- u8 gvd1[7168];
-} __attribute__((packed)) opregion_vbt_t;
-
-/* IGD OpRegion */
-typedef struct {
- opregion_header_t header;
- opregion_mailbox1_t mailbox1;
- opregion_mailbox2_t mailbox2;
- opregion_mailbox3_t mailbox3;
- opregion_vbt_t vbt;
-} __attribute__((packed)) igd_opregion_t;
-
-/* Intel Video BIOS (Option ROM) */
-typedef struct {
- u16 signature;
- u8 size;
- u8 reserved[21];
- u16 pcir_offset;
- u16 vbt_offset;
-} __attribute__((packed)) optionrom_header_t;
-
-#define OPROM_SIGNATURE 0xaa55
-
-typedef struct {
- u32 signature;
- u16 vendor;
- u16 device;
- u16 reserved1;
- u16 length;
- u8 revision;
- u8 classcode[3];
- u16 imagelength;
- u16 coderevision;
- u8 codetype;
- u8 indicator;
- u16 reserved2;
-} __attribute__((packed)) optionrom_pcir_t;
-
-typedef struct {
- u8 hdr_signature[20];
- u16 hdr_version;
- u16 hdr_size;
- u16 hdr_vbt_size;
- u8 hdr_vbt_checksum;
- u8 hdr_reserved;
- u32 hdr_vbt_datablock;
- u32 hdr_aim[4];
- u8 datahdr_signature[16];
- u16 datahdr_version;
- u16 datahdr_size;
- u16 datahdr_datablocksize;
- u8 coreblock_id;
- u16 coreblock_size;
- u16 coreblock_biossize;
- u8 coreblock_biostype;
- u8 coreblock_releasestatus;
- u8 coreblock_hwsupported;
- u8 coreblock_integratedhw;
- u8 coreblock_biosbuild[4];
- u8 coreblock_biossignon[155];
-} __attribute__((packed)) optionrom_vbt_t;
-
-#define VBT_SIGNATURE 0x54425624
-
-#endif /* _GMA_H_ */
-
diff --git a/src/drivers/intel/fsp1_1/include/fsp/gop.h b/src/drivers/intel/fsp1_1/include/fsp/gop.h
deleted file mode 100644
index 66c8a3c..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/gop.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _FSP1_1_GOP_H_
-#define _FSP1_1_GOP_H_
-
-#include <fsp/gma.h>
-
-const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len);
-
-#endif /* _FSP1_1_GOP_H_ */
diff --git a/src/drivers/intel/fsp1_1/include/fsp/memmap.h b/src/drivers/intel/fsp1_1/include/fsp/memmap.h
deleted file mode 100644
index 965bce6..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/memmap.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015-2016 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _COMMON_MEMMAP_H_
-#define _COMMON_MEMMAP_H_
-
-#include <types.h>
-
-/*
- * mmap_region_granularity must to return a size which is a positive non-zero
- * integer multiple of the SMM size when SMM is in use. When not using SMM,
- * this value should be set to 8 MiB.
- */
-size_t mmap_region_granularity(void);
-
-/* Fills in the arguments for the entire SMM region covered by chipset
- * protections. e.g. TSEG. */
-void smm_region(void **start, size_t *size);
-
-enum {
- /* SMM handler area. */
- SMM_SUBREGION_HANDLER,
- /* SMM cache region. */
- SMM_SUBREGION_CACHE,
- /* Chipset specific area. */
- SMM_SUBREGION_CHIPSET,
- /* Total sub regions supported. */
- SMM_SUBREGION_NUM,
-};
-
-/* Fills in the start and size for the requested SMM subregion. Returns
- * 0 on susccess, < 0 on failure. */
-int smm_subregion(int sub, void **start, size_t *size);
-
-#endif /* _COMMON_MEMMAP_H_ */
diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
deleted file mode 100644
index 5ce6aa8..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- * Copyright (C) 2015 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _INTEL_COMMON_RAMSTAGE_H_
-#define _INTEL_COMMON_RAMSTAGE_H_
-
-#include <fsp/util.h>
-#include <soc/intel/common/util.h>
-#include <stdint.h>
-
-/* Perform Intel silicon init. */
-void intel_silicon_init(void);
-void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup);
-/* Called after the silicon init code has run. */
-void soc_after_silicon_init(void);
-/* Initialize UPD data before SiliconInit call. */
-void soc_silicon_init_params(SILICON_INIT_UPD *params);
-void mainboard_silicon_init_params(SILICON_INIT_UPD *params);
-void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
- SILICON_INIT_UPD *new);
-void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params);
-
-#endif /* _INTEL_COMMON_RAMSTAGE_H_ */
diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h
deleted file mode 100644
index d07dc37..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015-2016 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _COMMON_ROMSTAGE_H_
-#define _COMMON_ROMSTAGE_H_
-
-#include <stdint.h>
-#include <arch/cpu.h>
-#include <memory_info.h>
-#include <fsp/car.h>
-#include <fsp/util.h>
-#include <soc/intel/common/util.h>
-#include <soc/pei_wrapper.h>
-#include <soc/pm.h> /* chip_power_state */
-
-struct romstage_params {
- uint32_t fsp_version;
- struct chipset_power_state *power_state;
- struct pei_data *pei_data;
- void *chipset_context;
-};
-
-/*
- * FSP Boot Flow:
- * 1. src/cpu/x86/16bit/reset.inc
- * 2. src/cpu/x86/16bit/entry.inc
- * 3. other modules
- * 4. src/drivers/intel/fsp1_1/cache_as_ram.inc
- * 5. src/drivers/intel/fsp1_1/fsp_util.c/find_fsp
- * 6. FSP binary/TempRamInit
- * 7. src/drivers/intel/fsp1_1/cache_as_ram.inc - return
- * 8. src/soc/intel/common/romstage.c/romstage_main
- * 9 src/soc/.../romstage/.../soc_pre_console_init
- * 10 src/console/console.c/console_init
- * 11 src/soc/.../romstage/.../soc_romstage_init
- * 12. src/mainboard/.../romstage.c/mainboard_romstage_entry
- * 13. src/soc/intel/common/romstage.c/romstage_common
- * 14 src/soc/.../romstage/.../soc_pre_raminit
- * 15. FSP binary/MemoryInit
- * 16. src/soc/intel/common/romstage.c/romstage_common - return
- * 17. src/mainboard/.../romstage.c/mainboard_romstage_entry - return
- * 18. src/soc/intel/common/romstage.c/romstage_main - return
- * 19. src/soc/intel/common/stack.c/setup_stack_and_mttrs
- * 20. src/drivers/intel/fsp1_1/cache_as_ram.inc - return, cleanup
- * after call to romstage_main
- * 21. FSP binary/TempRamExit
- * 22. src/soc/intel/common/romstage.c/romstage_after_car
- * 23. FSP binary/SiliconInit
- * 24. src/soc/intel/common/romstage.c/romstage_after_car - return
- * 25. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify_boot_state_callback
- * 26. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify
- * 27. FSP binary/FspNotify
- * 28. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify_boot_state_callback
- * 29. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify
- * 30. FSP binary/FspNotify
- */
-
-void mainboard_check_ec_image(struct romstage_params *params);
-void mainboard_memory_init_params(struct romstage_params *params,
- MEMORY_INIT_UPD *memory_params);
-void mainboard_romstage_entry(struct romstage_params *params);
-void mainboard_save_dimm_info(struct romstage_params *params);
-void mainboard_add_dimm_info(struct romstage_params *params,
- struct memory_info *mem_info,
- int channel, int dimm, int index);
-void raminit(struct romstage_params *params);
-void report_memory_config(void);
-void romstage_common(struct romstage_params *params);
-asmlinkage void *romstage_main(FSP_INFO_HEADER *fih);
-void *setup_stack_and_mtrrs(void);
-void soc_after_ram_init(struct romstage_params *params);
-void soc_display_memory_init_params(const MEMORY_INIT_UPD *old,
- MEMORY_INIT_UPD *new);
-void soc_memory_init_params(struct romstage_params *params,
- MEMORY_INIT_UPD *upd);
-void soc_pre_ram_init(struct romstage_params *params);
-
-/*
- * Set the MTRRs using the data on the stack from setup_stack_and_mtrrs.
- * Return a new top_of_stack value which removes the setup_stack_and_mtrrs data.
- */
-asmlinkage void *soc_set_mtrrs(void *top_of_stack);
-asmlinkage void soc_enable_mtrrs(void);
-
-#endif /* _COMMON_ROMSTAGE_H_ */
diff --git a/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h b/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h
deleted file mode 100644
index affb43f..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _FSP1_1_SOC_BINDING_H_
-#define _FSP1_1_SOC_BINDING_H_
-
-/* All the FSP headers need to have UEFI types provided before inclusion. */
-#include <fsp/uefi_binding.h>
-
-/*
- * Intel's code does not have a handle on changing global packing state.
- * Therefore, one needs to protect against packing policies that are set
- * globally for a compliation unit just by including a header file.
- */
-#pragma pack(push)
-
-/*
- * This file is found in the soc / chipset directory. It is
- * a per implementation specific header. i.e. different FSP implementations
- * for different chipsets.
- */
-#include <FspUpdVpd.h>
-
-/* Restore original packing policy. */
-#pragma pack(pop)
-
-#endif
diff --git a/src/drivers/intel/fsp1_1/include/fsp/stack.h b/src/drivers/intel/fsp1_1/include/fsp/stack.h
deleted file mode 100644
index e60360d..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/stack.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _COMMON_STACK_H_
-#define _COMMON_STACK_H_
-
-#include <stdint.h>
-
-static inline void *stack_push32(void *stack, uint32_t value)
-{
- uint32_t *stack32 = stack;
-
- stack32 = &stack32[-1];
- *stack32 = value;
- return stack32;
-}
-
-#endif /* _COMMON_STACK_H_ */
diff --git a/src/drivers/intel/fsp1_1/include/fsp/uefi_binding.h b/src/drivers/intel/fsp1_1/include/fsp/uefi_binding.h
deleted file mode 100644
index ad5bd36..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/uefi_binding.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _FSP1_1_UEFI_BINDING_H_
-#define _FSP1_1_UEFI_BINDING_H_
-
-/*
- * Intel's code does not have a handle on changing global packing state.
- * Therefore, one needs to protect against packing policies that are set
- * globally for a compliation unit just by including a header file.
- */
-#pragma pack(push)
-
-/*
- * Pull in the UEFI types from 2.4. Smarter decisions can be made on what
- * version to bind to, but for now 2.4 is standard for FSP 1.1.
- */
-#include <vendorcode/intel/edk2/uefi_2.4/uefi_types.h>
-
-/* Restore original packing policy. */
-#pragma pack(pop)
-
-#endif
diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h
deleted file mode 100644
index 07cf0c7..0000000
--- a/src/drivers/intel/fsp1_1/include/fsp/util.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef FSP1_1_UTIL_H
-#define FSP1_1_UTIL_H
-
-#include <rules.h>
-#include <fsp/api.h>
-/* Current users expect to get the SoC's FSP definitions by including util.h. */
-#include <fsp/soc_binding.h>
-#include <fsp/gop.h>
-#include <program_loading.h>
-#include <commonlib/region.h>
-
-/* find_fsp() should only be called from assembly code. */
-FSP_INFO_HEADER *find_fsp(uintptr_t fsp_base_address);
-/* Set FSP's runtime information. */
-void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list);
-/* Use a new FSP_INFO_HEADER at runtime. */
-void fsp_update_fih(FSP_INFO_HEADER *fih);
-/* fsp_get_fih() is only valid after calling fsp_set_runtime(). */
-FSP_INFO_HEADER *fsp_get_fih(void);
-/* fsp_get_hob_list() is only valid after calling fsp_set_runtime(). */
-void *fsp_get_hob_list(void);
-void fsp_early_init(FSP_INFO_HEADER *fsp_info);
-void fsp_notify(u32 phase);
-void print_hob_type_structure(u16 hob_type, void *hob_list_ptr);
-void print_fsp_info(FSP_INFO_HEADER *fsp_header);
-void *get_next_type_guid_hob(UINT16 type, const EFI_GUID *guid,
- const void *hob_start);
-void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start);
-void *get_first_resource_hob(const EFI_GUID *guid);
-void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
- uint64_t new);
-
-/* Return version of FSP associated with fih. */
-static inline uint32_t fsp_version(FSP_INFO_HEADER *fih)
-{
- return fih->ImageRevision;
-}
-
-/*
- * Relocate FSP entire binary into ram. Returns < 0 on error, 0 on success.
- * The FSP source is pointed to by region_device and the relocation information
- * is encoded in a struct prog with its entry point set to the FSP info header.
- */
-int fsp_relocate(struct prog *fsp_relocd, const struct region_device *fsp_src);
-
-/* Additional HOB types not included in the FSP:
- * #define EFI_HOB_TYPE_HANDOFF 0x0001
- * #define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
- * #define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
- * #define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
- * #define EFI_HOB_TYPE_FV 0x0005
- * #define EFI_HOB_TYPE_CPU 0x0006
- * #define EFI_HOB_TYPE_MEMORY_POOL 0x0007
- * #define EFI_HOB_TYPE_CV 0x0008
- * #define EFI_HOB_TYPE_UNUSED 0xFFFE
- * #define EFI_HOB_TYPE_END_OF_HOB_LIST 0xffff
- */
-#define EFI_HOB_TYPE_HANDOFF 0x0001
-#define EFI_HOB_TYPE_MEMORY_POOL 0x0007
-
-/* The offset in bytes from the start of the info structure */
-#define FSP_IMAGE_SIG_LOC 0
-#define FSP_IMAGE_ID_LOC 16
-#define FSP_IMAGE_BASE_LOC 28
-#define FSP_IMAGE_ATTRIBUTE_LOC 32
-#define GRAPHICS_SUPPORT_BIT (1 << 0)
-
-#define ERROR_NO_FV_SIG 1
-#define ERROR_NO_FFS_GUID 2
-#define ERROR_NO_INFO_HEADER 3
-#define ERROR_IMAGEBASE_MISMATCH 4
-#define ERROR_INFO_HEAD_SIG_MISMATCH 5
-#define ERROR_FSP_SIG_MISMATCH 6
-
-#if ENV_RAMSTAGE
-extern void *FspHobListPtr;
-#endif
-
-/* TODO: Remove the EFI types and decorations from coreboot implementations. */
-VOID * EFIAPI get_hob_list(VOID);
-VOID * EFIAPI get_next_hob(UINT16 type, CONST VOID *hob_start);
-VOID * EFIAPI get_first_hob(UINT16 type);
-VOID * EFIAPI get_next_guid_hob(CONST EFI_GUID * guid, CONST VOID *hob_start);
-VOID * EFIAPI get_first_guid_hob(CONST EFI_GUID * guid);
-
-#endif /* FSP1_1_UTIL_H */
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c
deleted file mode 100644
index e505b93..0000000
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014-2016 Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cbmem.h>
-#include <console/console.h>
-#include <fsp/memmap.h>
-#include <fsp/romstage.h>
-#include <fsp/util.h>
-#include <lib.h> /* hexdump */
-#include <reset.h>
-#include <soc/intel/common/mma.h>
-#include <string.h>
-#include <timestamp.h>
-#include <bootmode.h>
-
-void raminit(struct romstage_params *params)
-{
- const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID;
- EFI_HOB_RESOURCE_DESCRIPTOR *cbmem_root;
- FSP_INFO_HEADER *fsp_header;
- EFI_HOB_RESOURCE_DESCRIPTOR *fsp_memory;
- FSP_MEMORY_INIT fsp_memory_init;
- FSP_MEMORY_INIT_PARAMS fsp_memory_init_params;
- const EFI_GUID fsp_reserved_guid =
- FSP_RESERVED_MEMORY_RESOURCE_HOB_GUID;
- void *fsp_reserved_memory_area;
- FSP_INIT_RT_COMMON_BUFFER fsp_rt_common_buffer;
- void *hob_list_ptr;
- FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
- const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
- MEMORY_INIT_UPD memory_init_params;
- const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
- u32 *mrc_hob;
- u32 fsp_reserved_bytes;
- MEMORY_INIT_UPD *original_params;
- struct pei_data *pei_ptr;
- EFI_STATUS status;
- VPD_DATA_REGION *vpd_ptr;
- UPD_DATA_REGION *upd_ptr;
- int fsp_verification_failure = 0;
-#if IS_ENABLED(CONFIG_DISPLAY_HOBS)
- unsigned long int data;
- EFI_PEI_HOB_POINTERS hob_ptr;
-#endif
-
- /*
- * Find and copy the UPD region to the stack so the platform can modify
- * the settings if needed. Modifications to the UPD buffer are done in
- * the platform callback code. The platform callback code is also
- * responsible for assigning the UpdDataRngPtr to this buffer if any
- * updates are made. The default state is to leave the UpdDataRngPtr
- * set to NULL. This indicates that the FSP code will use the UPD
- * region in the FSP binary.
- */
- post_code(0x34);
- fsp_header = params->chipset_context;
- vpd_ptr = (VPD_DATA_REGION *)(fsp_header->CfgRegionOffset +
- fsp_header->ImageBase);
- printk(BIOS_DEBUG, "VPD Data: 0x%p\n", vpd_ptr);
- upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
- fsp_header->ImageBase);
- printk(BIOS_DEBUG, "UPD Data: 0x%p\n", upd_ptr);
- original_params = (void *)((u8 *)upd_ptr +
- upd_ptr->MemoryInitUpdOffset);
- memcpy(&memory_init_params, original_params,
- sizeof(memory_init_params));
-
- /* Zero fill RT Buffer data and start populating fields. */
- memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer));
- pei_ptr = params->pei_data;
- if (pei_ptr->boot_mode == SLEEP_STATE_S3) {
- fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME;
- } else if (pei_ptr->saved_data != NULL) {
- fsp_rt_common_buffer.BootMode =
- BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
- } else {
- fsp_rt_common_buffer.BootMode = BOOT_WITH_FULL_CONFIGURATION;
- }
- fsp_rt_common_buffer.UpdDataRgnPtr = &memory_init_params;
- fsp_rt_common_buffer.BootLoaderTolumSize = cbmem_overhead_size();
-
- /* Get any board specific changes */
- fsp_memory_init_params.NvsBufferPtr = (void *)pei_ptr->saved_data;
- fsp_memory_init_params.RtBufferPtr = &fsp_rt_common_buffer;
- fsp_memory_init_params.HobListPtr = &hob_list_ptr;
-
- /* Update the UPD data */
- soc_memory_init_params(params, &memory_init_params);
- mainboard_memory_init_params(params, &memory_init_params);
-
- if (IS_ENABLED(CONFIG_MMA))
- setup_mma(&memory_init_params);
-
- post_code(0x36);
-
- /* Display the UPD data */
- if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
- soc_display_memory_init_params(original_params,
- &memory_init_params);
-
- /* Call FspMemoryInit to initialize RAM */
- fsp_memory_init = (FSP_MEMORY_INIT)(fsp_header->ImageBase
- + fsp_header->FspMemoryInitEntryOffset);
- printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_memory_init);
- printk(BIOS_SPEW, " 0x%p: NvsBufferPtr\n",
- fsp_memory_init_params.NvsBufferPtr);
- printk(BIOS_SPEW, " 0x%p: RtBufferPtr\n",
- fsp_memory_init_params.RtBufferPtr);
- printk(BIOS_SPEW, " 0x%p: HobListPtr\n",
- fsp_memory_init_params.HobListPtr);
-
- timestamp_add_now(TS_FSP_MEMORY_INIT_START);
- post_code(POST_FSP_MEMORY_INIT);
- status = fsp_memory_init(&fsp_memory_init_params);
- post_code(0x37);
- timestamp_add_now(TS_FSP_MEMORY_INIT_END);
-
- printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
- if (status != EFI_SUCCESS)
- die("ERROR - FspMemoryInit failed to initialize memory!\n");
-
- /* Locate the FSP reserved memory area */
- fsp_reserved_bytes = 0;
- fsp_memory = get_next_resource_hob(&fsp_reserved_guid, hob_list_ptr);
- if (fsp_memory == NULL) {
- fsp_verification_failure = 1;
- printk(BIOS_DEBUG,
- "7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB missing!\n");
- } else {
- fsp_reserved_bytes = fsp_memory->ResourceLength;
- printk(BIOS_DEBUG, "Reserving 0x%016lx bytes for FSP\n",
- (unsigned long int)fsp_reserved_bytes);
- }
-
- /* Display SMM area */
-#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
- char *smm_base;
- size_t smm_size;
-
- smm_region((void **)&smm_base, &smm_size);
- printk(BIOS_DEBUG, "0x%08x: smm_size\n", (unsigned int)smm_size);
- printk(BIOS_DEBUG, "0x%p: smm_base\n", smm_base);
-#endif
-
- /* Migrate CAR data */
- printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top());
- if (pei_ptr->boot_mode != SLEEP_STATE_S3) {
- cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
- fsp_reserved_bytes);
- } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
- fsp_reserved_bytes)) {
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
- printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n");
- /* Failed S3 resume, reset to come up cleanly */
- hard_reset();
-#endif
- }
-
- /* Save the FSP runtime parameters. */
- fsp_set_runtime(fsp_header, hob_list_ptr);
-
- /* Lookup the FSP_BOOTLOADER_TOLUM_HOB */
- cbmem_root = get_next_resource_hob(&bootldr_tolum_guid, hob_list_ptr);
- if (cbmem_root == NULL) {
- fsp_verification_failure = 1;
- printk(BIOS_ERR, "7.4: FSP_BOOTLOADER_TOLUM_HOB missing!\n");
- printk(BIOS_ERR, "BootLoaderTolumSize: 0x%08x bytes\n",
- fsp_rt_common_buffer.BootLoaderTolumSize);
- }
-
- /* Locate the FSP_SMBIOS_MEMORY_INFO HOB */
- memory_info_hob = get_next_guid_hob(&memory_info_hob_guid,
- hob_list_ptr);
- if (NULL == memory_info_hob) {
- printk(BIOS_ERR, "FSP_SMBIOS_MEMORY_INFO HOB missing!\n");
- fsp_verification_failure = 1;
- } else {
- printk(BIOS_DEBUG,
- "FSP_SMBIOS_MEMORY_INFO HOB: 0x%p\n",
- memory_info_hob);
- }
-
-#if IS_ENABLED(CONFIG_DISPLAY_HOBS)
- if (hob_list_ptr == NULL)
- die("ERROR - HOB pointer is NULL!\n");
-
- /*
- * Verify that FSP is generating the required HOBs:
- * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0
- * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified above
- * 7.3: FSP_NON_VOLATILE_STORAGE_HOB verified below
- * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified above
- * 7.5: EFI_PEI_GRAPHICS_INFO_HOB produced by SiliconInit
- * FSP_SMBIOS_MEMORY_INFO HOB verified above
- */
- if (NULL != cbmem_root) {
- printk(BIOS_DEBUG,
- "7.4: FSP_BOOTLOADER_TOLUM_HOB: 0x%p\n",
- cbmem_root);
- data = cbmem_root->PhysicalStart;
- printk(BIOS_DEBUG, " 0x%016lx: PhysicalStart\n", data);
- data = cbmem_root->ResourceLength;
- printk(BIOS_DEBUG, " 0x%016lx: ResourceLength\n", data);
- }
- hob_ptr.Raw = get_next_guid_hob(&mrc_guid, hob_list_ptr);
- if (NULL == hob_ptr.Raw) {
- printk(BIOS_ERR, "7.3: FSP_NON_VOLATILE_STORAGE_HOB missing!\n");
- fsp_verification_failure =
- (params->pei_data->saved_data == NULL) ? 1 : 0;
- } else {
- printk(BIOS_DEBUG,
- "7.3: FSP_NON_VOLATILE_STORAGE_HOB: 0x%p\n",
- hob_ptr.Raw);
- }
- if (fsp_memory != NULL) {
- printk(BIOS_DEBUG,
- "7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB: 0x%p\n",
- fsp_memory);
- data = fsp_memory->PhysicalStart;
- printk(BIOS_DEBUG, " 0x%016lx: PhysicalStart\n", data);
- data = fsp_memory->ResourceLength;
- printk(BIOS_DEBUG, " 0x%016lx: ResourceLength\n", data);
- }
-
- /* Verify all the HOBs are present */
- if (fsp_verification_failure)
- printk(BIOS_DEBUG,
- "ERROR - Missing one or more required FSP HOBs!\n");
-
- /* Display the HOBs */
- print_hob_type_structure(0, hob_list_ptr);
-#endif
-
- /* Get the address of the CBMEM region for the FSP reserved memory */
- fsp_reserved_memory_area = cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY);
- printk(BIOS_DEBUG, "0x%p: fsp_reserved_memory_area\n",
- fsp_reserved_memory_area);
-
- /* Verify the order of CBMEM root and FSP memory */
- if ((fsp_memory != NULL) && (cbmem_root != NULL) &&
- (cbmem_root->PhysicalStart <= fsp_memory->PhysicalStart)) {
- fsp_verification_failure = 1;
- printk(BIOS_DEBUG,
- "ERROR - FSP reserved memory above CBMEM root!\n");
- }
-
- /* Verify that the FSP memory was properly reserved */
- if ((fsp_memory != NULL) && ((fsp_reserved_memory_area == NULL) ||
- (fsp_memory->PhysicalStart !=
- (unsigned int)fsp_reserved_memory_area))) {
- fsp_verification_failure = 1;
- printk(BIOS_DEBUG, "ERROR - Reserving FSP memory area!\n");
-#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
- if (cbmem_root != NULL) {
- size_t delta_bytes = (unsigned int)smm_base
- - cbmem_root->PhysicalStart
- - cbmem_root->ResourceLength;
- printk(BIOS_DEBUG,
- "0x%08x: Chipset reserved bytes reported by FSP\n",
- (unsigned int)delta_bytes);
- die("Please verify the chipset reserved size\n");
- }
-#endif
- }
-
- /* Verify the FSP 1.1 HOB interface */
- if (fsp_verification_failure)
- die("ERROR - Coreboot's requirements not met by FSP binary!\n");
-
- /* Display the memory configuration */
- report_memory_config();
-
- /* Locate the memory configuration data to speed up the next reboot */
- mrc_hob = get_next_guid_hob(&mrc_guid, hob_list_ptr);
- if (mrc_hob == NULL)
- printk(BIOS_DEBUG,
- "Memory Configuration Data Hob not present\n");
- else if (!recovery_mode_enabled()) {
- /* Do not save MRC data in recovery path */
- pei_ptr->data_to_save = GET_GUID_HOB_DATA(mrc_hob);
- pei_ptr->data_to_save_size = ALIGN(
- ((u32)GET_HOB_LENGTH(mrc_hob)), 16);
- }
-}
-
-/* Initialize the UPD parameters for MemoryInit */
-__attribute__((weak)) void mainboard_memory_init_params(
- struct romstage_params *params,
- MEMORY_INIT_UPD *upd_ptr)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
-
-/* Display the UPD parameters for MemoryInit */
-__attribute__((weak)) void soc_display_memory_init_params(
- const MEMORY_INIT_UPD *old, MEMORY_INIT_UPD *new)
-{
- printk(BIOS_SPEW, "UPD values for MemoryInit:\n");
- hexdump32(BIOS_SPEW, new, sizeof(*new));
-}
-
-/* Initialize the UPD parameters for MemoryInit */
-__attribute__((weak)) void soc_memory_init_params(
- struct romstage_params *params,
- MEMORY_INIT_UPD *upd)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
deleted file mode 100644
index 834f148..0000000
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- * Copyright (C) 2015 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <bootmode.h>
-#include <arch/acpi.h>
-#include <cbmem.h>
-#include <cbfs.h>
-#include <console/console.h>
-#include <fsp/memmap.h>
-#include <fsp/ramstage.h>
-#include <fsp/util.h>
-#include <lib.h>
-#include <stage_cache.h>
-#include <string.h>
-#include <timestamp.h>
-
-/* SOC initialization after FSP silicon init */
-__attribute__((weak)) void soc_after_silicon_init(void)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
-
-/* Display SMM memory map */
-static void smm_memory_map(void)
-{
- void *base;
- size_t size;
- int i;
-
- printk(BIOS_SPEW, "SMM Memory Map\n");
-
- smm_region(&base, &size);
- printk(BIOS_SPEW, "SMRAM : %p 0x%zx\n", base, size);
-
- for (i = 0; i < SMM_SUBREGION_NUM; i++) {
- if (smm_subregion(i, &base, &size))
- continue;
- printk(BIOS_SPEW, " Subregion %d: %p 0x%zx\n", i, base, size);
- }
-}
-
-static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
-{
- const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
- int missing_hob = 0;
- void *hob_list_ptr = get_hob_list();
-
- if (!IS_ENABLED(CONFIG_DISPLAY_HOBS))
- return;
-
- /* Verify the HOBs */
- if (hob_list_ptr == NULL) {
- printk(BIOS_INFO, "ERROR - HOB pointer is NULL!\n");
- return;
- }
-
- print_hob_type_structure(0, hob_list_ptr);
-
- /*
- * Verify that FSP is generating the required HOBs:
- * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0
- * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified by raminit
- * 7.3: FSP_NON_VOLATILE_STORAGE_HOB verified by raminit
- * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified by raminit
- * 7.5: EFI_PEI_GRAPHICS_INFO_HOB verified below,
- * if the ImageAttribute bit is set
- * FSP_SMBIOS_MEMORY_INFO HOB verified by raminit
- */
- if ((fsp_info_header->ImageAttribute & GRAPHICS_SUPPORT_BIT) &&
- !get_next_guid_hob(&graphics_info_guid, hob_list_ptr)) {
- printk(BIOS_INFO, "7.5: EFI_PEI_GRAPHICS_INFO_HOB missing!\n");
- missing_hob = 1;
- }
-
- if (missing_hob)
- printk(BIOS_INFO,
- "ERROR - Missing one or more required FSP HOBs!\n");
-}
-
-void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
-{
- FSP_SILICON_INIT fsp_silicon_init;
- SILICON_INIT_UPD *original_params;
- SILICON_INIT_UPD silicon_init_params;
- EFI_STATUS status;
- UPD_DATA_REGION *upd_ptr;
- VPD_DATA_REGION *vpd_ptr;
-
- /* Display the FSP header */
- if (fsp_info_header == NULL) {
- printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n");
- return;
- }
- print_fsp_info(fsp_info_header);
-
- /* Initialize the UPD values */
- vpd_ptr = (VPD_DATA_REGION *)(fsp_info_header->CfgRegionOffset +
- fsp_info_header->ImageBase);
- printk(BIOS_DEBUG, "0x%p: VPD Data\n", vpd_ptr);
- upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
- fsp_info_header->ImageBase);
- printk(BIOS_DEBUG, "0x%p: UPD Data\n", upd_ptr);
- original_params = (void *)((u8 *)upd_ptr +
- upd_ptr->SiliconInitUpdOffset);
- memcpy(&silicon_init_params, original_params,
- sizeof(silicon_init_params));
- soc_silicon_init_params(&silicon_init_params);
-
- /* Locate VBT and pass to FSP GOP */
- if (IS_ENABLED(CONFIG_GOP_SUPPORT))
- load_vbt(is_s3_wakeup, &silicon_init_params);
- mainboard_silicon_init_params(&silicon_init_params);
-
- /* Display the UPD data */
- if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
- soc_display_silicon_init_params(original_params,
- &silicon_init_params);
-
- /* Perform silicon initialization after RAM is configured */
- printk(BIOS_DEBUG, "Calling FspSiliconInit\n");
- fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase
- + fsp_info_header->FspSiliconInitEntryOffset);
- timestamp_add_now(TS_FSP_SILICON_INIT_START);
- printk(BIOS_DEBUG, "Calling FspSiliconInit(0x%p) at 0x%p\n",
- &silicon_init_params, fsp_silicon_init);
- post_code(POST_FSP_SILICON_INIT);
- status = fsp_silicon_init(&silicon_init_params);
- timestamp_add_now(TS_FSP_SILICON_INIT_END);
- printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
-
- /* Mark graphics init done after SiliconInit if VBT was provided */
-#if IS_ENABLED(CONFIG_GOP_SUPPORT)
- /* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs
- * to be #if'd out instead of using if(). */
- if (silicon_init_params.GraphicsConfigPtr)
- gfx_set_init_done(1);
-#endif
-
- display_hob_info(fsp_info_header);
- soc_after_silicon_init();
-}
-
-static void fsp_cache_save(struct prog *fsp)
-{
- if (IS_ENABLED(CONFIG_DISPLAY_SMM_MEMORY_MAP))
- smm_memory_map();
-
- if (prog_entry(fsp) == NULL) {
- printk(BIOS_ERR, "ERROR: No FSP to save in cache.\n");
- return;
- }
-
- stage_cache_add(STAGE_REFCODE, fsp);
-}
-
-static int fsp_find_and_relocate(struct prog *fsp)
-{
- if (prog_locate(fsp)) {
- printk(BIOS_ERR, "ERROR: Couldn't find %s\n", prog_name(fsp));
- return -1;
- }
-
- if (fsp_relocate(fsp, prog_rdev(fsp))) {
- printk(BIOS_ERR, "ERROR: FSP relocation failed.\n");
- return -1;
- }
-
- return 0;
-}
-
-void intel_silicon_init(void)
-{
- struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin");
- int is_s3_wakeup = acpi_is_wakeup_s3();
-
- if (is_s3_wakeup) {
- printk(BIOS_DEBUG, "FSP: Loading binary from cache\n");
- stage_cache_load_stage(STAGE_REFCODE, &fsp);
- } else {
- fsp_find_and_relocate(&fsp);
- printk(BIOS_DEBUG, "FSP: Saving binary in cache\n");
- fsp_cache_save(&fsp);
- }
-
- /* FSP_INFO_HEADER is set as the program entry. */
- fsp_update_fih(prog_entry(&fsp));
-
- fsp_run_silicon_init(fsp_get_fih(), is_s3_wakeup);
-}
-
-/* Initialize the UPD parameters for SiliconInit */
-__attribute__((weak)) void mainboard_silicon_init_params(
- SILICON_INIT_UPD *params)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-};
-
-/* Display the UPD parameters for SiliconInit */
-__attribute__((weak)) void soc_display_silicon_init_params(
- const SILICON_INIT_UPD *old, SILICON_INIT_UPD *new)
-{
- printk(BIOS_SPEW, "UPD values for SiliconInit:\n");
- hexdump32(BIOS_SPEW, new, sizeof(*new));
-}
-
-/* Initialize the UPD parameters for SiliconInit */
-__attribute__((weak)) void soc_silicon_init_params(SILICON_INIT_UPD *params)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
deleted file mode 100644
index 3d698bb..0000000
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ /dev/null
@@ -1,420 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015-2016 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stddef.h>
-#include <arch/io.h>
-#include <arch/cbfs.h>
-#include <arch/stages.h>
-#include <arch/early_variables.h>
-#include <boardid.h>
-#include <console/console.h>
-#include <cbmem.h>
-#include <cpu/intel/microcode.h>
-#include <cpu/x86/mtrr.h>
-#include <ec/google/chromeec/ec.h>
-#include <ec/google/chromeec/ec_commands.h>
-#include <elog.h>
-#include <fsp/romstage.h>
-#include <reset.h>
-#include <romstage_handoff.h>
-#include <smbios.h>
-#include <soc/intel/common/mrc_cache.h>
-#include <stage_cache.h>
-#include <timestamp.h>
-#include <tpm.h>
-#include <vendorcode/google/chromeos/chromeos.h>
-
-asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
-{
- void *top_of_stack;
- struct pei_data pei_data;
- struct romstage_params params = {
- .pei_data = &pei_data,
- .chipset_context = fih,
- };
-
- post_code(0x30);
-
- timestamp_add_now(TS_START_ROMSTAGE);
-
- /* Load microcode before ram init */
- if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
- intel_update_microcode_from_cbfs();
-
- memset(&pei_data, 0, sizeof(pei_data));
-
- /* Display parameters */
- printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
- CONFIG_MMCONF_BASE_ADDRESS);
- printk(BIOS_INFO, "Using FSP 1.1\n");
-
- /* Display FSP banner */
- print_fsp_info(fih);
-
- /* Stash FSP version. */
- params.fsp_version = fsp_version(fih);
-
- /* Get power state */
- params.power_state = fill_power_state();
-
- /*
- * Read and print board version. Done after SOC romstage
- * in case PCH needs to be configured to talk to the EC.
- */
- if (IS_ENABLED(CONFIG_BOARD_ID_AUTO))
- printk(BIOS_INFO, "MLB: board version %d\n", board_id());
-
- /* Call into mainboard. */
- mainboard_romstage_entry(¶ms);
- soc_after_ram_init(¶ms);
- post_code(0x38);
-
- top_of_stack = setup_stack_and_mtrrs();
-
- printk(BIOS_DEBUG, "Calling FspTempRamExit API\n");
- timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_START);
- return top_of_stack;
-}
-
-void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
-{
- return romstage_main(fih);
-}
-
-/* Entry from the mainboard. */
-void romstage_common(struct romstage_params *params)
-{
- const struct mrc_saved_data *cache;
- struct romstage_handoff *handoff;
- struct pei_data *pei_data;
-
- post_code(0x32);
-
- timestamp_add_now(TS_BEFORE_INITRAM);
-
- pei_data = params->pei_data;
- pei_data->boot_mode = params->power_state->prev_sleep_state;
-
-#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT)
- if (params->power_state->prev_sleep_state != SLEEP_STATE_S3)
- boot_count_increment();
-#endif
-
- /* Perform remaining SOC initialization */
- soc_pre_ram_init(params);
- post_code(0x33);
-
- /* Check recovery and MRC cache */
- params->pei_data->saved_data_size = 0;
- params->pei_data->saved_data = NULL;
- if (!params->pei_data->disable_saved_data) {
- if (recovery_mode_enabled()) {
- /* Recovery mode does not use MRC cache */
- printk(BIOS_DEBUG,
- "Recovery mode: not using MRC cache.\n");
- } else if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)
- && (!mrc_cache_get_current_with_version(&cache,
- params->fsp_version))) {
- /* MRC cache found */
- params->pei_data->saved_data_size = cache->size;
- params->pei_data->saved_data = &cache->data[0];
- } else if (params->pei_data->boot_mode == SLEEP_STATE_S3) {
- /* Waking from S3 and no cache. */
- printk(BIOS_DEBUG,
- "No MRC cache found in S3 resume path.\n");
- post_code(POST_RESUME_FAILURE);
- hard_reset();
- } else {
- printk(BIOS_DEBUG, "No MRC cache found.\n");
- mainboard_check_ec_image(params);
- }
- }
-
- /* Initialize RAM */
- raminit(params);
- timestamp_add_now(TS_AFTER_INITRAM);
-
- /* Save MRC output */
- if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) {
- printk(BIOS_DEBUG, "MRC data at %p %d bytes\n",
- pei_data->data_to_save, pei_data->data_to_save_size);
- if ((params->pei_data->boot_mode != SLEEP_STATE_S3)
- && (params->pei_data->data_to_save_size != 0)
- && (params->pei_data->data_to_save != NULL))
- mrc_cache_stash_data_with_version(
- params->pei_data->data_to_save,
- params->pei_data->data_to_save_size,
- params->fsp_version);
- }
-
- /* Save DIMM information */
- mainboard_save_dimm_info(params);
-
- /* Create romstage handof information */
- handoff = romstage_handoff_find_or_add();
- if (handoff != NULL)
- handoff->s3_resume = (params->power_state->prev_sleep_state ==
- SLEEP_STATE_S3);
- else {
- printk(BIOS_DEBUG, "Romstage handoff structure not added!\n");
- hard_reset();
- }
-
- /*
- * Initialize the TPM, unless the TPM was already initialized
- * in verstage and used to verify romstage.
- */
- if (IS_ENABLED(CONFIG_LPC_TPM) &&
- !IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) &&
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
- init_tpm(params->power_state->prev_sleep_state ==
- SLEEP_STATE_S3);
-}
-
-void after_cache_as_ram_stage(void)
-{
- /* Load the ramstage. */
- copy_and_run();
- die("ERROR - Failed to load ramstage!");
-}
-
-/* Initialize the power state */
-__attribute__((weak)) struct chipset_power_state *fill_power_state(void)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
- return NULL;
-}
-
-__attribute__((weak)) void mainboard_check_ec_image(
- struct romstage_params *params)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
- struct pei_data *pei_data;
-
- pei_data = params->pei_data;
- if (params->pei_data->boot_mode == SLEEP_STATE_S0) {
- /* Ensure EC is running RO firmware. */
- google_chromeec_check_ec_image(EC_IMAGE_RO);
- }
-#endif
-}
-
-/* Board initialization before and after RAM is enabled */
-__attribute__((weak)) void mainboard_romstage_entry(
- struct romstage_params *params)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-
- post_code(0x31);
-
- /* Initliaze memory */
- romstage_common(params);
-}
-
-/* Save the DIMM information for SMBIOS table 17 */
-__attribute__((weak)) void mainboard_save_dimm_info(
- struct romstage_params *params)
-{
- int channel;
- CHANNEL_INFO *channel_info;
- int dimm;
- DIMM_INFO *dimm_info;
- int dimm_max;
- void *hob_list_ptr;
- EFI_HOB_GUID_TYPE *hob_ptr;
- int index;
- struct memory_info *mem_info;
- FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
- const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
-
- /* Locate the memory info HOB, presence validated by raminit */
- hob_list_ptr = fsp_get_hob_list();
- hob_ptr = get_next_guid_hob(&memory_info_hob_guid, hob_list_ptr);
- memory_info_hob = (FSP_SMBIOS_MEMORY_INFO *)(hob_ptr + 1);
-
- /* Display the data in the FSP_SMBIOS_MEMORY_INFO HOB */
- if (IS_ENABLED(CONFIG_DISPLAY_HOBS)) {
- printk(BIOS_DEBUG, "FSP_SMBIOS_MEMORY_INFO HOB\n");
- printk(BIOS_DEBUG, " 0x%02x: Revision\n",
- memory_info_hob->Revision);
- printk(BIOS_DEBUG, " 0x%02x: MemoryType\n",
- memory_info_hob->MemoryType);
- printk(BIOS_DEBUG, " %d: MemoryFrequencyInMHz\n",
- memory_info_hob->MemoryFrequencyInMHz);
- printk(BIOS_DEBUG, " %d: DataWidth in bits\n",
- memory_info_hob->DataWidth);
- printk(BIOS_DEBUG, " 0x%02x: ErrorCorrectionType\n",
- memory_info_hob->ErrorCorrectionType);
- printk(BIOS_DEBUG, " 0x%02x: ChannelCount\n",
- memory_info_hob->ChannelCount);
- for (channel = 0; channel < memory_info_hob->ChannelCount;
- channel++) {
- channel_info = &memory_info_hob->ChannelInfo[channel];
- printk(BIOS_DEBUG, " Channel %d\n", channel);
- printk(BIOS_DEBUG, " 0x%02x: ChannelId\n",
- channel_info->ChannelId);
- printk(BIOS_DEBUG, " 0x%02x: DimmCount\n",
- channel_info->DimmCount);
- for (dimm = 0; dimm < channel_info->DimmCount;
- dimm++) {
- dimm_info = &channel_info->DimmInfo[dimm];
- printk(BIOS_DEBUG, " DIMM %d\n", dimm);
- printk(BIOS_DEBUG, " 0x%02x: DimmId\n",
- dimm_info->DimmId);
- printk(BIOS_DEBUG, " %d: SizeInMb\n",
- dimm_info->SizeInMb);
- }
- }
- }
-
- /*
- * Allocate CBMEM area for DIMM information used to populate SMBIOS
- * table 17
- */
- mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
- printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
- if (mem_info == NULL)
- return;
- memset(mem_info, 0, sizeof(*mem_info));
-
- /* Describe the first N DIMMs in the system */
- index = 0;
- dimm_max = ARRAY_SIZE(mem_info->dimm);
- for (channel = 0; channel < memory_info_hob->ChannelCount; channel++) {
- if (index >= dimm_max)
- break;
- channel_info = &memory_info_hob->ChannelInfo[channel];
- for (dimm = 0; dimm < channel_info->DimmCount; dimm++) {
- if (index >= dimm_max)
- break;
- dimm_info = &channel_info->DimmInfo[dimm];
-
- /* Populate the DIMM information */
- if (dimm_info->SizeInMb) {
- mem_info->dimm[index].dimm_size =
- dimm_info->SizeInMb;
- mem_info->dimm[index].ddr_type =
- memory_info_hob->MemoryType;
- mem_info->dimm[index].ddr_frequency =
- memory_info_hob->MemoryFrequencyInMHz;
- mem_info->dimm[index].channel_num =
- channel_info->ChannelId;
- mem_info->dimm[index].dimm_num =
- dimm_info->DimmId;
- switch (memory_info_hob->DataWidth) {
- default:
- case 8:
- mem_info->dimm[index].bus_width =
- MEMORY_BUS_WIDTH_8;
- break;
-
- case 16:
- mem_info->dimm[index].bus_width =
- MEMORY_BUS_WIDTH_16;
- break;
-
- case 32:
- mem_info->dimm[index].bus_width =
- MEMORY_BUS_WIDTH_32;
- break;
-
- case 64:
- mem_info->dimm[index].bus_width =
- MEMORY_BUS_WIDTH_64;
- break;
-
- case 128:
- mem_info->dimm[index].bus_width =
- MEMORY_BUS_WIDTH_128;
- break;
- }
-
- /* Add any mainboard specific information */
- mainboard_add_dimm_info(params, mem_info,
- channel, dimm, index);
- index++;
- }
- }
- }
- mem_info->dimm_cnt = index;
- printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
-}
-
-/* Add any mainboard specific information */
-__attribute__((weak)) void mainboard_add_dimm_info(
- struct romstage_params *params,
- struct memory_info *mem_info,
- int channel, int dimm, int index)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
-
-/* Get the memory configuration data */
-__attribute__((weak)) int mrc_cache_get_current(
- const struct mrc_saved_data **cache)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
- return -1;
-}
-
-/* Save the memory configuration data */
-__attribute__((weak)) int mrc_cache_stash_data(void *data, size_t size)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
- return -1;
-}
-
-/* Transition RAM from off or self-refresh to active */
-__attribute__((weak)) void raminit(struct romstage_params *params)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
- post_code(0x34);
- die("ERROR - No RAM initialization specified!\n");
-}
-
-void ramstage_cache_invalid(void)
-{
- if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE))
- /* Perform cold reset on invalid ramstage cache. */
- hard_reset();
-}
-
-/* Display the memory configuration */
-__attribute__((weak)) void report_memory_config(void)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
-
-/* Choose top of stack and setup MTRRs */
-__attribute__((weak)) void *setup_stack_and_mtrrs(void)
-{
- printk(BIOS_ERR, "WEAK: %s/%s called\n", __FILE__, __func__);
- die("ERROR - Must specify top of stack!\n");
- return NULL;
-}
-
-/* SOC initialization after RAM is enabled */
-__attribute__((weak)) void soc_after_ram_init(struct romstage_params *params)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
-
-/* SOC initialization before RAM is enabled */
-__attribute__((weak)) void soc_pre_ram_init(struct romstage_params *params)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
diff --git a/src/drivers/intel/fsp1_1/romstage_after_verstage.S b/src/drivers/intel/fsp1_1/romstage_after_verstage.S
deleted file mode 100644
index 739db29..0000000
--- a/src/drivers/intel/fsp1_1/romstage_after_verstage.S
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */
-
-.text
-.global _start
-_start:
- /* This is the romstage entry point when CONFIG_SEPARATE_VERSTAGE
- * is used. The stack, descriptors, and gdt are already initialized
- * by verstage. However, in order to maintain the semantics of
- * CAR_GLOBAL variables we need to clear those to zero. */
- cld
- xor %eax, %eax
- movl $(_car_global_end), %ecx
- movl $(_car_global_start), %edi
- sub %edi, %ecx
- rep stosl
- call romstage_after_verstage
- #include "after_raminit.S"
-
- movb $0x69, %ah
- jmp .Lhlt
-
-.Lhlt:
- xchg %al, %ah
-#if IS_ENABLED(CONFIG_POST_IO)
- outb %al, $CONFIG_POST_IO_PORT
-#else
- post_code(POST_DEAD_CODE)
-#endif
- movl $LHLT_DELAY, %ecx
-.Lhlt_Delay:
- outb %al, $0xED
- loop .Lhlt_Delay
- jmp .Lhlt
diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c
deleted file mode 100644
index e048229..0000000
--- a/src/drivers/intel/fsp1_1/stack.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cbmem.h>
-#include <console/console.h>
-#include <cpu/x86/mtrr.h>
-#include <fsp/memmap.h>
-#include <fsp/romstage.h>
-#include <fsp/stack.h>
-#include <stdlib.h>
-
-const unsigned long romstage_ram_stack_size = CONFIG_ROMSTAGE_RAM_STACK_SIZE;
-
-/*
- * Romstage needs quite a bit of stack for decompressing images since the lzma
- * lib keeps its state on the stack during romstage.
- */
-static unsigned long choose_top_of_stack(void)
-{
- unsigned long stack_top;
-
- /* cbmem_add() does a find() before add(). */
- stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
- romstage_ram_stack_size);
- stack_top += romstage_ram_stack_size;
- return stack_top;
-}
-
-/*
- * setup_stack_and_mtrrs() determines the stack to use after
- * cache-as-ram is torn down as well as the MTRR settings to use.
- */
-void *setup_stack_and_mtrrs(void)
-{
- size_t alignment;
- uint32_t aligned_ram;
- uint32_t mtrr_mask_upper;
- uint32_t max_mtrrs;
- uint32_t num_mtrrs;
- uint32_t *slot;
- unsigned long top_of_stack;
-
- /* Display the MTTRs */
- soc_display_mtrrs();
-
- /* Top of stack needs to be aligned to a 8-byte boundary. */
- top_of_stack = choose_top_of_stack();
- slot = (void *)top_of_stack;
- num_mtrrs = 0;
- max_mtrrs = soc_get_variable_mtrr_count(NULL);
-
- /*
- * The upper bits of the MTRR mask need to set according to the number
- * of physical address bits.
- */
- mtrr_mask_upper = (1 << ((cpuid_eax(0x80000008) & 0xff) - 32)) - 1;
- alignment = mmap_region_granularity();
- aligned_ram = ALIGN_DOWN(top_of_stack - romstage_ram_stack_size,
- alignment);
-
- /*
- * The order for each MTRR is value then base with upper 32-bits of
- * each value coming before the lower 32-bits. The reasoning for
- * this ordering is to create a stack layout like the following:
- *
- * +36: MTRR mask 1 63:32
- * +32: MTRR mask 1 31:0
- * +28: MTRR base 1 63:32
- * +24: MTRR base 1 31:0
- * +20: MTRR mask 0 63:32
- * +16: MTRR mask 0 31:0
- * +12: MTRR base 0 63:32
- * +8: MTRR base 0 31:0
- * +4: Number of MTRRs to setup (described above)
- * +0: Number of variable MTRRs to clear
- */
-
- /* Cache RAM as WB from 0 -> CONFIG_RAMTOP. */
- slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
- slot = stack_push32(slot, ~(CONFIG_RAMTOP - 1) | MTRR_PHYS_MASK_VALID);
- slot = stack_push32(slot, 0); /* upper base */
- slot = stack_push32(slot, 0 | MTRR_TYPE_WRBACK);
- num_mtrrs++;
-
- /*
- * +-------------------------+ Top of RAM (aligned)
- * | System Management Mode |
- * | code and data | Length: CONFIG_TSEG_SIZE
- * | (TSEG) |
- * +-------------------------+ SMM base (aligned)
- * | |
- * | Chipset Reserved Memory | Length: Multiple of CONFIG_TSEG_SIZE
- * | |
- * +-------------------------+ top_of_ram (aligned)
- * | |
- * | CBMEM Root |
- * | |
- * +-------------------------+
- * | |
- * | FSP Reserved Memory |
- * | |
- * +-------------------------+
- * | |
- * | Various CBMEM Entries |
- * | |
- * +-------------------------+ top_of_stack (8 byte aligned)
- * | |
- * | stack (CBMEM Entry) |
- * | |
- * +-------------------------+
- */
-
- /*
- * Cache the stack and the other CBMEM entries as well as part or all
- * of the FSP reserved memory region.
- */
- slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
- slot = stack_push32(slot, ~(alignment - 1) | MTRR_PHYS_MASK_VALID);
- slot = stack_push32(slot, 0); /* upper base */
- slot = stack_push32(slot, aligned_ram | MTRR_TYPE_WRBACK);
- num_mtrrs++;
-
-#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
- void *smm_base;
- size_t smm_size;
- uint32_t tseg_base;
-
- /*
- * Cache the TSEG region at the top of ram. This region is not
- * restricted to SMM mode until SMM has been relocated. By setting
- * the region to cacheable it provides faster access when relocating
- * the SMM handler as well as using the TSEG region for other purposes.
- */
- smm_region(&smm_base, &smm_size);
- tseg_base = (uint32_t)smm_base;
- slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
- slot = stack_push32(slot, ~(alignment - 1) | MTRR_PHYS_MASK_VALID);
- slot = stack_push32(slot, 0); /* upper base */
- slot = stack_push32(slot, tseg_base | MTRR_TYPE_WRBACK);
- num_mtrrs++;
-#endif
-
- /* Cache the ROM as WP just below 4GiB. */
- slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
- slot = stack_push32(slot, ~(CONFIG_ROM_SIZE - 1) | MTRR_PHYS_MASK_VALID);
- slot = stack_push32(slot, 0); /* upper base */
- slot = stack_push32(slot, ~(CONFIG_ROM_SIZE - 1) | MTRR_TYPE_WRPROT);
- num_mtrrs++;
-
- /* Validate the MTRR usage */
- if (num_mtrrs > max_mtrrs) {
- printk(BIOS_ERR, "MTRRs: max = %d, used = %d, available=%d",
- max_mtrrs, num_mtrrs, max_mtrrs - num_mtrrs);
- die("ERROR - MTRR use count incorrect!\n");
- }
-
- /*
- * Save the number of MTRRs to setup and clear. Return the stack
- * location pointing to the number of MTRRs.
- */
- slot = stack_push32(slot, num_mtrrs);
- slot = stack_push32(slot, max_mtrrs);
- return slot;
-}
-
diff --git a/src/drivers/intel/fsp1_1/stage_cache.c b/src/drivers/intel/fsp1_1/stage_cache.c
deleted file mode 100644
index 2d594e6..0000000
--- a/src/drivers/intel/fsp1_1/stage_cache.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <fsp/memmap.h>
-#include <stage_cache.h>
-
-void stage_cache_external_region(void **base, size_t *size)
-{
- if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
- printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
- *base = NULL;
- *size = 0;
- }
-}
diff --git a/src/drivers/intel/fsp1_1/vbt.c b/src/drivers/intel/fsp1_1/vbt.c
deleted file mode 100644
index 414b88d..0000000
--- a/src/drivers/intel/fsp1_1/vbt.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Google Inc.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <bootmode.h>
-#include <console/console.h>
-#include <fsp/ramstage.h>
-#include <fsp/util.h>
-
-/* Locate VBT and pass it to FSP GOP */
-void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params)
-{
- const optionrom_vbt_t *vbt_data = NULL;
- uint32_t vbt_len;
-
- /* Check boot mode - for S3 resume path VBT loading is not needed */
- if (s3_resume) {
- printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n");
- } else if (display_init_required()) {
- /* Get VBT data */
- vbt_data = fsp_get_vbt(&vbt_len);
- if (vbt_data != NULL)
- printk(BIOS_DEBUG, "Passing VBT to GOP\n");
- else
- printk(BIOS_DEBUG, "VBT not found!\n");
- } else {
- printk(BIOS_DEBUG, "Not passing VBT to GOP\n");
- }
- params->GraphicsConfigPtr = (u32)vbt_data;
-}
diff --git a/src/drivers/intel/fsp1_1/verstage.c b/src/drivers/intel/fsp1_1/verstage.c
deleted file mode 100644
index d7cdfdf..0000000
--- a/src/drivers/intel/fsp1_1/verstage.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <fsp/car.h>
-#include <program_loading.h>
-
-void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
-{
- run_romstage();
- /* Will actually never return. */
- return NULL;
-}
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
deleted file mode 100644
index 19e04f7..0000000
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ /dev/null
@@ -1,6 +0,0 @@
-config PLATFORM_USES_FSP2_0
- bool
- help
- Include FSP 2.0 wrappers and functionality
-
-
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
deleted file mode 100644
index 3e94f2f..0000000
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
-
-romstage-y += hand_off_block.c
-romstage-y += util.c
-romstage-y += memory_init.c
-
-ramstage-y += graphics.c
-ramstage-y += hand_off_block.c
-ramstage-y += notify.c
-ramstage-y += silicon_init.c
-ramstage-y += util.c
-
-CPPFLAGS_common += -I$(src)/drivers/intel/fsp2_0/include
-
-endif
diff --git a/src/drivers/intel/fsp2_0/graphics.c b/src/drivers/intel/fsp2_0/graphics.c
deleted file mode 100644
index 1480179..0000000
--- a/src/drivers/intel/fsp2_0/graphics.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <cbfs.h>
-#include <console/console.h>
-#include <fsp/util.h>
-
-enum pixel_format {
- pixel_rgbx_8bpc = 0,
- pixel_bgrx_8bpc = 1,
- pixel_bitmask = 2, /* defined by <rgb>_mask values */
-};
-
-static const uint8_t uuid_graphics_info[16] = {
- 0xce, 0x2c, 0xf6, 0x39, 0x25, 0x68, 0x69, 0x46,
- 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07
-};
-
-struct hob_graphics_info {
- uint64_t framebuffer_base;
- uint32_t framebuffer_size;
- uint32_t version;
- uint32_t horizontal_resolution;
- uint32_t vertical_resolution;
- uint32_t pixel_format; /* See enum pixel_format */
- uint32_t red_mask;
- uint32_t green_mask;
- uint32_t blue_mask;
- uint32_t reserved_mask;
- uint32_t pixels_per_scanline;
-} __attribute__((packed));
-
-struct pixel {
- uint8_t pos;
- uint8_t size;
-};
-
-static const struct fsp_framebuffer {
- struct pixel red;
- struct pixel green;
- struct pixel blue;
- struct pixel rsvd;
-} fsp_framebuffer_format_map[] = {
- [pixel_rgbx_8bpc] = { {0, 8}, {8, 8}, {16, 8}, {24, 8} },
- [pixel_bgrx_8bpc] = { {16, 8}, {8, 8}, {0, 8}, {24, 8} },
-};
-
-enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
-{
- size_t size;
- const struct hob_graphics_info *ginfo;
- const struct fsp_framebuffer *fbinfo;
-
- ginfo = fsp_find_extension_hob_by_uuid(uuid_graphics_info, &size);
-
- if (!ginfo) {
- printk(BIOS_ALERT, "Graphics hand-off block not found\n");
- return CB_ERR;
- }
-
- if (ginfo->pixel_format > ARRAY_SIZE(fsp_framebuffer_format_map)) {
- printk(BIOS_ALERT, "FSP set unknown framebuffer format: %d\n",
- ginfo->pixel_format);
- return CB_ERR;
- }
-
- fbinfo = fsp_framebuffer_format_map + ginfo->pixel_format;
-
- framebuffer->physical_address = ginfo->framebuffer_base;
- framebuffer->x_resolution = ginfo->horizontal_resolution;
- framebuffer->y_resolution = ginfo->vertical_resolution;
- framebuffer->bytes_per_line = ginfo->pixels_per_scanline * 4;
- framebuffer->bits_per_pixel = 32;
- framebuffer->red_mask_pos = fbinfo->red.pos;
- framebuffer->red_mask_size = fbinfo->red.size;
- framebuffer->green_mask_pos = fbinfo->green.pos;
- framebuffer->green_mask_size = fbinfo->green.size;
- framebuffer->blue_mask_pos = fbinfo->blue.pos;
- framebuffer->blue_mask_size = fbinfo->blue.size;
- framebuffer->reserved_mask_pos = fbinfo->rsvd.pos;
- framebuffer->reserved_mask_size = fbinfo->rsvd.pos;
- framebuffer->tag = LB_TAG_FRAMEBUFFER;
- framebuffer->size = sizeof(*framebuffer);
- return CB_SUCCESS;
-}
-
-uintptr_t fsp_load_vbt(void)
-{
- void *vbt;
-
- vbt = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_RAW, NULL);
- if (!vbt)
- printk(BIOS_NOTICE, "Could not locate a VBT file in CBFS\n");
-
- return (uintptr_t)vbt;
-}
diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c
deleted file mode 100644
index 00c5d26..0000000
--- a/src/drivers/intel/fsp2_0/hand_off_block.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <arch/io.h>
-#include <cbmem.h>
-#include <commonlib/helpers.h>
-#include <console/console.h>
-#include <fsp/util.h>
-#include <inttypes.h>
-#include <lib.h>
-#include <string.h>
-
-#define HOB_HEADER_LEN 8
-
-struct hob_header {
- uint16_t type;
- uint16_t length;
-} __attribute__((packed));
-
-struct hob_resource {
- uint8_t owner_guid[16];
- uint32_t type;
- uint32_t attribute_type;
- uint64_t addr;
- uint64_t length;
-} __attribute__((packed));
-
-enum resource_type {
- EFI_RESOURCE_SYSTEM_MEMORY = 0,
- EFI_RESOURCE_MEMORY_MAPPED_IO = 1,
- EFI_RESOURCE_IO = 2,
- EFI_RESOURCE_FIRMWARE_DEVICE = 3,
- EFI_RESOURCE_MEMORY_MAPPED_IO_PORT = 4,
- EFI_RESOURCE_MEMORY_RESERVED = 5,
- EFI_RESOURCE_IO_RESERVED = 6,
- EFI_RESOURCE_MAX_MEMORY_TYPE = 7,
-};
-
-static const char *resource_names[] = {
- [EFI_RESOURCE_SYSTEM_MEMORY] = "SYSTEM_MEMORY",
- [EFI_RESOURCE_MEMORY_MAPPED_IO] = "MMIO",
- [EFI_RESOURCE_IO] = "IO",
- [EFI_RESOURCE_FIRMWARE_DEVICE] = "FIRMWARE_DEVICE",
- [EFI_RESOURCE_MEMORY_MAPPED_IO_PORT] = "MMIO_PORT",
- [EFI_RESOURCE_MEMORY_RESERVED] = "MEMORY_RESERVED",
- [EFI_RESOURCE_IO_RESERVED] = "IO_RESERVED",
-};
-
-enum hob_type {
- HOB_TYPE_HANDOFF = 0x0001,
- HOB_TYPE_MEMORY_ALLOCATION = 0x0002,
- HOB_TYPE_RESOURCE_DESCRIPTOR = 0x0003,
- HOB_TYPE_GUID_EXTENSION = 0x0004,
- HOB_TYPE_FV = 0x0005,
- HOB_TYPE_CPU = 0x0006,
- HOB_TYPE_MEMORY_POOL = 0x0007,
- HOB_TYPE_FV2 = 0x0009,
- HOB_TYPE_LOAD_PEIM_UNUSED = 0x000A,
- HOB_TYPE_UCAPSULE = 0x000B,
- HOB_TYPE_UNUSED = 0xFFFE,
- HOB_TYPE_END_OF_HOB_LIST = 0xFFFF,
-};
-
-/* UUIDs (GUIDs) in little-endian, so they can be used with memcmp() */
-static const uint8_t uuid_owner_bootloader_tolum[16] = {
- 0x56, 0x4f, 0xff, 0x73, 0x8e, 0xaa, 0x51, 0x44,
- 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44,
-};
-
-static const uint8_t uuid_owner_fsp[16] = {
- 0x59, 0x97, 0xa7, 0x69, 0x73, 0x13, 0x67, 0x43,
- 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e,
-};
-
-static const uint8_t uuid_owner_tseg[16] = {
- 0x7c, 0x74, 0x38, 0xd0, 0x0c, 0xd0, 0x80, 0x49,
- 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55
-};
-
-static const uint8_t uuid_fsp_nv_storage[16] = {
- 0x02, 0xcf, 0x1a, 0x72, 0x77, 0x4d, 0x2a, 0x4c,
- 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0
-};
-
-static const uint8_t empty_uuid[16] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-static const struct uuid_name_map {
- const void *uuid;
- const char *name;
-} uuid_names[] = {
- { uuid_owner_bootloader_tolum, "BOOTLOADER_TOLUM" },
- { uuid_owner_fsp, "FSP_RESERVED_MEMORY" },
- { uuid_owner_tseg, "TSEG" },
- { uuid_fsp_nv_storage, "FSP_NV_STORAGE" },
-};
-
-static const char *resource_name(enum resource_type type)
-{
- if (type >= ARRAY_SIZE(resource_names))
- return "UNKNOWN";
- return resource_names[type];
-}
-
-/*
- * Utilities for walking HOBs
- */
-
-static bool uuid_compare(const uint8_t uuid1[16], const uint8_t uuid2[16])
-{
- return !memcmp(uuid1, uuid2, 16);
-}
-
-static const char *uuid_name(const uint8_t uuid[16])
-{
- size_t i;
- const struct uuid_name_map *owner_entry;
-
- for (i = 0; i < ARRAY_SIZE(uuid_names); i++) {
- owner_entry = uuid_names + i;
- if (uuid_compare(uuid, owner_entry->uuid))
- return owner_entry->name;
- }
- return "UNKNOWN";
-}
-
-static const struct hob_header *next_hob(const struct hob_header *parent)
-{
- union {
- const struct hob_header *hob;
- uintptr_t addr;
- } hob_walker;
-
- hob_walker.hob = parent;
- hob_walker.addr += parent->length;
- return hob_walker.hob;
-}
-
-static const void *hob_header_to_struct(const struct hob_header *hob)
-{
- union {
- const struct hob_header *hob_hdr;
- const void *hob_descr;
- uintptr_t addr;
- } hob_walker;
-
- hob_walker.hob_hdr = hob;
- hob_walker.addr += HOB_HEADER_LEN;
- return hob_walker.hob_descr;
-}
-
-static const void *hob_header_to_extension_hob(const struct hob_header *hob)
-{
- union {
- const struct hob_header *hob_hdr;
- const void *hob_descr;
- uintptr_t addr;
- } hob_walker;
-
- hob_walker.hob_hdr = hob;
- hob_walker.addr += HOB_HEADER_LEN + 16; /* header and 16-byte UUID */
- return hob_walker.hob_descr;
-}
-
-static const
-struct hob_resource *hob_header_to_resource(const struct hob_header *hob)
-{
- return hob_header_to_struct(hob);
-}
-
-/*
- * Utilities for locating and identifying HOBs
- */
-
-void fsp_save_hob_list(void *hob_list_ptr)
-{
- void **cbmem_loc;
- cbmem_loc = cbmem_add(CBMEM_ID_FSP_RUNTIME, sizeof(*hob_list_ptr));
- *cbmem_loc = hob_list_ptr;
-}
-
-const void *fsp_get_hob_list(void)
-{
- void **list_loc = cbmem_find(CBMEM_ID_FSP_RUNTIME);
-
- return (list_loc) ? (*list_loc) : NULL;
-}
-
-static const
-struct hob_resource *find_resource_hob_by_uuid(const struct hob_header *hob,
- const uint8_t uuid[16])
-{
- const struct hob_resource *res;
-
- for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) {
-
- if (hob->type != HOB_TYPE_RESOURCE_DESCRIPTOR)
- continue;
-
- res = hob_header_to_resource(hob);
- if (uuid_compare(res->owner_guid, uuid))
- return res;
- }
- return NULL;
-}
-
-void fsp_find_reserved_memory(struct range_entry *re, const void *hob_list)
-{
- const struct hob_resource *fsp_mem;
-
- range_entry_init(re, 0, 0, 0);
-
- fsp_mem = find_resource_hob_by_uuid(hob_list, uuid_owner_fsp);
-
- if (!fsp_mem) {
- return;
- }
-
- range_entry_init(re, fsp_mem->addr, fsp_mem->addr + fsp_mem->length, 0);
-}
-
-/*
- * Utilities for printing HOB information
- */
-
-static void print_guid(const void *base)
-{
- uint32_t big;
- uint16_t mid[2];
-
- const uint8_t *id = base;
- big = read32(id + 0);
- mid[0] = read16(id + 4);
- mid[1] = read16(id + 6);
-
- printk(BIOS_DEBUG, "%08x-%04x-%04x-%02x%02x%02x%02x%02x%02x%02x%02x",
- big, mid[0], mid[1],
- id[8], id[9], id[10], id[11], id[12], id[13], id[14], id[15]);
-}
-
-static void print_resource_descriptor(const void *base)
-{
- const struct hob_resource *res;
-
- res = hob_header_to_resource(base);
-
- printk(BIOS_DEBUG, "Resource %s, attribute %x\n",
- resource_name(res->type), res->attribute_type);
- printk(BIOS_DEBUG, "\t0x%08llx + 0x%08llx\n", res->addr, res->length);
- if (!uuid_compare(res->owner_guid, empty_uuid)) {
- printk(BIOS_DEBUG, "\tOwner GUID: ");
- print_guid(res->owner_guid);
- printk(BIOS_DEBUG, " (%s)\n", uuid_name(res->owner_guid));
- }
-}
-
-
-void fsp_print_memory_resource_hobs(const void *hob_list)
-{
- const struct hob_header *hob = hob_list;
-
- for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) {
- if (hob->type == HOB_TYPE_RESOURCE_DESCRIPTOR)
- print_resource_descriptor(hob);
- }
-}
-
-const void *fsp_find_extension_hob_by_uuid(const uint8_t *uuid, size_t *size)
-{
- const uint8_t *hob_uuid;
- const struct hob_header *hob = fsp_get_hob_list();
-
- if (!hob)
- return NULL;
-
- for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) {
-
- if (hob->type != HOB_TYPE_GUID_EXTENSION)
- continue;
-
- hob_uuid = hob_header_to_struct(hob);
- if (uuid_compare(hob_uuid, uuid)) {
- *size = hob->length - (HOB_HEADER_LEN + 16);
- return hob_header_to_extension_hob(hob);
- }
- }
-
- return NULL;
-}
-
-
-const void *fsp_find_nv_storage_data(size_t *size)
-{
- return fsp_find_extension_hob_by_uuid(uuid_fsp_nv_storage, size);
-}
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
deleted file mode 100644
index d49fc42..0000000
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef _FSP2_0_API_H_
-#define _FSP2_0_API_H_
-
-#include <stddef.h>
-#include <memrange.h>
-#include <fsp/info_header.h>
-#include <soc/fsp/FspmUpd.h>
-#include <soc/fsp/FspsUpd.h>
-
-enum fsp_status {
- FSP_SUCCESS = 0x00000000,
- FSP_INVALID_PARAMETER = 0x80000002,
- FSP_UNSUPPORTED = 0x80000003,
- FSP_NOT_READY = 0x80000006,
- FSP_DEVICE_ERROR = 0x80000007,
- FSP_OUT_OF_RESOURCES = 0x80000009,
- FSP_VOLUME_CORRUPTED = 0x8000000a,
- FSP_NOT_FOUND = 0x8000000a,
- FSP_TIMEOUT = 0x80000012,
- FSP_ABORTED = 0x80000015,
- FSP_INCOMPATIBLE_VERSION = 0x80000010,
- FSP_SECURITY_VIOLATION = 0x8000001a,
- FSP_CRC_ERROR = 0x8000001b,
-};
-
-enum fsp_boot_mode {
- FSP_BOOT_WITH_FULL_CONFIGURATION = 0x00,
- FSP_BOOT_WITH_MINIMAL_CONFIGURATION = 0x01,
- FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES = 0x02,
- FSP_BOOT_ON_S4_RESUME = 0x05,
- FSP_BOOT_ON_S3_RESUME = 0x11,
- FSP_BOOT_ON_FLASH_UPDATE = 0x12,
- FSP_BOOT_IN_RECOVERY_MODE = 0x20
-};
-
-enum fsp_notify_phase {
- AFTER_PCI_ENUM = 0x20,
- READY_TO_BOOT = 0x40
-};
-
-
-/* Main FSP stages */
-enum fsp_status fsp_memory_init(void **hob_list, struct range_entry *r);
-enum fsp_status fsp_silicon_init(struct range_entry *r);
-enum fsp_status fsp_notify(enum fsp_notify_phase phase);
-
-/* Callbacks for updating stage-specific parameters */
-void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd);
-void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd);
-
-/*
- * # DOCUMENTATION:
- *
- * This file defines the interface between coreboot and the FSP 2.0 wrapper
- * fsp_memory_init(), fsp_silicon_init(), and fsp_notify() are the main entry
- * points and map 1:1 to the FSP entry points of the same name.
- *
- * ### fsp_memory_init():
- * - hob_list: retuns a pointer to the HOB storage area created by FSP
- * - r: memory range that the binary is allowed to be loaded into
- *
- * This function is responsible for loading and executing the memory
- * initialization code from the FSP-M binary. It expects this binary to reside
- * in cbfs as FSP_M_FILE.
- *
- * The function takes one parameter, which is described below, but does not
- * take in memory parameters as an argument. The memory parameters can be filled
- * in with platform_fsp_memory_init_params_cb(). This is a callback symbol
- * that fsp_memory_init() will call. The platform must provide this symbol.
- *
- * FSP returns information about the memory layout in a series of structures
- * called hand-off-blocks (HOB). The "hob_list" output parameter will point to
- * the start of the HOB list. The fsp reserved region will also be described by
- * one of the HOBs. For more information on parsing these structures, see
- * fsp/util.h
- *
- *
- * ### fsp_silicon_init():
- * - r: memory range that the binary is allowed to be loaded into
- *
- * This function is responsible for loading and executing the silicon
- * initialization code from the FSP-S binary. It expects this binary to reside
- * in cbfs as FSP_S_FILE.
- *
- * Like fsp_memory_init(), it provides a callback to fill in FSP-specific
- * parameters, via platform_fsp_silicon_init_params_cb(). The platform must
- * also provide this symbol.
- *
- *
- * ### fsp_notify():
- * - phase: Which FSP notification phase
- *
- * This function is responsible for loading and executing the notify code from
- * the FSP-S binary. It expects that fsp_silicon_init() has already been called
- * succesfully, and that the FSP-S binary is still loaded into memory.
- */
-
-#endif /* _FSP2_0_API_H_ */
diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h
deleted file mode 100644
index 468101e..0000000
--- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef _FSP2_0_INFO_HEADER_H_
-#define _FSP2_0_INFO_HEADER_H_
-
-#include <rules.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <types.h>
-
-#define FSP_HDR_OFFSET 0x94
-#define FSP_HDR_LEN 0x48
-#define FSP_HDR_SIGNATURE "FSPH"
-#define FSP_HDR_ATTRIB_FSPT (0b0001 << 28)
-#define FSP_HDR_ATTRIB_FSPM (0b0010 << 28)
-#define FSP_HDR_ATTRIB_FSPS (0b0011 << 28)
-
-struct fsp_header {
- uint32_t fsp_revision;
- size_t image_size;
- uintptr_t image_base;
- uint32_t image_attribute;
- size_t cfg_region_offset;
- size_t cfg_region_size;
- size_t notify_phase_entry_offset;
- size_t memory_init_entry_offset;
- size_t silicon_init_entry_offset;
- char image_id[sizeof(uint64_t) + 1];
- uint8_t revision;
-};
-
-enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob);
-void fsp_print_header_info(const struct fsp_header *hdr);
-void fsp_print_upd_info(const struct fsp_header *hdr, void *cfg_blob);
-
-#if ENV_RAMSTAGE
-/*
- * This is a FSP_INFO_HEADER that came from fsps.bin blob. It contains
- * both SiliconInit and Notify APIs. When SiliconInit is loaded the
- * header is saved so that when Notify is called we do not have to start
- * header parsing again.
- */
-extern struct fsp_header fsps_hdr;
-#endif
-
-#endif /* _FSP2_0_INFO_HEADER_H_ */
diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h
deleted file mode 100644
index d9d9539..0000000
--- a/src/drivers/intel/fsp2_0/include/fsp/util.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef _FSP2_0_UTIL_H_
-#define _FSP2_0_UTIL_H_
-
-#include <boot/coreboot_tables.h>
-#include <fsp/info_header.h>
-#include <memrange.h>
-
-/*
- * Hand-off-block handling functions that depend on CBMEM, and thus can only
- * be used after cbmem_initialize().
- */
-void fsp_save_hob_list(void *hob_list_ptr);
-const void *fsp_get_hob_list(void);
-const void *fsp_find_extension_hob_by_uuid(const uint8_t *uuid, size_t *size);
-const void *fsp_find_nv_storage_data(size_t *size);
-enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
-/*
- * Hand-off-block utilities which do not depend on CBMEM, but need to be passed
- * the HOB list explicitly.
- */
-void fsp_find_reserved_memory(struct range_entry *re, const void *hob_list);
-void fsp_print_memory_resource_hobs(const void *hob_list);
-
-/* Load an FSP binary into CBFS, and fill the associated fsp_header struct */
-enum cb_err fsp_load_binary(struct fsp_header *hdr, const char *name,
- struct range_entry *r);
-/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
-uintptr_t fsp_load_vbt(void);
-
-#endif /* _FSP2_0_UTIL_H_ */
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
deleted file mode 100644
index 8033937..0000000
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
- * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <arch/io.h>
-#include <arch/cpu.h>
-#include <console/console.h>
-#include <fsp/api.h>
-#include <fsp/util.h>
-#include <memrange.h>
-#include <string.h>
-#include <timestamp.h>
-
-typedef asmlinkage enum fsp_status (*fsp_memory_init_fn)
- (void *raminit_upd, void **hob_list);
-
-static enum fsp_status do_fsp_memory_init(void **hob_list_ptr,
- struct fsp_header *hdr)
-{
- enum fsp_status status;
- fsp_memory_init_fn fsp_raminit;
- struct FSPM_UPD fspm_upd, *upd;
-
- post_code(0x34);
-
- upd = (struct FSPM_UPD *)(hdr->cfg_region_offset + hdr->image_base);
-
- if (upd->FspUpdHeader.Signature != FSPM_UPD_SIGNATURE) {
- printk(BIOS_ERR, "Invalid FSPM signature\n");
- return FSP_INCOMPATIBLE_VERSION;
- }
-
- /* Copy the default values from the UPD area */
- memcpy(&fspm_upd, upd, sizeof(fspm_upd));
-
- /* Give SoC and mainboard a chance to update the UPD */
- platform_fsp_memory_init_params_cb(&fspm_upd);
-
- /* Call FspMemoryInit */
- fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset);
- printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_raminit);
- printk(BIOS_SPEW, "\t%p: raminit_upd\n", &fspm_upd);
- printk(BIOS_SPEW, "\t%p: hob_list ptr\n", hob_list_ptr);
-
- timestamp_add_now(TS_FSP_MEMORY_INIT_START);
- status = fsp_raminit(&fspm_upd, hob_list_ptr);
- post_code(0x37);
- timestamp_add_now(TS_FSP_MEMORY_INIT_END);
-
- printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
-
- return status;
-}
-
-enum fsp_status fsp_memory_init(void **hob_list, struct range_entry *range)
-{
- struct fsp_header hdr;
-
- /* TODO: do not hardcode CBFS file names */
- if (fsp_load_binary(&hdr, "blobs/fspm.bin", range) != CB_SUCCESS)
- return FSP_NOT_FOUND;
-
- return do_fsp_memory_init(hob_list, &hdr);
-}
diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c
deleted file mode 100644
index 820bd45..0000000
--- a/src/drivers/intel/fsp2_0/notify.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <arch/cpu.h>
-#include <console/console.h>
-#include <fsp/api.h>
-#include <fsp/util.h>
-#include <string.h>
-
-struct fsp_notify_params {
- enum fsp_notify_phase phase;
-};
-
-typedef asmlinkage enum fsp_status (*fsp_notify_fn)
- (struct fsp_notify_params *);
-
-enum fsp_status fsp_notify(enum fsp_notify_phase phase)
-{
- fsp_notify_fn fspnotify;
- struct fsp_notify_params notify_params = { .phase = phase };
-
- if (!fsps_hdr.silicon_init_entry_offset)
- return FSP_NOT_FOUND;
-
- fspnotify = (void*) (fsps_hdr.image_base +
- fsps_hdr.notify_phase_entry_offset);
-
- printk(BIOS_DEBUG, "FspNotify %x\n", (uint32_t) phase);
-
- return fspnotify(¬ify_params);
-}
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
deleted file mode 100644
index 66043c8..0000000
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <arch/cpu.h>
-#include <cbfs.h>
-#include <console/console.h>
-#include <fsp/api.h>
-#include <fsp/util.h>
-#include <string.h>
-
-struct fsp_header fsps_hdr;
-
-typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn)
- (void *silicon_upd);
-
-static enum fsp_status do_silicon_init(struct fsp_header *hdr)
-{
- struct FSPS_UPD upd, *supd;
- fsp_silicon_init_fn silicon_init;
- enum fsp_status status;
-
- supd = (struct FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base);
-
- if (supd->FspUpdHeader.Signature != FSPS_UPD_SIGNATURE) {
- printk(BIOS_ERR, "Invalid FSPS signature\n");
- return FSP_INCOMPATIBLE_VERSION;
- }
-
- memcpy(&upd, supd, sizeof(upd));
-
- /* Give SoC/mainboard a chance to populate entries */
- platform_fsp_silicon_init_params_cb(&upd);
-
- silicon_init = (void *) (hdr->image_base +
- hdr->silicon_init_entry_offset);
-
- status = silicon_init(&upd);
- printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
- return status;
-}
-
-enum fsp_status fsp_silicon_init(struct range_entry *range)
-{
- /* Load FSP-S and save FSP header. We will need it for Notify */
- /* TODO: do not hardcode CBFS file names */
- if (fsp_load_binary(&fsps_hdr, "blobs/fsps.bin", range) != CB_SUCCESS)
- return FSP_NOT_FOUND;
-
- return do_silicon_init(&fsps_hdr);
-}
diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c
deleted file mode 100644
index 743bc9a..0000000
--- a/src/drivers/intel/fsp2_0/util.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Intel Corp.
- * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
- * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <arch/io.h>
-#include <cbfs.h>
-#include <console/console.h>
-#include <fsp/util.h>
-#include <lib.h>
-#include <memrange.h>
-#include <program_loading.h>
-#include <string.h>
-
-static bool looks_like_fsp_header(const uint8_t *raw_hdr)
-{
- if (memcmp(raw_hdr, FSP_HDR_SIGNATURE, 4)) {
- printk(BIOS_ALERT, "Did not find a valid FSP signature\n");
- return false;
- }
-
- if (read32(raw_hdr + 4) != FSP_HDR_LEN) {
- printk(BIOS_ALERT, "FSP header has invalid length\n");
- return false;
- }
-
- return true;
-}
-
-enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob)
-{
- const uint8_t *raw_hdr = fsp_blob;
-
- if (!looks_like_fsp_header(raw_hdr))
- return CB_ERR;
-
- hdr->revision = read8(raw_hdr + 11);
- hdr->fsp_revision = read32(raw_hdr + 12);
- memcpy(hdr->image_id, raw_hdr + 16, ARRAY_SIZE(hdr->image_id));
- hdr->image_id[ARRAY_SIZE(hdr->image_id) - 1] = '\0';
- hdr->image_size = read32(raw_hdr + 24);
- hdr->image_base = read32(raw_hdr + 28);
- hdr->image_attribute = read32(raw_hdr + 32);
- hdr->cfg_region_offset = read32(raw_hdr + 36);
- hdr->cfg_region_size = read32(raw_hdr + 40);
- hdr->notify_phase_entry_offset = read32(raw_hdr + 56);
- hdr->memory_init_entry_offset = read32(raw_hdr + 60);
- hdr->silicon_init_entry_offset = read32(raw_hdr + 68);
-
- return CB_SUCCESS;
-}
-
-void fsp_print_header_info(const struct fsp_header *hdr)
-{
- printk(BIOS_DEBUG, "Revision %u, image ID: %s, base 0x%lx + 0x%zx\n",
- hdr->revision, hdr->image_id, hdr->image_base, hdr->image_size);
- printk(BIOS_DEBUG, "\tConfig region 0x%zx + 0x%zx\n",
- hdr->cfg_region_offset, hdr->cfg_region_size);
-
- if (hdr->image_attribute & FSP_HDR_ATTRIB_FSPM) {
- printk(BIOS_DEBUG, "\tMemory init offset 0x%zx\n",
- hdr->memory_init_entry_offset);
- }
-
- if (hdr->image_attribute & FSP_HDR_ATTRIB_FSPS) {
- printk(BIOS_DEBUG, "\tSilicon init offset 0x%zx\n",
- hdr->silicon_init_entry_offset);
- printk(BIOS_DEBUG, "\tNotify phase offset 0x%zx\n",
- hdr->notify_phase_entry_offset);
- }
-
-}
-
-/* TODO: this won't work for SoC's that need to XIP certain modules. */
-enum cb_err fsp_load_binary(struct fsp_header *hdr,
- const char *name,
- struct range_entry *range)
-{
- struct cbfsf file_desc;
- struct region_device file_data;
- void *membase;
-
- if (cbfs_boot_locate(&file_desc, name, NULL)) {
- printk(BIOS_ERR, "Could not locate %s in CBFS\n", name);
- return CB_ERR;
- }
-
- cbfs_file_data(&file_data, &file_desc);
-
- /* Map just enough of the file to be able to parse the header. */
- membase = rdev_mmap(&file_data, FSP_HDR_OFFSET, FSP_HDR_LEN);
-
- if (membase == NULL) {
- printk(BIOS_ERR, "Could not mmap() '%s' FSP header.\n", name);
- return CB_ERR;
- }
-
- if (fsp_identify(hdr, membase) != CB_SUCCESS) {
- rdev_munmap(&file_data, membase);
- printk(BIOS_ERR, "%s did not have a valid FSP header\n", name);
- return CB_ERR;
- }
-
- rdev_munmap(&file_data, membase);
-
- fsp_print_header_info(hdr);
-
- /* Check if size specified in the header matches the cbfs file size */
- if (region_device_sz(&file_data) < hdr->image_size) {
- printk(BIOS_ERR, "%s size bigger than cbfs file.\n", name);
- return CB_ERR;
- }
-
- /* Check if the binary load address is within expected range */
- /* TODO: this doesn't check the current running program footprint. */
- if (range_entry_base(range) > hdr->image_base ||
- range_entry_end(range) <= hdr->image_base + hdr->image_size) {
- printk(BIOS_ERR, "%s is outside of allowed range\n", name);
- return CB_ERR;
- }
-
- /* Load binary into memory. */
- if (rdev_readat(&file_data, (void *)hdr->image_base, 0, hdr->image_size) < 0)
- return CB_ERR;
-
- /* Signal that FSP component has been loaded. */
- prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL);
-
- return CB_SUCCESS;
-}
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig
index 795ad93..6076023 100644
--- a/src/vendorcode/intel/Kconfig
+++ b/src/vendorcode/intel/Kconfig
@@ -23,3 +23,7 @@ config FSP_VENDORCODE_HEADER_PATH
config UEFI_2_4_BINDING
def_bool n
+
+source "src/vendorcode/intel/fsp/fsp1_0/common/Kconfig"
+source "src/vendorcode/intel/fsp/fsp1_1/common/Kconfig"
+source "src/vendorcode/intel/fsp/fsp2_0/common/Kconfig"
diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc
index cf06e36..9d1004b 100644
--- a/src/vendorcode/intel/Makefile.inc
+++ b/src/vendorcode/intel/Makefile.inc
@@ -33,3 +33,7 @@ ifeq ($(CONFIG_UEFI_2_4_BINDING),y)
CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include/Ia32
CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include
endif
+
+subdir += fsp/fsp1_0/common
+subdir += fsp/fsp1_1/common
+subdir += fsp/fsp2_0/common
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/Kconfig b/src/vendorcode/intel/fsp/fsp1_0/common/Kconfig
new file mode 100644
index 0000000..6aa8949
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/Kconfig
@@ -0,0 +1,127 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2014 Sage Electronic Engineering, LLC.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+if PLATFORM_USES_FSP1_0
+
+comment "Intel FSP"
+
+config HAVE_FSP_BIN
+ bool "Use Intel Firmware Support Package"
+ help
+ Select this option to add an Intel FSP binary to
+ the resulting coreboot image.
+
+ Note: Without this binary, coreboot builds relying on the FSP
+ will not boot
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xfef00000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x4000
+
+if HAVE_FSP_BIN
+
+config FSP_FILE
+ string "Intel FSP binary path and filename"
+ help
+ The path and filename of the Intel FSP binary for this platform.
+
+endif #HAVE_FSP_BIN
+
+config FSP_LOC
+ hex "Intel FSP Binary location in CBFS"
+ help
+ The location in CBFS that the FSP is located. This must match the
+ value that is set in the FSP binary. If the FSP needs to be moved,
+ rebase the FSP with Intel's BCT (tool).
+
+config ENABLE_FSP_FAST_BOOT
+ bool "Enable Fast Boot"
+ select ENABLE_MRC_CACHE
+ default n
+ help
+ Enabling this feature will force the MRC data to be cached in NV
+ storage to be used for speeding up boot time on future reboots
+ and/or power cycles.
+
+config ENABLE_MRC_CACHE
+ bool
+ default y if HAVE_ACPI_RESUME
+ default n
+ help
+ Enabling this feature will cause MRC data to be cached in NV storage.
+ This can either be used for fast boot, or just because the FSP wants
+ it to be saved.
+
+config MRC_CACHE_FMAP
+ bool "Use MRC Cache in FMAP"
+ depends on ENABLE_MRC_CACHE
+ default n
+ help
+ Use the region "RW_MRC_CACHE" in FMAP instead of "mrc.cache" in CBFS.
+ You must define a region in your FMAP named "RW_MRC_CACHE".
+
+config MRC_CACHE_SIZE
+ hex "Fast Boot Data Cache Size"
+ default 0x10000
+ depends on ENABLE_MRC_CACHE
+ depends on !MRC_CACHE_FMAP
+ help
+ This is the amount of space in NV storage that is reserved for the
+ fast boot data cache storage.
+
+ WARNING: Because this area will be erased and re-written, the size
+ should be a full sector of the flash ROM chip and nothing else should
+ be included in CBFS in any sector that the fast boot cache data is in.
+
+config VIRTUAL_ROM_SIZE
+ hex "Virtual ROM Size"
+ default ROM_SIZE
+ depends on ENABLE_MRC_CACHE
+ help
+ This is used to calculate the offset of the MRC data cache in NV
+ Storage for fast boot. If in doubt, leave this set to the default
+ which sets the virtual size equal to the ROM size.
+
+ Example: Cougar Canyon 2 has two 8 MB SPI ROMs. When the SPI ROMs are
+ loaded with a 4 MB coreboot image, the virtual ROM size is 8 MB. When
+ the SPI ROMs are loaded with an 8 MB coreboot image, the virtual ROM
+ size is 16 MB.
+
+config CACHE_ROM_SIZE_OVERRIDE
+ hex "Cache ROM Size"
+ default CBFS_SIZE
+ help
+ This is the size of the cachable area that is passed into the FSP in
+ the early initialization. Typically this should be the size of the CBFS
+ area, but the size must be a power of 2 whereas the CBFS size does not
+ have this limitation.
+
+config USE_GENERIC_FSP_CAR_INC
+ bool
+ default n
+ help
+ The chipset can select this to use a generic cache_as_ram.inc file
+ that should be good for all FSP based platforms.
+
+config FSP_USES_UPD
+ bool
+ default n
+ help
+ If this FSP uses UPD/VPD data regions, select this in the chipset Kconfig.
+endif #PLATFORM_USES_FSP1_0
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/Makefile.inc b/src/vendorcode/intel/fsp/fsp1_0/common/Makefile.inc
new file mode 100644
index 0000000..4ff1068
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/Makefile.inc
@@ -0,0 +1,49 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2014 Sage Electronic Engineering, LLC.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+ifeq ($(CONFIG_PLATFORM_USES_FSP1_0),y)
+
+ramstage-y += fsp_util.c hob.c
+romstage-y += fsp_util.c hob.c
+
+ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
+romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
+
+CPPFLAGS_common += -Isrc/drivers/intel/fsp1_0 -I$(objgenerated)
+
+cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc
+
+ifeq ($(CONFIG_HAVE_FSP_BIN),y)
+cbfs-files-y += fsp.bin
+fsp.bin-file := $(call strip_quotes,$(CONFIG_FSP_FILE))
+fsp.bin-position := $(CONFIG_FSP_LOC)
+fsp.bin-type := fsp
+endif
+
+ifeq ($(CONFIG_ENABLE_MRC_CACHE),y)
+ifneq ($(CONFIG_MRC_CACHE_FMAP),y)
+$(obj)/mrc.cache:
+ dd if=/dev/zero count=1 \
+ bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \
+ tr '\000' '\377' > $@
+
+cbfs-files-y += mrc.cache
+mrc.cache-file := $(obj)/mrc.cache
+mrc.cache-align := 0x10000
+mrc.cache-type := mrc_cache
+endif
+endif
+
+endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/cache_as_ram.inc b/src/vendorcode/intel/fsp/fsp1_0/common/cache_as_ram.inc
new file mode 100644
index 0000000..e79c3c1
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/cache_as_ram.inc
@@ -0,0 +1,124 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich(a)gmail.com>
+ * Copyright (C) 2007-2008 coresystems GmbH
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/cache.h>
+#include <cpu/x86/post_code.h>
+#include <cbmem.h>
+
+ cmp $0, %eax
+ je cache_as_ram
+ mov $0xa0, %eax
+ jmp .Lhlt
+
+cache_as_ram:
+ post_code(0x20)
+
+ /*
+ * Find the FSP binary in cbfs.
+ * Make a fake stack that has the return value back to this code.
+ */
+ lea fake_fsp_stack, %esp
+ jmp find_fsp
+find_fsp_ret:
+ /* Save the FSP location */
+ mov %eax, %ebp
+ cmp $CONFIG_FSP_LOC, %eax
+ jae find_fsp_ok
+ mov $0xb0, %eax
+ jmp .Lhlt
+
+find_fsp_ok:
+ post_code(POST_FSP_TEMP_RAM_INIT)
+
+ /* Calculate entry into FSP */
+ mov 0x30(%ebp), %eax /* Load TempRamInitEntry */
+ add 0x1c(%ebp), %eax /* add in the offset for the FSP base address */
+
+ /*
+ * Pass early init variables on a fake stack (no memory yet)
+ * as well as the return location
+ */
+ lea CAR_init_stack, %esp
+
+ /* call FSP binary to setup temporary stack */
+ jmp *%eax
+
+CAR_init_done:
+ addl $4, %esp
+ cmp $0, %eax
+ je car_init_ok
+ add $0xc0, %eax
+ jmp .Lhlt
+
+car_init_ok:
+
+ /* Save FSP_INFO_HEADER location in ebx */
+ mov %ebp, %ebx
+
+ /*
+ * set up bootloader stack
+ * ecx: stack base
+ * edx: stack top
+ */
+ mov %edx, %esp
+ movl %esp, %ebp
+
+ /* Clear the cbmem CAR memory region. */
+ movl %ecx, %edi
+ movl %edx, %ecx
+ sub %edi, %ecx
+ shr $2, %ecx
+ xorl %eax, %eax
+ rep stosl
+
+before_romstage:
+ post_code(0x23)
+
+ /* Call romstage.c main function. */
+ pushl %ebx /* main takes FSP_INFO_HEADER as its argument */
+ call main /* does not return */
+ movb $0xB8, %ah
+ jmp .Lhlt
+
+.Lhlt:
+#if IS_ENABLED(CONFIG_POST_IO)
+ outb %al, $CONFIG_POST_IO_PORT
+#endif
+ hlt
+ jmp .Lhlt
+
+/*
+ * esp is set to this location so that the call into and return from the FSP
+ * in find_fsp will work.
+ */
+ .align 4
+fake_fsp_stack:
+ .long find_fsp_ret
+
+CAR_init_params:
+ .long dummy_microcode
+ .long 0
+ .long 0xFFFFFFFF - CACHE_ROM_SIZE + 1 /* Firmware Location */
+ .long CACHE_ROM_SIZE /* Total Firmware Length */
+
+CAR_init_stack:
+ .long CAR_init_done
+ .long CAR_init_params
+
+dummy_microcode:
+ .long 0
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/fastboot_cache.c b/src/vendorcode/intel/fsp/fsp1_0/common/fastboot_cache.c
new file mode 100644
index 0000000..68150f9
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/fastboot_cache.c
@@ -0,0 +1,257 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include <bootstate.h>
+#include <console/console.h>
+#include <cbfs.h>
+#include <fmap.h>
+#include <ip_checksum.h>
+#include <device/device.h>
+#include <cbmem.h>
+#include <spi-generic.h>
+#include <spi_flash.h>
+#include <lib.h> // hexdump
+#include "fsp_util.h"
+
+/* convert a pointer to flash area into the offset inside the flash */
+static inline u32 to_flash_offset(void *p) {
+ return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE);
+}
+
+static struct mrc_data_container *next_mrc_block(
+ struct mrc_data_container *mrc_cache)
+{
+ /* MRC data blocks are aligned within the region */
+ u32 mrc_size = sizeof(*mrc_cache) + mrc_cache->mrc_data_size;
+ if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
+ mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
+ mrc_size += MRC_DATA_ALIGN;
+ }
+
+ u8 *region_ptr = (u8*)mrc_cache;
+ region_ptr += mrc_size;
+ return (struct mrc_data_container *)region_ptr;
+}
+
+static int is_mrc_cache(struct mrc_data_container *mrc_cache)
+{
+ return (!!mrc_cache) && (mrc_cache->mrc_signature == MRC_DATA_SIGNATURE);
+}
+
+static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
+{
+ size_t region_size;
+
+ if (IS_ENABLED(CONFIG_MRC_CACHE_FMAP)) {
+ struct region_device rdev;
+ if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {
+ *mrc_region_ptr = rdev_mmap_full(&rdev);
+ return region_device_sz(&rdev);
+ }
+ *mrc_region_ptr = NULL;
+ return 0;
+ } else {
+ *mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache",
+ CBFS_TYPE_MRC_CACHE,
+ ®ion_size);
+
+ return region_size;
+ }
+}
+
+/*
+ * Find the largest index block in the MRC cache. Return NULL if none is
+ * found.
+ */
+static struct mrc_data_container *find_current_mrc_cache_local
+ (struct mrc_data_container *mrc_cache, u32 region_size)
+{
+ u32 region_end;
+ u32 entry_id = 0;
+ struct mrc_data_container *mrc_next = mrc_cache;
+
+ region_end = (u32) mrc_cache + region_size;
+
+ /* Search for the last filled entry in the region */
+ while (is_mrc_cache(mrc_next)) {
+ entry_id++;
+ mrc_cache = mrc_next;
+ mrc_next = next_mrc_block(mrc_next);
+ if ((u32)mrc_next >= region_end) {
+ /* Stay in the MRC data region */
+ break;
+ }
+ }
+
+ if (entry_id == 0) {
+ printk(BIOS_ERR, "%s: No valid fast boot cache found.\n", __func__);
+ return NULL;
+ }
+
+ /* Verify checksum */
+ if (mrc_cache->mrc_checksum !=
+ compute_ip_checksum(mrc_cache->mrc_data,
+ mrc_cache->mrc_data_size)) {
+ printk(BIOS_ERR, "%s: fast boot cache checksum mismatch\n", __func__);
+ return NULL;
+ }
+
+ printk(BIOS_DEBUG, "%s: picked entry %u from cache block\n", __func__,
+ entry_id - 1);
+
+ return mrc_cache;
+}
+
+/* SPI code needs malloc/free.
+ * Also unknown if writing flash from XIP-flash code is a good idea
+ */
+#if !defined(__PRE_RAM__)
+/* find the first empty block in the MRC cache area.
+ * If there's none, return NULL.
+ *
+ * @mrc_cache_base - base address of the MRC cache area
+ * @mrc_cache - current entry (for which we need to find next)
+ * @region_size - total size of the MRC cache area
+ */
+static struct mrc_data_container *find_next_mrc_cache
+ (struct mrc_data_container *mrc_cache_base,
+ struct mrc_data_container *mrc_cache,
+ u32 region_size)
+{
+ u32 region_end = (u32) mrc_cache_base + region_size;
+ u32 mrc_data_size = mrc_cache->mrc_data_size;
+
+ mrc_cache = next_mrc_block(mrc_cache);
+ if (((u32)mrc_cache + mrc_data_size) >= region_end) {
+ /* Crossed the boundary */
+ mrc_cache = NULL;
+ printk(BIOS_DEBUG, "%s: no available entries found\n",
+ __func__);
+ } else {
+ printk(BIOS_DEBUG,
+ "%s: picked next entry from cache block at %p\n",
+ __func__, mrc_cache);
+ }
+
+ return mrc_cache;
+}
+
+void update_mrc_cache(void *unused)
+{
+ printk(BIOS_DEBUG, "Updating fast boot cache data.\n");
+ struct mrc_data_container *current = cbmem_find(CBMEM_ID_MRCDATA);
+ struct mrc_data_container *cache, *cache_base;
+ u32 cache_size;
+
+ if (!current) {
+ printk(BIOS_ERR, "No fast boot cache in cbmem. Can't update flash.\n");
+ return;
+ }
+ if (current->mrc_data_size == -1) {
+ printk(BIOS_ERR, "Fast boot cache data in cbmem invalid.\n");
+ return;
+ }
+
+ cache_size = get_mrc_cache_region(&cache_base);
+ if (cache_base == NULL) {
+ printk(BIOS_ERR, "%s: could not find fast boot cache area\n",
+ __func__);
+ return;
+ }
+
+ /*
+ * we need to:
+ * 0. compare MRC data to last mrc-cache block (exit if same)
+ */
+ cache = find_current_mrc_cache_local(cache_base, cache_size);
+
+ if (cache && (cache->mrc_data_size == current->mrc_data_size) &&
+ (memcmp(cache, current, cache->mrc_data_size) == 0)) {
+ printk(BIOS_DEBUG,
+ "MRC data in flash is up to date. No update.\n");
+ return;
+ }
+
+ /* 1. use spi_flash_probe() to find the flash, then... */
+ spi_init();
+ struct spi_flash *flash = spi_flash_probe(0, 0);
+ if (!flash) {
+ printk(BIOS_DEBUG, "Could not find SPI device\n");
+ return;
+ }
+
+ /* 2. look up the first unused block */
+ if (cache)
+ cache = find_next_mrc_cache(cache_base, cache, cache_size);
+
+ /*
+ * 3. if no such place exists, erase entire mrc-cache range & use
+ * block 0. First time around the erase is not needed, but this is a
+ * small overhead for simpler code.
+ */
+ if (!cache) {
+ printk(BIOS_DEBUG,
+ "Need to erase the MRC cache region of %d bytes at %p\n",
+ cache_size, cache_base);
+
+ flash->erase(flash, to_flash_offset(cache_base), cache_size);
+
+ /* we will start at the beginning again */
+ cache = cache_base;
+ }
+ /* 4. write mrc data with flash->write() */
+ printk(BIOS_DEBUG, "Write MRC cache update to flash at %p\n",
+ cache);
+ flash->write(flash, to_flash_offset(cache),
+ current->mrc_data_size + sizeof(*current), current);
+}
+
+#endif /* !defined(__PRE_RAM__) */
+
+void * find_and_set_fastboot_cache(void)
+{
+ struct mrc_data_container *mrc_cache = NULL;
+ if (((mrc_cache = find_current_mrc_cache()) == NULL) ||
+ (mrc_cache->mrc_data_size == -1UL)) {
+ printk(BIOS_DEBUG, "FSP MRC cache not present.\n");
+ return NULL;
+ }
+ printk(BIOS_DEBUG, "FSP MRC cache present at %x.\n", (u32)mrc_cache);
+ printk(BIOS_SPEW, "Saved MRC data:\n");
+ hexdump32(BIOS_SPEW, (void *)mrc_cache->mrc_data, (mrc_cache->mrc_data_size) / 4);
+ return (void *) mrc_cache->mrc_data;
+}
+
+struct mrc_data_container *find_current_mrc_cache(void)
+{
+ struct mrc_data_container *cache_base;
+ u32 cache_size;
+
+ cache_size = get_mrc_cache_region(&cache_base);
+ if (cache_base == NULL) {
+ printk(BIOS_ERR, "%s: could not find fast boot cache area\n",
+ __func__);
+ return NULL;
+ }
+
+ /*
+ * we need to:
+ * 0. compare MRC data to last mrc-cache block (exit if same)
+ */
+ return find_current_mrc_cache_local(cache_base, cache_size);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.c b/src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.c
new file mode 100644
index 0000000..a3fef2d
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.c
@@ -0,0 +1,348 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <types.h>
+#include <string.h>
+#include <console/console.h>
+#include <bootstate.h>
+#include <cbmem.h>
+#include "fsp_util.h"
+#include <lib.h> // hexdump
+#include <ip_checksum.h>
+#include <timestamp.h>
+
+#ifndef __PRE_RAM__
+/* Globals pointers for FSP structures */
+void *FspHobListPtr = NULL;
+FSP_INFO_HEADER *fsp_header_ptr = NULL;
+
+void FspNotify (u32 Phase)
+{
+ FSP_NOTFY_PHASE NotifyPhaseProc;
+ NOTIFY_PHASE_PARAMS NotifyPhaseParams;
+ EFI_STATUS Status;
+
+ if (fsp_header_ptr == NULL) {
+ fsp_header_ptr = (void *)find_fsp();
+ if ((u32)fsp_header_ptr < 0xff) {
+ post_code(0x4F); /* output something in case there is no serial */
+ die("Can't find the FSP!\n");
+ }
+ }
+
+ /* call FSP PEI to Notify PostPciEnumeration */
+ NotifyPhaseProc = (FSP_NOTFY_PHASE)(fsp_header_ptr->ImageBase +
+ fsp_header_ptr->NotifyPhaseEntry);
+ NotifyPhaseParams.Phase = Phase;
+
+ timestamp_add_now(Phase == EnumInitPhaseReadyToBoot ?
+ TS_FSP_BEFORE_FINALIZE : TS_FSP_BEFORE_ENUMERATE);
+
+ Status = NotifyPhaseProc (&NotifyPhaseParams);
+
+ timestamp_add_now(Phase == EnumInitPhaseReadyToBoot ?
+ TS_FSP_AFTER_FINALIZE : TS_FSP_AFTER_ENUMERATE);
+
+ if (Status != 0)
+ printk(BIOS_ERR,"FSP API NotifyPhase failed for phase 0x%x with status: 0x%x\n", Phase, Status);
+}
+#endif /* #ifndef __PRE_RAM__ */
+
+#ifdef __PRE_RAM__
+
+/*
+ * Call the FSP to do memory init. The FSP doesn't return to this function.
+ * The FSP returns to the romstage_main_continue().
+ */
+void __attribute__ ((noreturn)) fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
+{
+ FSP_FSP_INIT FspInitApi;
+ FSP_INIT_PARAMS FspInitParams;
+ FSP_INIT_RT_BUFFER FspRtBuffer;
+#if IS_ENABLED(CONFIG_FSP_USES_UPD)
+ UPD_DATA_REGION fsp_upd_data;
+#endif
+
+ memset((void*)&FspRtBuffer, 0, sizeof(FSP_INIT_RT_BUFFER));
+ FspRtBuffer.Common.StackTop = (u32 *)CONFIG_RAMTOP;
+ FspInitParams.NvsBufferPtr = NULL;
+
+#if IS_ENABLED(CONFIG_FSP_USES_UPD)
+ FspRtBuffer.Common.UpdDataRgnPtr = &fsp_upd_data;
+#endif
+ FspInitParams.RtBufferPtr = (FSP_INIT_RT_BUFFER *)&FspRtBuffer;
+ FspInitParams.ContinuationFunc = (CONTINUATION_PROC)ChipsetFspReturnPoint;
+ FspInitApi = (FSP_FSP_INIT)(fsp_ptr->ImageBase + fsp_ptr->FspInitEntry);
+
+ /* Call the chipset code to fill in the chipset specific structures */
+ chipset_fsp_early_init(&FspInitParams, fsp_ptr);
+
+ /* Call back to romstage for board specific changes */
+ romstage_fsp_rt_buffer_callback(&FspRtBuffer);
+
+ post_code(POST_FSP_MEMORY_INIT);
+ FspInitApi(&FspInitParams);
+
+ /* Should never return. Control will continue from ContinuationFunc */
+ die("Uh Oh! FspInitApi returned");
+}
+#endif /* __PRE_RAM__ */
+
+volatile u8 * find_fsp ()
+{
+
+#ifdef __PRE_RAM__
+ volatile register u8 *fsp_ptr asm ("eax");
+
+ /* Entry point for CAR assembly routine */
+ __asm__ __volatile__ (
+ ".global find_fsp\n\t"
+ "find_fsp:\n\t"
+ );
+#else
+ volatile u8 *fsp_ptr;
+#endif /* __PRE_RAM__ */
+
+ /* The FSP is stored in CBFS */
+ fsp_ptr = (u8 *) CONFIG_FSP_LOC;
+
+ /* Check the FV signature, _FVH */
+ if (((EFI_FIRMWARE_VOLUME_HEADER *)fsp_ptr)->Signature == 0x4856465F) {
+ /* Go to the end of the FV header and align the address. */
+ fsp_ptr += ((EFI_FIRMWARE_VOLUME_HEADER *)fsp_ptr)->ExtHeaderOffset;
+ fsp_ptr += ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)fsp_ptr)->ExtHeaderSize;
+ fsp_ptr = (u8 *)(((u32)fsp_ptr + 7) & 0xFFFFFFF8);
+ } else {
+ fsp_ptr = (u8*)ERROR_NO_FV_SIG;
+ }
+
+ /* Check the FFS GUID */
+ if (((u32)fsp_ptr > 0xff) &&
+ (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[0] == 0x912740BE) &&
+ (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[1] == 0x47342284) &&
+ (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[2] == 0xB08471B9) &&
+ (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[3] == 0x0C3F3527)) {
+ /* Add the FFS Header size to the base to find the Raw section Header */
+ fsp_ptr += sizeof(EFI_FFS_FILE_HEADER);
+ } else {
+ fsp_ptr = (u8 *)ERROR_NO_FFS_GUID;
+ }
+
+ if (((u32)fsp_ptr > 0xff) &&
+ ((EFI_RAW_SECTION *)fsp_ptr)->Type == EFI_SECTION_RAW) {
+ /* Add the Raw Header size to the base to find the FSP INFO Header */
+ fsp_ptr += sizeof(EFI_RAW_SECTION);
+ } else {
+ fsp_ptr = (u8 *)ERROR_NO_INFO_HEADER;
+ }
+
+ /* Verify that the FSP is set to the base address we're expecting.*/
+ if (((u32)fsp_ptr > 0xff) &&
+ (*(u32*)(fsp_ptr + FSP_IMAGE_BASE_LOC) != CONFIG_FSP_LOC)) {
+ fsp_ptr = (u8 *)ERROR_IMAGEBASE_MISMATCH;
+ }
+
+ /* Verify the FSP Signature */
+ if (((u32)fsp_ptr > 0xff) &&
+ (*(u32*)(fsp_ptr + FSP_IMAGE_SIG_LOC) != FSP_SIG)){
+ fsp_ptr = (u8 *)ERROR_INFO_HEAD_SIG_MISMATCH;
+ }
+
+ /* Verify the FSP ID */
+ if (((u32)fsp_ptr > 0xff) &&
+ ((*(u32 *)(fsp_ptr + FSP_IMAGE_ID_LOC) != FSP_IMAGE_ID_DWORD0) ||
+ (*(u32 *)(fsp_ptr + (FSP_IMAGE_ID_LOC + 4)) != FSP_IMAGE_ID_DWORD1))) {
+ fsp_ptr = (u8 *)ERROR_FSP_SIG_MISMATCH;
+ }
+
+ return (fsp_ptr);
+}
+
+/** finds the saved temporary memory information in the FSP HOB list
+ *
+ * @param hob_list_ptr pointer to the start of the hob list
+ * @return pointer to saved CAR MEM or NULL if not found.
+ */
+void * find_saved_temp_mem(void *hob_list_ptr)
+{
+ EFI_GUID temp_hob_guid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
+ EFI_HOB_GUID_TYPE *saved_mem_hob =
+ (EFI_HOB_GUID_TYPE *) find_hob_by_guid(
+ hob_list_ptr, &temp_hob_guid);
+
+ if (saved_mem_hob == NULL)
+ return NULL;
+
+ return (void *) ((char *) saved_mem_hob + sizeof(EFI_HOB_GUID_TYPE));
+}
+
+#ifndef FSP_RESERVE_MEMORY_SIZE
+/** @brief locates the HOB containing the location of the fsp reserved mem area
+ *
+ * @param hob_list_ptr pointer to the start of the hob list
+ * @return pointer to the start of the FSP reserved memory or NULL if not found.
+ */
+void * find_fsp_reserved_mem(void *hob_list_ptr)
+{
+ EFI_GUID fsp_reserved_guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
+ EFI_HOB_RESOURCE_DESCRIPTOR *fsp_reserved_mem =
+ (EFI_HOB_RESOURCE_DESCRIPTOR *) find_hob_by_guid(
+ hob_list_ptr, &fsp_reserved_guid);
+
+ if (fsp_reserved_mem == NULL)
+ return NULL;
+
+ return (void *)((uintptr_t)fsp_reserved_mem->PhysicalStart);
+}
+#endif /* FSP_RESERVE_MEMORY_SIZE */
+
+#ifndef __PRE_RAM__ /* Only parse HOB data in ramstage */
+
+void print_fsp_info(void) {
+
+ if (fsp_header_ptr == NULL)
+ fsp_header_ptr = (void *)find_fsp();
+
+ if ((u32)fsp_header_ptr < 0xff) {
+ post_code(0x4F); /* post code in case there is no serial */
+ die("Can't find the FSP!\n");
+ }
+
+ if (FspHobListPtr == NULL) {
+ FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
+ }
+
+ printk(BIOS_SPEW,"fsp_header_ptr: %p\n", fsp_header_ptr);
+ printk(BIOS_INFO,"FSP Header Version: %d\n", fsp_header_ptr->HeaderRevision);
+ printk(BIOS_INFO,"FSP Revision: %d.%d\n",
+ (u8)((fsp_header_ptr->ImageRevision >> 8) & 0xff),
+ (u8)(fsp_header_ptr->ImageRevision & 0xff));
+}
+
+
+#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+/**
+ * Save the FSP memory HOB (mrc data) to the MRC area in CBMEM
+ */
+int save_mrc_data(void *hob_start)
+{
+ u32 *mrc_hob;
+ u32 *mrc_hob_data;
+ u32 mrc_hob_size;
+ struct mrc_data_container *mrc_data;
+ int output_len;
+ const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+
+ mrc_hob = GetNextGuidHob(&mrc_guid, hob_start);
+ if (mrc_hob == NULL){
+ printk(BIOS_DEBUG, "Memory Configure Data Hob is not present\n");
+ return(0);
+ }
+
+ mrc_hob_data = GET_GUID_HOB_DATA (mrc_hob);
+ mrc_hob_size = (u32) GET_HOB_LENGTH(mrc_hob);
+
+ printk(BIOS_DEBUG, "Memory Configure Data Hob at %p (size = 0x%x).\n",
+ (void *)mrc_hob_data, mrc_hob_size);
+
+ output_len = ALIGN(mrc_hob_size, 16);
+
+ /* Save the MRC S3/fast boot/ADR restore data to cbmem */
+ mrc_data = cbmem_add (CBMEM_ID_MRCDATA,
+ output_len + sizeof(struct mrc_data_container));
+
+ /* Just return if there was a problem with getting CBMEM */
+ if (mrc_data == NULL) {
+ printk(BIOS_WARNING, "CBMEM was not available to save the fast boot cache data.\n");
+ return 0;
+ }
+
+ printk(BIOS_DEBUG, "Copy FSP MRC DATA to HOB (source addr %p, dest addr %p, %u bytes)\n",
+ (void *)mrc_hob_data, mrc_data, output_len);
+
+ mrc_data->mrc_signature = MRC_DATA_SIGNATURE;
+ mrc_data->mrc_data_size = output_len;
+ mrc_data->reserved = 0;
+ memcpy(mrc_data->mrc_data, (const void *)mrc_hob_data, mrc_hob_size);
+
+ /* Zero the unused space in aligned buffer. */
+ if (output_len > mrc_hob_size)
+ memset((mrc_data->mrc_data + mrc_hob_size), 0,
+ output_len - mrc_hob_size);
+
+ mrc_data->mrc_checksum = compute_ip_checksum(mrc_data->mrc_data,
+ mrc_data->mrc_data_size);
+
+ printk(BIOS_SPEW, "Fast boot data (includes align and checksum):\n");
+ hexdump32(BIOS_SPEW, (void *)mrc_data->mrc_data, output_len / 4);
+ return (1);
+}
+#endif /* CONFIG_ENABLE_MRC_CACHE */
+
+static void find_fsp_hob_update_mrc(void *unused)
+{
+ /* Set the global HOB list pointer */
+ FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
+
+ if (!FspHobListPtr){
+ printk(BIOS_ERR, "ERROR: Could not find FSP HOB pointer in CBFS!\n");
+ } else {
+ /* 0x0000: Print all types */
+ print_hob_type_structure(0x000, FspHobListPtr);
+
+ #if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+ if(save_mrc_data(FspHobListPtr))
+ update_mrc_cache(NULL);
+ else
+ printk(BIOS_DEBUG,"Not updating MRC data in flash.\n");
+ #endif
+ }
+}
+
+/** @brief Notify FSP for PostPciEnumeration
+ *
+ * @param unused
+ */
+static void fsp_after_pci_enum(void *unused)
+{
+ /* This call needs to be done before resource allocation. */
+ printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
+ post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
+ FspNotify(EnumInitPhaseAfterPciEnumeration);
+ printk(BIOS_DEBUG,
+ "Returned from FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
+}
+
+/** @brief Notify FSP for ReadyToBoot
+ *
+ * @param unused
+ */
+static void fsp_finalize(void *unused)
+{
+ printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseReadyToBoot)\n");
+ print_fsp_info();
+ post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
+ FspNotify(EnumInitPhaseReadyToBoot);
+ printk(BIOS_DEBUG, "Returned from FspNotify(EnumInitPhaseReadyToBoot)\n");
+}
+
+/* Set up for the ramstage FSP calls */
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_EXIT, fsp_after_pci_enum, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, fsp_finalize, NULL);
+
+/* Update the MRC/fast boot cache as part of the late table writing stage */
+BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
+ find_fsp_hob_update_mrc, NULL);
+#endif /* #ifndef __PRE_RAM__ */
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.h b/src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.h
new file mode 100644
index 0000000..bbdd4de
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/fsp_util.h
@@ -0,0 +1,131 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef FSP_UTIL_H
+#define FSP_UTIL_H
+
+#include <chipset_fsp_util.h>
+#include "fsp_values.h"
+
+#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+int save_mrc_data(void *hob_start);
+void * find_and_set_fastboot_cache(void);
+#endif
+
+volatile u8 * find_fsp (void);
+void fsp_early_init(FSP_INFO_HEADER *fsp_info);
+void FspNotify(u32 Phase);
+void FspNotifyReturnPoint(EFI_STATUS Status, VOID *HobListPtr);
+void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer);
+void print_fsp_info(void);
+void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams,
+ FSP_INFO_HEADER *fsp_ptr);
+void ChipsetFspReturnPoint(EFI_STATUS Status, VOID *HobListPtr);
+void * find_saved_temp_mem(void *hob_list_ptr);
+void * find_fsp_reserved_mem(void *hob_list_ptr);
+
+/* functions in hob.c */
+void print_hob_mem_attributes(void *Hobptr);
+void print_hob_type_structure(u16 Hobtype, void *Hoblistptr);
+void print_hob_resource_attributes(void *Hobptr);
+void print_guid_type_attributes(void *Hobptr);
+const char * get_hob_type_string(void *Hobptr);
+void * find_hob_by_guid(void *Hoblistptr, EFI_GUID *guid1);
+uint8_t guids_are_equal(EFI_GUID *guid1, EFI_GUID *guid2);
+void printguid(EFI_GUID *guid);
+
+/* Additional HOB types not included in the FSP:
+ * #define EFI_HOB_TYPE_HANDOFF 0x0001
+ * #define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+ * #define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+ * #define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+ * #define EFI_HOB_TYPE_FV 0x0005
+ * #define EFI_HOB_TYPE_CPU 0x0006
+ * #define EFI_HOB_TYPE_MEMORY_POOL 0x0007
+ * #define EFI_HOB_TYPE_CV 0x0008
+ * #define EFI_HOB_TYPE_UNUSED 0xFFFE
+ * #define EFI_HOB_TYPE_END_OF_HOB_LIST 0xffff
+ */
+#define EFI_HOB_TYPE_HANDOFF 0x0001
+#define EFI_HOB_TYPE_MEMORY_POOL 0x0007
+
+#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+#define MRC_DATA_ALIGN 0x1000
+#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24))
+
+struct mrc_data_container {
+ u32 mrc_signature; // "MRCD"
+ u32 mrc_data_size; // Actual total size of this structure
+ u32 mrc_checksum; // IP style checksum
+ u32 reserved; // For header alignment
+ u8 mrc_data[0]; // Variable size, platform/run time dependent.
+} __attribute__ ((packed));
+
+struct mrc_data_container *find_current_mrc_cache(void);
+
+#if !defined(__PRE_RAM__)
+void update_mrc_cache(void *unused);
+#endif
+
+#endif
+
+/* The offset in bytes from the start of the info structure */
+#define FSP_IMAGE_SIG_LOC 0
+#define FSP_IMAGE_ID_LOC 16
+#define FSP_IMAGE_BASE_LOC 28
+
+#define FSP_SIG 0x48505346 /* 'FSPH' */
+
+#define ERROR_NO_FV_SIG 1
+#define ERROR_NO_FFS_GUID 2
+#define ERROR_NO_INFO_HEADER 3
+#define ERROR_IMAGEBASE_MISMATCH 4
+#define ERROR_INFO_HEAD_SIG_MISMATCH 5
+#define ERROR_FSP_SIG_MISMATCH 6
+
+#ifndef __PRE_RAM__
+extern void *FspHobListPtr;
+#endif
+
+#define UPD_DEFAULT_CHECK(member) \
+ if (config->member != UPD_DEFAULT) { \
+ UpdData->member = config->member - 1; \
+ } \
+ printk(FSP_INFO_LEVEL, #member ":\t\t0x%02x %s\n", UpdData->member, \
+ config->member ? "(set)" : "(default)");
+
+#define UPD_SPD_CHECK(member) \
+ if (config->member == UPD_SPD_ADDR_DISABLED) { \
+ UpdData->member = 0x00; \
+ } else if (config->member != UPD_SPD_ADDR_DEFAULT) { \
+ UpdData->member = config->member; \
+ } \
+ printk(FSP_INFO_LEVEL, #member ":\t\t0x%02x %s\n", UpdData->member, \
+ config->member ? "(set)" : "(default)");
+
+#define UPD_DEVICE_CHECK(devicename, member, statement) \
+ case devicename: \
+ UpdData->member = dev->enabled; \
+ printk(FSP_INFO_LEVEL, statement "%s\n", \
+ UpdData->member?"Enabled":"Disabled"); \
+ break;
+
+
+#ifndef FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID
+#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
+ { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } };
+#endif
+
+#endif /* FSP_UTIL_H */
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/fsp_values.h b/src/vendorcode/intel/fsp/fsp1_0/common/fsp_values.h
new file mode 100644
index 0000000..337e751
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/fsp_values.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef FSP_VALUES_H
+#define FSP_VALUES_H
+
+#ifndef FSP_DEBUG_LEVEL
+# define FSP_DEBUG_LEVEL BIOS_SPEW
+#endif
+
+#ifndef FSP_INFO_LEVEL
+# define FSP_INFO_LEVEL BIOS_DEBUG
+#endif
+
+#define INCREMENT_FOR_DEFAULT(x) (x+1)
+
+#define UPD_DEFAULT 0x00
+#define UPD_DISABLE INCREMENT_FOR_DEFAULT(0)
+#define UPD_ENABLE INCREMENT_FOR_DEFAULT(1)
+#define UPD_USE_DEVICETREE 0xff
+
+#define UPD_SPD_ADDR_DEFAULT UPD_DEFAULT
+#define UPD_SPD_ADDR_DISABLED 0xFF
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/common/hob.c b/src/vendorcode/intel/fsp/fsp1_0/common/hob.c
new file mode 100644
index 0000000..4aac147
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/common/hob.c
@@ -0,0 +1,265 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <types.h>
+#include <string.h>
+#include <console/console.h>
+#include <lib.h> // hexdump
+#include "fsp_util.h"
+
+
+/** Displays a GUID's address and value
+ *
+ * @param guid pointer to the GUID to display
+ */
+void printguid(EFI_GUID *guid)
+{
+ printk(BIOS_SPEW,"Address: %p Guid: %08lx-%04x-%04x-",
+ guid, (unsigned long)guid->Data1,
+ guid->Data2, guid->Data3);
+ printk(BIOS_SPEW,"%02x%02x%02x%02x%02x%02x%02x%02x\n",
+ guid->Data4[0], guid->Data4[1],
+ guid->Data4[2], guid->Data4[3],
+ guid->Data4[4], guid->Data4[5],
+ guid->Data4[6], guid->Data4[7] );
+}
+
+void print_hob_mem_attributes(void *Hobptr)
+{
+ EFI_HOB_MEMORY_ALLOCATION *HobMemoryPtr = (EFI_HOB_MEMORY_ALLOCATION *)Hobptr;
+ EFI_MEMORY_TYPE Hobmemtype = HobMemoryPtr->AllocDescriptor.MemoryType;
+ u64 Hobmemaddr = HobMemoryPtr->AllocDescriptor.MemoryBaseAddress;
+ u64 Hobmemlength = HobMemoryPtr->AllocDescriptor.MemoryLength;
+ const char * Hobmemtypenames[15];
+
+ Hobmemtypenames[0] = "EfiReservedMemoryType";
+ Hobmemtypenames[1] = "EfiLoaderCode";
+ Hobmemtypenames[2] = "EfiLoaderData";
+ Hobmemtypenames[3] = "EfiBootServicesCode";
+ Hobmemtypenames[4] = "EfiBootServicesData";
+ Hobmemtypenames[5] = "EfiRuntimeServicesCode";
+ Hobmemtypenames[6] = "EfiRuntimeServicesData";
+ Hobmemtypenames[7] = "EfiConventionalMemory";
+ Hobmemtypenames[8] = "EfiUnusableMemory";
+ Hobmemtypenames[9] = "EfiACPIReclaimMemory";
+ Hobmemtypenames[10] = "EfiACPIMemoryNVS";
+ Hobmemtypenames[11] = "EfiMemoryMappedIO";
+ Hobmemtypenames[12] = "EfiMemoryMappedIOPortSpace";
+ Hobmemtypenames[13] = "EfiPalCode";
+ Hobmemtypenames[14] = "EfiMaxMemoryType";
+
+ printk(BIOS_SPEW, " Memory type %s (0x%x)\n",
+ Hobmemtypenames[(u32)Hobmemtype], (u32) Hobmemtype);
+ printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
+ (unsigned long)Hobmemaddr, (unsigned long)Hobmemlength);
+}
+
+void print_hob_resource_attributes(void *Hobptr)
+{
+ EFI_HOB_RESOURCE_DESCRIPTOR *HobResourcePtr =
+ (EFI_HOB_RESOURCE_DESCRIPTOR *)Hobptr;
+ u32 Hobrestype = HobResourcePtr->ResourceType;
+ u32 Hobresattr = HobResourcePtr->ResourceAttribute;
+ u64 Hobresaddr = HobResourcePtr->PhysicalStart;
+ u64 Hobreslength = HobResourcePtr->ResourceLength;
+ const char *Hobrestypestr = NULL;
+
+ // HOB Resource Types
+ switch (Hobrestype) {
+ case EFI_RESOURCE_SYSTEM_MEMORY:
+ Hobrestypestr = "EFI_RESOURCE_SYSTEM_MEMORY"; break;
+ case EFI_RESOURCE_MEMORY_MAPPED_IO:
+ Hobrestypestr = "EFI_RESOURCE_MEMORY_MAPPED_IO"; break;
+ case EFI_RESOURCE_IO:
+ Hobrestypestr = "EFI_RESOURCE_IO"; break;
+ case EFI_RESOURCE_FIRMWARE_DEVICE:
+ Hobrestypestr = "EFI_RESOURCE_FIRMWARE_DEVICE"; break;
+ case EFI_RESOURCE_MEMORY_MAPPED_IO_PORT:
+ Hobrestypestr = "EFI_RESOURCE_MEMORY_MAPPED_IO_PORT"; break;
+ case EFI_RESOURCE_MEMORY_RESERVED:
+ Hobrestypestr = "EFI_RESOURCE_MEMORY_RESERVED"; break;
+ case EFI_RESOURCE_IO_RESERVED:
+ Hobrestypestr = "EFI_RESOURCE_IO_RESERVED"; break;
+ case EFI_RESOURCE_MAX_MEMORY_TYPE:
+ Hobrestypestr = "EFI_RESOURCE_MAX_MEMORY_TYPE"; break;
+ default:
+ Hobrestypestr = "EFI_RESOURCE_UNKNOWN"; break;
+ }
+
+ printk(BIOS_SPEW, " Resource %s (0x%0x) has attributes 0x%0x\n",
+ Hobrestypestr, Hobrestype, Hobresattr);
+ printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
+ (unsigned long)Hobresaddr, (unsigned long)Hobreslength);
+}
+
+const char * get_hob_type_string(void *Hobptr)
+{
+ EFI_HOB_GENERIC_HEADER *HobHeaderPtr = (EFI_HOB_GENERIC_HEADER *)Hobptr;
+ u16 Hobtype = HobHeaderPtr->HobType;
+ const char *Hobtypestring = NULL;
+
+ switch (Hobtype) {
+ case EFI_HOB_TYPE_HANDOFF:
+ Hobtypestring = "EFI_HOB_TYPE_HANDOFF"; break;
+ case EFI_HOB_TYPE_MEMORY_ALLOCATION:
+ Hobtypestring = "EFI_HOB_TYPE_MEMORY_ALLOCATION"; break;
+ case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
+ Hobtypestring = "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR"; break;
+ case EFI_HOB_TYPE_GUID_EXTENSION:
+ Hobtypestring = "EFI_HOB_TYPE_GUID_EXTENSION"; break;
+ case EFI_HOB_TYPE_MEMORY_POOL:
+ Hobtypestring = "EFI_HOB_TYPE_MEMORY_POOL"; break;
+ case EFI_HOB_TYPE_UNUSED:
+ Hobtypestring = "EFI_HOB_TYPE_UNUSED"; break;
+ case EFI_HOB_TYPE_END_OF_HOB_LIST:
+ Hobtypestring = "EFI_HOB_TYPE_END_OF_HOB_LIST"; break;
+ default:
+ Hobtypestring = "EFI_HOB_TYPE_UNRECOGNIZED"; break;
+ }
+
+ return Hobtypestring;
+}
+
+/** Displays the length, location, and GUID value of a GUID extension
+ *
+ * The EFI_HOB_GUID_TYPE is very basic - it just contains the standard
+ * HOB header containing the HOB type and length, and a GUID for
+ * identification. The rest of the data is undefined and must be known
+ * based on the GUID.
+ *
+ * This displays the entire HOB length, and the location of the start
+ * of the HOB, *NOT* the length of or the start of the data inside the HOB.
+ *
+ * @param Hobptr
+ */
+void print_guid_type_attributes(void *Hobptr)
+{
+ printk(BIOS_SPEW, " at location %p with length0x%0lx\n ",
+ Hobptr, (unsigned long)(((EFI_PEI_HOB_POINTERS *) \
+ Hobptr)->Guid->Header.HobLength));
+ printguid(&(((EFI_HOB_GUID_TYPE *)Hobptr)->Name));
+
+}
+
+/* Print out a structure of all the HOBs
+ * that match a certain type:
+ * Print all types (0x0000)
+ * EFI_HOB_TYPE_HANDOFF (0x0001)
+ * EFI_HOB_TYPE_MEMORY_ALLOCATION (0x0002)
+ * EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (0x0003)
+ * EFI_HOB_TYPE_GUID_EXTENSION (0x0004)
+ * EFI_HOB_TYPE_MEMORY_POOL (0x0007)
+ * EFI_HOB_TYPE_UNUSED (0xFFFE)
+ * EFI_HOB_TYPE_END_OF_HOB_LIST (0xFFFF)
+ */
+void print_hob_type_structure(u16 Hobtype, void *Hoblistptr)
+{
+ u32 *Currenthob;
+ u32 *Nexthob = 0;
+ u8 Lasthob = 0;
+ u32 Currenttype;
+ const char *Currenttypestr;
+
+ Currenthob = Hoblistptr;
+
+ /* Print out HOBs of our desired type until
+ * the end of the HOB list
+ */
+ printk(BIOS_DEBUG, "\n=== FSP HOB Data Structure ===\n");
+ printk(BIOS_DEBUG, "FSP Hoblistptr: 0x%0x\n",
+ (u32) Hoblistptr);
+ do {
+ EFI_HOB_GENERIC_HEADER *CurrentHeaderPtr =
+ (EFI_HOB_GENERIC_HEADER *)Currenthob;
+ Currenttype = CurrentHeaderPtr->HobType; /* Get the type of this HOB */
+ Currenttypestr = get_hob_type_string(Currenthob);
+
+ if (Currenttype == Hobtype || Hobtype == 0x0000) {
+ printk(BIOS_DEBUG, "HOB 0x%0x is an %s (type 0x%0x)\n",
+ (u32) Currenthob, Currenttypestr, Currenttype);
+ switch (Currenttype) {
+ case EFI_HOB_TYPE_MEMORY_ALLOCATION:
+ print_hob_mem_attributes(Currenthob); break;
+ case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
+ print_hob_resource_attributes(Currenthob); break;
+ case EFI_HOB_TYPE_GUID_EXTENSION:
+ print_guid_type_attributes(Currenthob); break;
+ }
+ }
+
+ Lasthob = END_OF_HOB_LIST(Currenthob); /* Check for end of HOB list */
+ if (!Lasthob) {
+ Nexthob = GET_NEXT_HOB(Currenthob); /* Get next HOB pointer */
+ Currenthob = Nexthob; // Start on next HOB
+ }
+ } while (!Lasthob);
+ printk(BIOS_DEBUG, "=== End of FSP HOB Data Structure ===\n\n");
+}
+
+
+/** Finds a HOB entry based on type and guid
+ *
+ * @param current_hob pointer to the start of the HOB list
+ * @param guid the GUID of the HOB entry to find
+ * @return pointer to the start of the requested HOB or NULL if not found.
+ */
+void * find_hob_by_guid(void *current_hob, EFI_GUID *guid)
+{
+ do {
+ switch (((EFI_HOB_GENERIC_HEADER *)current_hob)->HobType) {
+
+ case EFI_HOB_TYPE_MEMORY_ALLOCATION:
+ if (guids_are_equal(guid, &(((EFI_HOB_MEMORY_ALLOCATION *) \
+ current_hob)->AllocDescriptor.Name)))
+ return current_hob;
+ break;
+ case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
+ if (guids_are_equal(guid,
+ &(((EFI_HOB_RESOURCE_DESCRIPTOR *) \
+ current_hob)->Owner)))
+ return current_hob;
+ break;
+ case EFI_HOB_TYPE_GUID_EXTENSION:
+ if (guids_are_equal(guid, &(((EFI_HOB_GUID_TYPE *) \
+ current_hob)->Name)))
+ return current_hob;
+ break;
+ }
+
+ if (!END_OF_HOB_LIST(current_hob))
+ current_hob = GET_NEXT_HOB(current_hob); /* Get next HOB pointer */
+ } while (!END_OF_HOB_LIST(current_hob));
+
+ return NULL;
+}
+
+/** Compares a pair of GUIDs to see if they are equal
+ *
+ * GUIDs are 128 bits long, so compare them as pairs of quadwords.
+ *
+ * @param guid1 pointer to the first of the GUIDs to compare
+ * @param guid2 pointer to the second of the GUIDs to compare
+ * @return 1 if the GUIDs were equal, 0 if GUIDs were not equal
+ */
+uint8_t guids_are_equal(EFI_GUID *guid1, EFI_GUID *guid2)
+{
+ uint64_t* guid_1 = (void *) guid1;
+ uint64_t* guid_2 = (void *) guid2;
+
+ if ((*(guid_1) != *(guid_2)) || (*(guid_1 + 1) != *(guid_2 + 1)))
+ return 0;
+
+ return 1;
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/Kconfig b/src/vendorcode/intel/fsp/fsp1_1/common/Kconfig
new file mode 100644
index 0000000..9b2c463
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/Kconfig
@@ -0,0 +1,118 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2014 Sage Electronic Engineering, LLC.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config PLATFORM_USES_FSP1_1
+ bool
+ select UEFI_2_4_BINDING
+ help
+ Does the code require the Intel Firmware Support Package?
+
+if PLATFORM_USES_FSP1_1
+
+comment "Intel FSP 1.1"
+
+config HAVE_FSP_BIN
+ bool "Should the Intel FSP binary be added to the flash image"
+ help
+ Select this option to add an Intel FSP binary to
+ the resulting coreboot image.
+
+ Note: Without this binary, coreboot builds relying on the FSP
+ will not boot
+
+config CPU_MICROCODE_CBFS_LEN
+ hex "Microcode update region length in bytes"
+ default 0
+ help
+ The length in bytes of the microcode update region.
+
+config CPU_MICROCODE_CBFS_LOC
+ hex "Microcode update base address in CBFS"
+ default 0
+ help
+ The location (base address) in CBFS that contains the microcode update
+ binary.
+
+config FSP_FILE
+ string "Intel FSP binary path and filename"
+ help
+ The path and filename of the Intel FSP binary for this platform.
+
+config FSP_IMAGE_ID_STRING
+ string "8 byte platform string identifying the FSP platform"
+ default "$XXXFSP$"
+ help
+ 8 ASCII character byte signature string that will help match the FSP
+ binary to a supported hardware configuration.
+
+config FSP_LOC
+ hex "Intel FSP Binary location in CBFS"
+ default 0xffee0000
+ help
+ The location in CBFS that the FSP is located. This must match the
+ value that is set in the FSP binary. If the FSP needs to be moved,
+ rebase the FSP with Intel's BCT (tool).
+
+config DISPLAY_FAST_BOOT_DATA
+ bool "Display fast boot data"
+ default n
+
+config DISPLAY_HOBS
+ bool "Display hand-off-blocks (HOBs)"
+ default n
+
+config DISPLAY_VBT
+ bool "Display Video BIOS Table (VBT)"
+ default n
+
+config DISPLAY_FSP_ENTRY_POINTS
+ bool "Display FSP entry points"
+ default n
+
+config DISPLAY_UPD_DATA
+ bool "Display UPD data"
+ default n
+ help
+ Display the user specified product data prior to memory
+ initialization.
+
+config FSP_USES_UPD
+ bool
+ default n
+ help
+ If this FSP uses UPD/VPD data regions, select this in the chipset
+ Kconfig.
+
+config GOP_SUPPORT
+ bool "Enable GOP support"
+ default n
+
+config ROMSTAGE_RAM_STACK_SIZE
+ hex "Size of the romstage RAM stack in bytes"
+ default 0x5000
+
+config USE_GENERIC_FSP_CAR_INC
+ bool
+ default n
+ help
+ The chipset can select this to use a generic cache_as_ram.inc file
+ that should be good for all FSP based platforms.
+
+config VBT_FILE
+ string "GOP Video BIOS table binary path"
+ depends on GOP_SUPPORT
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/vbt.bin"
+
+endif #PLATFORM_USES_FSP1_1
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/Makefile.inc b/src/vendorcode/intel/fsp/fsp1_1/common/Makefile.inc
new file mode 100644
index 0000000..3f214cb
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/Makefile.inc
@@ -0,0 +1,59 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2014 Sage Electronic Engineering, LLC.
+# Copyright (C) 2015 Intel Corp.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y)
+
+verstage-y += car.c
+verstage-y += fsp_util.c
+verstage-y += verstage.c
+
+romstage-y += car.c
+romstage-y += fsp_util.c
+romstage-y += hob.c
+romstage-y += raminit.c
+romstage-y += romstage.c
+romstage-$(CONFIG_SEPARATE_VERSTAGE) += romstage_after_verstage.S
+romstage-y += stack.c
+romstage-y += stage_cache.c
+
+ramstage-$(CONFIG_GOP_SUPPORT) += fsp_gop.c
+ramstage-y += fsp_relocate.c
+ramstage-y += fsp_util.c
+ramstage-y += hob.c
+ramstage-y += ramstage.c
+ramstage-y += stage_cache.c
+ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
+
+CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include
+
+cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_1/cache_as_ram.inc
+
+
+# Add the GOP Video BIOS Table to the cbfs image
+cbfs-files-$(CONFIG_GOP_SUPPORT) += vbt.bin
+vbt.bin-file := $(call strip_quotes,$(CONFIG_VBT_FILE))
+vbt.bin-type := optionrom
+
+
+# Add the FSP binary to the cbfs image
+ifeq ($(CONFIG_HAVE_FSP_BIN),y)
+cbfs-files-y += fsp.bin
+fsp.bin-file := $(call strip_quotes,$(CONFIG_FSP_FILE))
+fsp.bin-position := $(CONFIG_FSP_LOC)
+fsp.bin-type := fsp
+endif
+
+endif
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/after_raminit.S b/src/vendorcode/intel/fsp/fsp1_1/common/after_raminit.S
new file mode 100644
index 0000000..122c0bf
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/after_raminit.S
@@ -0,0 +1,171 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich(a)gmail.com>
+ * Copyright (C) 2007-2008 coresystems GmbH
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/cache.h>
+#include <cpu/x86/post_code.h>
+
+/*
+ * This is the common entry point after DRAM has been initialized.
+ */
+ /*
+ * eax: New stack address
+ */
+
+ /* Switch to the stack in RAM */
+ movl %eax, %esp
+
+#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
+
+ /* SOC specific NEM */
+ #include <soc/car_teardown.S>
+
+#else
+.extern fih_car
+
+ post_code(POST_FSP_TEMP_RAM_EXIT)
+
+ /* Calculate TempRamExit entry into FSP */
+ movl fih_car, %ebp
+ mov 0x40(%ebp), %eax
+ add 0x1c(%ebp), %eax
+
+ /* Build the call frame */
+ pushl $0
+
+ /* Call TempRamExit */
+ call *%eax
+ add $4, %esp
+ cmp $0, %eax
+ jz 1f
+ /*
+ * Failures for post code BC - failed in TempRamExit
+ *
+ * 0x00 - FSP_SUCCESS: Temp RAM Exit completed successfully.
+ * 0x02 - FSP_INVALID_PARAMETER: Input parameters are invalid.
+ * 0x03 - FSP_UNSUPPORTED: The FSP calling conditions were not met.
+ * 0x07 - FSP_DEVICE_ERROR: Temp RAM Exit failed.
+ */
+ movb $0xBC, %ah
+ jmp .Lhlt
+1:
+#endif
+ /* Display the MTRRs */
+ call soc_display_mtrrs
+
+ /*
+ * The stack contents are initialized in src/soc/intel/common/stack.c
+ * to be the following:
+ *
+ * *
+ * *
+ * *
+ * +36: MTRR mask 1 63:32
+ * +32: MTRR mask 1 31:0
+ * +28: MTRR base 1 63:32
+ * +24: MTRR base 1 31:0
+ * +20: MTRR mask 0 63:32
+ * +16: MTRR mask 0 31:0
+ * +12: MTRR base 0 63:32
+ * +8: MTRR base 0 31:0
+ * +4: Number of MTRRs to setup (described above)
+ * +0: Number of variable MTRRs to clear
+ */
+
+#if IS_ENABLED(CONFIG_SOC_SETS_MTRRS)
+ push %esp
+ call soc_set_mtrrs
+
+ /* eax: new top_of_stack with setup_stack_and_mtrrs data removed */
+ movl %eax, %esp
+#else
+ /* Clear all of the variable MTRRs. */
+ popl %ebx
+ movl $MTRR_PHYS_BASE(0), %ecx
+ clr %eax
+ clr %edx
+
+1:
+ testl %ebx, %ebx
+ jz 1f
+ wrmsr /* Write MTRR base. */
+ inc %ecx
+ wrmsr /* Write MTRR mask. */
+ inc %ecx
+ dec %ebx
+ jmp 1b
+
+1:
+ /* Get number of MTRRs. */
+ popl %ebx
+ movl $MTRR_PHYS_BASE(0), %ecx
+2:
+ testl %ebx, %ebx
+ jz 2f
+
+ /* Low 32 bits of MTRR base. */
+ popl %eax
+ /* Upper 32 bits of MTRR base. */
+ popl %edx
+ /* Write MTRR base. */
+ wrmsr
+ inc %ecx
+ /* Low 32 bits of MTRR mask. */
+ popl %eax
+ /* Upper 32 bits of MTRR mask. */
+ popl %edx
+ /* Write MTRR mask. */
+ wrmsr
+ inc %ecx
+
+ dec %ebx
+ jmp 2b
+2:
+#endif /* CONFIG_SOC_SETS_MTRRS */
+
+ post_code(0x39)
+
+ /* And enable cache again after setting MTRRs. */
+ movl %cr0, %eax
+ andl $~(CR0_CacheDisable | CR0_NoWriteThrough), %eax
+ movl %eax, %cr0
+
+ post_code(0x3a)
+
+#if IS_ENABLED(CONFIG_SOC_SETS_MTRRS)
+ call soc_enable_mtrrs
+#else
+ /* Enable MTRR. */
+ movl $MTRR_DEF_TYPE_MSR, %ecx
+ rdmsr
+ orl $MTRR_DEF_TYPE_EN, %eax
+ wrmsr
+#endif /* CONFIG_SOC_SETS_MTRRS */
+
+ post_code(0x3b)
+
+ /* Invalidate the cache again. */
+ invd
+
+ post_code(0x3c)
+
+__main:
+ post_code(POST_PREPARE_RAMSTAGE)
+ cld /* Clear direction flag. */
+ call after_cache_as_ram
+
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/cache_as_ram.inc b/src/vendorcode/intel/fsp/fsp1_1/common/cache_as_ram.inc
new file mode 100644
index 0000000..6e7e50b
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/cache_as_ram.inc
@@ -0,0 +1,225 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich(a)gmail.com>
+ * Copyright (C) 2007-2008 coresystems GmbH
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * Replacement for cache_as_ram.inc when using the FSP binary. This code
+ * locates the FSP binary, initializes the cache as RAM and performs the
+ * first stage of initialization. Next this code switches the stack from
+ * the cache to RAM and then disables the cache as RAM. Finally this code
+ * performs the final stage of initialization.
+ */
+
+#include <rules.h>
+
+#define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */
+
+ /*
+ * eax: BIST value
+ * mm0: low 32-bits of TSC value
+ * mm1: high 32-bits of TSC value
+ */
+ movl %eax, %edi
+cache_as_ram:
+ post_code(0x20)
+
+#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
+
+ /*
+ * SOC specific setup
+ * NOTE: This has to preserve the registers
+ * mm0, mm1 and edi.
+ */
+ #include <soc/car_setup.S>
+
+ post_code(0x28)
+
+#endif
+
+ /*
+ * Find the FSP binary in cbfs.
+ * Make a fake stack that has the return value back to this code.
+ */
+ lea fake_fsp_stack, %esp
+ jmp find_fsp
+find_fsp_ret:
+ /* Save the FSP location */
+ mov %eax, %ebp
+
+ /*
+ * Only when a valid FSP binary is found at CONFIG_FSP_LOC is
+ * the returned FSP_INFO_HEADER structure address above the base
+ * address of FSP binary specified by the CONFIG_FSP_LOC value.
+ * All of the error values are in the 0x8xxxxxxx range which are
+ * below the CONFIG_FSP_LOC value.
+ */
+ cmp $CONFIG_FSP_LOC, %eax
+ jbe halt1
+
+ post_code(POST_FSP_TEMP_RAM_INIT)
+
+ /* Calculate entry into FSP */
+ mov 0x30(%ebp), %eax /* Load TempRamInitEntry */
+ add 0x1c(%ebp), %eax /* add in the offset for FSP */
+
+ /*
+ * Pass early init variables on a fake stack (no memory yet)
+ * as well as the return location
+ */
+ lea CAR_init_stack, %esp
+
+ /*
+ * BIST value is zero
+ * eax: TempRamInitApi address
+ * ebp: FSP_INFO_HEADER address
+ * edi: BIST value
+ * esi: Not used
+ * mm0: low 32-bits of TSC value
+ * mm1: high 32-bits of TSC value
+ */
+
+ /* call FSP binary to setup temporary stack */
+ jmp *%eax
+
+CAR_init_done:
+ addl $4, %esp
+
+ /*
+ * ebp: FSP_INFO_HEADER address
+ * ecx: Temp RAM base
+ * edx: Temp RAM top
+ * edi: BIST value
+ * mm0: low 32-bits of TSC value
+ * mm1: high 32-bits of TSC value
+ */
+
+ cmp $0, %eax
+ jne halt2
+
+ /* Setup bootloader stack */
+ movl %edx, %esp
+
+ /*
+ * ebp: FSP_INFO_HEADER address
+ * ecx: Temp RAM base
+ * edx: Temp RAM top
+ * edi: BIST value
+ * esp: Top of stack in temp RAM
+ * mm0: low 32-bits of TSC value
+ * mm1: high 32-bits of TSC value
+ */
+
+ /* Create cache_as_ram_params on stack */
+ pushl %edx /* bootloader CAR end */
+ pushl %ecx /* bootloader CAR begin */
+ pushl %ebp /* FSP_INFO_HEADER */
+ pushl %edi /* bist */
+ movd %mm1, %eax
+ pushl %eax /* tsc[63:32] */
+ movd %mm0, %eax
+ pushl %eax /* tsc[31:0] */
+ pushl %esp /* pointer to cache_as_ram_params */
+
+ /* Save FSP_INFO_HEADER location in ebx */
+ mov %ebp, %ebx
+
+ /* Coreboot assumes stack/heap region will be zero */
+ cld
+ movl %ecx, %edi
+ neg %ecx
+ /* Only clear up to current stack value. */
+ add %esp, %ecx
+ shrl $2, %ecx
+ xorl %eax, %eax
+ rep stosl
+
+before_romstage:
+ post_code(0x2A)
+
+ /* Call cache_as_ram_main(struct cache_as_ram_params *) */
+ call cache_as_ram_main
+
+/* One will never return from cache_as_ram_main() in verstage so there's
+ * no such thing as after ram init. */
+#if !ENV_VERSTAGE
+#include "after_raminit.S"
+#endif
+
+ movb $0x69, %ah
+ jmp .Lhlt
+
+halt1:
+ /*
+ * Failures for postcode 0xBA - failed in fsp_fih_early_find()
+ *
+ * Values are:
+ * 0x01 - FV signature, "_FVH" not present
+ * 0x02 - FFS GUID not present
+ * 0x03 - FSP INFO Header not found
+ * 0x04 - ImageBase does not equal CONFIG_FSP_LOC - Is the FSP rebased to
+ * a different location, or does it need to be?
+ * 0x05 - FSP INFO Header signature "FSPH" not found
+ * 0x06 - FSP Image ID is not the expected ID.
+ */
+ movb $0xBA, %ah
+ jmp .Lhlt
+
+halt2:
+ /*
+ * Failures for postcode 0xBB - failed in the FSP:
+ *
+ * 0x00 - FSP_SUCCESS: Temp RAM was initialized successfully.
+ * 0x02 - FSP_INVALID_PARAMETER: Input parameters are invalid.
+ * 0x03 - FSP_UNSUPPORTED: The FSP calling conditions were not met.
+ * 0x07 - FSP_DEVICE_ERROR: Temp RAM initialization failed
+ * 0x0E - FSP_NOT_FOUND: No valid microcode was found in the microcode region.
+ * 0x14 - FSP_ALREADY_STARTED: Temp RAM initialization has been invoked
+ */
+ movb $0xBB, %ah
+ jmp .Lhlt
+
+.Lhlt:
+ xchg %al, %ah
+#if IS_ENABLED(CONFIG_POST_IO)
+ outb %al, $CONFIG_POST_IO_PORT
+#else
+ post_code(POST_DEAD_CODE)
+#endif
+ movl $LHLT_DELAY, %ecx
+.Lhlt_Delay:
+ outb %al, $0xED
+ loop .Lhlt_Delay
+ jmp .Lhlt
+
+/*
+ * esp is set to this location so that the call into and return from the FSP
+ * in find_fsp will work.
+ */
+ .align 4
+fake_fsp_stack:
+ .long find_fsp_ret
+ .long CONFIG_FSP_LOC /* FSP base address */
+
+CAR_init_params:
+ .long CONFIG_CPU_MICROCODE_CBFS_LOC /* Microcode Location */
+ .long CONFIG_CPU_MICROCODE_CBFS_LEN /* Microcode Length */
+ .long 0xFFFFFFFF - CONFIG_ROM_SIZE + 1 /* Firmware Location */
+ .long CONFIG_ROM_SIZE /* Total Firmware Length */
+
+CAR_init_stack:
+ .long CAR_init_done
+ .long CAR_init_params
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/car.c b/src/vendorcode/intel/fsp/fsp1_1/common/car.c
new file mode 100644
index 0000000..b525a62
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/car.c
@@ -0,0 +1,123 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/early_variables.h>
+#include <console/console.h>
+#include <ec/google/chromeec/ec.h>
+#include <fsp/car.h>
+#include <fsp/util.h>
+#include <program_loading.h>
+#include <soc/intel/common/util.h>
+#include <timestamp.h>
+
+FSP_INFO_HEADER *fih_car CAR_GLOBAL;
+
+/* Save FSP_INFO_HEADER for TempRamExit() call in assembly. */
+static inline void set_fih_car(FSP_INFO_HEADER *fih)
+{
+ /* This variable is written in the raw form because it's only
+ * ever accessed in code that that has the cache-as-ram enabled. The
+ * assembly routine which tears down cache-as-ram utilizes this
+ * variable for determining where to find FSP. */
+ fih_car = fih;
+}
+
+asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params)
+{
+ /* Initialize timestamp book keeping only once. */
+ timestamp_init(car_params->tsc);
+
+ /* Call into pre-console init code then initialize console. */
+ car_soc_pre_console_init();
+ car_mainboard_pre_console_init();
+ console_init();
+
+ printk(BIOS_DEBUG, "FSP TempRamInit successful\n");
+
+ printk(BIOS_SPEW, "bist: 0x%08x\n", car_params->bist);
+ printk(BIOS_SPEW, "tsc: 0x%016llx\n", car_params->tsc);
+
+ if (car_params->bootloader_car_start != CONFIG_DCACHE_RAM_BASE ||
+ car_params->bootloader_car_end !=
+ (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)) {
+ printk(BIOS_INFO, "CAR mismatch: %08x--%08x vs %08lx--%08lx\n",
+ CONFIG_DCACHE_RAM_BASE,
+ CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE,
+ (long)car_params->bootloader_car_start,
+ (long)car_params->bootloader_car_end);
+ }
+
+ car_soc_post_console_init();
+ car_mainboard_post_console_init();
+
+ /* Ensure the EC is in the right mode for recovery */
+ if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) &&
+ !IS_ENABLED(CONFIG_SEPARATE_VERSTAGE))
+ google_chromeec_early_init();
+
+ set_fih_car(car_params->fih);
+
+ /* Return new stack value in ram back to assembly stub. */
+ return cache_as_ram_stage_main(car_params->fih);
+}
+
+/* Entry point taken when romstage is called after a separate verstage. */
+asmlinkage void *romstage_after_verstage(void)
+{
+ /* Need to locate the current FSP_INFO_HEADER. The cache-as-ram
+ * is still enabled. We can directly access work buffer here. */
+ FSP_INFO_HEADER *fih;
+ struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin");
+
+ console_init();
+
+ if (prog_locate(&fsp)) {
+ fih = NULL;
+ printk(BIOS_ERR, "Unable to locate %s\n", prog_name(&fsp));
+ } else
+ /* This leaks a mapping which this code assumes is benign as
+ * the flash is memory mapped CPU's address space. */
+ fih = find_fsp((uintptr_t)rdev_mmap_full(prog_rdev(&fsp)));
+
+ set_fih_car(fih);
+
+ /* Return new stack value in ram back to assembly stub. */
+ return cache_as_ram_stage_main(fih);
+}
+
+asmlinkage void after_cache_as_ram(void *chipset_context)
+{
+ timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_END);
+ printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n");
+ soc_display_mtrrs();
+
+ after_cache_as_ram_stage();
+}
+
+void __attribute__((weak)) car_mainboard_pre_console_init(void)
+{
+}
+
+void __attribute__((weak)) car_soc_pre_console_init(void)
+{
+}
+
+void __attribute__((weak)) car_mainboard_post_console_init(void)
+{
+}
+
+void __attribute__((weak)) car_soc_post_console_init(void)
+{
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/fsp_gop.c b/src/vendorcode/intel/fsp/fsp1_1/common/fsp_gop.c
new file mode 100644
index 0000000..f531d76
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/fsp_gop.c
@@ -0,0 +1,96 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <boot/coreboot_tables.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/util.h>
+#include <lib.h>
+
+/* Reading VBT table from flash */
+const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len)
+{
+ size_t vbt_size;
+ union {
+ const optionrom_vbt_t *data;
+ uint32_t *signature;
+ } vbt;
+
+ /* Locate the vbt file in cbfs */
+ vbt.data = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_OPTIONROM,
+ &vbt_size);
+ if (!vbt.data) {
+ printk(BIOS_INFO,
+ "FSP_INFO: VBT data file (vbt.bin) not found in CBFS");
+ return NULL;
+ }
+
+ /* Validate the vbt file */
+ if (*vbt.signature != VBT_SIGNATURE) {
+ printk(BIOS_WARNING,
+ "FSP_WARNING: Invalid signature in VBT data file (vbt.bin)!\n");
+ return NULL;
+ }
+ *vbt_len = vbt_size;
+ printk(BIOS_DEBUG, "FSP_INFO: VBT found at %p, 0x%08x bytes\n",
+ vbt.data, *vbt_len);
+
+#if IS_ENABLED(CONFIG_DISPLAY_VBT)
+ /* Display the vbt file contents */
+ printk(BIOS_DEBUG, "VBT Data:\n");
+ hexdump(vbt.data, *vbt_len);
+ printk(BIOS_DEBUG, "\n");
+#endif
+
+ /* Return the pointer to the vbt file data */
+ return vbt.data;
+}
+
+void lb_framebuffer(struct lb_header *header)
+{
+ struct lb_framebuffer *framebuffer;
+ framebuffer = (struct lb_framebuffer *)lb_new_record(header);
+
+ VOID *hob_list_ptr;
+ hob_list_ptr = get_hob_list();
+ const EFI_GUID vbt_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
+ u32 *vbt_hob;
+ EFI_PEI_GRAPHICS_INFO_HOB *vbt_gop;
+ vbt_hob = get_next_guid_hob(&vbt_guid, hob_list_ptr);
+ if (vbt_hob == NULL) {
+ printk(BIOS_ERR, "FSP_ERR: Graphics Data HOB is not present\n");
+ return;
+ } else {
+ printk(BIOS_DEBUG, "FSP_DEBUG: Graphics Data HOB present\n");
+ vbt_gop = GET_GUID_HOB_DATA(vbt_hob);
+ }
+
+ framebuffer->physical_address = vbt_gop->FrameBufferBase;
+ framebuffer->x_resolution = vbt_gop->GraphicsMode.HorizontalResolution;
+ framebuffer->y_resolution = vbt_gop->GraphicsMode.VerticalResolution;
+ framebuffer->bytes_per_line = vbt_gop->GraphicsMode.PixelsPerScanLine
+ * 4;
+ framebuffer->bits_per_pixel = 32;
+ framebuffer->red_mask_pos = 16;
+ framebuffer->red_mask_size = 8;
+ framebuffer->green_mask_pos = 8;
+ framebuffer->green_mask_size = 8;
+ framebuffer->blue_mask_pos = 0;
+ framebuffer->blue_mask_size = 8;
+ framebuffer->reserved_mask_pos = 24;
+ framebuffer->reserved_mask_size = 8;
+ framebuffer->tag = LB_TAG_FRAMEBUFFER;
+ framebuffer->size = sizeof(*framebuffer);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/fsp_relocate.c b/src/vendorcode/intel/fsp/fsp1_1/common/fsp_relocate.c
new file mode 100644
index 0000000..89d7cd9
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/fsp_relocate.c
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <cbmem.h>
+#include <commonlib/fsp1_1.h>
+#include <fsp/util.h>
+
+int fsp_relocate(struct prog *fsp_relocd, const struct region_device *fsp_src)
+{
+ void *new_loc;
+ void *fih;
+ ssize_t fih_offset;
+ size_t size = region_device_sz(fsp_src);
+
+ new_loc = cbmem_add(CBMEM_ID_REFCODE, size);
+
+ if (new_loc == NULL) {
+ printk(BIOS_ERR, "ERROR: Unable to load FSP into memory.\n");
+ return -1;
+ }
+
+ if (rdev_readat(fsp_src, new_loc, 0, size) != size) {
+ printk(BIOS_ERR, "ERROR: Can't read FSP's region device.\n");
+ return -1;
+ }
+
+ fih_offset = fsp1_1_relocate((uintptr_t)new_loc, new_loc, size);
+
+ if (fih_offset <= 0) {
+ printk(BIOS_ERR, "ERROR: FSP relocation faiulre.\n");
+ return -1;
+ }
+
+ fih = (void *)((uint8_t *)new_loc + fih_offset);
+
+ prog_set_area(fsp_relocd, new_loc, size);
+ prog_set_entry(fsp_relocd, fih, NULL);
+
+ return 0;
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/fsp_util.c b/src/vendorcode/intel/fsp/fsp1_1/common/fsp_util.c
new file mode 100644
index 0000000..1aa3aec
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/fsp_util.c
@@ -0,0 +1,299 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootstate.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <fsp/util.h>
+#include <timestamp.h>
+
+/* Locate the FSP binary in the coreboot filesystem */
+FSP_INFO_HEADER *find_fsp(uintptr_t fsp_base_address)
+{
+ union {
+ EFI_FFS_FILE_HEADER *ffh;
+ FSP_INFO_HEADER *fih;
+ EFI_FIRMWARE_VOLUME_EXT_HEADER *fveh;
+ EFI_FIRMWARE_VOLUME_HEADER *fvh;
+ EFI_RAW_SECTION *rs;
+ u8 *u8;
+ u32 u32;
+ } fsp_ptr;
+ static const union {
+ char str_id[8];
+ u32 int_id[2];
+ } fsp_id = {
+ .str_id = CONFIG_FSP_IMAGE_ID_STRING
+ };
+
+ u32 *image_id;
+
+ for (;;) {
+ /* Get the FSP binary base address in CBFS */
+ fsp_ptr.u32 = fsp_base_address;
+
+ /* Check the FV signature, _FVH */
+ if (fsp_ptr.fvh->Signature != 0x4856465F) {
+ fsp_ptr.u8 = (u8 *)ERROR_NO_FV_SIG;
+ break;
+ }
+
+ /* Locate the file header which follows the FV header. */
+ fsp_ptr.u8 += fsp_ptr.fvh->ExtHeaderOffset;
+ fsp_ptr.u8 += fsp_ptr.fveh->ExtHeaderSize;
+ fsp_ptr.u8 = (u8 *)ALIGN_UP(fsp_ptr.u32, 8);
+
+ /* Check the FFS GUID */
+ if ((((u32 *)&fsp_ptr.ffh->Name)[0] != 0x912740BE)
+ || (((u32 *)&fsp_ptr.ffh->Name)[1] != 0x47342284)
+ || (((u32 *)&fsp_ptr.ffh->Name)[2] != 0xB08471B9)
+ || (((u32 *)&fsp_ptr.ffh->Name)[3] != 0x0C3F3527)) {
+ fsp_ptr.u8 = (u8 *)ERROR_NO_FFS_GUID;
+ break;
+ }
+
+ /* Locate the Raw Section Header */
+ fsp_ptr.u8 += sizeof(EFI_FFS_FILE_HEADER);
+
+ if (fsp_ptr.rs->Type != EFI_SECTION_RAW) {
+ fsp_ptr.u8 = (u8 *)ERROR_NO_INFO_HEADER;
+ break;
+ }
+
+ /* Locate the FSP INFO Header which follows the Raw Header. */
+ fsp_ptr.u8 += sizeof(EFI_RAW_SECTION);
+
+ /* Verify that the FSP base address.*/
+ if (fsp_ptr.fih->ImageBase != fsp_base_address) {
+ fsp_ptr.u8 = (u8 *)ERROR_IMAGEBASE_MISMATCH;
+ break;
+ }
+
+ /* Verify the FSP Signature */
+ if (fsp_ptr.fih->Signature != FSP_SIG) {
+ fsp_ptr.u8 = (u8 *)ERROR_INFO_HEAD_SIG_MISMATCH;
+ break;
+ }
+
+ /* Verify the FSP ID */
+ image_id = (u32 *)&fsp_ptr.fih->ImageId[0];
+ if ((image_id[0] != fsp_id.int_id[0])
+ || (image_id[1] != fsp_id.int_id[1]))
+ fsp_ptr.u8 = (u8 *)ERROR_FSP_SIG_MISMATCH;
+ break;
+ }
+
+ return fsp_ptr.fih;
+}
+
+void print_fsp_info(FSP_INFO_HEADER *fsp_header)
+{
+ u8 *fsp_base;
+
+ fsp_base = (u8 *)fsp_header->ImageBase;
+ printk(BIOS_SPEW, "FSP_INFO_HEADER: %p\n", fsp_header);
+ printk(BIOS_INFO, "FSP Signature: %c%c%c%c%c%c%c%c\n",
+ fsp_header->ImageId[0], fsp_header->ImageId[1],
+ fsp_header->ImageId[2], fsp_header->ImageId[3],
+ fsp_header->ImageId[4], fsp_header->ImageId[5],
+ fsp_header->ImageId[6], fsp_header->ImageId[7]);
+ printk(BIOS_INFO, "FSP Header Version: %d\n",
+ fsp_header->HeaderRevision);
+ printk(BIOS_INFO, "FSP Revision: %d.%d.%d.%d\n",
+ (u8)((fsp_header->ImageRevision >> 24) & 0xff),
+ (u8)((fsp_header->ImageRevision >> 16) & 0xff),
+ (u8)((fsp_header->ImageRevision >> 8) & 0xff),
+ (u8)(fsp_header->ImageRevision & 0xff));
+#if IS_ENABLED(CONFIG_DISPLAY_FSP_ENTRY_POINTS)
+ printk(BIOS_SPEW, "FSP Entry Points:\n");
+ printk(BIOS_SPEW, " 0x%p: Image Base\n", fsp_base);
+ printk(BIOS_SPEW, " 0x%p: TempRamInit\n",
+ &fsp_base[fsp_header->TempRamInitEntryOffset]);
+ printk(BIOS_SPEW, " 0x%p: FspInit\n",
+ &fsp_base[fsp_header->FspInitEntryOffset]);
+ if (fsp_header->HeaderRevision >= FSP_HEADER_REVISION_2) {
+ printk(BIOS_SPEW, " 0x%p: MemoryInit\n",
+ &fsp_base[fsp_header->FspMemoryInitEntryOffset]);
+ printk(BIOS_SPEW, " 0x%p: TempRamExit\n",
+ &fsp_base[fsp_header->TempRamExitEntryOffset]);
+ printk(BIOS_SPEW, " 0x%p: SiliconInit\n",
+ &fsp_base[fsp_header->FspSiliconInitEntryOffset]);
+ }
+ printk(BIOS_SPEW, " 0x%p: NotifyPhase\n",
+ &fsp_base[fsp_header->NotifyPhaseEntryOffset]);
+ printk(BIOS_SPEW, " 0x%p: Image End\n",
+ &fsp_base[fsp_header->ImageSize]);
+#endif
+}
+
+void fsp_notify(u32 phase)
+{
+ FSP_NOTIFY_PHASE notify_phase_proc;
+ NOTIFY_PHASE_PARAMS notify_phase_params;
+ EFI_STATUS status;
+ FSP_INFO_HEADER *fsp_header_ptr;
+
+ fsp_header_ptr = fsp_get_fih();
+ if (fsp_header_ptr == NULL) {
+ fsp_header_ptr = (void *)find_fsp(CONFIG_FSP_LOC);
+ if ((u32)fsp_header_ptr < 0xff) {
+ /* output something in case there is no serial */
+ post_code(0x4F);
+ die("Can't find the FSP!\n");
+ }
+ }
+
+ /* call FSP PEI to Notify PostPciEnumeration */
+ notify_phase_proc = (FSP_NOTIFY_PHASE)(fsp_header_ptr->ImageBase +
+ fsp_header_ptr->NotifyPhaseEntryOffset);
+ notify_phase_params.Phase = phase;
+
+ if (phase == EnumInitPhaseReadyToBoot) {
+ timestamp_add_now(TS_FSP_BEFORE_FINALIZE);
+ post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
+ } else {
+ timestamp_add_now(TS_FSP_BEFORE_ENUMERATE);
+ post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
+ }
+
+ status = notify_phase_proc(¬ify_phase_params);
+
+ timestamp_add_now(phase == EnumInitPhaseReadyToBoot ?
+ TS_FSP_AFTER_FINALIZE : TS_FSP_AFTER_ENUMERATE);
+
+ if (status != 0)
+ printk(BIOS_ERR, "FSP API NotifyPhase failed for phase 0x%x with status: 0x%x\n",
+ phase, status);
+}
+
+static void fsp_notify_boot_state_callback(void *arg)
+{
+ u32 phase = (u32)arg;
+
+ printk(BIOS_SPEW, "Calling FspNotify(0x%08x)\n", phase);
+ fsp_notify(phase);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT,
+ fsp_notify_boot_state_callback,
+ (void *)EnumInitPhaseAfterPciEnumeration);
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
+ fsp_notify_boot_state_callback,
+ (void *)EnumInitPhaseReadyToBoot);
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
+ fsp_notify_boot_state_callback,
+ (void *)EnumInitPhaseReadyToBoot);
+
+struct fsp_runtime {
+ uint32_t fih;
+ uint32_t hob_list;
+} __attribute__((packed));
+
+
+void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list)
+{
+ struct fsp_runtime *fspr;
+
+ fspr = cbmem_add(CBMEM_ID_FSP_RUNTIME, sizeof(*fspr));
+
+ if (fspr == NULL)
+ die("Can't save FSP runtime information.\n");
+
+ fspr->fih = (uintptr_t)fih;
+ fspr->hob_list = (uintptr_t)hob_list;
+}
+
+FSP_INFO_HEADER *fsp_get_fih(void)
+{
+ struct fsp_runtime *fspr;
+
+ fspr = cbmem_find(CBMEM_ID_FSP_RUNTIME);
+
+ if (fspr == NULL)
+ return NULL;
+
+ return (void *)(uintptr_t)fspr->fih;
+}
+
+void *fsp_get_hob_list(void)
+{
+ struct fsp_runtime *fspr;
+
+ fspr = cbmem_find(CBMEM_ID_FSP_RUNTIME);
+
+ if (fspr == NULL)
+ return NULL;
+
+ return (void *)(uintptr_t)fspr->hob_list;
+}
+
+void fsp_update_fih(FSP_INFO_HEADER *fih)
+{
+ struct fsp_runtime *fspr;
+
+ fspr = cbmem_find(CBMEM_ID_FSP_RUNTIME);
+
+ if (fspr == NULL)
+ die("Can't update FSP runtime information.\n");
+
+ fspr->fih = (uintptr_t)fih;
+}
+
+void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
+ uint64_t new)
+{
+ if (old == new) {
+ switch (size) {
+ case 1:
+ printk(BIOS_SPEW, " 0x%02llx: %s\n", new, name);
+ break;
+
+ case 2:
+ printk(BIOS_SPEW, " 0x%04llx: %s\n", new, name);
+ break;
+
+ case 4:
+ printk(BIOS_SPEW, " 0x%08llx: %s\n", new, name);
+ break;
+
+ case 8:
+ printk(BIOS_SPEW, " 0x%016llx: %s\n", new, name);
+ break;
+ }
+ } else {
+ switch (size) {
+ case 1:
+ printk(BIOS_SPEW, " 0x%02llx --> 0x%02llx: %s\n", old,
+ new, name);
+ break;
+
+ case 2:
+ printk(BIOS_SPEW, " 0x%04llx --> 0x%04llx: %s\n", old,
+ new, name);
+ break;
+
+ case 4:
+ printk(BIOS_SPEW, " 0x%08llx --> 0x%08llx: %s\n", old,
+ new, name);
+ break;
+
+ case 8:
+ printk(BIOS_SPEW, " 0x%016llx --> 0x%016llx: %s\n",
+ old, new, name);
+ break;
+ }
+ }
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/hob.c b/src/vendorcode/intel/fsp/fsp1_1/common/hob.c
new file mode 100644
index 0000000..c0816e9
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/hob.c
@@ -0,0 +1,325 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/early_variables.h>
+#include <arch/hlt.h>
+#include <bootstate.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <fsp/util.h>
+#include <ip_checksum.h>
+#include <lib.h> // hexdump
+#include <string.h>
+
+/* Compares two EFI GUIDs. Returns true of the GUIDs match, false otherwise. */
+static bool compare_guid(const EFI_GUID *guid1, const EFI_GUID *guid2)
+{
+ return !memcmp(guid1, guid2, sizeof(EFI_GUID));
+}
+
+/* Returns the pointer to the HOB list. */
+void *get_hob_list(void)
+{
+ void *hob_list;
+
+ hob_list = fsp_get_hob_list();
+ if (hob_list == NULL)
+ die("Call fsp_set_runtime() before this call!\n");
+ return hob_list;
+}
+
+/* Returns the next instance of a HOB type from the starting HOB. */
+void *get_next_hob(uint16_t type, const void *hob_start)
+{
+ EFI_PEI_HOB_POINTERS hob;
+
+ if (!hob_start)
+ return NULL;
+
+ hob.Raw = (UINT8 *)hob_start;
+
+ /* Parse the HOB list until end of list or matching type is found. */
+ while (!END_OF_HOB_LIST(hob.Raw)) {
+ if (hob.Header->HobType == type)
+ return hob.Raw;
+ if (GET_HOB_LENGTH(hob.Raw) < sizeof(*hob.Header))
+ break;
+ hob.Raw = GET_NEXT_HOB(hob.Raw);
+ }
+ return NULL;
+}
+
+/* Returns the first instance of a HOB type among the whole HOB list. */
+void *get_first_hob(uint16_t type)
+{
+ return get_next_hob(type, get_hob_list());
+}
+
+/* Returns the next instance of the matched GUID HOB from the starting HOB. */
+void *get_next_guid_hob(const EFI_GUID * guid, const void *hob_start)
+{
+ EFI_PEI_HOB_POINTERS hob;
+
+ hob.Raw = (uint8_t *)hob_start;
+ while ((hob.Raw = get_next_hob(EFI_HOB_TYPE_GUID_EXTENSION, hob.Raw))
+ != NULL) {
+ if (compare_guid(guid, &hob.Guid->Name))
+ break;
+ hob.Raw = GET_NEXT_HOB(hob.Raw);
+ }
+ return hob.Raw;
+}
+
+/*
+ * Returns the first instance of the matched GUID HOB among the whole HOB list.
+ */
+void *get_first_guid_hob(const EFI_GUID *guid)
+{
+ return get_next_guid_hob(guid, get_hob_list());
+}
+
+/*
+ * Returns the next instance of the matching resource HOB from the starting HOB.
+ */
+void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start)
+{
+ EFI_PEI_HOB_POINTERS hob;
+
+ hob.Raw = (UINT8 *)hob_start;
+ while ((hob.Raw = get_next_hob(EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
+ hob.Raw)) != NULL) {
+ if (compare_guid(guid, &hob.ResourceDescriptor->Owner))
+ break;
+ hob.Raw = GET_NEXT_HOB(hob.Raw);
+ }
+ return hob.Raw;
+}
+
+/*
+ * Returns the first instance of the matching resource HOB among the whole HOB
+ * list.
+ */
+void *get_first_resource_hob(const EFI_GUID *guid)
+{
+ return get_next_resource_hob(guid, get_hob_list());
+}
+
+static void print_hob_mem_attributes(void *hob_ptr)
+{
+ EFI_MEMORY_TYPE hob_mem_type;
+ EFI_HOB_MEMORY_ALLOCATION *hob_memory_ptr = hob_ptr;
+ u64 hob_mem_addr = hob_memory_ptr->AllocDescriptor.MemoryBaseAddress;
+ u64 hob_mem_length = hob_memory_ptr->AllocDescriptor.MemoryLength;
+
+ hob_mem_type = hob_memory_ptr->AllocDescriptor.MemoryType;
+
+ static const char *hob_mem_type_names[15] = {
+ [EfiReservedMemoryType] = "EfiReservedMemoryType",
+ [EfiLoaderCode] = "EfiLoaderCode",
+ [EfiLoaderData] = "EfiLoaderData",
+ [EfiBootServicesCode] = "EfiBootServicesCode",
+ [EfiBootServicesData] = "EfiBootServicesData",
+ [EfiRuntimeServicesCode] = "EfiRuntimeServicesCode",
+ [EfiRuntimeServicesData] = "EfiRuntimeServicesData",
+ [EfiConventionalMemory] = "EfiConventionalMemory",
+ [EfiUnusableMemory] = "EfiUnusableMemory",
+ [EfiACPIReclaimMemory] = "EfiACPIReclaimMemory",
+ [EfiACPIMemoryNVS] = "EfiACPIMemoryNVS",
+ [EfiMemoryMappedIO] = "EfiMemoryMappedIO",
+ [EfiMemoryMappedIOPortSpace] = "EfiMemoryMappedIOPortSpace",
+ [EfiPalCode] = "EfiPalCode",
+ [EfiMaxMemoryType] = "EfiMaxMemoryType",
+ };
+
+ if (hob_mem_type >= ARRAY_SIZE(hob_mem_type_names))
+ hob_mem_type = EfiReservedMemoryType;
+
+ printk(BIOS_SPEW, " Memory type %s (0x%x)\n",
+ hob_mem_type_names[hob_mem_type],
+ (u32)hob_mem_type);
+ printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
+ (unsigned long)hob_mem_addr,
+ (unsigned long)hob_mem_length);
+}
+
+static void print_hob_resource_attributes(void *hob_ptr)
+{
+ EFI_HOB_RESOURCE_DESCRIPTOR *hob_resource_ptr =
+ (EFI_HOB_RESOURCE_DESCRIPTOR *)hob_ptr;
+ u32 hob_res_type = hob_resource_ptr->ResourceType;
+ u32 hob_res_attr = hob_resource_ptr->ResourceAttribute;
+ u64 hob_res_addr = hob_resource_ptr->PhysicalStart;
+ u64 hob_res_length = hob_resource_ptr->ResourceLength;
+ const char *hob_res_type_str = NULL;
+
+ /* HOB Resource Types */
+ switch (hob_res_type) {
+ case EFI_RESOURCE_SYSTEM_MEMORY:
+ hob_res_type_str = "EFI_RESOURCE_SYSTEM_MEMORY";
+ break;
+ case EFI_RESOURCE_MEMORY_MAPPED_IO:
+ hob_res_type_str = "EFI_RESOURCE_MEMORY_MAPPED_IO";
+ break;
+ case EFI_RESOURCE_IO:
+ hob_res_type_str = "EFI_RESOURCE_IO";
+ break;
+ case EFI_RESOURCE_FIRMWARE_DEVICE:
+ hob_res_type_str = "EFI_RESOURCE_FIRMWARE_DEVICE";
+ break;
+ case EFI_RESOURCE_MEMORY_MAPPED_IO_PORT:
+ hob_res_type_str = "EFI_RESOURCE_MEMORY_MAPPED_IO_PORT";
+ break;
+ case EFI_RESOURCE_MEMORY_RESERVED:
+ hob_res_type_str = "EFI_RESOURCE_MEMORY_RESERVED";
+ break;
+ case EFI_RESOURCE_IO_RESERVED:
+ hob_res_type_str = "EFI_RESOURCE_IO_RESERVED";
+ break;
+ case EFI_RESOURCE_MAX_MEMORY_TYPE:
+ hob_res_type_str = "EFI_RESOURCE_MAX_MEMORY_TYPE";
+ break;
+ default:
+ hob_res_type_str = "EFI_RESOURCE_UNKNOWN";
+ break;
+ }
+
+ printk(BIOS_SPEW, " Resource %s (0x%0x) has attributes 0x%0x\n",
+ hob_res_type_str, hob_res_type, hob_res_attr);
+ printk(BIOS_SPEW, " at location 0x%0lx with length 0x%0lx\n",
+ (unsigned long)hob_res_addr,
+ (unsigned long)hob_res_length);
+}
+
+static const char *get_hob_type_string(void *hob_ptr)
+{
+ EFI_PEI_HOB_POINTERS hob;
+ const char *hob_type_string;
+ const EFI_GUID fsp_reserved_guid =
+ FSP_RESERVED_MEMORY_RESOURCE_HOB_GUID;
+ const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+ const EFI_GUID bootldr_tmp_mem_guid =
+ FSP_BOOTLOADER_TEMP_MEMORY_HOB_GUID;
+ const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID;
+ const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
+ const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
+
+ hob.Header = (EFI_HOB_GENERIC_HEADER *)hob_ptr;
+ switch (hob.Header->HobType) {
+ case EFI_HOB_TYPE_HANDOFF:
+ hob_type_string = "EFI_HOB_TYPE_HANDOFF";
+ break;
+ case EFI_HOB_TYPE_MEMORY_ALLOCATION:
+ hob_type_string = "EFI_HOB_TYPE_MEMORY_ALLOCATION";
+ break;
+ case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
+ if (compare_guid(&fsp_reserved_guid, &hob.Guid->Name))
+ hob_type_string = "FSP_RESERVED_MEMORY_RESOURCE_HOB";
+ else if (compare_guid(&bootldr_tolum_guid, &hob.Guid->Name))
+ hob_type_string = "FSP_BOOTLOADER_TOLUM_HOB_GUID";
+ else
+ hob_type_string = "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR";
+ break;
+ case EFI_HOB_TYPE_GUID_EXTENSION:
+ if (compare_guid(&bootldr_tmp_mem_guid, &hob.Guid->Name))
+ hob_type_string = "FSP_BOOTLOADER_TEMP_MEMORY_HOB";
+ else if (compare_guid(&mrc_guid, &hob.Guid->Name))
+ hob_type_string = "FSP_NON_VOLATILE_STORAGE_HOB";
+ else if (compare_guid(&graphics_info_guid, &hob.Guid->Name))
+ hob_type_string = "EFI_PEI_GRAPHICS_INFO_HOB_GUID";
+ else if (compare_guid(&memory_info_hob_guid, &hob.Guid->Name))
+ hob_type_string = "FSP_SMBIOS_MEMORY_INFO_GUID";
+ else
+ hob_type_string = "EFI_HOB_TYPE_GUID_EXTENSION";
+ break;
+ case EFI_HOB_TYPE_MEMORY_POOL:
+ hob_type_string = "EFI_HOB_TYPE_MEMORY_POOL";
+ break;
+ case EFI_HOB_TYPE_UNUSED:
+ hob_type_string = "EFI_HOB_TYPE_UNUSED";
+ break;
+ case EFI_HOB_TYPE_END_OF_HOB_LIST:
+ hob_type_string = "EFI_HOB_TYPE_END_OF_HOB_LIST";
+ break;
+ default:
+ hob_type_string = "EFI_HOB_TYPE_UNRECOGNIZED";
+ break;
+ }
+
+ return hob_type_string;
+}
+
+/*
+ * Print out a structure of all the HOBs
+ * that match a certain type:
+ * Print all types (0x0000)
+ * EFI_HOB_TYPE_HANDOFF (0x0001)
+ * EFI_HOB_TYPE_MEMORY_ALLOCATION (0x0002)
+ * EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (0x0003)
+ * EFI_HOB_TYPE_GUID_EXTENSION (0x0004)
+ * EFI_HOB_TYPE_MEMORY_POOL (0x0007)
+ * EFI_HOB_TYPE_UNUSED (0xFFFE)
+ * EFI_HOB_TYPE_END_OF_HOB_LIST (0xFFFF)
+ */
+void print_hob_type_structure(u16 hob_type, void *hob_list_ptr)
+{
+ u32 *current_hob;
+ u32 *next_hob = 0;
+ u8 last_hob = 0;
+ u32 current_type;
+ const char *current_type_str;
+
+ current_hob = hob_list_ptr;
+
+ /*
+ * Print out HOBs of our desired type until
+ * the end of the HOB list
+ */
+ printk(BIOS_DEBUG, "\n=== FSP HOB Data Structure ===\n");
+ printk(BIOS_DEBUG, "0x%p: hob_list_ptr\n", hob_list_ptr);
+ do {
+ EFI_HOB_GENERIC_HEADER *current_header_ptr =
+ (EFI_HOB_GENERIC_HEADER *)current_hob;
+
+ /* Get the type of this HOB */
+ current_type = current_header_ptr->HobType;
+ current_type_str = get_hob_type_string(current_hob);
+
+ if (current_type == hob_type || hob_type == 0x0000) {
+ printk(BIOS_DEBUG, "HOB %p is an %s (type 0x%0x)\n",
+ current_hob, current_type_str,
+ current_type);
+ switch (current_type) {
+ case EFI_HOB_TYPE_MEMORY_ALLOCATION:
+ print_hob_mem_attributes(current_hob);
+ break;
+ case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
+ print_hob_resource_attributes(current_hob);
+ break;
+ }
+ }
+
+ /* Check for end of HOB list */
+ last_hob = END_OF_HOB_LIST(current_hob);
+ if (!last_hob) {
+ /* Get next HOB pointer */
+ next_hob = GET_NEXT_HOB(current_hob);
+
+ /* Start on next HOB */
+ current_hob = next_hob;
+ }
+ } while (!last_hob);
+ printk(BIOS_DEBUG, "=== End of FSP HOB Data Structure ===\n\n");
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/api.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/api.h
new file mode 100644
index 0000000..773b3c3
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/api.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _FSP1_1_API_H_
+#define _FSP1_1_API_H_
+
+/* All the FSP headers need to have UEFI types provided before inclusion. */
+#include <fsp/uefi_binding.h>
+
+/*
+ * Intel's code does not have a handle on changing global packing state.
+ * Therefore, one needs to protect against packing policies that are set
+ * globally for a compliation unit just by including a header file.
+ */
+#pragma pack(push)
+
+#include <vendorcode/intel/fsp/fsp1_1/IntelFspPkg/Include/FspApi.h>
+#include <vendorcode/intel/fsp/fsp1_1/IntelFspPkg/Include/FspInfoHeader.h>
+
+/* Restore original packing policy. */
+#pragma pack(pop)
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/car.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/car.h
new file mode 100644
index 0000000..56400a7
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/car.h
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef FSP1_1_CAR_H
+#define FSP1_1_CAR_H
+
+#include <arch/cpu.h>
+#include <fsp/api.h>
+#include <stdint.h>
+
+/* cache-as-ram support for FSP 1.1. */
+struct cache_as_ram_params {
+ uint64_t tsc;
+ uint32_t bist;
+ FSP_INFO_HEADER *fih;
+ uintptr_t bootloader_car_start;
+ uintptr_t bootloader_car_end;
+};
+
+/* Entry points from the cache-as-ram assembly code. */
+asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params);
+asmlinkage void after_cache_as_ram(void *chipset_context);
+asmlinkage void *romstage_after_verstage(void);
+/* Per stage calls from the above two functions. The void * return from
+ * cache_as_ram_stage_main() is the stack pointer to use in ram after
+ * exiting cache-as-ram mode. */
+void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih);
+void after_cache_as_ram_stage(void);
+
+/* Mainboard and SoC initialization prior to console. */
+void car_mainboard_pre_console_init(void);
+void car_soc_pre_console_init(void);
+/* Mainboard and SoC initialization post console initialization. */
+void car_mainboard_post_console_init(void);
+void car_soc_post_console_init(void);
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/gma.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/gma.h
new file mode 100644
index 0000000..8797932
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/gma.h
@@ -0,0 +1,178 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Chromium OS Authors
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _GMA_H_
+#define _GMA_H_
+
+#include <types.h>
+
+/* IGD PCI Configuration register */
+#define ASLS 0xfc /* OpRegion Base */
+#define SWSCI 0xe8 /* SWSCI Register */
+#define GSSCIE (1 << 0) /* SCI Event trigger */
+#define SMISCISEL (1 << 15) /* Select SMI or SCI event source */
+
+/* mailbox 0: header */
+typedef struct {
+ u8 signature[16];
+ u32 size;
+ u32 version;
+ u8 sbios_version[32];
+ u8 vbios_version[16];
+ u8 driver_version[16];
+ u32 mailboxes;
+ u8 reserved[164];
+} __attribute__((packed)) opregion_header_t;
+
+#define IGD_OPREGION_SIGNATURE "IntelGraphicsMem"
+#define IGD_OPREGION_VERSION 2
+
+#define IGD_MBOX1 (1 << 0)
+#define IGD_MBOX2 (1 << 1)
+#define IGD_MBOX3 (1 << 2)
+#define IGD_MBOX4 (1 << 3)
+#define IGD_MBOX5 (1 << 4)
+
+#define MAILBOXES_MOBILE (IGD_MBOX1 | IGD_MBOX2 | IGD_MBOX3 | \
+ IGD_MBOX4 | IGD_MBOX5)
+#define MAILBOXES_DESKTOP (IGD_MBOX2 | IGD_MBOX4)
+
+#define SBIOS_VERSION_SIZE 32
+
+/* mailbox 1: public acpi methods */
+typedef struct {
+ u32 drdy;
+ u32 csts;
+ u32 cevt;
+ u8 reserved1[20];
+ u32 didl[8];
+ u32 cpdl[8];
+ u32 cadl[8];
+ u32 nadl[8];
+ u32 aslp;
+ u32 tidx;
+ u32 chpd;
+ u32 clid;
+ u32 cdck;
+ u32 sxsw;
+ u32 evts;
+ u32 cnot;
+ u32 nrdy;
+ u8 reserved2[60];
+} __attribute__((packed)) opregion_mailbox1_t;
+
+/* mailbox 2: software sci interface */
+typedef struct {
+ u32 scic;
+ u32 parm;
+ u32 dslp;
+ u8 reserved[244];
+} __attribute__((packed)) opregion_mailbox2_t;
+
+/* mailbox 3: power conservation */
+typedef struct {
+ u32 ardy;
+ u32 aslc;
+ u32 tche;
+ u32 alsi;
+ u32 bclp;
+ u32 pfit;
+ u32 cblv;
+ u16 bclm[20];
+ u32 cpfm;
+ u32 epfm;
+ u8 plut[74];
+ u32 pfmb;
+ u32 ccdv;
+ u32 pcft;
+ u8 reserved[94];
+} __attribute__((packed)) opregion_mailbox3_t;
+
+#define IGD_BACKLIGHT_BRIGHTNESS 0xff
+#define IGD_INITIAL_BRIGHTNESS 0x64
+
+#define IGD_FIELD_VALID (1 << 31)
+#define IGD_WORD_FIELD_VALID (1 << 15)
+#define IGD_PFIT_STRETCH 6
+
+/* mailbox 4: vbt */
+typedef struct {
+ u8 gvd1[7168];
+} __attribute__((packed)) opregion_vbt_t;
+
+/* IGD OpRegion */
+typedef struct {
+ opregion_header_t header;
+ opregion_mailbox1_t mailbox1;
+ opregion_mailbox2_t mailbox2;
+ opregion_mailbox3_t mailbox3;
+ opregion_vbt_t vbt;
+} __attribute__((packed)) igd_opregion_t;
+
+/* Intel Video BIOS (Option ROM) */
+typedef struct {
+ u16 signature;
+ u8 size;
+ u8 reserved[21];
+ u16 pcir_offset;
+ u16 vbt_offset;
+} __attribute__((packed)) optionrom_header_t;
+
+#define OPROM_SIGNATURE 0xaa55
+
+typedef struct {
+ u32 signature;
+ u16 vendor;
+ u16 device;
+ u16 reserved1;
+ u16 length;
+ u8 revision;
+ u8 classcode[3];
+ u16 imagelength;
+ u16 coderevision;
+ u8 codetype;
+ u8 indicator;
+ u16 reserved2;
+} __attribute__((packed)) optionrom_pcir_t;
+
+typedef struct {
+ u8 hdr_signature[20];
+ u16 hdr_version;
+ u16 hdr_size;
+ u16 hdr_vbt_size;
+ u8 hdr_vbt_checksum;
+ u8 hdr_reserved;
+ u32 hdr_vbt_datablock;
+ u32 hdr_aim[4];
+ u8 datahdr_signature[16];
+ u16 datahdr_version;
+ u16 datahdr_size;
+ u16 datahdr_datablocksize;
+ u8 coreblock_id;
+ u16 coreblock_size;
+ u16 coreblock_biossize;
+ u8 coreblock_biostype;
+ u8 coreblock_releasestatus;
+ u8 coreblock_hwsupported;
+ u8 coreblock_integratedhw;
+ u8 coreblock_biosbuild[4];
+ u8 coreblock_biossignon[155];
+} __attribute__((packed)) optionrom_vbt_t;
+
+#define VBT_SIGNATURE 0x54425624
+
+#endif /* _GMA_H_ */
+
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/gop.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/gop.h
new file mode 100644
index 0000000..66c8a3c
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/gop.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _FSP1_1_GOP_H_
+#define _FSP1_1_GOP_H_
+
+#include <fsp/gma.h>
+
+const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len);
+
+#endif /* _FSP1_1_GOP_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/memmap.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/memmap.h
new file mode 100644
index 0000000..965bce6
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/memmap.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015-2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMMON_MEMMAP_H_
+#define _COMMON_MEMMAP_H_
+
+#include <types.h>
+
+/*
+ * mmap_region_granularity must to return a size which is a positive non-zero
+ * integer multiple of the SMM size when SMM is in use. When not using SMM,
+ * this value should be set to 8 MiB.
+ */
+size_t mmap_region_granularity(void);
+
+/* Fills in the arguments for the entire SMM region covered by chipset
+ * protections. e.g. TSEG. */
+void smm_region(void **start, size_t *size);
+
+enum {
+ /* SMM handler area. */
+ SMM_SUBREGION_HANDLER,
+ /* SMM cache region. */
+ SMM_SUBREGION_CACHE,
+ /* Chipset specific area. */
+ SMM_SUBREGION_CHIPSET,
+ /* Total sub regions supported. */
+ SMM_SUBREGION_NUM,
+};
+
+/* Fills in the start and size for the requested SMM subregion. Returns
+ * 0 on susccess, < 0 on failure. */
+int smm_subregion(int sub, void **start, size_t *size);
+
+#endif /* _COMMON_MEMMAP_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/ramstage.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/ramstage.h
new file mode 100644
index 0000000..5ce6aa8
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/ramstage.h
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _INTEL_COMMON_RAMSTAGE_H_
+#define _INTEL_COMMON_RAMSTAGE_H_
+
+#include <fsp/util.h>
+#include <soc/intel/common/util.h>
+#include <stdint.h>
+
+/* Perform Intel silicon init. */
+void intel_silicon_init(void);
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup);
+/* Called after the silicon init code has run. */
+void soc_after_silicon_init(void);
+/* Initialize UPD data before SiliconInit call. */
+void soc_silicon_init_params(SILICON_INIT_UPD *params);
+void mainboard_silicon_init_params(SILICON_INIT_UPD *params);
+void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
+ SILICON_INIT_UPD *new);
+void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params);
+
+#endif /* _INTEL_COMMON_RAMSTAGE_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/romstage.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/romstage.h
new file mode 100644
index 0000000..d07dc37
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/romstage.h
@@ -0,0 +1,98 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMMON_ROMSTAGE_H_
+#define _COMMON_ROMSTAGE_H_
+
+#include <stdint.h>
+#include <arch/cpu.h>
+#include <memory_info.h>
+#include <fsp/car.h>
+#include <fsp/util.h>
+#include <soc/intel/common/util.h>
+#include <soc/pei_wrapper.h>
+#include <soc/pm.h> /* chip_power_state */
+
+struct romstage_params {
+ uint32_t fsp_version;
+ struct chipset_power_state *power_state;
+ struct pei_data *pei_data;
+ void *chipset_context;
+};
+
+/*
+ * FSP Boot Flow:
+ * 1. src/cpu/x86/16bit/reset.inc
+ * 2. src/cpu/x86/16bit/entry.inc
+ * 3. other modules
+ * 4. src/drivers/intel/fsp1_1/cache_as_ram.inc
+ * 5. src/drivers/intel/fsp1_1/fsp_util.c/find_fsp
+ * 6. FSP binary/TempRamInit
+ * 7. src/drivers/intel/fsp1_1/cache_as_ram.inc - return
+ * 8. src/soc/intel/common/romstage.c/romstage_main
+ * 9 src/soc/.../romstage/.../soc_pre_console_init
+ * 10 src/console/console.c/console_init
+ * 11 src/soc/.../romstage/.../soc_romstage_init
+ * 12. src/mainboard/.../romstage.c/mainboard_romstage_entry
+ * 13. src/soc/intel/common/romstage.c/romstage_common
+ * 14 src/soc/.../romstage/.../soc_pre_raminit
+ * 15. FSP binary/MemoryInit
+ * 16. src/soc/intel/common/romstage.c/romstage_common - return
+ * 17. src/mainboard/.../romstage.c/mainboard_romstage_entry - return
+ * 18. src/soc/intel/common/romstage.c/romstage_main - return
+ * 19. src/soc/intel/common/stack.c/setup_stack_and_mttrs
+ * 20. src/drivers/intel/fsp1_1/cache_as_ram.inc - return, cleanup
+ * after call to romstage_main
+ * 21. FSP binary/TempRamExit
+ * 22. src/soc/intel/common/romstage.c/romstage_after_car
+ * 23. FSP binary/SiliconInit
+ * 24. src/soc/intel/common/romstage.c/romstage_after_car - return
+ * 25. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify_boot_state_callback
+ * 26. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify
+ * 27. FSP binary/FspNotify
+ * 28. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify_boot_state_callback
+ * 29. src/drivers/intel/fsp1_1/fsp_util.c/fsp_notify
+ * 30. FSP binary/FspNotify
+ */
+
+void mainboard_check_ec_image(struct romstage_params *params);
+void mainboard_memory_init_params(struct romstage_params *params,
+ MEMORY_INIT_UPD *memory_params);
+void mainboard_romstage_entry(struct romstage_params *params);
+void mainboard_save_dimm_info(struct romstage_params *params);
+void mainboard_add_dimm_info(struct romstage_params *params,
+ struct memory_info *mem_info,
+ int channel, int dimm, int index);
+void raminit(struct romstage_params *params);
+void report_memory_config(void);
+void romstage_common(struct romstage_params *params);
+asmlinkage void *romstage_main(FSP_INFO_HEADER *fih);
+void *setup_stack_and_mtrrs(void);
+void soc_after_ram_init(struct romstage_params *params);
+void soc_display_memory_init_params(const MEMORY_INIT_UPD *old,
+ MEMORY_INIT_UPD *new);
+void soc_memory_init_params(struct romstage_params *params,
+ MEMORY_INIT_UPD *upd);
+void soc_pre_ram_init(struct romstage_params *params);
+
+/*
+ * Set the MTRRs using the data on the stack from setup_stack_and_mtrrs.
+ * Return a new top_of_stack value which removes the setup_stack_and_mtrrs data.
+ */
+asmlinkage void *soc_set_mtrrs(void *top_of_stack);
+asmlinkage void soc_enable_mtrrs(void);
+
+#endif /* _COMMON_ROMSTAGE_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/soc_binding.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/soc_binding.h
new file mode 100644
index 0000000..affb43f
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/soc_binding.h
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _FSP1_1_SOC_BINDING_H_
+#define _FSP1_1_SOC_BINDING_H_
+
+/* All the FSP headers need to have UEFI types provided before inclusion. */
+#include <fsp/uefi_binding.h>
+
+/*
+ * Intel's code does not have a handle on changing global packing state.
+ * Therefore, one needs to protect against packing policies that are set
+ * globally for a compliation unit just by including a header file.
+ */
+#pragma pack(push)
+
+/*
+ * This file is found in the soc / chipset directory. It is
+ * a per implementation specific header. i.e. different FSP implementations
+ * for different chipsets.
+ */
+#include <FspUpdVpd.h>
+
+/* Restore original packing policy. */
+#pragma pack(pop)
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/stack.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/stack.h
new file mode 100644
index 0000000..e60360d
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/stack.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMMON_STACK_H_
+#define _COMMON_STACK_H_
+
+#include <stdint.h>
+
+static inline void *stack_push32(void *stack, uint32_t value)
+{
+ uint32_t *stack32 = stack;
+
+ stack32 = &stack32[-1];
+ *stack32 = value;
+ return stack32;
+}
+
+#endif /* _COMMON_STACK_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/uefi_binding.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/uefi_binding.h
new file mode 100644
index 0000000..ad5bd36
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/uefi_binding.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _FSP1_1_UEFI_BINDING_H_
+#define _FSP1_1_UEFI_BINDING_H_
+
+/*
+ * Intel's code does not have a handle on changing global packing state.
+ * Therefore, one needs to protect against packing policies that are set
+ * globally for a compliation unit just by including a header file.
+ */
+#pragma pack(push)
+
+/*
+ * Pull in the UEFI types from 2.4. Smarter decisions can be made on what
+ * version to bind to, but for now 2.4 is standard for FSP 1.1.
+ */
+#include <vendorcode/intel/edk2/uefi_2.4/uefi_types.h>
+
+/* Restore original packing policy. */
+#pragma pack(pop)
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/util.h b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/util.h
new file mode 100644
index 0000000..07cf0c7
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/include/fsp/util.h
@@ -0,0 +1,102 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef FSP1_1_UTIL_H
+#define FSP1_1_UTIL_H
+
+#include <rules.h>
+#include <fsp/api.h>
+/* Current users expect to get the SoC's FSP definitions by including util.h. */
+#include <fsp/soc_binding.h>
+#include <fsp/gop.h>
+#include <program_loading.h>
+#include <commonlib/region.h>
+
+/* find_fsp() should only be called from assembly code. */
+FSP_INFO_HEADER *find_fsp(uintptr_t fsp_base_address);
+/* Set FSP's runtime information. */
+void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list);
+/* Use a new FSP_INFO_HEADER at runtime. */
+void fsp_update_fih(FSP_INFO_HEADER *fih);
+/* fsp_get_fih() is only valid after calling fsp_set_runtime(). */
+FSP_INFO_HEADER *fsp_get_fih(void);
+/* fsp_get_hob_list() is only valid after calling fsp_set_runtime(). */
+void *fsp_get_hob_list(void);
+void fsp_early_init(FSP_INFO_HEADER *fsp_info);
+void fsp_notify(u32 phase);
+void print_hob_type_structure(u16 hob_type, void *hob_list_ptr);
+void print_fsp_info(FSP_INFO_HEADER *fsp_header);
+void *get_next_type_guid_hob(UINT16 type, const EFI_GUID *guid,
+ const void *hob_start);
+void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start);
+void *get_first_resource_hob(const EFI_GUID *guid);
+void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
+ uint64_t new);
+
+/* Return version of FSP associated with fih. */
+static inline uint32_t fsp_version(FSP_INFO_HEADER *fih)
+{
+ return fih->ImageRevision;
+}
+
+/*
+ * Relocate FSP entire binary into ram. Returns < 0 on error, 0 on success.
+ * The FSP source is pointed to by region_device and the relocation information
+ * is encoded in a struct prog with its entry point set to the FSP info header.
+ */
+int fsp_relocate(struct prog *fsp_relocd, const struct region_device *fsp_src);
+
+/* Additional HOB types not included in the FSP:
+ * #define EFI_HOB_TYPE_HANDOFF 0x0001
+ * #define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+ * #define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+ * #define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+ * #define EFI_HOB_TYPE_FV 0x0005
+ * #define EFI_HOB_TYPE_CPU 0x0006
+ * #define EFI_HOB_TYPE_MEMORY_POOL 0x0007
+ * #define EFI_HOB_TYPE_CV 0x0008
+ * #define EFI_HOB_TYPE_UNUSED 0xFFFE
+ * #define EFI_HOB_TYPE_END_OF_HOB_LIST 0xffff
+ */
+#define EFI_HOB_TYPE_HANDOFF 0x0001
+#define EFI_HOB_TYPE_MEMORY_POOL 0x0007
+
+/* The offset in bytes from the start of the info structure */
+#define FSP_IMAGE_SIG_LOC 0
+#define FSP_IMAGE_ID_LOC 16
+#define FSP_IMAGE_BASE_LOC 28
+#define FSP_IMAGE_ATTRIBUTE_LOC 32
+#define GRAPHICS_SUPPORT_BIT (1 << 0)
+
+#define ERROR_NO_FV_SIG 1
+#define ERROR_NO_FFS_GUID 2
+#define ERROR_NO_INFO_HEADER 3
+#define ERROR_IMAGEBASE_MISMATCH 4
+#define ERROR_INFO_HEAD_SIG_MISMATCH 5
+#define ERROR_FSP_SIG_MISMATCH 6
+
+#if ENV_RAMSTAGE
+extern void *FspHobListPtr;
+#endif
+
+/* TODO: Remove the EFI types and decorations from coreboot implementations. */
+VOID * EFIAPI get_hob_list(VOID);
+VOID * EFIAPI get_next_hob(UINT16 type, CONST VOID *hob_start);
+VOID * EFIAPI get_first_hob(UINT16 type);
+VOID * EFIAPI get_next_guid_hob(CONST EFI_GUID * guid, CONST VOID *hob_start);
+VOID * EFIAPI get_first_guid_hob(CONST EFI_GUID * guid);
+
+#endif /* FSP1_1_UTIL_H */
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/raminit.c b/src/vendorcode/intel/fsp/fsp1_1/common/raminit.c
new file mode 100644
index 0000000..e505b93
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/raminit.c
@@ -0,0 +1,320 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014-2016 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cbmem.h>
+#include <console/console.h>
+#include <fsp/memmap.h>
+#include <fsp/romstage.h>
+#include <fsp/util.h>
+#include <lib.h> /* hexdump */
+#include <reset.h>
+#include <soc/intel/common/mma.h>
+#include <string.h>
+#include <timestamp.h>
+#include <bootmode.h>
+
+void raminit(struct romstage_params *params)
+{
+ const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID;
+ EFI_HOB_RESOURCE_DESCRIPTOR *cbmem_root;
+ FSP_INFO_HEADER *fsp_header;
+ EFI_HOB_RESOURCE_DESCRIPTOR *fsp_memory;
+ FSP_MEMORY_INIT fsp_memory_init;
+ FSP_MEMORY_INIT_PARAMS fsp_memory_init_params;
+ const EFI_GUID fsp_reserved_guid =
+ FSP_RESERVED_MEMORY_RESOURCE_HOB_GUID;
+ void *fsp_reserved_memory_area;
+ FSP_INIT_RT_COMMON_BUFFER fsp_rt_common_buffer;
+ void *hob_list_ptr;
+ FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
+ const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
+ MEMORY_INIT_UPD memory_init_params;
+ const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+ u32 *mrc_hob;
+ u32 fsp_reserved_bytes;
+ MEMORY_INIT_UPD *original_params;
+ struct pei_data *pei_ptr;
+ EFI_STATUS status;
+ VPD_DATA_REGION *vpd_ptr;
+ UPD_DATA_REGION *upd_ptr;
+ int fsp_verification_failure = 0;
+#if IS_ENABLED(CONFIG_DISPLAY_HOBS)
+ unsigned long int data;
+ EFI_PEI_HOB_POINTERS hob_ptr;
+#endif
+
+ /*
+ * Find and copy the UPD region to the stack so the platform can modify
+ * the settings if needed. Modifications to the UPD buffer are done in
+ * the platform callback code. The platform callback code is also
+ * responsible for assigning the UpdDataRngPtr to this buffer if any
+ * updates are made. The default state is to leave the UpdDataRngPtr
+ * set to NULL. This indicates that the FSP code will use the UPD
+ * region in the FSP binary.
+ */
+ post_code(0x34);
+ fsp_header = params->chipset_context;
+ vpd_ptr = (VPD_DATA_REGION *)(fsp_header->CfgRegionOffset +
+ fsp_header->ImageBase);
+ printk(BIOS_DEBUG, "VPD Data: 0x%p\n", vpd_ptr);
+ upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
+ fsp_header->ImageBase);
+ printk(BIOS_DEBUG, "UPD Data: 0x%p\n", upd_ptr);
+ original_params = (void *)((u8 *)upd_ptr +
+ upd_ptr->MemoryInitUpdOffset);
+ memcpy(&memory_init_params, original_params,
+ sizeof(memory_init_params));
+
+ /* Zero fill RT Buffer data and start populating fields. */
+ memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer));
+ pei_ptr = params->pei_data;
+ if (pei_ptr->boot_mode == SLEEP_STATE_S3) {
+ fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME;
+ } else if (pei_ptr->saved_data != NULL) {
+ fsp_rt_common_buffer.BootMode =
+ BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
+ } else {
+ fsp_rt_common_buffer.BootMode = BOOT_WITH_FULL_CONFIGURATION;
+ }
+ fsp_rt_common_buffer.UpdDataRgnPtr = &memory_init_params;
+ fsp_rt_common_buffer.BootLoaderTolumSize = cbmem_overhead_size();
+
+ /* Get any board specific changes */
+ fsp_memory_init_params.NvsBufferPtr = (void *)pei_ptr->saved_data;
+ fsp_memory_init_params.RtBufferPtr = &fsp_rt_common_buffer;
+ fsp_memory_init_params.HobListPtr = &hob_list_ptr;
+
+ /* Update the UPD data */
+ soc_memory_init_params(params, &memory_init_params);
+ mainboard_memory_init_params(params, &memory_init_params);
+
+ if (IS_ENABLED(CONFIG_MMA))
+ setup_mma(&memory_init_params);
+
+ post_code(0x36);
+
+ /* Display the UPD data */
+ if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+ soc_display_memory_init_params(original_params,
+ &memory_init_params);
+
+ /* Call FspMemoryInit to initialize RAM */
+ fsp_memory_init = (FSP_MEMORY_INIT)(fsp_header->ImageBase
+ + fsp_header->FspMemoryInitEntryOffset);
+ printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_memory_init);
+ printk(BIOS_SPEW, " 0x%p: NvsBufferPtr\n",
+ fsp_memory_init_params.NvsBufferPtr);
+ printk(BIOS_SPEW, " 0x%p: RtBufferPtr\n",
+ fsp_memory_init_params.RtBufferPtr);
+ printk(BIOS_SPEW, " 0x%p: HobListPtr\n",
+ fsp_memory_init_params.HobListPtr);
+
+ timestamp_add_now(TS_FSP_MEMORY_INIT_START);
+ post_code(POST_FSP_MEMORY_INIT);
+ status = fsp_memory_init(&fsp_memory_init_params);
+ post_code(0x37);
+ timestamp_add_now(TS_FSP_MEMORY_INIT_END);
+
+ printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
+ if (status != EFI_SUCCESS)
+ die("ERROR - FspMemoryInit failed to initialize memory!\n");
+
+ /* Locate the FSP reserved memory area */
+ fsp_reserved_bytes = 0;
+ fsp_memory = get_next_resource_hob(&fsp_reserved_guid, hob_list_ptr);
+ if (fsp_memory == NULL) {
+ fsp_verification_failure = 1;
+ printk(BIOS_DEBUG,
+ "7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB missing!\n");
+ } else {
+ fsp_reserved_bytes = fsp_memory->ResourceLength;
+ printk(BIOS_DEBUG, "Reserving 0x%016lx bytes for FSP\n",
+ (unsigned long int)fsp_reserved_bytes);
+ }
+
+ /* Display SMM area */
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
+ char *smm_base;
+ size_t smm_size;
+
+ smm_region((void **)&smm_base, &smm_size);
+ printk(BIOS_DEBUG, "0x%08x: smm_size\n", (unsigned int)smm_size);
+ printk(BIOS_DEBUG, "0x%p: smm_base\n", smm_base);
+#endif
+
+ /* Migrate CAR data */
+ printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top());
+ if (pei_ptr->boot_mode != SLEEP_STATE_S3) {
+ cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
+ fsp_reserved_bytes);
+ } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
+ fsp_reserved_bytes)) {
+#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+ printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n");
+ /* Failed S3 resume, reset to come up cleanly */
+ hard_reset();
+#endif
+ }
+
+ /* Save the FSP runtime parameters. */
+ fsp_set_runtime(fsp_header, hob_list_ptr);
+
+ /* Lookup the FSP_BOOTLOADER_TOLUM_HOB */
+ cbmem_root = get_next_resource_hob(&bootldr_tolum_guid, hob_list_ptr);
+ if (cbmem_root == NULL) {
+ fsp_verification_failure = 1;
+ printk(BIOS_ERR, "7.4: FSP_BOOTLOADER_TOLUM_HOB missing!\n");
+ printk(BIOS_ERR, "BootLoaderTolumSize: 0x%08x bytes\n",
+ fsp_rt_common_buffer.BootLoaderTolumSize);
+ }
+
+ /* Locate the FSP_SMBIOS_MEMORY_INFO HOB */
+ memory_info_hob = get_next_guid_hob(&memory_info_hob_guid,
+ hob_list_ptr);
+ if (NULL == memory_info_hob) {
+ printk(BIOS_ERR, "FSP_SMBIOS_MEMORY_INFO HOB missing!\n");
+ fsp_verification_failure = 1;
+ } else {
+ printk(BIOS_DEBUG,
+ "FSP_SMBIOS_MEMORY_INFO HOB: 0x%p\n",
+ memory_info_hob);
+ }
+
+#if IS_ENABLED(CONFIG_DISPLAY_HOBS)
+ if (hob_list_ptr == NULL)
+ die("ERROR - HOB pointer is NULL!\n");
+
+ /*
+ * Verify that FSP is generating the required HOBs:
+ * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0
+ * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified above
+ * 7.3: FSP_NON_VOLATILE_STORAGE_HOB verified below
+ * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified above
+ * 7.5: EFI_PEI_GRAPHICS_INFO_HOB produced by SiliconInit
+ * FSP_SMBIOS_MEMORY_INFO HOB verified above
+ */
+ if (NULL != cbmem_root) {
+ printk(BIOS_DEBUG,
+ "7.4: FSP_BOOTLOADER_TOLUM_HOB: 0x%p\n",
+ cbmem_root);
+ data = cbmem_root->PhysicalStart;
+ printk(BIOS_DEBUG, " 0x%016lx: PhysicalStart\n", data);
+ data = cbmem_root->ResourceLength;
+ printk(BIOS_DEBUG, " 0x%016lx: ResourceLength\n", data);
+ }
+ hob_ptr.Raw = get_next_guid_hob(&mrc_guid, hob_list_ptr);
+ if (NULL == hob_ptr.Raw) {
+ printk(BIOS_ERR, "7.3: FSP_NON_VOLATILE_STORAGE_HOB missing!\n");
+ fsp_verification_failure =
+ (params->pei_data->saved_data == NULL) ? 1 : 0;
+ } else {
+ printk(BIOS_DEBUG,
+ "7.3: FSP_NON_VOLATILE_STORAGE_HOB: 0x%p\n",
+ hob_ptr.Raw);
+ }
+ if (fsp_memory != NULL) {
+ printk(BIOS_DEBUG,
+ "7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB: 0x%p\n",
+ fsp_memory);
+ data = fsp_memory->PhysicalStart;
+ printk(BIOS_DEBUG, " 0x%016lx: PhysicalStart\n", data);
+ data = fsp_memory->ResourceLength;
+ printk(BIOS_DEBUG, " 0x%016lx: ResourceLength\n", data);
+ }
+
+ /* Verify all the HOBs are present */
+ if (fsp_verification_failure)
+ printk(BIOS_DEBUG,
+ "ERROR - Missing one or more required FSP HOBs!\n");
+
+ /* Display the HOBs */
+ print_hob_type_structure(0, hob_list_ptr);
+#endif
+
+ /* Get the address of the CBMEM region for the FSP reserved memory */
+ fsp_reserved_memory_area = cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY);
+ printk(BIOS_DEBUG, "0x%p: fsp_reserved_memory_area\n",
+ fsp_reserved_memory_area);
+
+ /* Verify the order of CBMEM root and FSP memory */
+ if ((fsp_memory != NULL) && (cbmem_root != NULL) &&
+ (cbmem_root->PhysicalStart <= fsp_memory->PhysicalStart)) {
+ fsp_verification_failure = 1;
+ printk(BIOS_DEBUG,
+ "ERROR - FSP reserved memory above CBMEM root!\n");
+ }
+
+ /* Verify that the FSP memory was properly reserved */
+ if ((fsp_memory != NULL) && ((fsp_reserved_memory_area == NULL) ||
+ (fsp_memory->PhysicalStart !=
+ (unsigned int)fsp_reserved_memory_area))) {
+ fsp_verification_failure = 1;
+ printk(BIOS_DEBUG, "ERROR - Reserving FSP memory area!\n");
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
+ if (cbmem_root != NULL) {
+ size_t delta_bytes = (unsigned int)smm_base
+ - cbmem_root->PhysicalStart
+ - cbmem_root->ResourceLength;
+ printk(BIOS_DEBUG,
+ "0x%08x: Chipset reserved bytes reported by FSP\n",
+ (unsigned int)delta_bytes);
+ die("Please verify the chipset reserved size\n");
+ }
+#endif
+ }
+
+ /* Verify the FSP 1.1 HOB interface */
+ if (fsp_verification_failure)
+ die("ERROR - Coreboot's requirements not met by FSP binary!\n");
+
+ /* Display the memory configuration */
+ report_memory_config();
+
+ /* Locate the memory configuration data to speed up the next reboot */
+ mrc_hob = get_next_guid_hob(&mrc_guid, hob_list_ptr);
+ if (mrc_hob == NULL)
+ printk(BIOS_DEBUG,
+ "Memory Configuration Data Hob not present\n");
+ else if (!recovery_mode_enabled()) {
+ /* Do not save MRC data in recovery path */
+ pei_ptr->data_to_save = GET_GUID_HOB_DATA(mrc_hob);
+ pei_ptr->data_to_save_size = ALIGN(
+ ((u32)GET_HOB_LENGTH(mrc_hob)), 16);
+ }
+}
+
+/* Initialize the UPD parameters for MemoryInit */
+__attribute__((weak)) void mainboard_memory_init_params(
+ struct romstage_params *params,
+ MEMORY_INIT_UPD *upd_ptr)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
+
+/* Display the UPD parameters for MemoryInit */
+__attribute__((weak)) void soc_display_memory_init_params(
+ const MEMORY_INIT_UPD *old, MEMORY_INIT_UPD *new)
+{
+ printk(BIOS_SPEW, "UPD values for MemoryInit:\n");
+ hexdump32(BIOS_SPEW, new, sizeof(*new));
+}
+
+/* Initialize the UPD parameters for MemoryInit */
+__attribute__((weak)) void soc_memory_init_params(
+ struct romstage_params *params,
+ MEMORY_INIT_UPD *upd)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/ramstage.c b/src/vendorcode/intel/fsp/fsp1_1/common/ramstage.c
new file mode 100644
index 0000000..834f148
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/ramstage.c
@@ -0,0 +1,223 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootmode.h>
+#include <arch/acpi.h>
+#include <cbmem.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/memmap.h>
+#include <fsp/ramstage.h>
+#include <fsp/util.h>
+#include <lib.h>
+#include <stage_cache.h>
+#include <string.h>
+#include <timestamp.h>
+
+/* SOC initialization after FSP silicon init */
+__attribute__((weak)) void soc_after_silicon_init(void)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
+
+/* Display SMM memory map */
+static void smm_memory_map(void)
+{
+ void *base;
+ size_t size;
+ int i;
+
+ printk(BIOS_SPEW, "SMM Memory Map\n");
+
+ smm_region(&base, &size);
+ printk(BIOS_SPEW, "SMRAM : %p 0x%zx\n", base, size);
+
+ for (i = 0; i < SMM_SUBREGION_NUM; i++) {
+ if (smm_subregion(i, &base, &size))
+ continue;
+ printk(BIOS_SPEW, " Subregion %d: %p 0x%zx\n", i, base, size);
+ }
+}
+
+static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
+{
+ const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
+ int missing_hob = 0;
+ void *hob_list_ptr = get_hob_list();
+
+ if (!IS_ENABLED(CONFIG_DISPLAY_HOBS))
+ return;
+
+ /* Verify the HOBs */
+ if (hob_list_ptr == NULL) {
+ printk(BIOS_INFO, "ERROR - HOB pointer is NULL!\n");
+ return;
+ }
+
+ print_hob_type_structure(0, hob_list_ptr);
+
+ /*
+ * Verify that FSP is generating the required HOBs:
+ * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0
+ * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified by raminit
+ * 7.3: FSP_NON_VOLATILE_STORAGE_HOB verified by raminit
+ * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified by raminit
+ * 7.5: EFI_PEI_GRAPHICS_INFO_HOB verified below,
+ * if the ImageAttribute bit is set
+ * FSP_SMBIOS_MEMORY_INFO HOB verified by raminit
+ */
+ if ((fsp_info_header->ImageAttribute & GRAPHICS_SUPPORT_BIT) &&
+ !get_next_guid_hob(&graphics_info_guid, hob_list_ptr)) {
+ printk(BIOS_INFO, "7.5: EFI_PEI_GRAPHICS_INFO_HOB missing!\n");
+ missing_hob = 1;
+ }
+
+ if (missing_hob)
+ printk(BIOS_INFO,
+ "ERROR - Missing one or more required FSP HOBs!\n");
+}
+
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
+{
+ FSP_SILICON_INIT fsp_silicon_init;
+ SILICON_INIT_UPD *original_params;
+ SILICON_INIT_UPD silicon_init_params;
+ EFI_STATUS status;
+ UPD_DATA_REGION *upd_ptr;
+ VPD_DATA_REGION *vpd_ptr;
+
+ /* Display the FSP header */
+ if (fsp_info_header == NULL) {
+ printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n");
+ return;
+ }
+ print_fsp_info(fsp_info_header);
+
+ /* Initialize the UPD values */
+ vpd_ptr = (VPD_DATA_REGION *)(fsp_info_header->CfgRegionOffset +
+ fsp_info_header->ImageBase);
+ printk(BIOS_DEBUG, "0x%p: VPD Data\n", vpd_ptr);
+ upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
+ fsp_info_header->ImageBase);
+ printk(BIOS_DEBUG, "0x%p: UPD Data\n", upd_ptr);
+ original_params = (void *)((u8 *)upd_ptr +
+ upd_ptr->SiliconInitUpdOffset);
+ memcpy(&silicon_init_params, original_params,
+ sizeof(silicon_init_params));
+ soc_silicon_init_params(&silicon_init_params);
+
+ /* Locate VBT and pass to FSP GOP */
+ if (IS_ENABLED(CONFIG_GOP_SUPPORT))
+ load_vbt(is_s3_wakeup, &silicon_init_params);
+ mainboard_silicon_init_params(&silicon_init_params);
+
+ /* Display the UPD data */
+ if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+ soc_display_silicon_init_params(original_params,
+ &silicon_init_params);
+
+ /* Perform silicon initialization after RAM is configured */
+ printk(BIOS_DEBUG, "Calling FspSiliconInit\n");
+ fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase
+ + fsp_info_header->FspSiliconInitEntryOffset);
+ timestamp_add_now(TS_FSP_SILICON_INIT_START);
+ printk(BIOS_DEBUG, "Calling FspSiliconInit(0x%p) at 0x%p\n",
+ &silicon_init_params, fsp_silicon_init);
+ post_code(POST_FSP_SILICON_INIT);
+ status = fsp_silicon_init(&silicon_init_params);
+ timestamp_add_now(TS_FSP_SILICON_INIT_END);
+ printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
+
+ /* Mark graphics init done after SiliconInit if VBT was provided */
+#if IS_ENABLED(CONFIG_GOP_SUPPORT)
+ /* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs
+ * to be #if'd out instead of using if(). */
+ if (silicon_init_params.GraphicsConfigPtr)
+ gfx_set_init_done(1);
+#endif
+
+ display_hob_info(fsp_info_header);
+ soc_after_silicon_init();
+}
+
+static void fsp_cache_save(struct prog *fsp)
+{
+ if (IS_ENABLED(CONFIG_DISPLAY_SMM_MEMORY_MAP))
+ smm_memory_map();
+
+ if (prog_entry(fsp) == NULL) {
+ printk(BIOS_ERR, "ERROR: No FSP to save in cache.\n");
+ return;
+ }
+
+ stage_cache_add(STAGE_REFCODE, fsp);
+}
+
+static int fsp_find_and_relocate(struct prog *fsp)
+{
+ if (prog_locate(fsp)) {
+ printk(BIOS_ERR, "ERROR: Couldn't find %s\n", prog_name(fsp));
+ return -1;
+ }
+
+ if (fsp_relocate(fsp, prog_rdev(fsp))) {
+ printk(BIOS_ERR, "ERROR: FSP relocation failed.\n");
+ return -1;
+ }
+
+ return 0;
+}
+
+void intel_silicon_init(void)
+{
+ struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin");
+ int is_s3_wakeup = acpi_is_wakeup_s3();
+
+ if (is_s3_wakeup) {
+ printk(BIOS_DEBUG, "FSP: Loading binary from cache\n");
+ stage_cache_load_stage(STAGE_REFCODE, &fsp);
+ } else {
+ fsp_find_and_relocate(&fsp);
+ printk(BIOS_DEBUG, "FSP: Saving binary in cache\n");
+ fsp_cache_save(&fsp);
+ }
+
+ /* FSP_INFO_HEADER is set as the program entry. */
+ fsp_update_fih(prog_entry(&fsp));
+
+ fsp_run_silicon_init(fsp_get_fih(), is_s3_wakeup);
+}
+
+/* Initialize the UPD parameters for SiliconInit */
+__attribute__((weak)) void mainboard_silicon_init_params(
+ SILICON_INIT_UPD *params)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+};
+
+/* Display the UPD parameters for SiliconInit */
+__attribute__((weak)) void soc_display_silicon_init_params(
+ const SILICON_INIT_UPD *old, SILICON_INIT_UPD *new)
+{
+ printk(BIOS_SPEW, "UPD values for SiliconInit:\n");
+ hexdump32(BIOS_SPEW, new, sizeof(*new));
+}
+
+/* Initialize the UPD parameters for SiliconInit */
+__attribute__((weak)) void soc_silicon_init_params(SILICON_INIT_UPD *params)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/romstage.c b/src/vendorcode/intel/fsp/fsp1_1/common/romstage.c
new file mode 100644
index 0000000..3d698bb
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/romstage.c
@@ -0,0 +1,420 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <arch/io.h>
+#include <arch/cbfs.h>
+#include <arch/stages.h>
+#include <arch/early_variables.h>
+#include <boardid.h>
+#include <console/console.h>
+#include <cbmem.h>
+#include <cpu/intel/microcode.h>
+#include <cpu/x86/mtrr.h>
+#include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/ec_commands.h>
+#include <elog.h>
+#include <fsp/romstage.h>
+#include <reset.h>
+#include <romstage_handoff.h>
+#include <smbios.h>
+#include <soc/intel/common/mrc_cache.h>
+#include <stage_cache.h>
+#include <timestamp.h>
+#include <tpm.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
+asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
+{
+ void *top_of_stack;
+ struct pei_data pei_data;
+ struct romstage_params params = {
+ .pei_data = &pei_data,
+ .chipset_context = fih,
+ };
+
+ post_code(0x30);
+
+ timestamp_add_now(TS_START_ROMSTAGE);
+
+ /* Load microcode before ram init */
+ if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
+ intel_update_microcode_from_cbfs();
+
+ memset(&pei_data, 0, sizeof(pei_data));
+
+ /* Display parameters */
+ printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
+ CONFIG_MMCONF_BASE_ADDRESS);
+ printk(BIOS_INFO, "Using FSP 1.1\n");
+
+ /* Display FSP banner */
+ print_fsp_info(fih);
+
+ /* Stash FSP version. */
+ params.fsp_version = fsp_version(fih);
+
+ /* Get power state */
+ params.power_state = fill_power_state();
+
+ /*
+ * Read and print board version. Done after SOC romstage
+ * in case PCH needs to be configured to talk to the EC.
+ */
+ if (IS_ENABLED(CONFIG_BOARD_ID_AUTO))
+ printk(BIOS_INFO, "MLB: board version %d\n", board_id());
+
+ /* Call into mainboard. */
+ mainboard_romstage_entry(¶ms);
+ soc_after_ram_init(¶ms);
+ post_code(0x38);
+
+ top_of_stack = setup_stack_and_mtrrs();
+
+ printk(BIOS_DEBUG, "Calling FspTempRamExit API\n");
+ timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_START);
+ return top_of_stack;
+}
+
+void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
+{
+ return romstage_main(fih);
+}
+
+/* Entry from the mainboard. */
+void romstage_common(struct romstage_params *params)
+{
+ const struct mrc_saved_data *cache;
+ struct romstage_handoff *handoff;
+ struct pei_data *pei_data;
+
+ post_code(0x32);
+
+ timestamp_add_now(TS_BEFORE_INITRAM);
+
+ pei_data = params->pei_data;
+ pei_data->boot_mode = params->power_state->prev_sleep_state;
+
+#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT)
+ if (params->power_state->prev_sleep_state != SLEEP_STATE_S3)
+ boot_count_increment();
+#endif
+
+ /* Perform remaining SOC initialization */
+ soc_pre_ram_init(params);
+ post_code(0x33);
+
+ /* Check recovery and MRC cache */
+ params->pei_data->saved_data_size = 0;
+ params->pei_data->saved_data = NULL;
+ if (!params->pei_data->disable_saved_data) {
+ if (recovery_mode_enabled()) {
+ /* Recovery mode does not use MRC cache */
+ printk(BIOS_DEBUG,
+ "Recovery mode: not using MRC cache.\n");
+ } else if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)
+ && (!mrc_cache_get_current_with_version(&cache,
+ params->fsp_version))) {
+ /* MRC cache found */
+ params->pei_data->saved_data_size = cache->size;
+ params->pei_data->saved_data = &cache->data[0];
+ } else if (params->pei_data->boot_mode == SLEEP_STATE_S3) {
+ /* Waking from S3 and no cache. */
+ printk(BIOS_DEBUG,
+ "No MRC cache found in S3 resume path.\n");
+ post_code(POST_RESUME_FAILURE);
+ hard_reset();
+ } else {
+ printk(BIOS_DEBUG, "No MRC cache found.\n");
+ mainboard_check_ec_image(params);
+ }
+ }
+
+ /* Initialize RAM */
+ raminit(params);
+ timestamp_add_now(TS_AFTER_INITRAM);
+
+ /* Save MRC output */
+ if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) {
+ printk(BIOS_DEBUG, "MRC data at %p %d bytes\n",
+ pei_data->data_to_save, pei_data->data_to_save_size);
+ if ((params->pei_data->boot_mode != SLEEP_STATE_S3)
+ && (params->pei_data->data_to_save_size != 0)
+ && (params->pei_data->data_to_save != NULL))
+ mrc_cache_stash_data_with_version(
+ params->pei_data->data_to_save,
+ params->pei_data->data_to_save_size,
+ params->fsp_version);
+ }
+
+ /* Save DIMM information */
+ mainboard_save_dimm_info(params);
+
+ /* Create romstage handof information */
+ handoff = romstage_handoff_find_or_add();
+ if (handoff != NULL)
+ handoff->s3_resume = (params->power_state->prev_sleep_state ==
+ SLEEP_STATE_S3);
+ else {
+ printk(BIOS_DEBUG, "Romstage handoff structure not added!\n");
+ hard_reset();
+ }
+
+ /*
+ * Initialize the TPM, unless the TPM was already initialized
+ * in verstage and used to verify romstage.
+ */
+ if (IS_ENABLED(CONFIG_LPC_TPM) &&
+ !IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) &&
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
+ init_tpm(params->power_state->prev_sleep_state ==
+ SLEEP_STATE_S3);
+}
+
+void after_cache_as_ram_stage(void)
+{
+ /* Load the ramstage. */
+ copy_and_run();
+ die("ERROR - Failed to load ramstage!");
+}
+
+/* Initialize the power state */
+__attribute__((weak)) struct chipset_power_state *fill_power_state(void)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+ return NULL;
+}
+
+__attribute__((weak)) void mainboard_check_ec_image(
+ struct romstage_params *params)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
+ struct pei_data *pei_data;
+
+ pei_data = params->pei_data;
+ if (params->pei_data->boot_mode == SLEEP_STATE_S0) {
+ /* Ensure EC is running RO firmware. */
+ google_chromeec_check_ec_image(EC_IMAGE_RO);
+ }
+#endif
+}
+
+/* Board initialization before and after RAM is enabled */
+__attribute__((weak)) void mainboard_romstage_entry(
+ struct romstage_params *params)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+
+ post_code(0x31);
+
+ /* Initliaze memory */
+ romstage_common(params);
+}
+
+/* Save the DIMM information for SMBIOS table 17 */
+__attribute__((weak)) void mainboard_save_dimm_info(
+ struct romstage_params *params)
+{
+ int channel;
+ CHANNEL_INFO *channel_info;
+ int dimm;
+ DIMM_INFO *dimm_info;
+ int dimm_max;
+ void *hob_list_ptr;
+ EFI_HOB_GUID_TYPE *hob_ptr;
+ int index;
+ struct memory_info *mem_info;
+ FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
+ const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
+
+ /* Locate the memory info HOB, presence validated by raminit */
+ hob_list_ptr = fsp_get_hob_list();
+ hob_ptr = get_next_guid_hob(&memory_info_hob_guid, hob_list_ptr);
+ memory_info_hob = (FSP_SMBIOS_MEMORY_INFO *)(hob_ptr + 1);
+
+ /* Display the data in the FSP_SMBIOS_MEMORY_INFO HOB */
+ if (IS_ENABLED(CONFIG_DISPLAY_HOBS)) {
+ printk(BIOS_DEBUG, "FSP_SMBIOS_MEMORY_INFO HOB\n");
+ printk(BIOS_DEBUG, " 0x%02x: Revision\n",
+ memory_info_hob->Revision);
+ printk(BIOS_DEBUG, " 0x%02x: MemoryType\n",
+ memory_info_hob->MemoryType);
+ printk(BIOS_DEBUG, " %d: MemoryFrequencyInMHz\n",
+ memory_info_hob->MemoryFrequencyInMHz);
+ printk(BIOS_DEBUG, " %d: DataWidth in bits\n",
+ memory_info_hob->DataWidth);
+ printk(BIOS_DEBUG, " 0x%02x: ErrorCorrectionType\n",
+ memory_info_hob->ErrorCorrectionType);
+ printk(BIOS_DEBUG, " 0x%02x: ChannelCount\n",
+ memory_info_hob->ChannelCount);
+ for (channel = 0; channel < memory_info_hob->ChannelCount;
+ channel++) {
+ channel_info = &memory_info_hob->ChannelInfo[channel];
+ printk(BIOS_DEBUG, " Channel %d\n", channel);
+ printk(BIOS_DEBUG, " 0x%02x: ChannelId\n",
+ channel_info->ChannelId);
+ printk(BIOS_DEBUG, " 0x%02x: DimmCount\n",
+ channel_info->DimmCount);
+ for (dimm = 0; dimm < channel_info->DimmCount;
+ dimm++) {
+ dimm_info = &channel_info->DimmInfo[dimm];
+ printk(BIOS_DEBUG, " DIMM %d\n", dimm);
+ printk(BIOS_DEBUG, " 0x%02x: DimmId\n",
+ dimm_info->DimmId);
+ printk(BIOS_DEBUG, " %d: SizeInMb\n",
+ dimm_info->SizeInMb);
+ }
+ }
+ }
+
+ /*
+ * Allocate CBMEM area for DIMM information used to populate SMBIOS
+ * table 17
+ */
+ mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
+ printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
+ if (mem_info == NULL)
+ return;
+ memset(mem_info, 0, sizeof(*mem_info));
+
+ /* Describe the first N DIMMs in the system */
+ index = 0;
+ dimm_max = ARRAY_SIZE(mem_info->dimm);
+ for (channel = 0; channel < memory_info_hob->ChannelCount; channel++) {
+ if (index >= dimm_max)
+ break;
+ channel_info = &memory_info_hob->ChannelInfo[channel];
+ for (dimm = 0; dimm < channel_info->DimmCount; dimm++) {
+ if (index >= dimm_max)
+ break;
+ dimm_info = &channel_info->DimmInfo[dimm];
+
+ /* Populate the DIMM information */
+ if (dimm_info->SizeInMb) {
+ mem_info->dimm[index].dimm_size =
+ dimm_info->SizeInMb;
+ mem_info->dimm[index].ddr_type =
+ memory_info_hob->MemoryType;
+ mem_info->dimm[index].ddr_frequency =
+ memory_info_hob->MemoryFrequencyInMHz;
+ mem_info->dimm[index].channel_num =
+ channel_info->ChannelId;
+ mem_info->dimm[index].dimm_num =
+ dimm_info->DimmId;
+ switch (memory_info_hob->DataWidth) {
+ default:
+ case 8:
+ mem_info->dimm[index].bus_width =
+ MEMORY_BUS_WIDTH_8;
+ break;
+
+ case 16:
+ mem_info->dimm[index].bus_width =
+ MEMORY_BUS_WIDTH_16;
+ break;
+
+ case 32:
+ mem_info->dimm[index].bus_width =
+ MEMORY_BUS_WIDTH_32;
+ break;
+
+ case 64:
+ mem_info->dimm[index].bus_width =
+ MEMORY_BUS_WIDTH_64;
+ break;
+
+ case 128:
+ mem_info->dimm[index].bus_width =
+ MEMORY_BUS_WIDTH_128;
+ break;
+ }
+
+ /* Add any mainboard specific information */
+ mainboard_add_dimm_info(params, mem_info,
+ channel, dimm, index);
+ index++;
+ }
+ }
+ }
+ mem_info->dimm_cnt = index;
+ printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
+}
+
+/* Add any mainboard specific information */
+__attribute__((weak)) void mainboard_add_dimm_info(
+ struct romstage_params *params,
+ struct memory_info *mem_info,
+ int channel, int dimm, int index)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
+
+/* Get the memory configuration data */
+__attribute__((weak)) int mrc_cache_get_current(
+ const struct mrc_saved_data **cache)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+ return -1;
+}
+
+/* Save the memory configuration data */
+__attribute__((weak)) int mrc_cache_stash_data(void *data, size_t size)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+ return -1;
+}
+
+/* Transition RAM from off or self-refresh to active */
+__attribute__((weak)) void raminit(struct romstage_params *params)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+ post_code(0x34);
+ die("ERROR - No RAM initialization specified!\n");
+}
+
+void ramstage_cache_invalid(void)
+{
+ if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE))
+ /* Perform cold reset on invalid ramstage cache. */
+ hard_reset();
+}
+
+/* Display the memory configuration */
+__attribute__((weak)) void report_memory_config(void)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
+
+/* Choose top of stack and setup MTRRs */
+__attribute__((weak)) void *setup_stack_and_mtrrs(void)
+{
+ printk(BIOS_ERR, "WEAK: %s/%s called\n", __FILE__, __func__);
+ die("ERROR - Must specify top of stack!\n");
+ return NULL;
+}
+
+/* SOC initialization after RAM is enabled */
+__attribute__((weak)) void soc_after_ram_init(struct romstage_params *params)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
+
+/* SOC initialization before RAM is enabled */
+__attribute__((weak)) void soc_pre_ram_init(struct romstage_params *params)
+{
+ printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/romstage_after_verstage.S b/src/vendorcode/intel/fsp/fsp1_1/common/romstage_after_verstage.S
new file mode 100644
index 0000000..739db29
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/romstage_after_verstage.S
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */
+
+.text
+.global _start
+_start:
+ /* This is the romstage entry point when CONFIG_SEPARATE_VERSTAGE
+ * is used. The stack, descriptors, and gdt are already initialized
+ * by verstage. However, in order to maintain the semantics of
+ * CAR_GLOBAL variables we need to clear those to zero. */
+ cld
+ xor %eax, %eax
+ movl $(_car_global_end), %ecx
+ movl $(_car_global_start), %edi
+ sub %edi, %ecx
+ rep stosl
+ call romstage_after_verstage
+ #include "after_raminit.S"
+
+ movb $0x69, %ah
+ jmp .Lhlt
+
+.Lhlt:
+ xchg %al, %ah
+#if IS_ENABLED(CONFIG_POST_IO)
+ outb %al, $CONFIG_POST_IO_PORT
+#else
+ post_code(POST_DEAD_CODE)
+#endif
+ movl $LHLT_DELAY, %ecx
+.Lhlt_Delay:
+ outb %al, $0xED
+ loop .Lhlt_Delay
+ jmp .Lhlt
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/stack.c b/src/vendorcode/intel/fsp/fsp1_1/common/stack.c
new file mode 100644
index 0000000..e048229
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/stack.c
@@ -0,0 +1,178 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cbmem.h>
+#include <console/console.h>
+#include <cpu/x86/mtrr.h>
+#include <fsp/memmap.h>
+#include <fsp/romstage.h>
+#include <fsp/stack.h>
+#include <stdlib.h>
+
+const unsigned long romstage_ram_stack_size = CONFIG_ROMSTAGE_RAM_STACK_SIZE;
+
+/*
+ * Romstage needs quite a bit of stack for decompressing images since the lzma
+ * lib keeps its state on the stack during romstage.
+ */
+static unsigned long choose_top_of_stack(void)
+{
+ unsigned long stack_top;
+
+ /* cbmem_add() does a find() before add(). */
+ stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
+ romstage_ram_stack_size);
+ stack_top += romstage_ram_stack_size;
+ return stack_top;
+}
+
+/*
+ * setup_stack_and_mtrrs() determines the stack to use after
+ * cache-as-ram is torn down as well as the MTRR settings to use.
+ */
+void *setup_stack_and_mtrrs(void)
+{
+ size_t alignment;
+ uint32_t aligned_ram;
+ uint32_t mtrr_mask_upper;
+ uint32_t max_mtrrs;
+ uint32_t num_mtrrs;
+ uint32_t *slot;
+ unsigned long top_of_stack;
+
+ /* Display the MTTRs */
+ soc_display_mtrrs();
+
+ /* Top of stack needs to be aligned to a 8-byte boundary. */
+ top_of_stack = choose_top_of_stack();
+ slot = (void *)top_of_stack;
+ num_mtrrs = 0;
+ max_mtrrs = soc_get_variable_mtrr_count(NULL);
+
+ /*
+ * The upper bits of the MTRR mask need to set according to the number
+ * of physical address bits.
+ */
+ mtrr_mask_upper = (1 << ((cpuid_eax(0x80000008) & 0xff) - 32)) - 1;
+ alignment = mmap_region_granularity();
+ aligned_ram = ALIGN_DOWN(top_of_stack - romstage_ram_stack_size,
+ alignment);
+
+ /*
+ * The order for each MTRR is value then base with upper 32-bits of
+ * each value coming before the lower 32-bits. The reasoning for
+ * this ordering is to create a stack layout like the following:
+ *
+ * +36: MTRR mask 1 63:32
+ * +32: MTRR mask 1 31:0
+ * +28: MTRR base 1 63:32
+ * +24: MTRR base 1 31:0
+ * +20: MTRR mask 0 63:32
+ * +16: MTRR mask 0 31:0
+ * +12: MTRR base 0 63:32
+ * +8: MTRR base 0 31:0
+ * +4: Number of MTRRs to setup (described above)
+ * +0: Number of variable MTRRs to clear
+ */
+
+ /* Cache RAM as WB from 0 -> CONFIG_RAMTOP. */
+ slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
+ slot = stack_push32(slot, ~(CONFIG_RAMTOP - 1) | MTRR_PHYS_MASK_VALID);
+ slot = stack_push32(slot, 0); /* upper base */
+ slot = stack_push32(slot, 0 | MTRR_TYPE_WRBACK);
+ num_mtrrs++;
+
+ /*
+ * +-------------------------+ Top of RAM (aligned)
+ * | System Management Mode |
+ * | code and data | Length: CONFIG_TSEG_SIZE
+ * | (TSEG) |
+ * +-------------------------+ SMM base (aligned)
+ * | |
+ * | Chipset Reserved Memory | Length: Multiple of CONFIG_TSEG_SIZE
+ * | |
+ * +-------------------------+ top_of_ram (aligned)
+ * | |
+ * | CBMEM Root |
+ * | |
+ * +-------------------------+
+ * | |
+ * | FSP Reserved Memory |
+ * | |
+ * +-------------------------+
+ * | |
+ * | Various CBMEM Entries |
+ * | |
+ * +-------------------------+ top_of_stack (8 byte aligned)
+ * | |
+ * | stack (CBMEM Entry) |
+ * | |
+ * +-------------------------+
+ */
+
+ /*
+ * Cache the stack and the other CBMEM entries as well as part or all
+ * of the FSP reserved memory region.
+ */
+ slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
+ slot = stack_push32(slot, ~(alignment - 1) | MTRR_PHYS_MASK_VALID);
+ slot = stack_push32(slot, 0); /* upper base */
+ slot = stack_push32(slot, aligned_ram | MTRR_TYPE_WRBACK);
+ num_mtrrs++;
+
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
+ void *smm_base;
+ size_t smm_size;
+ uint32_t tseg_base;
+
+ /*
+ * Cache the TSEG region at the top of ram. This region is not
+ * restricted to SMM mode until SMM has been relocated. By setting
+ * the region to cacheable it provides faster access when relocating
+ * the SMM handler as well as using the TSEG region for other purposes.
+ */
+ smm_region(&smm_base, &smm_size);
+ tseg_base = (uint32_t)smm_base;
+ slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
+ slot = stack_push32(slot, ~(alignment - 1) | MTRR_PHYS_MASK_VALID);
+ slot = stack_push32(slot, 0); /* upper base */
+ slot = stack_push32(slot, tseg_base | MTRR_TYPE_WRBACK);
+ num_mtrrs++;
+#endif
+
+ /* Cache the ROM as WP just below 4GiB. */
+ slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */
+ slot = stack_push32(slot, ~(CONFIG_ROM_SIZE - 1) | MTRR_PHYS_MASK_VALID);
+ slot = stack_push32(slot, 0); /* upper base */
+ slot = stack_push32(slot, ~(CONFIG_ROM_SIZE - 1) | MTRR_TYPE_WRPROT);
+ num_mtrrs++;
+
+ /* Validate the MTRR usage */
+ if (num_mtrrs > max_mtrrs) {
+ printk(BIOS_ERR, "MTRRs: max = %d, used = %d, available=%d",
+ max_mtrrs, num_mtrrs, max_mtrrs - num_mtrrs);
+ die("ERROR - MTRR use count incorrect!\n");
+ }
+
+ /*
+ * Save the number of MTRRs to setup and clear. Return the stack
+ * location pointing to the number of MTRRs.
+ */
+ slot = stack_push32(slot, num_mtrrs);
+ slot = stack_push32(slot, max_mtrrs);
+ return slot;
+}
+
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/stage_cache.c b/src/vendorcode/intel/fsp/fsp1_1/common/stage_cache.c
new file mode 100644
index 0000000..2d594e6
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/stage_cache.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <fsp/memmap.h>
+#include <stage_cache.h>
+
+void stage_cache_external_region(void **base, size_t *size)
+{
+ if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
+ printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
+ *base = NULL;
+ *size = 0;
+ }
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/vbt.c b/src/vendorcode/intel/fsp/fsp1_1/common/vbt.c
new file mode 100644
index 0000000..414b88d
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/vbt.c
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Google Inc.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootmode.h>
+#include <console/console.h>
+#include <fsp/ramstage.h>
+#include <fsp/util.h>
+
+/* Locate VBT and pass it to FSP GOP */
+void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params)
+{
+ const optionrom_vbt_t *vbt_data = NULL;
+ uint32_t vbt_len;
+
+ /* Check boot mode - for S3 resume path VBT loading is not needed */
+ if (s3_resume) {
+ printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n");
+ } else if (display_init_required()) {
+ /* Get VBT data */
+ vbt_data = fsp_get_vbt(&vbt_len);
+ if (vbt_data != NULL)
+ printk(BIOS_DEBUG, "Passing VBT to GOP\n");
+ else
+ printk(BIOS_DEBUG, "VBT not found!\n");
+ } else {
+ printk(BIOS_DEBUG, "Not passing VBT to GOP\n");
+ }
+ params->GraphicsConfigPtr = (u32)vbt_data;
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_1/common/verstage.c b/src/vendorcode/intel/fsp/fsp1_1/common/verstage.c
new file mode 100644
index 0000000..d7cdfdf
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_1/common/verstage.c
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <fsp/car.h>
+#include <program_loading.h>
+
+void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
+{
+ run_romstage();
+ /* Will actually never return. */
+ return NULL;
+}
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/Kconfig b/src/vendorcode/intel/fsp/fsp2_0/common/Kconfig
new file mode 100644
index 0000000..19e04f7
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/Kconfig
@@ -0,0 +1,6 @@
+config PLATFORM_USES_FSP2_0
+ bool
+ help
+ Include FSP 2.0 wrappers and functionality
+
+
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/Makefile.inc b/src/vendorcode/intel/fsp/fsp2_0/common/Makefile.inc
new file mode 100644
index 0000000..3e94f2f
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/Makefile.inc
@@ -0,0 +1,28 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
+
+romstage-y += hand_off_block.c
+romstage-y += util.c
+romstage-y += memory_init.c
+
+ramstage-y += graphics.c
+ramstage-y += hand_off_block.c
+ramstage-y += notify.c
+ramstage-y += silicon_init.c
+ramstage-y += util.c
+
+CPPFLAGS_common += -I$(src)/drivers/intel/fsp2_0/include
+
+endif
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/graphics.c b/src/vendorcode/intel/fsp/fsp2_0/common/graphics.c
new file mode 100644
index 0000000..1480179
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/graphics.c
@@ -0,0 +1,105 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/util.h>
+
+enum pixel_format {
+ pixel_rgbx_8bpc = 0,
+ pixel_bgrx_8bpc = 1,
+ pixel_bitmask = 2, /* defined by <rgb>_mask values */
+};
+
+static const uint8_t uuid_graphics_info[16] = {
+ 0xce, 0x2c, 0xf6, 0x39, 0x25, 0x68, 0x69, 0x46,
+ 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07
+};
+
+struct hob_graphics_info {
+ uint64_t framebuffer_base;
+ uint32_t framebuffer_size;
+ uint32_t version;
+ uint32_t horizontal_resolution;
+ uint32_t vertical_resolution;
+ uint32_t pixel_format; /* See enum pixel_format */
+ uint32_t red_mask;
+ uint32_t green_mask;
+ uint32_t blue_mask;
+ uint32_t reserved_mask;
+ uint32_t pixels_per_scanline;
+} __attribute__((packed));
+
+struct pixel {
+ uint8_t pos;
+ uint8_t size;
+};
+
+static const struct fsp_framebuffer {
+ struct pixel red;
+ struct pixel green;
+ struct pixel blue;
+ struct pixel rsvd;
+} fsp_framebuffer_format_map[] = {
+ [pixel_rgbx_8bpc] = { {0, 8}, {8, 8}, {16, 8}, {24, 8} },
+ [pixel_bgrx_8bpc] = { {16, 8}, {8, 8}, {0, 8}, {24, 8} },
+};
+
+enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
+{
+ size_t size;
+ const struct hob_graphics_info *ginfo;
+ const struct fsp_framebuffer *fbinfo;
+
+ ginfo = fsp_find_extension_hob_by_uuid(uuid_graphics_info, &size);
+
+ if (!ginfo) {
+ printk(BIOS_ALERT, "Graphics hand-off block not found\n");
+ return CB_ERR;
+ }
+
+ if (ginfo->pixel_format > ARRAY_SIZE(fsp_framebuffer_format_map)) {
+ printk(BIOS_ALERT, "FSP set unknown framebuffer format: %d\n",
+ ginfo->pixel_format);
+ return CB_ERR;
+ }
+
+ fbinfo = fsp_framebuffer_format_map + ginfo->pixel_format;
+
+ framebuffer->physical_address = ginfo->framebuffer_base;
+ framebuffer->x_resolution = ginfo->horizontal_resolution;
+ framebuffer->y_resolution = ginfo->vertical_resolution;
+ framebuffer->bytes_per_line = ginfo->pixels_per_scanline * 4;
+ framebuffer->bits_per_pixel = 32;
+ framebuffer->red_mask_pos = fbinfo->red.pos;
+ framebuffer->red_mask_size = fbinfo->red.size;
+ framebuffer->green_mask_pos = fbinfo->green.pos;
+ framebuffer->green_mask_size = fbinfo->green.size;
+ framebuffer->blue_mask_pos = fbinfo->blue.pos;
+ framebuffer->blue_mask_size = fbinfo->blue.size;
+ framebuffer->reserved_mask_pos = fbinfo->rsvd.pos;
+ framebuffer->reserved_mask_size = fbinfo->rsvd.pos;
+ framebuffer->tag = LB_TAG_FRAMEBUFFER;
+ framebuffer->size = sizeof(*framebuffer);
+ return CB_SUCCESS;
+}
+
+uintptr_t fsp_load_vbt(void)
+{
+ void *vbt;
+
+ vbt = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_RAW, NULL);
+ if (!vbt)
+ printk(BIOS_NOTICE, "Could not locate a VBT file in CBFS\n");
+
+ return (uintptr_t)vbt;
+}
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/hand_off_block.c b/src/vendorcode/intel/fsp/fsp2_0/common/hand_off_block.c
new file mode 100644
index 0000000..00c5d26
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/hand_off_block.c
@@ -0,0 +1,305 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/io.h>
+#include <cbmem.h>
+#include <commonlib/helpers.h>
+#include <console/console.h>
+#include <fsp/util.h>
+#include <inttypes.h>
+#include <lib.h>
+#include <string.h>
+
+#define HOB_HEADER_LEN 8
+
+struct hob_header {
+ uint16_t type;
+ uint16_t length;
+} __attribute__((packed));
+
+struct hob_resource {
+ uint8_t owner_guid[16];
+ uint32_t type;
+ uint32_t attribute_type;
+ uint64_t addr;
+ uint64_t length;
+} __attribute__((packed));
+
+enum resource_type {
+ EFI_RESOURCE_SYSTEM_MEMORY = 0,
+ EFI_RESOURCE_MEMORY_MAPPED_IO = 1,
+ EFI_RESOURCE_IO = 2,
+ EFI_RESOURCE_FIRMWARE_DEVICE = 3,
+ EFI_RESOURCE_MEMORY_MAPPED_IO_PORT = 4,
+ EFI_RESOURCE_MEMORY_RESERVED = 5,
+ EFI_RESOURCE_IO_RESERVED = 6,
+ EFI_RESOURCE_MAX_MEMORY_TYPE = 7,
+};
+
+static const char *resource_names[] = {
+ [EFI_RESOURCE_SYSTEM_MEMORY] = "SYSTEM_MEMORY",
+ [EFI_RESOURCE_MEMORY_MAPPED_IO] = "MMIO",
+ [EFI_RESOURCE_IO] = "IO",
+ [EFI_RESOURCE_FIRMWARE_DEVICE] = "FIRMWARE_DEVICE",
+ [EFI_RESOURCE_MEMORY_MAPPED_IO_PORT] = "MMIO_PORT",
+ [EFI_RESOURCE_MEMORY_RESERVED] = "MEMORY_RESERVED",
+ [EFI_RESOURCE_IO_RESERVED] = "IO_RESERVED",
+};
+
+enum hob_type {
+ HOB_TYPE_HANDOFF = 0x0001,
+ HOB_TYPE_MEMORY_ALLOCATION = 0x0002,
+ HOB_TYPE_RESOURCE_DESCRIPTOR = 0x0003,
+ HOB_TYPE_GUID_EXTENSION = 0x0004,
+ HOB_TYPE_FV = 0x0005,
+ HOB_TYPE_CPU = 0x0006,
+ HOB_TYPE_MEMORY_POOL = 0x0007,
+ HOB_TYPE_FV2 = 0x0009,
+ HOB_TYPE_LOAD_PEIM_UNUSED = 0x000A,
+ HOB_TYPE_UCAPSULE = 0x000B,
+ HOB_TYPE_UNUSED = 0xFFFE,
+ HOB_TYPE_END_OF_HOB_LIST = 0xFFFF,
+};
+
+/* UUIDs (GUIDs) in little-endian, so they can be used with memcmp() */
+static const uint8_t uuid_owner_bootloader_tolum[16] = {
+ 0x56, 0x4f, 0xff, 0x73, 0x8e, 0xaa, 0x51, 0x44,
+ 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44,
+};
+
+static const uint8_t uuid_owner_fsp[16] = {
+ 0x59, 0x97, 0xa7, 0x69, 0x73, 0x13, 0x67, 0x43,
+ 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e,
+};
+
+static const uint8_t uuid_owner_tseg[16] = {
+ 0x7c, 0x74, 0x38, 0xd0, 0x0c, 0xd0, 0x80, 0x49,
+ 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55
+};
+
+static const uint8_t uuid_fsp_nv_storage[16] = {
+ 0x02, 0xcf, 0x1a, 0x72, 0x77, 0x4d, 0x2a, 0x4c,
+ 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0
+};
+
+static const uint8_t empty_uuid[16] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+static const struct uuid_name_map {
+ const void *uuid;
+ const char *name;
+} uuid_names[] = {
+ { uuid_owner_bootloader_tolum, "BOOTLOADER_TOLUM" },
+ { uuid_owner_fsp, "FSP_RESERVED_MEMORY" },
+ { uuid_owner_tseg, "TSEG" },
+ { uuid_fsp_nv_storage, "FSP_NV_STORAGE" },
+};
+
+static const char *resource_name(enum resource_type type)
+{
+ if (type >= ARRAY_SIZE(resource_names))
+ return "UNKNOWN";
+ return resource_names[type];
+}
+
+/*
+ * Utilities for walking HOBs
+ */
+
+static bool uuid_compare(const uint8_t uuid1[16], const uint8_t uuid2[16])
+{
+ return !memcmp(uuid1, uuid2, 16);
+}
+
+static const char *uuid_name(const uint8_t uuid[16])
+{
+ size_t i;
+ const struct uuid_name_map *owner_entry;
+
+ for (i = 0; i < ARRAY_SIZE(uuid_names); i++) {
+ owner_entry = uuid_names + i;
+ if (uuid_compare(uuid, owner_entry->uuid))
+ return owner_entry->name;
+ }
+ return "UNKNOWN";
+}
+
+static const struct hob_header *next_hob(const struct hob_header *parent)
+{
+ union {
+ const struct hob_header *hob;
+ uintptr_t addr;
+ } hob_walker;
+
+ hob_walker.hob = parent;
+ hob_walker.addr += parent->length;
+ return hob_walker.hob;
+}
+
+static const void *hob_header_to_struct(const struct hob_header *hob)
+{
+ union {
+ const struct hob_header *hob_hdr;
+ const void *hob_descr;
+ uintptr_t addr;
+ } hob_walker;
+
+ hob_walker.hob_hdr = hob;
+ hob_walker.addr += HOB_HEADER_LEN;
+ return hob_walker.hob_descr;
+}
+
+static const void *hob_header_to_extension_hob(const struct hob_header *hob)
+{
+ union {
+ const struct hob_header *hob_hdr;
+ const void *hob_descr;
+ uintptr_t addr;
+ } hob_walker;
+
+ hob_walker.hob_hdr = hob;
+ hob_walker.addr += HOB_HEADER_LEN + 16; /* header and 16-byte UUID */
+ return hob_walker.hob_descr;
+}
+
+static const
+struct hob_resource *hob_header_to_resource(const struct hob_header *hob)
+{
+ return hob_header_to_struct(hob);
+}
+
+/*
+ * Utilities for locating and identifying HOBs
+ */
+
+void fsp_save_hob_list(void *hob_list_ptr)
+{
+ void **cbmem_loc;
+ cbmem_loc = cbmem_add(CBMEM_ID_FSP_RUNTIME, sizeof(*hob_list_ptr));
+ *cbmem_loc = hob_list_ptr;
+}
+
+const void *fsp_get_hob_list(void)
+{
+ void **list_loc = cbmem_find(CBMEM_ID_FSP_RUNTIME);
+
+ return (list_loc) ? (*list_loc) : NULL;
+}
+
+static const
+struct hob_resource *find_resource_hob_by_uuid(const struct hob_header *hob,
+ const uint8_t uuid[16])
+{
+ const struct hob_resource *res;
+
+ for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) {
+
+ if (hob->type != HOB_TYPE_RESOURCE_DESCRIPTOR)
+ continue;
+
+ res = hob_header_to_resource(hob);
+ if (uuid_compare(res->owner_guid, uuid))
+ return res;
+ }
+ return NULL;
+}
+
+void fsp_find_reserved_memory(struct range_entry *re, const void *hob_list)
+{
+ const struct hob_resource *fsp_mem;
+
+ range_entry_init(re, 0, 0, 0);
+
+ fsp_mem = find_resource_hob_by_uuid(hob_list, uuid_owner_fsp);
+
+ if (!fsp_mem) {
+ return;
+ }
+
+ range_entry_init(re, fsp_mem->addr, fsp_mem->addr + fsp_mem->length, 0);
+}
+
+/*
+ * Utilities for printing HOB information
+ */
+
+static void print_guid(const void *base)
+{
+ uint32_t big;
+ uint16_t mid[2];
+
+ const uint8_t *id = base;
+ big = read32(id + 0);
+ mid[0] = read16(id + 4);
+ mid[1] = read16(id + 6);
+
+ printk(BIOS_DEBUG, "%08x-%04x-%04x-%02x%02x%02x%02x%02x%02x%02x%02x",
+ big, mid[0], mid[1],
+ id[8], id[9], id[10], id[11], id[12], id[13], id[14], id[15]);
+}
+
+static void print_resource_descriptor(const void *base)
+{
+ const struct hob_resource *res;
+
+ res = hob_header_to_resource(base);
+
+ printk(BIOS_DEBUG, "Resource %s, attribute %x\n",
+ resource_name(res->type), res->attribute_type);
+ printk(BIOS_DEBUG, "\t0x%08llx + 0x%08llx\n", res->addr, res->length);
+ if (!uuid_compare(res->owner_guid, empty_uuid)) {
+ printk(BIOS_DEBUG, "\tOwner GUID: ");
+ print_guid(res->owner_guid);
+ printk(BIOS_DEBUG, " (%s)\n", uuid_name(res->owner_guid));
+ }
+}
+
+
+void fsp_print_memory_resource_hobs(const void *hob_list)
+{
+ const struct hob_header *hob = hob_list;
+
+ for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) {
+ if (hob->type == HOB_TYPE_RESOURCE_DESCRIPTOR)
+ print_resource_descriptor(hob);
+ }
+}
+
+const void *fsp_find_extension_hob_by_uuid(const uint8_t *uuid, size_t *size)
+{
+ const uint8_t *hob_uuid;
+ const struct hob_header *hob = fsp_get_hob_list();
+
+ if (!hob)
+ return NULL;
+
+ for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) {
+
+ if (hob->type != HOB_TYPE_GUID_EXTENSION)
+ continue;
+
+ hob_uuid = hob_header_to_struct(hob);
+ if (uuid_compare(hob_uuid, uuid)) {
+ *size = hob->length - (HOB_HEADER_LEN + 16);
+ return hob_header_to_extension_hob(hob);
+ }
+ }
+
+ return NULL;
+}
+
+
+const void *fsp_find_nv_storage_data(size_t *size)
+{
+ return fsp_find_extension_hob_by_uuid(uuid_fsp_nv_storage, size);
+}
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/api.h b/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/api.h
new file mode 100644
index 0000000..d49fc42
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/api.h
@@ -0,0 +1,110 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _FSP2_0_API_H_
+#define _FSP2_0_API_H_
+
+#include <stddef.h>
+#include <memrange.h>
+#include <fsp/info_header.h>
+#include <soc/fsp/FspmUpd.h>
+#include <soc/fsp/FspsUpd.h>
+
+enum fsp_status {
+ FSP_SUCCESS = 0x00000000,
+ FSP_INVALID_PARAMETER = 0x80000002,
+ FSP_UNSUPPORTED = 0x80000003,
+ FSP_NOT_READY = 0x80000006,
+ FSP_DEVICE_ERROR = 0x80000007,
+ FSP_OUT_OF_RESOURCES = 0x80000009,
+ FSP_VOLUME_CORRUPTED = 0x8000000a,
+ FSP_NOT_FOUND = 0x8000000a,
+ FSP_TIMEOUT = 0x80000012,
+ FSP_ABORTED = 0x80000015,
+ FSP_INCOMPATIBLE_VERSION = 0x80000010,
+ FSP_SECURITY_VIOLATION = 0x8000001a,
+ FSP_CRC_ERROR = 0x8000001b,
+};
+
+enum fsp_boot_mode {
+ FSP_BOOT_WITH_FULL_CONFIGURATION = 0x00,
+ FSP_BOOT_WITH_MINIMAL_CONFIGURATION = 0x01,
+ FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES = 0x02,
+ FSP_BOOT_ON_S4_RESUME = 0x05,
+ FSP_BOOT_ON_S3_RESUME = 0x11,
+ FSP_BOOT_ON_FLASH_UPDATE = 0x12,
+ FSP_BOOT_IN_RECOVERY_MODE = 0x20
+};
+
+enum fsp_notify_phase {
+ AFTER_PCI_ENUM = 0x20,
+ READY_TO_BOOT = 0x40
+};
+
+
+/* Main FSP stages */
+enum fsp_status fsp_memory_init(void **hob_list, struct range_entry *r);
+enum fsp_status fsp_silicon_init(struct range_entry *r);
+enum fsp_status fsp_notify(enum fsp_notify_phase phase);
+
+/* Callbacks for updating stage-specific parameters */
+void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd);
+void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd);
+
+/*
+ * # DOCUMENTATION:
+ *
+ * This file defines the interface between coreboot and the FSP 2.0 wrapper
+ * fsp_memory_init(), fsp_silicon_init(), and fsp_notify() are the main entry
+ * points and map 1:1 to the FSP entry points of the same name.
+ *
+ * ### fsp_memory_init():
+ * - hob_list: retuns a pointer to the HOB storage area created by FSP
+ * - r: memory range that the binary is allowed to be loaded into
+ *
+ * This function is responsible for loading and executing the memory
+ * initialization code from the FSP-M binary. It expects this binary to reside
+ * in cbfs as FSP_M_FILE.
+ *
+ * The function takes one parameter, which is described below, but does not
+ * take in memory parameters as an argument. The memory parameters can be filled
+ * in with platform_fsp_memory_init_params_cb(). This is a callback symbol
+ * that fsp_memory_init() will call. The platform must provide this symbol.
+ *
+ * FSP returns information about the memory layout in a series of structures
+ * called hand-off-blocks (HOB). The "hob_list" output parameter will point to
+ * the start of the HOB list. The fsp reserved region will also be described by
+ * one of the HOBs. For more information on parsing these structures, see
+ * fsp/util.h
+ *
+ *
+ * ### fsp_silicon_init():
+ * - r: memory range that the binary is allowed to be loaded into
+ *
+ * This function is responsible for loading and executing the silicon
+ * initialization code from the FSP-S binary. It expects this binary to reside
+ * in cbfs as FSP_S_FILE.
+ *
+ * Like fsp_memory_init(), it provides a callback to fill in FSP-specific
+ * parameters, via platform_fsp_silicon_init_params_cb(). The platform must
+ * also provide this symbol.
+ *
+ *
+ * ### fsp_notify():
+ * - phase: Which FSP notification phase
+ *
+ * This function is responsible for loading and executing the notify code from
+ * the FSP-S binary. It expects that fsp_silicon_init() has already been called
+ * succesfully, and that the FSP-S binary is still loaded into memory.
+ */
+
+#endif /* _FSP2_0_API_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/info_header.h b/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/info_header.h
new file mode 100644
index 0000000..468101e
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/info_header.h
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _FSP2_0_INFO_HEADER_H_
+#define _FSP2_0_INFO_HEADER_H_
+
+#include <rules.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <types.h>
+
+#define FSP_HDR_OFFSET 0x94
+#define FSP_HDR_LEN 0x48
+#define FSP_HDR_SIGNATURE "FSPH"
+#define FSP_HDR_ATTRIB_FSPT (0b0001 << 28)
+#define FSP_HDR_ATTRIB_FSPM (0b0010 << 28)
+#define FSP_HDR_ATTRIB_FSPS (0b0011 << 28)
+
+struct fsp_header {
+ uint32_t fsp_revision;
+ size_t image_size;
+ uintptr_t image_base;
+ uint32_t image_attribute;
+ size_t cfg_region_offset;
+ size_t cfg_region_size;
+ size_t notify_phase_entry_offset;
+ size_t memory_init_entry_offset;
+ size_t silicon_init_entry_offset;
+ char image_id[sizeof(uint64_t) + 1];
+ uint8_t revision;
+};
+
+enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob);
+void fsp_print_header_info(const struct fsp_header *hdr);
+void fsp_print_upd_info(const struct fsp_header *hdr, void *cfg_blob);
+
+#if ENV_RAMSTAGE
+/*
+ * This is a FSP_INFO_HEADER that came from fsps.bin blob. It contains
+ * both SiliconInit and Notify APIs. When SiliconInit is loaded the
+ * header is saved so that when Notify is called we do not have to start
+ * header parsing again.
+ */
+extern struct fsp_header fsps_hdr;
+#endif
+
+#endif /* _FSP2_0_INFO_HEADER_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/util.h b/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/util.h
new file mode 100644
index 0000000..d9d9539
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/include/fsp/util.h
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _FSP2_0_UTIL_H_
+#define _FSP2_0_UTIL_H_
+
+#include <boot/coreboot_tables.h>
+#include <fsp/info_header.h>
+#include <memrange.h>
+
+/*
+ * Hand-off-block handling functions that depend on CBMEM, and thus can only
+ * be used after cbmem_initialize().
+ */
+void fsp_save_hob_list(void *hob_list_ptr);
+const void *fsp_get_hob_list(void);
+const void *fsp_find_extension_hob_by_uuid(const uint8_t *uuid, size_t *size);
+const void *fsp_find_nv_storage_data(size_t *size);
+enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
+/*
+ * Hand-off-block utilities which do not depend on CBMEM, but need to be passed
+ * the HOB list explicitly.
+ */
+void fsp_find_reserved_memory(struct range_entry *re, const void *hob_list);
+void fsp_print_memory_resource_hobs(const void *hob_list);
+
+/* Load an FSP binary into CBFS, and fill the associated fsp_header struct */
+enum cb_err fsp_load_binary(struct fsp_header *hdr, const char *name,
+ struct range_entry *r);
+/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
+uintptr_t fsp_load_vbt(void);
+
+#endif /* _FSP2_0_UTIL_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/memory_init.c b/src/vendorcode/intel/fsp/fsp2_0/common/memory_init.c
new file mode 100644
index 0000000..8033937
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/memory_init.c
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/io.h>
+#include <arch/cpu.h>
+#include <console/console.h>
+#include <fsp/api.h>
+#include <fsp/util.h>
+#include <memrange.h>
+#include <string.h>
+#include <timestamp.h>
+
+typedef asmlinkage enum fsp_status (*fsp_memory_init_fn)
+ (void *raminit_upd, void **hob_list);
+
+static enum fsp_status do_fsp_memory_init(void **hob_list_ptr,
+ struct fsp_header *hdr)
+{
+ enum fsp_status status;
+ fsp_memory_init_fn fsp_raminit;
+ struct FSPM_UPD fspm_upd, *upd;
+
+ post_code(0x34);
+
+ upd = (struct FSPM_UPD *)(hdr->cfg_region_offset + hdr->image_base);
+
+ if (upd->FspUpdHeader.Signature != FSPM_UPD_SIGNATURE) {
+ printk(BIOS_ERR, "Invalid FSPM signature\n");
+ return FSP_INCOMPATIBLE_VERSION;
+ }
+
+ /* Copy the default values from the UPD area */
+ memcpy(&fspm_upd, upd, sizeof(fspm_upd));
+
+ /* Give SoC and mainboard a chance to update the UPD */
+ platform_fsp_memory_init_params_cb(&fspm_upd);
+
+ /* Call FspMemoryInit */
+ fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset);
+ printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_raminit);
+ printk(BIOS_SPEW, "\t%p: raminit_upd\n", &fspm_upd);
+ printk(BIOS_SPEW, "\t%p: hob_list ptr\n", hob_list_ptr);
+
+ timestamp_add_now(TS_FSP_MEMORY_INIT_START);
+ status = fsp_raminit(&fspm_upd, hob_list_ptr);
+ post_code(0x37);
+ timestamp_add_now(TS_FSP_MEMORY_INIT_END);
+
+ printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
+
+ return status;
+}
+
+enum fsp_status fsp_memory_init(void **hob_list, struct range_entry *range)
+{
+ struct fsp_header hdr;
+
+ /* TODO: do not hardcode CBFS file names */
+ if (fsp_load_binary(&hdr, "blobs/fspm.bin", range) != CB_SUCCESS)
+ return FSP_NOT_FOUND;
+
+ return do_fsp_memory_init(hob_list, &hdr);
+}
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/notify.c b/src/vendorcode/intel/fsp/fsp2_0/common/notify.c
new file mode 100644
index 0000000..820bd45
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/notify.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/cpu.h>
+#include <console/console.h>
+#include <fsp/api.h>
+#include <fsp/util.h>
+#include <string.h>
+
+struct fsp_notify_params {
+ enum fsp_notify_phase phase;
+};
+
+typedef asmlinkage enum fsp_status (*fsp_notify_fn)
+ (struct fsp_notify_params *);
+
+enum fsp_status fsp_notify(enum fsp_notify_phase phase)
+{
+ fsp_notify_fn fspnotify;
+ struct fsp_notify_params notify_params = { .phase = phase };
+
+ if (!fsps_hdr.silicon_init_entry_offset)
+ return FSP_NOT_FOUND;
+
+ fspnotify = (void*) (fsps_hdr.image_base +
+ fsps_hdr.notify_phase_entry_offset);
+
+ printk(BIOS_DEBUG, "FspNotify %x\n", (uint32_t) phase);
+
+ return fspnotify(¬ify_params);
+}
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/silicon_init.c b/src/vendorcode/intel/fsp/fsp2_0/common/silicon_init.c
new file mode 100644
index 0000000..66043c8
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/silicon_init.c
@@ -0,0 +1,59 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/cpu.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/api.h>
+#include <fsp/util.h>
+#include <string.h>
+
+struct fsp_header fsps_hdr;
+
+typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn)
+ (void *silicon_upd);
+
+static enum fsp_status do_silicon_init(struct fsp_header *hdr)
+{
+ struct FSPS_UPD upd, *supd;
+ fsp_silicon_init_fn silicon_init;
+ enum fsp_status status;
+
+ supd = (struct FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base);
+
+ if (supd->FspUpdHeader.Signature != FSPS_UPD_SIGNATURE) {
+ printk(BIOS_ERR, "Invalid FSPS signature\n");
+ return FSP_INCOMPATIBLE_VERSION;
+ }
+
+ memcpy(&upd, supd, sizeof(upd));
+
+ /* Give SoC/mainboard a chance to populate entries */
+ platform_fsp_silicon_init_params_cb(&upd);
+
+ silicon_init = (void *) (hdr->image_base +
+ hdr->silicon_init_entry_offset);
+
+ status = silicon_init(&upd);
+ printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
+ return status;
+}
+
+enum fsp_status fsp_silicon_init(struct range_entry *range)
+{
+ /* Load FSP-S and save FSP header. We will need it for Notify */
+ /* TODO: do not hardcode CBFS file names */
+ if (fsp_load_binary(&fsps_hdr, "blobs/fsps.bin", range) != CB_SUCCESS)
+ return FSP_NOT_FOUND;
+
+ return do_silicon_init(&fsps_hdr);
+}
diff --git a/src/vendorcode/intel/fsp/fsp2_0/common/util.c b/src/vendorcode/intel/fsp/fsp2_0/common/util.c
new file mode 100644
index 0000000..743bc9a
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/common/util.c
@@ -0,0 +1,138 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/io.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/util.h>
+#include <lib.h>
+#include <memrange.h>
+#include <program_loading.h>
+#include <string.h>
+
+static bool looks_like_fsp_header(const uint8_t *raw_hdr)
+{
+ if (memcmp(raw_hdr, FSP_HDR_SIGNATURE, 4)) {
+ printk(BIOS_ALERT, "Did not find a valid FSP signature\n");
+ return false;
+ }
+
+ if (read32(raw_hdr + 4) != FSP_HDR_LEN) {
+ printk(BIOS_ALERT, "FSP header has invalid length\n");
+ return false;
+ }
+
+ return true;
+}
+
+enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob)
+{
+ const uint8_t *raw_hdr = fsp_blob;
+
+ if (!looks_like_fsp_header(raw_hdr))
+ return CB_ERR;
+
+ hdr->revision = read8(raw_hdr + 11);
+ hdr->fsp_revision = read32(raw_hdr + 12);
+ memcpy(hdr->image_id, raw_hdr + 16, ARRAY_SIZE(hdr->image_id));
+ hdr->image_id[ARRAY_SIZE(hdr->image_id) - 1] = '\0';
+ hdr->image_size = read32(raw_hdr + 24);
+ hdr->image_base = read32(raw_hdr + 28);
+ hdr->image_attribute = read32(raw_hdr + 32);
+ hdr->cfg_region_offset = read32(raw_hdr + 36);
+ hdr->cfg_region_size = read32(raw_hdr + 40);
+ hdr->notify_phase_entry_offset = read32(raw_hdr + 56);
+ hdr->memory_init_entry_offset = read32(raw_hdr + 60);
+ hdr->silicon_init_entry_offset = read32(raw_hdr + 68);
+
+ return CB_SUCCESS;
+}
+
+void fsp_print_header_info(const struct fsp_header *hdr)
+{
+ printk(BIOS_DEBUG, "Revision %u, image ID: %s, base 0x%lx + 0x%zx\n",
+ hdr->revision, hdr->image_id, hdr->image_base, hdr->image_size);
+ printk(BIOS_DEBUG, "\tConfig region 0x%zx + 0x%zx\n",
+ hdr->cfg_region_offset, hdr->cfg_region_size);
+
+ if (hdr->image_attribute & FSP_HDR_ATTRIB_FSPM) {
+ printk(BIOS_DEBUG, "\tMemory init offset 0x%zx\n",
+ hdr->memory_init_entry_offset);
+ }
+
+ if (hdr->image_attribute & FSP_HDR_ATTRIB_FSPS) {
+ printk(BIOS_DEBUG, "\tSilicon init offset 0x%zx\n",
+ hdr->silicon_init_entry_offset);
+ printk(BIOS_DEBUG, "\tNotify phase offset 0x%zx\n",
+ hdr->notify_phase_entry_offset);
+ }
+
+}
+
+/* TODO: this won't work for SoC's that need to XIP certain modules. */
+enum cb_err fsp_load_binary(struct fsp_header *hdr,
+ const char *name,
+ struct range_entry *range)
+{
+ struct cbfsf file_desc;
+ struct region_device file_data;
+ void *membase;
+
+ if (cbfs_boot_locate(&file_desc, name, NULL)) {
+ printk(BIOS_ERR, "Could not locate %s in CBFS\n", name);
+ return CB_ERR;
+ }
+
+ cbfs_file_data(&file_data, &file_desc);
+
+ /* Map just enough of the file to be able to parse the header. */
+ membase = rdev_mmap(&file_data, FSP_HDR_OFFSET, FSP_HDR_LEN);
+
+ if (membase == NULL) {
+ printk(BIOS_ERR, "Could not mmap() '%s' FSP header.\n", name);
+ return CB_ERR;
+ }
+
+ if (fsp_identify(hdr, membase) != CB_SUCCESS) {
+ rdev_munmap(&file_data, membase);
+ printk(BIOS_ERR, "%s did not have a valid FSP header\n", name);
+ return CB_ERR;
+ }
+
+ rdev_munmap(&file_data, membase);
+
+ fsp_print_header_info(hdr);
+
+ /* Check if size specified in the header matches the cbfs file size */
+ if (region_device_sz(&file_data) < hdr->image_size) {
+ printk(BIOS_ERR, "%s size bigger than cbfs file.\n", name);
+ return CB_ERR;
+ }
+
+ /* Check if the binary load address is within expected range */
+ /* TODO: this doesn't check the current running program footprint. */
+ if (range_entry_base(range) > hdr->image_base ||
+ range_entry_end(range) <= hdr->image_base + hdr->image_size) {
+ printk(BIOS_ERR, "%s is outside of allowed range\n", name);
+ return CB_ERR;
+ }
+
+ /* Load binary into memory. */
+ if (rdev_readat(&file_data, (void *)hdr->image_base, 0, hdr->image_size) < 0)
+ return CB_ERR;
+
+ /* Signal that FSP component has been loaded. */
+ prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL);
+
+ return CB_SUCCESS;
+}
1
0
New patch to review for coreboot: vendorcode/intel: Make directory structure more uniform
by Stefan Reinauer 24 Apr '16
by Stefan Reinauer 24 Apr '16
24 Apr '16
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14498
-gerrit
commit 1ef8ec133734807d7356660956a988a7005e694e
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Sun Apr 24 11:09:19 2016 -0700
vendorcode/intel: Make directory structure more uniform
Right now, FSP 1.0 code is in src/vendorcode/intel/fsp1_0 whereas
FSP 1.1 code is in src/vendorcode/intel/fsp/fsp1_1. Move all FSP
code to src/vendorcode/intel/fsp to make the code structure easier
to understand.
Change-Id: Ic44f485ae98627e79cca157676b6597f52d0ef0d
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
---
src/vendorcode/intel/Makefile.inc | 6 +-
.../fsp/fsp1_0/baytrail/absf/minnowmax_1gb.absf | 328 +++++++++++++
.../fsp/fsp1_0/baytrail/absf/minnowmax_2gb.absf | 328 +++++++++++++
.../intel/fsp/fsp1_0/baytrail/include/azalia.h | 66 +++
.../intel/fsp/fsp1_0/baytrail/include/fsp.h | 69 +++
.../intel/fsp/fsp1_0/baytrail/include/fspapi.h | 65 +++
.../intel/fsp/fsp1_0/baytrail/include/fspffs.h | 506 +++++++++++++++++++
.../intel/fsp/fsp1_0/baytrail/include/fspfv.h | 247 ++++++++++
.../intel/fsp/fsp1_0/baytrail/include/fsphob.h | 542 ++++++++++++++++++++
.../fsp/fsp1_0/baytrail/include/fspinfoheader.h | 62 +++
.../fsp/fsp1_0/baytrail/include/fspplatform.h | 78 +++
.../intel/fsp/fsp1_0/baytrail/include/fsptypes.h | 116 +++++
.../intel/fsp/fsp1_0/baytrail/include/fspvpd.h | 126 +++++
.../intel/fsp/fsp1_0/baytrail/srx/board_fsp.c | 186 +++++++
.../intel/fsp/fsp1_0/baytrail/srx/fsphob.c | 198 ++++++++
.../intel/fsp/fsp1_0/broadwell_de/include/fsp.h | 45 ++
.../intel/fsp/fsp1_0/broadwell_de/include/fspapi.h | 107 ++++
.../fsp/fsp1_0/broadwell_de/include/fspbootmode.h | 45 ++
.../intel/fsp/fsp1_0/broadwell_de/include/fspffs.h | 506 +++++++++++++++++++
.../intel/fsp/fsp1_0/broadwell_de/include/fspfv.h | 247 ++++++++++
.../intel/fsp/fsp1_0/broadwell_de/include/fsphob.h | 427 ++++++++++++++++
.../fsp1_0/broadwell_de/include/fspinfoheader.h | 118 +++++
.../fsp/fsp1_0/broadwell_de/include/fspplatform.h | 75 +++
.../fsp/fsp1_0/broadwell_de/include/fspsupport.h | 118 +++++
.../fsp/fsp1_0/broadwell_de/include/fsptypes.h | 220 +++++++++
.../intel/fsp/fsp1_0/broadwell_de/include/fspvpd.h | 146 ++++++
.../intel/fsp/fsp1_0/broadwell_de/srx/fspsupport.c | 454 +++++++++++++++++
.../fsp/fsp1_0/ivybridge_bd82x6x/include/fspapi.h | 63 +++
.../fsp/fsp1_0/ivybridge_bd82x6x/include/fspffs.h | 506 +++++++++++++++++++
.../fsp/fsp1_0/ivybridge_bd82x6x/include/fspfv.h | 247 ++++++++++
.../fsp/fsp1_0/ivybridge_bd82x6x/include/fsphob.h | 507 +++++++++++++++++++
.../ivybridge_bd82x6x/include/fspinfoheader.h | 62 +++
.../fsp1_0/ivybridge_bd82x6x/include/fspplatform.h | 63 +++
.../fsp1_0/ivybridge_bd82x6x/include/fsptypes.h | 116 +++++
.../fsp1_0/ivybridge_bd82x6x/include/mem_config.h | 131 +++++
.../fsp/fsp1_0/ivybridge_bd82x6x/include/peifsp.h | 42 ++
.../fsp/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c | 207 ++++++++
.../fsp/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h | 60 +++
.../fsp/fsp1_0/ivybridge_i89xx/include/fspapi.h | 49 ++
.../fsp/fsp1_0/ivybridge_i89xx/include/fspffs.h | 506 +++++++++++++++++++
.../fsp/fsp1_0/ivybridge_i89xx/include/fspfv.h | 247 ++++++++++
.../fsp/fsp1_0/ivybridge_i89xx/include/fsphob.h | 507 +++++++++++++++++++
.../fsp1_0/ivybridge_i89xx/include/fspinfoheader.h | 62 +++
.../fsp1_0/ivybridge_i89xx/include/fspplatform.h | 52 ++
.../fsp/fsp1_0/ivybridge_i89xx/include/fsptypes.h | 116 +++++
.../fsp1_0/ivybridge_i89xx/include/mem_config.h | 131 +++++
.../fsp/fsp1_0/ivybridge_i89xx/include/peifsp.h | 42 ++
.../intel/fsp/fsp1_0/ivybridge_i89xx/srx/fsphob.c | 207 ++++++++
.../intel/fsp/fsp1_0/rangeley/include/fspapi.h | 67 +++
.../fsp/fsp1_0/rangeley/include/fspbootmode.h | 54 ++
.../intel/fsp/fsp1_0/rangeley/include/fspffs.h | 507 +++++++++++++++++++
.../intel/fsp/fsp1_0/rangeley/include/fspfv.h | 249 ++++++++++
.../intel/fsp/fsp1_0/rangeley/include/fspguid.h | 69 +++
.../intel/fsp/fsp1_0/rangeley/include/fsphob.h | 544 +++++++++++++++++++++
.../fsp/fsp1_0/rangeley/include/fspinfoheader.h | 62 +++
.../fsp/fsp1_0/rangeley/include/fspplatform.h | 114 +++++
.../intel/fsp/fsp1_0/rangeley/include/fspsupport.h | 95 ++++
.../intel/fsp/fsp1_0/rangeley/include/fsptypes.h | 183 +++++++
.../intel/fsp/fsp1_0/rangeley/include/fspvpd.h | 89 ++++
.../intel/fsp/fsp1_0/rangeley/srx/fsp_support.c | 288 +++++++++++
.../intel/fsp/fsp1_0/rangeley/srx/fsphob.c | 204 ++++++++
.../intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf | 328 -------------
.../intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf | 328 -------------
.../intel/fsp1_0/baytrail/include/azalia.h | 66 ---
src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h | 69 ---
.../intel/fsp1_0/baytrail/include/fspapi.h | 65 ---
.../intel/fsp1_0/baytrail/include/fspffs.h | 506 -------------------
.../intel/fsp1_0/baytrail/include/fspfv.h | 247 ----------
.../intel/fsp1_0/baytrail/include/fsphob.h | 542 --------------------
.../intel/fsp1_0/baytrail/include/fspinfoheader.h | 62 ---
.../intel/fsp1_0/baytrail/include/fspplatform.h | 78 ---
.../intel/fsp1_0/baytrail/include/fsptypes.h | 116 -----
.../intel/fsp1_0/baytrail/include/fspvpd.h | 126 -----
.../intel/fsp1_0/baytrail/srx/board_fsp.c | 186 -------
src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c | 198 --------
.../intel/fsp1_0/broadwell_de/include/fsp.h | 45 --
.../intel/fsp1_0/broadwell_de/include/fspapi.h | 107 ----
.../fsp1_0/broadwell_de/include/fspbootmode.h | 45 --
.../intel/fsp1_0/broadwell_de/include/fspffs.h | 506 -------------------
.../intel/fsp1_0/broadwell_de/include/fspfv.h | 247 ----------
.../intel/fsp1_0/broadwell_de/include/fsphob.h | 427 ----------------
.../fsp1_0/broadwell_de/include/fspinfoheader.h | 118 -----
.../fsp1_0/broadwell_de/include/fspplatform.h | 75 ---
.../intel/fsp1_0/broadwell_de/include/fspsupport.h | 118 -----
.../intel/fsp1_0/broadwell_de/include/fsptypes.h | 220 ---------
.../intel/fsp1_0/broadwell_de/include/fspvpd.h | 146 ------
.../intel/fsp1_0/broadwell_de/srx/fspsupport.c | 454 -----------------
.../fsp1_0/ivybridge_bd82x6x/include/fspapi.h | 63 ---
.../fsp1_0/ivybridge_bd82x6x/include/fspffs.h | 506 -------------------
.../intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h | 247 ----------
.../fsp1_0/ivybridge_bd82x6x/include/fsphob.h | 507 -------------------
.../ivybridge_bd82x6x/include/fspinfoheader.h | 62 ---
.../fsp1_0/ivybridge_bd82x6x/include/fspplatform.h | 63 ---
.../fsp1_0/ivybridge_bd82x6x/include/fsptypes.h | 116 -----
.../fsp1_0/ivybridge_bd82x6x/include/mem_config.h | 131 -----
.../fsp1_0/ivybridge_bd82x6x/include/peifsp.h | 42 --
.../intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c | 207 --------
.../intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h | 60 ---
.../intel/fsp1_0/ivybridge_i89xx/include/fspapi.h | 49 --
.../intel/fsp1_0/ivybridge_i89xx/include/fspffs.h | 506 -------------------
.../intel/fsp1_0/ivybridge_i89xx/include/fspfv.h | 247 ----------
.../intel/fsp1_0/ivybridge_i89xx/include/fsphob.h | 507 -------------------
.../fsp1_0/ivybridge_i89xx/include/fspinfoheader.h | 62 ---
.../fsp1_0/ivybridge_i89xx/include/fspplatform.h | 52 --
.../fsp1_0/ivybridge_i89xx/include/fsptypes.h | 116 -----
.../fsp1_0/ivybridge_i89xx/include/mem_config.h | 131 -----
.../intel/fsp1_0/ivybridge_i89xx/include/peifsp.h | 42 --
.../intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c | 207 --------
.../intel/fsp1_0/rangeley/include/fspapi.h | 67 ---
.../intel/fsp1_0/rangeley/include/fspbootmode.h | 54 --
.../intel/fsp1_0/rangeley/include/fspffs.h | 507 -------------------
.../intel/fsp1_0/rangeley/include/fspfv.h | 249 ----------
.../intel/fsp1_0/rangeley/include/fspguid.h | 69 ---
.../intel/fsp1_0/rangeley/include/fsphob.h | 544 ---------------------
.../intel/fsp1_0/rangeley/include/fspinfoheader.h | 62 ---
.../intel/fsp1_0/rangeley/include/fspplatform.h | 114 -----
.../intel/fsp1_0/rangeley/include/fspsupport.h | 95 ----
.../intel/fsp1_0/rangeley/include/fsptypes.h | 183 -------
.../intel/fsp1_0/rangeley/include/fspvpd.h | 89 ----
.../intel/fsp1_0/rangeley/srx/fsp_support.c | 288 -----------
src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c | 204 --------
121 files changed, 11877 insertions(+), 11875 deletions(-)
diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc
index 1f9ef6d..cf06e36 100644
--- a/src/vendorcode/intel/Makefile.inc
+++ b/src/vendorcode/intel/Makefile.inc
@@ -13,15 +13,17 @@
## GNU General Public License for more details.
##
+# This is for FSP 1.0 and should be moved into fsp/fsp1_0
ifneq ($(CONFIG_FSP_VENDORCODE_HEADER_PATH),)
FSP_PATH := $(call strip_quotes,$(CONFIG_FSP_VENDORCODE_HEADER_PATH))
-FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)/srx/*.c)
-FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)/srx/$(notdir $(file)))
+FSP_SRC_FILES := $(wildcard src/vendorcode/intel/fsp/$(FSP_PATH)/srx/*.c)
+FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), fsp/$(FSP_PATH)/srx/$(notdir $(file)))
ramstage-y += $(FSP_C_INPUTS)
CFLAGS_x86_32 += -Isrc/vendorcode/intel/$(FSP_PATH)/include
endif
+# This should be moved into edk2/uefi_2.4
ifeq ($(CONFIG_UEFI_2_4_BINDING),y)
# ProccessorBind.h provided in Ia32 directory. Types are derived from ia32.
# It's possible to provide our own ProcessorBind.h using posix types. However,
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/absf/minnowmax_1gb.absf b/src/vendorcode/intel/fsp/fsp1_0/baytrail/absf/minnowmax_1gb.absf
new file mode 100644
index 0000000..66ab0d7
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/absf/minnowmax_1gb.absf
@@ -0,0 +1,328 @@
+//
+// This file contains an 'Intel Peripheral Driver' and is
+// licensed for Intel CPUs and chipsets under the terms of your
+// license agreement with Intel or your vendor. This file must not
+// be modified by end users or could render the generated boot loader
+// inoperable.
+//
+// @file
+// Boot Setting File for Platform: Bayley Bay Platform
+//
+// Copyright (c) 2010-2013 Intel Corporation. All rights reserved
+// This software and associated documentation (if any) is furnished
+// under a license and may only be used or copied in accordance
+// with the terms of the license. Except as permitted by such
+// license, no part of this software or documentation may be
+// reproduced, stored in a retrieval system, or transmitted in any
+// form or by any means without the express written consent of
+// Intel Corporation.
+//
+//
+
+
+GlobalDataDef
+ SKUID = 0 $_AS_BUILT_ = 0x01 , "DEFAULT"
+EndGlobalData
+
+StructDef
+
+ Find "VLV2UPDR"
+ Skip 24 bytes
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize 2 bytes $_AS_BUILT_ = 0x1, 0x0 $_DEFAULT_ = 0x0001
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize 2 bytes $_AS_BUILT_ = 0x0, 0x8 $_DEFAULT_ = 0x0800
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA0
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA2
+ $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdSataMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_AzaliaConfigPtr 4 bytes $_AS_BUILT_ = 0x0, 0x0, 0x0, 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdGttSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_ISPEnable 1 bytes $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+
+ Find "VLYVIEW1"
+ $gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_AS_BUILT_ = 0x2, 0x3, 0x0, 0x0 $_DEFAULT_ = 0x00000302
+ Skip 24 bytes
+ $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 2
+
+ $DIMM_MemDown 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
+ $DRAM_Speed 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 2
+ $DRAM_Type 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $Rank_En_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $Rank_En_1_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $DIMM_DWidth_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
+ $DIMM_Density_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $DIMM_BusWidth_0_0 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 3
+ $DIMM_Sides_0_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $tCL 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
+ $tRP_tRCD 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
+ $tWR 1 byte $_AS_BUILT_ = 0x8 $_DEFAULT_ = 10
+ $tWTR 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
+ $tRRD 1 byte $_AS_BUILT_ = 0x6 $_DEFAULT_ = 4
+ $tRTP 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
+ $tFAW 1 byte $_AS_BUILT_ = 0x14 $_DEFAULT_ = 20
+
+EndStruct
+
+List &DRAMSPEED
+ Selection 0x0 , "800 MHz"
+ Selection 0x1 , "1066 MHz"
+ Selection 0x2 , "1333 MHz"
+ Selection 0x3 , "1600 MHz"
+EndList
+
+List &DRAMTYPE
+ Selection 0x0 , "DDR3"
+ Selection 0x1 , "DDR3L"
+ Selection 0x2 , "DDR3U"
+ //Selection 0x3 , "LPDDR2"
+ Selection 0x4 , "LPDDR2"
+ Selection 0x5 , "LPDDR3"
+ Selection 0x6 , "DDR4"
+EndList
+
+List &DIMMDWIDTH
+ Selection 0x0 , "x8"
+ Selection 0x1 , "x16"
+ Selection 0x2 , "x32"
+EndList
+
+List &DIMMDENSITY
+ Selection 0x0 , "1 Gbit"
+ Selection 0x1 , "2 Gbit"
+ Selection 0x2 , "4 Gbit"
+ Selection 0x3 , "8 Gbit"
+EndList
+
+List &DIMMBUSWIDTH
+ Selection 0x0 , "8 bits"
+ Selection 0x1 , "16 bits"
+ Selection 0x2 , "32 bits"
+ Selection 0x3 , "64 bits"
+EndList
+
+List &RANKPERDIMM
+ Selection 0x1 , "2 Ranks"
+ Selection 0x0 , "1 Rank"
+EndList
+
+List &SATA_MODE
+ Selection 0x1 , "AHCI"
+ Selection 0x0 , "IDE"
+EndList
+
+List &EMMC_MODES
+ Selection 0x0 , "Disabled"
+ Selection 0x1 , "Auto"
+ Selection 0x2 , "eMMC 4.1"
+ Selection 0x3 , "eMMC 4.5"
+EndList
+
+List &EN_DIS
+ Selection 0x1 , "Enabled"
+ Selection 0x0 , "Disabled"
+EndList
+
+List &EN_DIS_AUTO
+ Selection 0x2 , "Auto"
+ Selection 0x1 , "Enabled"
+ Selection 0x0 , "Disabled"
+EndList
+
+List &MMIO_SIZES
+ Selection 0x400, "1.0 GB"
+ Selection 0x600, "1.5 GB"
+ Selection 0x800, "2.0 GB"
+EndList
+
+List &TSEG_SIZES
+ Selection 0x01, "1 MB"
+ Selection 0x02, "2 MB"
+ Selection 0x04, "4 MB"
+ Selection 0x08, "8 MB"
+EndList
+
+List &IGDPREALLOC_SIZES
+ Selection 0x01, "32 MB"
+ Selection 0x02, "64 MB"
+ Selection 0x03, "96 MB"
+ Selection 0x04, "128 MB"
+ Selection 0x05, "160 MB"
+ Selection 0x06, "192 MB"
+ Selection 0x07, "224 MB"
+ Selection 0x08, "256 MB"
+ Selection 0x09, "288 MB"
+ Selection 0x0A, "320 MB"
+ Selection 0x0B, "352 MB"
+ Selection 0x0C, "384 MB"
+ Selection 0x0D, "416 MB"
+ Selection 0x0E, "448 MB"
+ Selection 0x0F, "480 MB"
+ Selection 0x10, "512 MB"
+EndList
+
+List &APERTURE_SIZES
+ Selection 0x1 , "128 MB"
+ Selection 0x2 , "256 MB"
+ Selection 0x3 , "512 MB"
+EndList
+
+List >T_SIZES
+ Selection 0x1 , "1 MB"
+ Selection 0x2 , "2 MB"
+EndList
+
+List &PCI_ACPI
+ Selection 0x2 , "ACPI Mode"
+ Selection 0x1 , "PCI Mode"
+ Selection 0x0 , "Disabled"
+EndList
+
+List &PLATFORM_TYPE
+ Selection 0x2 , "BayleyBay Platform Type"
+ Selection 0x3 , "BakerSport Platform (ECC) Type"
+EndList
+
+BeginInfoBlock
+ PPVer "1.0"
+ Description "MinnowMax"
+
+EndInfoBlock
+
+Page "Platform"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType, "Platform Type", &PLATFORM_TYPE,
+ Help "Select Platform Type."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot, "Enable Secure Boot", &EN_DIS_AUTO,
+ Help "Enable/disable secure boot. Auto by default."
+EndPage
+
+Page "North Complex"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize, "Tseg Size", &TSEG_SIZES,
+ Help "Size of memory reserved for SMRAM, in MB."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize, "Mmio Size", &MMIO_SIZES,
+ Help "Size of memory address space reserved for MMIO (Memory Mapped I/O), in GB."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc, "Internal Graphics Pre-allocated Memory ", &IGDPREALLOC_SIZES,
+ Help "Size of memory preallocated for internal graphics"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize, "Aperture Size", &APERTURE_SIZES,
+ Help "Select the Aperture Size"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdGttSize, "GTT Size", >T_SIZES,
+ Help "Select the GTT Size"
+ EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1, "DIMM 0 SPD SMBus Address", HEX,
+ Help "Address of DIMM 0. 8 bits"
+ EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2, "DIMM 1 SPD SMBus Address", HEX,
+ Help "Address of DIMM 1. 8 bits"
+EndPage
+
+Page "Memory Down"
+ Combo $DIMM_MemDown, "Enable Memory Down", &EN_DIS,
+ Help "Enable = Memory Down, Disable = DIMM"
+ Combo $DRAM_Speed, "DRAM Speed", &DRAMSPEED,
+ Help "DRAM Speed"
+ Combo $DRAM_Type, "DRAM Type", &DRAMTYPE,
+ Help "DRAM Type"
+ Combo $Rank_En_0_0, "DIMM 0 Enable", &EN_DIS,
+ Help "Please populate DIMM slot 0 if only one DIMM is supported."
+ Combo $Rank_En_1_0, "DIMM 1 Enable", &EN_DIS,
+ Help "DIMM 1 has to be identical to DIMM 0."
+ Combo $DIMM_DWidth_0_0, "DIMM_DWidth", &DIMMDWIDTH,
+ Help "DRAM device data width."
+ Combo $DIMM_Density_0_0, "DIMM_Density", &DIMMDENSITY,
+ Help "DRAM device data density."
+ Combo $DIMM_BusWidth_0_0, "DIMM_BusWidth", &DIMMBUSWIDTH,
+ Help "DIMM Bus Width."
+ Combo $DIMM_Sides_0_0, "DIMM_Sides", &RANKPERDIMM,
+ Help "Ranks Per DIMM. "
+ EditNum $tCL, "tCL", DEC,
+ Help "tCL"
+ EditNum $tRP_tRCD, "tRP_tRCD", DEC,
+ Help "tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc."
+ EditNum $tWR, "tWR", DEC,
+ Help "tWR in DRAM clk"
+ EditNum $tWTR, "tWTR", DEC,
+ Help "tWTR in DRAM clk"
+ EditNum $tRRD, "tRRD", DEC,
+ Help "tRRD in DRAM clk"
+ EditNum $tRTP, "tRTP", DEC,
+ Help "tRTP in DRAM clk"
+ EditNum $tFAW, "tFAW", DEC,
+ Help "tFAW in DRAM clk"
+EndPage
+
+Page "South Complex"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdSataMode, "Select SATA Mode", &SATA_MODE,
+ Help "Select SATA boot mode. AHCI by default."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci, "Enable XHCI", &EN_DIS,
+ Help "Enable/disable XHCI. If enabled, all EHCI ports will be routed to XHCI and EHCI will be disabled."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode, "eMMC Boot Mode", &EMMC_MODES,
+ Help "Select EMMC Mode."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio, "Enable SDIO", &EN_DIS,
+ Help "Enable/disable SDIO."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard, "Enable SD Card", &EN_DIS,
+ Help "Enable/disable the SD Card."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0, "Enable HSUART0", &EN_DIS,
+ Help "Enable/disable HSUART0."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1, "Enable HSUART1", &EN_DIS,
+ Help "Enable/disable HSUART1."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi, "Enable SPI", &EN_DIS,
+ Help "Enable/disable SPI."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan, "Enable LAN", &EN_DIS,
+ Help "Enable/disable LAN."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia, "Enable Azalia", &EN_DIS_AUTO,
+ Help "Enable/disable Azalia. Auto by default."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata, "Enable SATA", &EN_DIS,
+ Help "Enable/disable SATA."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe, "Enable LPE", &PCI_ACPI,
+ Help "Choose LPE Mode"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode, "Enable PCI mode for LPSS SIO devices", &EN_DIS,
+ Help "Enable PCI Mode for LPSS SIO devices. If disabled, LPSS SIO devices will run in ACPI mode."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0, "Enable DMA0", &EN_DIS,
+ Help "Enable/disable DMA0"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1, "Enable DMA1", &EN_DIS,
+ Help "Enable/disable DMA1"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0, "Enable I2C0", &EN_DIS,
+ Help "Enable/disable I2C0"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1, "Enable I2C1", &EN_DIS,
+ Help "Enable/disable I2C1"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2, "Enable I2C2", &EN_DIS,
+ Help "Enable/disable I2C2"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3, "Enable I2C3", &EN_DIS,
+ Help "Enable/disable I2C3"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4, "Enable I2C4", &EN_DIS,
+ Help "Enable/disable I2C4"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5, "Enable I2C5", &EN_DIS,
+ Help "Enable/disable I2C5"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6, "Enable I2C6", &EN_DIS,
+ Help "Enable/disable I2C6"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0, "Enable PWM0", &EN_DIS,
+ Help "Enable/disable PWM0"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1, "Enable PWM1", &EN_DIS,
+ Help "Enable/disable PWM1"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi, "Enable HSI", &EN_DIS,
+ Help "Enable/disable HSI"
+ Combo $gPlatformFspPkgTokenSpaceGuid_ISPEnable, "Enable ISP", &EN_DIS,
+ Help "Enable/disable ISP."
+EndPage
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/absf/minnowmax_2gb.absf b/src/vendorcode/intel/fsp/fsp1_0/baytrail/absf/minnowmax_2gb.absf
new file mode 100644
index 0000000..6992fe7
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/absf/minnowmax_2gb.absf
@@ -0,0 +1,328 @@
+//
+// This file contains an 'Intel Peripheral Driver' and is
+// licensed for Intel CPUs and chipsets under the terms of your
+// license agreement with Intel or your vendor. This file must not
+// be modified by end users or could render the generated boot loader
+// inoperable.
+//
+// @file
+// Boot Setting File for Platform: Bayley Bay Platform
+//
+// Copyright (c) 2010-2013 Intel Corporation. All rights reserved
+// This software and associated documentation (if any) is furnished
+// under a license and may only be used or copied in accordance
+// with the terms of the license. Except as permitted by such
+// license, no part of this software or documentation may be
+// reproduced, stored in a retrieval system, or transmitted in any
+// form or by any means without the express written consent of
+// Intel Corporation.
+//
+//
+
+
+GlobalDataDef
+ SKUID = 0 $_AS_BUILT_ = 0x01 , "DEFAULT"
+EndGlobalData
+
+StructDef
+
+ Find "VLV2UPDR"
+ Skip 24 bytes
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize 2 bytes $_AS_BUILT_ = 0x1, 0x0 $_DEFAULT_ = 0x0001
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize 2 bytes $_AS_BUILT_ = 0x0, 0x8 $_DEFAULT_ = 0x0800
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA0
+ $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA2
+ $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdSataMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_AzaliaConfigPtr 4 bytes $_AS_BUILT_ = 0x0, 0x0, 0x0, 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdGttSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_ISPEnable 1 bytes $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+
+ Find "VLYVIEW1"
+ $gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_AS_BUILT_ = 0x2, 0x3, 0x0, 0x0 $_DEFAULT_ = 0x00000302
+ Skip 24 bytes
+ $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
+ $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 2
+
+ $DIMM_MemDown 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
+ $DRAM_Speed 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 2
+ $DRAM_Type 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $Rank_En_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
+ $Rank_En_1_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $DIMM_DWidth_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
+ $DIMM_Density_0_0 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 1
+ $DIMM_BusWidth_0_0 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 3
+ $DIMM_Sides_0_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
+ $tCL 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
+ $tRP_tRCD 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
+ $tWR 1 byte $_AS_BUILT_ = 0x8 $_DEFAULT_ = 10
+ $tWTR 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
+ $tRRD 1 byte $_AS_BUILT_ = 0x6 $_DEFAULT_ = 4
+ $tRTP 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
+ $tFAW 1 byte $_AS_BUILT_ = 0x14 $_DEFAULT_ = 20
+
+EndStruct
+
+List &DRAMSPEED
+ Selection 0x0 , "800 MHz"
+ Selection 0x1 , "1066 MHz"
+ Selection 0x2 , "1333 MHz"
+ Selection 0x3 , "1600 MHz"
+EndList
+
+List &DRAMTYPE
+ Selection 0x0 , "DDR3"
+ Selection 0x1 , "DDR3L"
+ Selection 0x2 , "DDR3U"
+ //Selection 0x3 , "LPDDR2"
+ Selection 0x4 , "LPDDR2"
+ Selection 0x5 , "LPDDR3"
+ Selection 0x6 , "DDR4"
+EndList
+
+List &DIMMDWIDTH
+ Selection 0x0 , "x8"
+ Selection 0x1 , "x16"
+ Selection 0x2 , "x32"
+EndList
+
+List &DIMMDENSITY
+ Selection 0x0 , "1 Gbit"
+ Selection 0x1 , "2 Gbit"
+ Selection 0x2 , "4 Gbit"
+ Selection 0x3 , "8 Gbit"
+EndList
+
+List &DIMMBUSWIDTH
+ Selection 0x0 , "8 bits"
+ Selection 0x1 , "16 bits"
+ Selection 0x2 , "32 bits"
+ Selection 0x3 , "64 bits"
+EndList
+
+List &RANKPERDIMM
+ Selection 0x1 , "2 Ranks"
+ Selection 0x0 , "1 Rank"
+EndList
+
+List &SATA_MODE
+ Selection 0x1 , "AHCI"
+ Selection 0x0 , "IDE"
+EndList
+
+List &EMMC_MODES
+ Selection 0x0 , "Disabled"
+ Selection 0x1 , "Auto"
+ Selection 0x2 , "eMMC 4.1"
+ Selection 0x3 , "eMMC 4.5"
+EndList
+
+List &EN_DIS
+ Selection 0x1 , "Enabled"
+ Selection 0x0 , "Disabled"
+EndList
+
+List &EN_DIS_AUTO
+ Selection 0x2 , "Auto"
+ Selection 0x1 , "Enabled"
+ Selection 0x0 , "Disabled"
+EndList
+
+List &MMIO_SIZES
+ Selection 0x400, "1.0 GB"
+ Selection 0x600, "1.5 GB"
+ Selection 0x800, "2.0 GB"
+EndList
+
+List &TSEG_SIZES
+ Selection 0x01, "1 MB"
+ Selection 0x02, "2 MB"
+ Selection 0x04, "4 MB"
+ Selection 0x08, "8 MB"
+EndList
+
+List &IGDPREALLOC_SIZES
+ Selection 0x01, "32 MB"
+ Selection 0x02, "64 MB"
+ Selection 0x03, "96 MB"
+ Selection 0x04, "128 MB"
+ Selection 0x05, "160 MB"
+ Selection 0x06, "192 MB"
+ Selection 0x07, "224 MB"
+ Selection 0x08, "256 MB"
+ Selection 0x09, "288 MB"
+ Selection 0x0A, "320 MB"
+ Selection 0x0B, "352 MB"
+ Selection 0x0C, "384 MB"
+ Selection 0x0D, "416 MB"
+ Selection 0x0E, "448 MB"
+ Selection 0x0F, "480 MB"
+ Selection 0x10, "512 MB"
+EndList
+
+List &APERTURE_SIZES
+ Selection 0x1 , "128 MB"
+ Selection 0x2 , "256 MB"
+ Selection 0x3 , "512 MB"
+EndList
+
+List >T_SIZES
+ Selection 0x1 , "1 MB"
+ Selection 0x2 , "2 MB"
+EndList
+
+List &PCI_ACPI
+ Selection 0x2 , "ACPI Mode"
+ Selection 0x1 , "PCI Mode"
+ Selection 0x0 , "Disabled"
+EndList
+
+List &PLATFORM_TYPE
+ Selection 0x2 , "BayleyBay Platform Type"
+ Selection 0x3 , "BakerSport Platform (ECC) Type"
+EndList
+
+BeginInfoBlock
+ PPVer "1.0"
+ Description "MinnowMax"
+
+EndInfoBlock
+
+Page "Platform"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType, "Platform Type", &PLATFORM_TYPE,
+ Help "Select Platform Type."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot, "Enable Secure Boot", &EN_DIS_AUTO,
+ Help "Enable/disable secure boot. Auto by default."
+EndPage
+
+Page "North Complex"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize, "Tseg Size", &TSEG_SIZES,
+ Help "Size of memory reserved for SMRAM, in MB."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize, "Mmio Size", &MMIO_SIZES,
+ Help "Size of memory address space reserved for MMIO (Memory Mapped I/O), in GB."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc, "Internal Graphics Pre-allocated Memory ", &IGDPREALLOC_SIZES,
+ Help "Size of memory preallocated for internal graphics"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize, "Aperture Size", &APERTURE_SIZES,
+ Help "Select the Aperture Size"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdGttSize, "GTT Size", >T_SIZES,
+ Help "Select the GTT Size"
+ EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1, "DIMM 0 SPD SMBus Address", HEX,
+ Help "Address of DIMM 0. 8 bits"
+ EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2, "DIMM 1 SPD SMBus Address", HEX,
+ Help "Address of DIMM 1. 8 bits"
+EndPage
+
+Page "Memory Down"
+ Combo $DIMM_MemDown, "Enable Memory Down", &EN_DIS,
+ Help "Enable = Memory Down, Disable = DIMM"
+ Combo $DRAM_Speed, "DRAM Speed", &DRAMSPEED,
+ Help "DRAM Speed"
+ Combo $DRAM_Type, "DRAM Type", &DRAMTYPE,
+ Help "DRAM Type"
+ Combo $Rank_En_0_0, "DIMM 0 Enable", &EN_DIS,
+ Help "Please populate DIMM slot 0 if only one DIMM is supported."
+ Combo $Rank_En_1_0, "DIMM 1 Enable", &EN_DIS,
+ Help "DIMM 1 has to be identical to DIMM 0."
+ Combo $DIMM_DWidth_0_0, "DIMM_DWidth", &DIMMDWIDTH,
+ Help "DRAM device data width."
+ Combo $DIMM_Density_0_0, "DIMM_Density", &DIMMDENSITY,
+ Help "DRAM device data density."
+ Combo $DIMM_BusWidth_0_0, "DIMM_BusWidth", &DIMMBUSWIDTH,
+ Help "DIMM Bus Width."
+ Combo $DIMM_Sides_0_0, "DIMM_Sides", &RANKPERDIMM,
+ Help "Ranks Per DIMM. "
+ EditNum $tCL, "tCL", DEC,
+ Help "tCL"
+ EditNum $tRP_tRCD, "tRP_tRCD", DEC,
+ Help "tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc."
+ EditNum $tWR, "tWR", DEC,
+ Help "tWR in DRAM clk"
+ EditNum $tWTR, "tWTR", DEC,
+ Help "tWTR in DRAM clk"
+ EditNum $tRRD, "tRRD", DEC,
+ Help "tRRD in DRAM clk"
+ EditNum $tRTP, "tRTP", DEC,
+ Help "tRTP in DRAM clk"
+ EditNum $tFAW, "tFAW", DEC,
+ Help "tFAW in DRAM clk"
+EndPage
+
+Page "South Complex"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdSataMode, "Select SATA Mode", &SATA_MODE,
+ Help "Select SATA boot mode. AHCI by default."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci, "Enable XHCI", &EN_DIS,
+ Help "Enable/disable XHCI. If enabled, all EHCI ports will be routed to XHCI and EHCI will be disabled."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode, "eMMC Boot Mode", &EMMC_MODES,
+ Help "Select EMMC Mode."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio, "Enable SDIO", &EN_DIS,
+ Help "Enable/disable SDIO."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard, "Enable SD Card", &EN_DIS,
+ Help "Enable/disable the SD Card."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0, "Enable HSUART0", &EN_DIS,
+ Help "Enable/disable HSUART0."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1, "Enable HSUART1", &EN_DIS,
+ Help "Enable/disable HSUART1."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi, "Enable SPI", &EN_DIS,
+ Help "Enable/disable SPI."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan, "Enable LAN", &EN_DIS,
+ Help "Enable/disable LAN."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia, "Enable Azalia", &EN_DIS_AUTO,
+ Help "Enable/disable Azalia. Auto by default."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata, "Enable SATA", &EN_DIS,
+ Help "Enable/disable SATA."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe, "Enable LPE", &PCI_ACPI,
+ Help "Choose LPE Mode"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode, "Enable PCI mode for LPSS SIO devices", &EN_DIS,
+ Help "Enable PCI Mode for LPSS SIO devices. If disabled, LPSS SIO devices will run in ACPI mode."
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0, "Enable DMA0", &EN_DIS,
+ Help "Enable/disable DMA0"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1, "Enable DMA1", &EN_DIS,
+ Help "Enable/disable DMA1"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0, "Enable I2C0", &EN_DIS,
+ Help "Enable/disable I2C0"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1, "Enable I2C1", &EN_DIS,
+ Help "Enable/disable I2C1"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2, "Enable I2C2", &EN_DIS,
+ Help "Enable/disable I2C2"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3, "Enable I2C3", &EN_DIS,
+ Help "Enable/disable I2C3"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4, "Enable I2C4", &EN_DIS,
+ Help "Enable/disable I2C4"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5, "Enable I2C5", &EN_DIS,
+ Help "Enable/disable I2C5"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6, "Enable I2C6", &EN_DIS,
+ Help "Enable/disable I2C6"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0, "Enable PWM0", &EN_DIS,
+ Help "Enable/disable PWM0"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1, "Enable PWM1", &EN_DIS,
+ Help "Enable/disable PWM1"
+ Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi, "Enable HSI", &EN_DIS,
+ Help "Enable/disable HSI"
+ Combo $gPlatformFspPkgTokenSpaceGuid_ISPEnable, "Enable ISP", &EN_DIS,
+ Help "Enable/disable ISP."
+EndPage
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/azalia.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/azalia.h
new file mode 100644
index 0000000..c58cf4c
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/azalia.h
@@ -0,0 +1,66 @@
+/**@file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _AZALIA_H_
+#define _AZALIA_H_
+
+#include <stdint.h>
+
+#pragma pack(1)
+
+typedef struct {
+ uint32_t VendorDeviceId;
+ uint16_t SubSystemId;
+ uint8_t RevisionId; /// 0xFF applies to all steppings
+ uint8_t FrontPanelSupport;
+ uint16_t NumberOfRearJacks;
+ uint16_t NumberOfFrontJacks;
+} PCH_AZALIA_VERB_TABLE_HEADER;
+
+typedef struct {
+ PCH_AZALIA_VERB_TABLE_HEADER VerbTableHeader;
+ uint32_t *VerbTableData;
+} PCH_AZALIA_VERB_TABLE;
+
+typedef struct {
+ uint8_t Pme : 1; /// 0: Disable; 1: Enable
+ uint8_t DS : 1; /// 0: Docking is not supported; 1:Docking is supported
+ uint8_t DA : 1; /// 0: Docking is not attached; 1:Docking is attached
+ uint8_t HdmiCodec : 1; /// 0: Disable; 1: Enable
+ uint8_t AzaliaVCi : 1; /// 0: Disable; 1: Enable
+ uint8_t Rsvdbits : 3;
+ uint8_t AzaliaVerbTableNum; /// Number of verb tables provided by platform
+ PCH_AZALIA_VERB_TABLE *AzaliaVerbTable; /// Pointer to the actual verb table(s)
+ uint16_t ResetWaitTimer; /// The delay timer after Azalia reset, the value is number of microseconds
+} PCH_AZALIA_CONFIG;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsp.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsp.h
new file mode 100644
index 0000000..f2e1d8f
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsp.h
@@ -0,0 +1,69 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/** \file fsp.h
+ *
+ *
+ */
+#include <stdint.h>
+#include "fsptypes.h"
+#include "fspfv.h"
+#include "fspffs.h"
+#include "fsphob.h"
+#include "fspapi.h"
+#include "fspplatform.h"
+#include "fspinfoheader.h"
+#include "fspvpd.h"
+
+#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \
+{ 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
+#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
+{ 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0xb, 0x7b, 0xa9, 0xe4, 0xb0 } }
+#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \
+{ 0xd038747c, 0xd00c, 0x4980, { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } }
+#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \
+{ 0x9c7c3aa7, 0x5332, 0x4917, { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } }
+#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
+{ 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
+
+//
+// 0x21 - 0xf..f are reserved.
+//
+#define BOOT_WITH_FULL_CONFIGURATION 0x00
+#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01
+#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02
+#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03
+#define BOOT_WITH_DEFAULT_SETTINGS 0x04
+#define BOOT_ON_S4_RESUME 0x05
+#define BOOT_ON_S5_RESUME 0x06
+#define BOOT_ON_S2_RESUME 0x10
+#define BOOT_ON_S3_RESUME 0x11
+#define BOOT_ON_FLASH_UPDATE 0x12
+#define BOOT_IN_RECOVERY_MODE 0x20
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspapi.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspapi.h
new file mode 100644
index 0000000..26afc0e
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspapi.h
@@ -0,0 +1,65 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_API_H_
+#define _FSP_API_H_
+
+#pragma pack(1)
+
+typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
+
+typedef struct {
+ VOID *NvsBufferPtr;
+ VOID *RtBufferPtr;
+ CONTINUATION_PROC ContinuationFunc;
+} FSP_INIT_PARAMS;
+
+typedef struct {
+ UINT32 *StackTop;
+ UINT32 BootMode;
+ VOID *UpdDataRgnPtr;
+ UINT32 Reserved[7];
+} FSP_INIT_RT_COMMON_BUFFER;
+
+typedef enum {
+ EnumInitPhaseAfterPciEnumeration = 0x20,
+ EnumInitPhaseReadyToBoot = 0x40
+} FSP_INIT_PHASE;
+
+typedef struct {
+ FSP_INIT_PHASE Phase;
+} NOTIFY_PHASE_PARAMS;
+
+#pragma pack()
+
+typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
+typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspffs.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspffs.h
new file mode 100644
index 0000000..f3b83b2
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspffs.h
@@ -0,0 +1,506 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+
+#ifndef __PI_FIRMWARE_FILE_H__
+#define __PI_FIRMWARE_FILE_H__
+
+#pragma pack(1)
+///
+/// Used to verify the integrity of the file.
+///
+typedef union {
+ struct {
+ ///
+ /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
+ /// header. The State and IntegrityCheck.Checksum.File fields are assumed
+ /// to be zero and the checksum is calculated such that the entire header sums to zero.
+ ///
+ UINT8 Header;
+ ///
+ /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
+ /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
+ /// checksum of the file data.
+ /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
+ /// the IntegrityCheck.Checksum.File field must be initialized with a value of
+ /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
+ /// EFI_FILE_DATA_VALID bit is set in the State field.
+ ///
+ UINT8 File;
+ } Checksum;
+ ///
+ /// This is the full 16 bits of the IntegrityCheck field.
+ ///
+ UINT16 Checksum16;
+} EFI_FFS_INTEGRITY_CHECK;
+
+///
+/// FFS_FIXED_CHECKSUM is the checksum value used when the
+/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
+///
+#define FFS_FIXED_CHECKSUM 0xAA
+
+typedef UINT8 EFI_FV_FILETYPE;
+typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
+typedef UINT8 EFI_FFS_FILE_STATE;
+
+///
+/// File Types Definitions
+///
+#define EFI_FV_FILETYPE_ALL 0x00
+#define EFI_FV_FILETYPE_RAW 0x01
+#define EFI_FV_FILETYPE_FREEFORM 0x02
+#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
+#define EFI_FV_FILETYPE_PEI_CORE 0x04
+#define EFI_FV_FILETYPE_DXE_CORE 0x05
+#define EFI_FV_FILETYPE_PEIM 0x06
+#define EFI_FV_FILETYPE_DRIVER 0x07
+#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
+#define EFI_FV_FILETYPE_APPLICATION 0x09
+#define EFI_FV_FILETYPE_SMM 0x0A
+#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
+#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
+#define EFI_FV_FILETYPE_SMM_CORE 0x0D
+#define EFI_FV_FILETYPE_OEM_MIN 0xc0
+#define EFI_FV_FILETYPE_OEM_MAX 0xdf
+#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
+#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
+#define EFI_FV_FILETYPE_FFS_MIN 0xf0
+#define EFI_FV_FILETYPE_FFS_MAX 0xff
+#define EFI_FV_FILETYPE_FFS_PAD 0xf0
+///
+/// FFS File Attributes.
+///
+#define FFS_ATTRIB_LARGE_FILE 0x01
+#define FFS_ATTRIB_FIXED 0x04
+#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
+#define FFS_ATTRIB_CHECKSUM 0x40
+
+///
+/// FFS File State Bits.
+///
+#define EFI_FILE_HEADER_CONSTRUCTION 0x01
+#define EFI_FILE_HEADER_VALID 0x02
+#define EFI_FILE_DATA_VALID 0x04
+#define EFI_FILE_MARKED_FOR_UPDATE 0x08
+#define EFI_FILE_DELETED 0x10
+#define EFI_FILE_HEADER_INVALID 0x20
+
+
+///
+/// Each file begins with the header that describe the
+/// contents and state of the files.
+///
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file.
+ ///
+ EFI_GUID Name;
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ ///
+ UINT8 Size[3];
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+} EFI_FFS_FILE_HEADER;
+
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file. There may be only
+ /// one instance of a file with the file name GUID of Name in any given firmware
+ /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
+ /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
+ /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
+ /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
+ ///
+ UINT8 Size[3];
+
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+
+ ///
+ /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
+ /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
+ ///
+ UINT32 ExtendedSize;
+} EFI_FFS_FILE_HEADER2;
+
+#define IS_FFS_FILE2(FfsFileHeaderPtr) \
+ (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
+
+#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
+
+#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
+ (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
+
+typedef UINT8 EFI_SECTION_TYPE;
+
+///
+/// Pseudo type. It is used as a wild card when retrieving sections.
+/// The section type EFI_SECTION_ALL matches all section types.
+///
+#define EFI_SECTION_ALL 0x00
+
+///
+/// Encapsulation section Type values.
+///
+#define EFI_SECTION_COMPRESSION 0x01
+
+#define EFI_SECTION_GUID_DEFINED 0x02
+
+#define EFI_SECTION_DISPOSABLE 0x03
+
+///
+/// Leaf section Type values.
+///
+#define EFI_SECTION_PE32 0x10
+#define EFI_SECTION_PIC 0x11
+#define EFI_SECTION_TE 0x12
+#define EFI_SECTION_DXE_DEPEX 0x13
+#define EFI_SECTION_VERSION 0x14
+#define EFI_SECTION_USER_INTERFACE 0x15
+#define EFI_SECTION_COMPATIBILITY16 0x16
+#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
+#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
+#define EFI_SECTION_RAW 0x19
+#define EFI_SECTION_PEI_DEPEX 0x1B
+#define EFI_SECTION_SMM_DEPEX 0x1C
+
+///
+/// Common section header.
+///
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+ EFI_SECTION_TYPE Type;
+ ///
+ /// Declares the section type.
+ ///
+} EFI_COMMON_SECTION_HEADER;
+
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+
+ EFI_SECTION_TYPE Type;
+
+ ///
+ /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
+ /// Size is not equal to 0xFFFFFF, then this field does not exist.
+ ///
+ UINT32 ExtendedSize;
+} EFI_COMMON_SECTION_HEADER2;
+
+///
+/// Leaf section type that contains an
+/// IA-32 16-bit executable image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
+
+///
+/// CompressionType of EFI_COMPRESSION_SECTION.
+///
+#define EFI_NOT_COMPRESSED 0x00
+#define EFI_STANDARD_COMPRESSION 0x01
+///
+/// An encapsulation section type in which the
+/// section data is compressed.
+///
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION;
+
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION2;
+
+///
+/// An encapsulation section type in which the section data is disposable.
+/// A disposable section is an encapsulation section in which the section data may be disposed of during
+/// the process of creating or updating a firmware image without significant impact on the usefulness of
+/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
+/// allows optional or descriptive data to be included with the firmware file which can be removed in
+/// order to conserve space. The contents of this section are implementation specific, but might contain
+/// debug data or detailed integration instructions.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
+
+///
+/// The leaf section which could be used to determine the dispatch order of DXEs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a PI FV.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
+
+///
+/// The leaf section which contains a single GUID.
+///
+typedef struct {
+ ///
+ /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
+
+///
+/// Attributes of EFI_GUID_DEFINED_SECTION.
+///
+#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
+#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
+///
+/// The leaf section which is encapsulation defined by specific GUID.
+///
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION2;
+
+///
+/// The leaf section which contains PE32+ image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
+
+///
+/// The leaf section used to determine the dispatch order of PEIMs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
+
+///
+/// A leaf section type that contains a position-independent-code (PIC) image.
+/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
+/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
+/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
+/// relocation information has been stripped from the image and the image can be moved and will
+/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
+/// be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
+
+///
+/// The leaf section which constains the position-independent-code image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
+
+///
+/// The leaf section which contains an array of zero or more bytes.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
+
+///
+/// The SMM dependency expression section is a leaf section that contains a dependency expression that
+/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
+/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
+/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
+/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
+/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a unicode string that
+/// is human readable file name.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION2;
+
+///
+/// The leaf section which contains a numeric build number and
+/// an optional unicode string that represents the file revision.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT16 BuildNumber;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// A UINT16 that represents a particular build. Subsequent builds have monotonically
+ /// increasing build numbers relative to earlier builds.
+ ///
+ UINT16 BuildNumber;
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION2;
+
+#define IS_SECTION2(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
+
+#define SECTION_SIZE(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
+
+#define SECTION2_SIZE(SectionHeaderPtr) \
+ (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspfv.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspfv.h
new file mode 100644
index 0000000..26c00f2
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspfv.h
@@ -0,0 +1,247 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_FIRMWAREVOLUME_H__
+#define __PI_FIRMWAREVOLUME_H__
+
+///
+/// EFI_FV_FILE_ATTRIBUTES
+///
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+
+//
+// Value of EFI_FV_FILE_ATTRIBUTES.
+//
+#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
+#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
+#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
+
+///
+/// type of EFI FVB attribute
+///
+typedef UINT32 EFI_FVB_ATTRIBUTES_2;
+
+//
+// Attributes bit definitions
+//
+#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB2_READ_STATUS 0x00000004
+#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB2_WRITE_STATUS 0x00000020
+#define EFI_FVB2_LOCK_CAP 0x00000040
+#define EFI_FVB2_LOCK_STATUS 0x00000080
+#define EFI_FVB2_STICKY_WRITE 0x00000200
+#define EFI_FVB2_MEMORY_MAPPED 0x00000400
+#define EFI_FVB2_ERASE_POLARITY 0x00000800
+#define EFI_FVB2_READ_LOCK_CAP 0x00001000
+#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
+#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
+#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
+#define EFI_FVB2_ALIGNMENT 0x001F0000
+#define EFI_FVB2_ALIGNMENT_1 0x00000000
+#define EFI_FVB2_ALIGNMENT_2 0x00010000
+#define EFI_FVB2_ALIGNMENT_4 0x00020000
+#define EFI_FVB2_ALIGNMENT_8 0x00030000
+#define EFI_FVB2_ALIGNMENT_16 0x00040000
+#define EFI_FVB2_ALIGNMENT_32 0x00050000
+#define EFI_FVB2_ALIGNMENT_64 0x00060000
+#define EFI_FVB2_ALIGNMENT_128 0x00070000
+#define EFI_FVB2_ALIGNMENT_256 0x00080000
+#define EFI_FVB2_ALIGNMENT_512 0x00090000
+#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
+#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
+#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
+#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
+#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
+#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
+#define EFI_FVB2_ALIGNMENT_64K 0x00100000
+#define EFI_FVB2_ALIGNMENT_128K 0x00110000
+#define EFI_FVB2_ALIGNMENT_256K 0x00120000
+#define EFI_FVB2_ALIGNMENT_512K 0x00130000
+#define EFI_FVB2_ALIGNMENT_1M 0x00140000
+#define EFI_FVB2_ALIGNMENT_2M 0x00150000
+#define EFI_FVB2_ALIGNMENT_4M 0x00160000
+#define EFI_FVB2_ALIGNMENT_8M 0x00170000
+#define EFI_FVB2_ALIGNMENT_16M 0x00180000
+#define EFI_FVB2_ALIGNMENT_32M 0x00190000
+#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
+#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
+#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
+#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
+#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
+#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
+
+
+typedef struct {
+ ///
+ /// The number of sequential blocks which are of the same size.
+ ///
+ UINT32 NumBlocks;
+ ///
+ /// The size of the blocks.
+ ///
+ UINT32 Length;
+} EFI_FV_BLOCK_MAP_ENTRY;
+
+///
+/// Describes the features and layout of the firmware volume.
+///
+typedef struct {
+ ///
+ /// The first 16 bytes are reserved to allow for the reset vector of
+ /// processors whose reset vector is at address 0.
+ ///
+ UINT8 ZeroVector[16];
+ ///
+ /// Declares the file system with which the firmware volume is formatted.
+ ///
+ EFI_GUID FileSystemGuid;
+ ///
+ /// Length in bytes of the complete firmware volume, including the header.
+ ///
+ UINT64 FvLength;
+ ///
+ /// Set to EFI_FVH_SIGNATURE
+ ///
+ UINT32 Signature;
+ ///
+ /// Declares capabilities and power-on defaults for the firmware volume.
+ ///
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ ///
+ /// Length in bytes of the complete firmware volume header.
+ ///
+ UINT16 HeaderLength;
+ ///
+ /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
+ ///
+ UINT16 Checksum;
+ ///
+ /// Offset, relative to the start of the header, of the extended header
+ /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
+ ///
+ UINT16 ExtHeaderOffset;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT8 Reserved[1];
+ ///
+ /// Set to 2. Future versions of this specification may define new header fields and will
+ /// increment the Revision field accordingly.
+ ///
+ UINT8 Revision;
+ ///
+ /// An array of run-length encoded FvBlockMapEntry structures. The array is
+ /// terminated with an entry of {0,0}.
+ ///
+ EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
+} EFI_FIRMWARE_VOLUME_HEADER;
+
+#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
+
+///
+/// Firmware Volume Header Revision definition
+///
+#define EFI_FVH_REVISION 0x02
+
+///
+/// Extension header pointed by ExtHeaderOffset of volume header.
+///
+typedef struct {
+ ///
+ /// Firmware volume name.
+ ///
+ EFI_GUID FvName;
+ ///
+ /// Size of the rest of the extension header, including this structure.
+ ///
+ UINT32 ExtHeaderSize;
+} EFI_FIRMWARE_VOLUME_EXT_HEADER;
+
+///
+/// Entry struture for describing FV extension header
+///
+typedef struct {
+ ///
+ /// Size of this header extension.
+ ///
+ UINT16 ExtEntrySize;
+ ///
+ /// Type of the header.
+ ///
+ UINT16 ExtEntryType;
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
+
+#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
+///
+/// This extension header provides a mapping between a GUID and an OEM file type.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
+ /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
+ ///
+ UINT32 TypeMask;
+ ///
+ /// An array of GUIDs, each GUID representing an OEM file type.
+ ///
+ /// EFI_GUID Types[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
+
+#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
+
+///
+/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
+/// GUID FormatType type which includes a length and a successive series of data bytes.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// Vendor-specific GUID.
+ ///
+ EFI_GUID FormatType;
+ ///
+ /// An arry of bytes of length Length.
+ ///
+ /// UINT8 Data[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsphob.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsphob.h
new file mode 100644
index 0000000..7edef0d
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsphob.h
@@ -0,0 +1,542 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_HOB_H__
+#define __PI_HOB_H__
+
+//
+// HobType of EFI_HOB_GENERIC_HEADER.
+//
+#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+#define EFI_HOB_TYPE_UNUSED 0xFFFE
+#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
+
+///
+/// Describes the format and size of the data inside the HOB.
+/// All HOBs must contain this generic HOB header.
+///
+typedef struct {
+ ///
+ /// Identifies the HOB data structure type.
+ ///
+ UINT16 HobType;
+ ///
+ /// The length in bytes of the HOB.
+ ///
+ UINT16 HobLength;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT32 Reserved;
+} EFI_HOB_GENERIC_HEADER;
+
+///
+/// Enumeration of memory types introduced in UEFI.
+///
+typedef enum {
+ ///
+ /// Not used.
+ ///
+ EfiReservedMemoryType,
+ ///
+ /// The code portions of a loaded application.
+ /// (Note that UEFI OS loaders are UEFI applications.)
+ ///
+ EfiLoaderCode,
+ ///
+ /// The data portions of a loaded application and the default data allocation
+ /// type used by an application to allocate pool memory.
+ ///
+ EfiLoaderData,
+ ///
+ /// The code portions of a loaded Boot Services Driver.
+ ///
+ EfiBootServicesCode,
+ ///
+ /// The data portions of a loaded Boot Serves Driver, and the default data
+ /// allocation type used by a Boot Services Driver to allocate pool memory.
+ ///
+ EfiBootServicesData,
+ ///
+ /// The code portions of a loaded Runtime Services Driver.
+ ///
+ EfiRuntimeServicesCode,
+ ///
+ /// The data portions of a loaded Runtime Services Driver and the default
+ /// data allocation type used by a Runtime Services Driver to allocate pool memory.
+ ///
+ EfiRuntimeServicesData,
+ ///
+ /// Free (unallocated) memory.
+ ///
+ EfiConventionalMemory,
+ ///
+ /// Memory in which errors have been detected.
+ ///
+ EfiUnusableMemory,
+ ///
+ /// Memory that holds the ACPI tables.
+ ///
+ EfiACPIReclaimMemory,
+ ///
+ /// Address space reserved for use by the firmware.
+ ///
+ EfiACPIMemoryNVS,
+ ///
+ /// Used by system firmware to request that a memory-mapped IO region
+ /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
+ ///
+ EfiMemoryMappedIO,
+ ///
+ /// System memory-mapped IO region that is used to translate memory
+ /// cycles to IO cycles by the processor.
+ ///
+ EfiMemoryMappedIOPortSpace,
+ ///
+ /// Address space reserved by the firmware for code that is part of the processor.
+ ///
+ EfiPalCode,
+ EfiMaxMemoryType
+} EFI_MEMORY_TYPE;
+
+///
+/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
+/// various attributes of the logical memory allocation. The type field will be used for
+/// subsequent inclusion in the UEFI memory map.
+///
+typedef struct {
+ ///
+ /// A GUID that defines the memory allocation region's type and purpose, as well as
+ /// other fields within the memory allocation HOB. This GUID is used to define the
+ /// additional data within the HOB that may be present for the memory allocation HOB.
+ /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// The base address of memory allocated by this HOB. Type
+ /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
+
+ ///
+ /// The length in bytes of memory allocated by this HOB.
+ ///
+ UINT64 MemoryLength;
+
+ ///
+ /// Defines the type of memory allocated by this HOB. The memory type definition
+ /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
+ /// in AllocatePages() in the UEFI 2.0 specification.
+ ///
+ EFI_MEMORY_TYPE MemoryType;
+
+ ///
+ /// Padding for Itanium processor family
+ ///
+ UINT8 Reserved[4];
+} EFI_HOB_MEMORY_ALLOCATION_HEADER;
+
+///
+/// Describes all memory ranges used during the HOB producer
+/// phase that exist outside the HOB list. This HOB type
+/// describes how memory is used, not the physical attributes of memory.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
+ /// various attributes of the logical memory allocation.
+ ///
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ //
+ // Additional data pertaining to the "Name" Guid memory
+ // may go here.
+ //
+} EFI_HOB_MEMORY_ALLOCATION;
+
+///
+/// The resource type.
+///
+typedef UINT32 EFI_RESOURCE_TYPE;
+
+//
+// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
+//
+#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
+#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
+#define EFI_RESOURCE_IO 0x00000002
+#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
+#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
+#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
+#define EFI_RESOURCE_IO_RESERVED 0x00000006
+#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
+
+///
+/// A type of recount attribute type.
+///
+typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
+
+//
+// These types can be ORed together as needed.
+//
+// The first three enumerations describe settings
+//
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
+//
+// The rest of the settings describe capabilities
+//
+#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
+#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
+#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
+#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
+#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
+
+///
+/// Describes the resource properties of all fixed,
+/// nonrelocatable resource ranges found on the processor
+/// host bus during the HOB producer phase.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID representing the owner of the resource. This GUID is used by HOB
+ /// consumer phase components to correlate device ownership of a resource.
+ ///
+ EFI_GUID Owner;
+ ///
+ /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
+ ///
+ EFI_RESOURCE_TYPE ResourceType;
+ ///
+ /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
+ ///
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ ///
+ /// The physical start address of the resource region.
+ ///
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
+ ///
+ /// The number of bytes of the resource region.
+ ///
+ UINT64 ResourceLength;
+} EFI_HOB_RESOURCE_DESCRIPTOR;
+
+///
+/// Allows writers of executable content in the HOB producer phase to
+/// maintain and manage HOBs with specific GUID.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID that defines the contents of this HOB.
+ ///
+ EFI_GUID Name;
+ //
+ // Guid specific data goes here
+ //
+} EFI_HOB_GUID_TYPE;
+
+///
+/// Union of all the possible HOB Types.
+///
+typedef union {
+ EFI_HOB_GENERIC_HEADER *Header;
+ EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
+ EFI_HOB_GUID_TYPE *Guid;
+ UINT8 *Raw;
+} EFI_PEI_HOB_POINTERS;
+
+
+/**
+ Returns the type of a HOB.
+
+ This macro returns the HobType field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobType.
+
+**/
+#define GET_HOB_TYPE(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
+
+/**
+ Returns the length, in bytes, of a HOB.
+
+ This macro returns the HobLength field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobLength.
+
+**/
+#define GET_HOB_LENGTH(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
+
+/**
+ Returns a pointer to the next HOB in the HOB list.
+
+ This macro returns a pointer to HOB that follows the
+ HOB specified by HobStart in the HOB List.
+
+ @param HobStart A pointer to a HOB.
+
+ @return A pointer to the next HOB in the HOB list.
+
+**/
+#define GET_NEXT_HOB(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
+
+/**
+ Determines if a HOB is the last HOB in the HOB list.
+
+ This macro determine if the HOB specified by HobStart is the
+ last HOB in the HOB list. If HobStart is last HOB in the HOB list,
+ then TRUE is returned. Otherwise, FALSE is returned.
+
+ @param HobStart A pointer to a HOB.
+
+ @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
+ @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
+
+**/
+#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+/**
+ Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns a pointer to the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return A pointer to the data buffer in a HOB.
+
+**/
+#define GET_GUID_HOB_DATA(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return The size of the data buffer.
+**/
+#define GET_GUID_HOB_DATA_SIZE(HobStart) \
+ (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the pointer to the HOB list.
+
+ This function returns the pointer to first HOB in the list.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ );
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If HobStart is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ );
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If Guid is NULL, then ASSERT().
+ If HobStart is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+ If Guid is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ );
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ );
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return The 64-bit value read from Buffer.
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ );
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspinfoheader.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspinfoheader.h
new file mode 100644
index 0000000..b277bcd
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspinfoheader.h
@@ -0,0 +1,62 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_INFO_HEADER_H_
+#define _FSP_INFO_HEADER_H_
+
+#pragma pack(1)
+
+typedef struct {
+
+ UINT32 Signature; // Off 0x94
+ UINT32 HeaderLength;
+ UINT8 Reserved1[3];
+ UINT8 HeaderRevision;
+ UINT32 ImageRevision;
+
+ CHAR8 ImageId[8]; // Off 0xA4
+ UINT32 ImageSize;
+ UINT32 ImageBase;
+
+ UINT32 ImageAttribute; // Off 0xB4
+ UINT32 CfgRegionOffset;
+ UINT32 CfgRegionSize;
+ UINT32 ApiEntryNum;
+
+ UINT32 NemInitEntry; // Off 0xC4
+ UINT32 FspInitEntry;
+ UINT32 NotifyPhaseEntry;
+ UINT32 Reserved2;
+
+} FSP_INFO_HEADER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspplatform.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspplatform.h
new file mode 100644
index 0000000..81f7b66
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspplatform.h
@@ -0,0 +1,78 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_PLATFORM_H_
+#define _FSP_PLATFORM_H_
+
+#include "fsptypes.h"
+#include "fspapi.h"
+#include "azalia.h"
+
+#pragma pack(1)
+
+typedef struct {
+ FSP_INIT_RT_COMMON_BUFFER Common;
+} FSP_INIT_RT_BUFFER;
+
+#pragma pack()
+
+//
+// Function prototypes for board_fsp.c
+//
+void
+GetFspReservedMemoryFromGuid (
+ uint32_t *FspMemoryBase,
+ uint32_t *FspMemoryLength,
+ EFI_GUID FspReservedMemoryGuid
+ );
+
+void
+GetFspNVStorageMemory (
+ void **FspNVStorageHob,
+ uint16_t *DataSize
+ );
+
+void
+GetTempRamStack (
+ void **TempRamStackPtr,
+ uint16_t *DataSize
+ );
+
+void
+GetHighMemorySize (
+ uint64_t *HighMemoryLength
+ );
+
+void
+GetLowMemorySize (
+ uint32_t *LowMemoryLength
+ );
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsptypes.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsptypes.h
new file mode 100644
index 0000000..4a313ad
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fsptypes.h
@@ -0,0 +1,116 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/** \file fsptypes.h
+ *
+ *
+ */
+
+#ifndef __FSP_TYPES_H__
+#define __FSP_TYPES_H__
+
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned long long UINT64;
+///
+/// 8-byte signed value.
+///
+typedef long long INT64;
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned int UINT32;
+///
+/// 4-byte signed value.
+///
+typedef int INT32;
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value
+///
+typedef char INT8;
+
+typedef void VOID;
+
+typedef UINT64 EFI_PHYSICAL_ADDRESS;
+
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} EFI_GUID;
+
+#define CONST const
+#define STATIC static
+
+#define TRUE ((BOOLEAN)(1==1))
+#define FALSE ((BOOLEAN)(0==1))
+
+#define FSPAPI __attribute__((cdecl))
+#define EFIAPI __attribute__((cdecl))
+
+#define ASSERT(Expression) \
+ do { \
+ if (!(Expression)) { \
+ for (;;); \
+ } \
+ } while (FALSE)
+
+typedef UINT32 FSP_STATUS;
+typedef UINT32 EFI_STATUS;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspvpd.h b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspvpd.h
new file mode 100644
index 0000000..4bdcb79
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/include/fspvpd.h
@@ -0,0 +1,126 @@
+/**
+
+Copyright (C) 2013-2015 Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSPVPD_H__
+#define __FSPVPD_H__
+
+#pragma pack(1)
+
+typedef struct {
+ UINT8 EnableMemoryDown;
+ UINT8 DRAMSpeed; /* DRAM Speed */
+ UINT8 DRAMType; /* DRAM Type */
+ UINT8 DIMM0Enable; /* DIMM 0 Enable */
+ UINT8 DIMM1Enable; /* DIMM 1 Enable */
+ UINT8 DIMMDWidth; /* DRAM device data width */
+ UINT8 DIMMDensity; /* DRAM device data density */
+ UINT8 DIMMBusWidth; /* DIMM Bus Width */
+ UINT8 DIMMSides; /* Ranks Per DIMM */
+ UINT8 DIMMtCL; /* tCL */
+ UINT8 DIMMtRPtRCD; /* tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc. */
+ UINT8 DIMMtWR; /* tWR in DRAM clk */
+ UINT8 DIMMtWTR; /* tWTR in DRAM clk */
+ UINT8 DIMMtRRD; /* tRRD in DRAM clk */
+ UINT8 DIMMtRTP; /* tRTP in DRAM clk */
+ UINT8 DIMMtFAW; /* tFAW in DRAM clk */
+} MEMORY_DOWN_DATA;
+
+
+typedef struct _UPD_DATA_REGION {
+ UINT64 Signature; /* Offset 0x0000 */
+ UINT32 RESERVED1; /* Offset 0x0008 */
+ UINT8 Padding0[20]; /* Offset 0x000C */
+ UINT16 PcdMrcInitTsegSize; /* Offset 0x0020 */
+ UINT16 PcdMrcInitMmioSize; /* Offset 0x0022 */
+ UINT8 PcdMrcInitSPDAddr1; /* Offset 0x0024 */
+ UINT8 PcdMrcInitSPDAddr2; /* Offset 0x0025 */
+ UINT8 PcdeMMCBootMode; /* Offset 0x0026 */
+ UINT8 PcdEnableSdio; /* Offset 0x0027 */
+ UINT8 PcdEnableSdcard; /* Offset 0x0028 */
+ UINT8 PcdEnableHsuart0; /* Offset 0x0029 */
+ UINT8 PcdEnableHsuart1; /* Offset 0x002A */
+ UINT8 PcdEnableSpi; /* Offset 0x002B */
+ UINT8 ReservedUpdSpace1; /* Offset 0x002C */
+ UINT8 PcdEnableSata; /* Offset 0x002D */
+ UINT8 PcdSataMode; /* Offset 0x002E */
+ UINT8 PcdEnableAzalia; /* Offset 0x002F */
+ UINT32 AzaliaConfigPtr; /* Offset 0x0030 */
+ UINT8 PcdEnableXhci; /* Offset 0x0034 */
+ UINT8 PcdEnableLpe; /* Offset 0x0035 */
+ UINT8 PcdLpssSioEnablePciMode; /* Offset 0x0036 */
+ UINT8 PcdEnableDma0; /* Offset 0x0037 */
+ UINT8 PcdEnableDma1; /* Offset 0x0038 */
+ UINT8 PcdEnableI2C0; /* Offset 0x0039 */
+ UINT8 PcdEnableI2C1; /* Offset 0x003A */
+ UINT8 PcdEnableI2C2; /* Offset 0x003B */
+ UINT8 PcdEnableI2C3; /* Offset 0x003C */
+ UINT8 PcdEnableI2C4; /* Offset 0x003D */
+ UINT8 PcdEnableI2C5; /* Offset 0x003E */
+ UINT8 PcdEnableI2C6; /* Offset 0x003F */
+ UINT8 PcdEnablePwm0; /* Offset 0x0040 */
+ UINT8 PcdEnablePwm1; /* Offset 0x0041 */
+ UINT8 PcdEnableHsi; /* Offset 0x0042 */
+ UINT8 PcdIgdDvmt50PreAlloc; /* Offset 0x0043 */
+ UINT8 PcdApertureSize; /* Offset 0x0044 */
+ UINT8 PcdGttSize; /* Offset 0x0045 */
+ UINT32 SerialDebugPortAddress; /* Offset 0x0046 */
+ UINT8 SerialDebugPortType; /* Offset 0x004A */
+ UINT8 PcdMrcDebugMsg; /* Offset 0x004B */
+ UINT8 ISPEnable; /* Offset 0x004C */
+ UINT8 PcdSccEnablePciMode; /* Offset 0x004D */
+ UINT8 IgdRenderStandby; /* Offset 0x004E */
+ UINT8 TxeUmaEnable; /* Offset 0x004F */
+ UINT8 PcdOsSelection; /* Offset 0x0050 */
+ UINT8 PcdEMMC45DDR50Enabled; /* Offset 0x0051 */
+ UINT8 PcdEMMC45HS200Enabled; /* Offset 0x0052 */
+ UINT8 PcdEMMC45RetuneTimerValue; /* Offset 0x0053 */
+ UINT8 PcdEnableIgd; /* Offset 0x0054 */
+ UINT8 AutoSelfRefreshEnable; /* Offset 0x0055 */
+ UINT16 APTaskTimeoutCnt; /* Offset 0x0056 */
+ UINT8 UnusedUpdSpace1[152]; /* Offset 0x0058 */
+ MEMORY_DOWN_DATA PcdMemoryParameters; /* Offset 0x00F0 */
+ UINT16 PcdRegionTerminator; /* Offset 0x0100 */
+} UPD_DATA_REGION;
+
+
+typedef struct _VPD_DATA_REGION {
+ UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
+ UINT32 PcdImageRevision; /* Offset 0x0008 */
+ UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
+ UINT8 Padding0[16]; /* Offset 0x0010 */
+ UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
+ UINT8 PcdPlatformType; /* Offset 0x0024 */
+ UINT8 PcdEnableSecureBoot; /* Offset 0x0025 */
+ UINT8 PcdMemoryParameters[16]; /* Offset 0x0026 */
+} VPD_DATA_REGION;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/srx/board_fsp.c b/src/vendorcode/intel/fsp/fsp1_0/baytrail/srx/board_fsp.c
new file mode 100644
index 0000000..2cb3492
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/srx/board_fsp.c
@@ -0,0 +1,186 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/***********************************************************************
+ *
+ * board_fsp.c
+ *
+ * Parse HOB to get system data.
+ *
+ **********************************************************************/
+#include "fsp.h"
+
+void
+GetLowMemorySize (
+ uint32_t *LowMemoryLength
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ *LowMemoryLength = 0x100000;
+
+ //
+ // Get the HOB list for processing
+ //
+ Hob.Raw = GetHobList();
+
+ //
+ // Collect memory ranges
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
+ //
+ // Need memory above 1MB to be collected here
+ //
+ if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000 &&
+ Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
+ *LowMemoryLength += (uint32_t) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return;
+}
+
+void
+GetHighMemorySize (
+ uint64_t *HighMemoryLength
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ *HighMemoryLength = 0x0;
+
+ //
+ // Get the HOB list for processing
+ //
+ Hob.Raw = GetHobList();
+
+ //
+ // Collect memory ranges
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
+ //
+ // Need memory above 4GB to be collected here
+ //
+ if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS) 0x100000000) {
+ *HighMemoryLength += (uint64_t) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return;
+}
+
+void
+GetFspReservedMemoryFromGuid (
+ uint32_t *FspMemoryBase,
+ uint32_t *FspMemoryLength,
+ EFI_GUID FspReservedMemoryGuid
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ //
+ // Get the HOB list for processing
+ //
+ Hob.Raw = GetHobList();
+ *FspMemoryBase = 0;
+ *FspMemoryLength = 0;
+
+ //
+ // Collect memory ranges
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) {
+ if (CompareGuid(&Hob.ResourceDescriptor->Owner, &FspReservedMemoryGuid)) {
+ *FspMemoryBase = (uint32_t) (Hob.ResourceDescriptor->PhysicalStart);
+ *FspMemoryLength = (uint32_t) (Hob.ResourceDescriptor->ResourceLength);
+ break;
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return;
+}
+
+void
+GetFspNVStorageMemory (
+ VOID **FspNVStorageHob,
+ uint16_t *DataSize
+ )
+{
+
+ EFI_GUID FspNVStorageHobGuid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+ uint8_t *GuidHob;
+ EFI_HOB_GENERIC_HEADER *GuidHobHdr;
+
+ GuidHob = GetFirstGuidHob(&FspNVStorageHobGuid);
+ if (!GuidHob) {
+ *FspNVStorageHob = 0;
+ *DataSize = 0;
+ } else {
+ *FspNVStorageHob = GET_GUID_HOB_DATA (GuidHob);
+ GuidHobHdr = (EFI_HOB_GENERIC_HEADER *)GuidHob;
+ *DataSize = GET_GUID_HOB_DATA_SIZE (GuidHobHdr);
+ }
+}
+
+void
+GetTempRamStack (
+ VOID **TempRamStackPtr,
+ uint16_t *DataSize
+ )
+{
+
+ EFI_GUID FspBootloaderTemporaryMemoryHobGuid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
+ uint8_t *GuidHob;
+ EFI_HOB_GENERIC_HEADER *GuidHobHdr;
+
+ GuidHob = GetFirstGuidHob(&FspBootloaderTemporaryMemoryHobGuid);
+ if (!GuidHob) {
+ *TempRamStackPtr = 0;
+ *DataSize = 0;
+ } else {
+ *TempRamStackPtr = GET_GUID_HOB_DATA (GuidHob);
+ GuidHobHdr = (EFI_HOB_GENERIC_HEADER *)GuidHob;
+ *DataSize = GET_GUID_HOB_DATA_SIZE (GuidHobHdr);
+ }
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_0/baytrail/srx/fsphob.c b/src/vendorcode/intel/fsp/fsp1_0/baytrail/srx/fsphob.c
new file mode 100644
index 0000000..5d6e890
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/baytrail/srx/fsphob.c
@@ -0,0 +1,198 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/***********************************************************************
+ *
+ * fsphob.c
+ *
+ * HOB infrastructure code.
+ *
+ **********************************************************************/
+#include <string.h>
+
+#include "fsptypes.h"
+#include "fsphob.h"
+
+//
+// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
+//
+extern volatile void *FspHobListPtr;
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return The 64-bit value read from Buffer.
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ )
+{
+ UINT64 LowPartOfGuid1;
+ UINT64 LowPartOfGuid2;
+ UINT64 HighPartOfGuid1;
+ UINT64 HighPartOfGuid2;
+
+ LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
+ LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
+ HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
+ HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
+
+ return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
+}
+
+/**
+ Returns the pointer to the HOB list.
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+ ASSERT (FspHobListPtr != NULL);
+ return ((VOID *)FspHobListPtr);
+}
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list until end of list or matching type is found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsp.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsp.h
new file mode 100644
index 0000000..22d2ee9
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsp.h
@@ -0,0 +1,45 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_H__
+#define __FSP_H__
+
+#include "fsptypes.h"
+#include "fspfv.h"
+#include "fspffs.h"
+#include "fspapi.h"
+#include "fsphob.h"
+#include "fspplatform.h"
+#include "fspinfoheader.h"
+#include "fspbootmode.h"
+#include "fspvpd.h"
+#include "fspsupport.h"
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspapi.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspapi.h
new file mode 100644
index 0000000..0211e26
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspapi.h
@@ -0,0 +1,107 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_API_H__
+#define __FSP_API_H__
+
+///
+/// FSP Init continuation function prototype.
+/// Control will be returned to this callback function after FspInit API call.
+///
+typedef VOID (FSPAPI *CONTINUATION_PROC) (EFI_STATUS Status, VOID *HobListPtr);
+
+#pragma pack(1)
+
+typedef struct {
+ ///
+ /// Non-volatile storage buffer pointer.
+ ///
+ VOID *NvsBufferPtr;
+ ///
+ /// Runtime buffer pointer
+ ///
+ VOID *RtBufferPtr;
+ ///
+ /// Continuation function address
+ ///
+ CONTINUATION_PROC ContinuationFunc;
+} FSP_INIT_PARAMS;
+
+typedef struct {
+ ///
+ /// Stack top pointer used by the bootloader.
+ /// The new stack frame will be set up at this location after FspInit API call.
+ ///
+ UINT32 *StackTop;
+ ///
+ /// Current system boot mode.
+ ///
+ UINT32 BootMode;
+ ///
+ /// User platform configuraiton data region pointer.
+ ///
+ VOID *UpdDataRgnPtr;
+ ///
+ /// Reserved
+ ///
+ UINT32 Reserved[7];
+} FSP_INIT_RT_COMMON_BUFFER;
+
+typedef enum {
+ ///
+ /// Notification code for post PCI enuermation
+ ///
+ EnumInitPhaseAfterPciEnumeration = 0x20,
+ ///
+ /// Notification code before transfering control to the payload
+ ///
+ EnumInitPhaseReadyToBoot = 0x40
+} FSP_INIT_PHASE;
+
+typedef struct {
+ ///
+ /// Notification phase used for NotifyPhase API
+ ///
+ FSP_INIT_PHASE Phase;
+} NOTIFY_PHASE_PARAMS;
+
+#pragma pack()
+
+///
+/// FspInit API function prototype
+///
+typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
+
+///
+/// NotifyPhase API function prototype
+///
+typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspbootmode.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspbootmode.h
new file mode 100644
index 0000000..f3c121b
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspbootmode.h
@@ -0,0 +1,45 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_BOOTMODE_H__
+#define __FSP_BOOTMODE_H__
+
+///
+/// EFI boot mode
+///
+typedef UINT32 EFI_BOOT_MODE;
+
+//
+// 0x21 - 0xf..f are reserved.
+//
+#define BOOT_WITH_FULL_CONFIGURATION 0x00
+#define BOOT_ON_S3_RESUME 0x11
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspffs.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspffs.h
new file mode 100644
index 0000000..9c4e669
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspffs.h
@@ -0,0 +1,506 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_FFS_H__
+#define __FSP_FFS_H__
+
+#pragma pack(1)
+///
+/// Used to verify the integrity of the file.
+///
+typedef union {
+ struct {
+ ///
+ /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
+ /// header. The State and IntegrityCheck.Checksum.File fields are assumed
+ /// to be zero and the checksum is calculated such that the entire header sums to zero.
+ ///
+ UINT8 Header;
+ ///
+ /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
+ /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
+ /// checksum of the file data.
+ /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
+ /// the IntegrityCheck.Checksum.File field must be initialized with a value of
+ /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
+ /// EFI_FILE_DATA_VALID bit is set in the State field.
+ ///
+ UINT8 File;
+ } Checksum;
+ ///
+ /// This is the full 16 bits of the IntegrityCheck field.
+ ///
+ UINT16 Checksum16;
+} EFI_FFS_INTEGRITY_CHECK;
+
+///
+/// FFS_FIXED_CHECKSUM is the checksum value used when the
+/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
+///
+#define FFS_FIXED_CHECKSUM 0xAA
+
+typedef UINT8 EFI_FV_FILETYPE;
+typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
+typedef UINT8 EFI_FFS_FILE_STATE;
+
+///
+/// File Types Definitions
+///
+#define EFI_FV_FILETYPE_ALL 0x00
+#define EFI_FV_FILETYPE_RAW 0x01
+#define EFI_FV_FILETYPE_FREEFORM 0x02
+#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
+#define EFI_FV_FILETYPE_PEI_CORE 0x04
+#define EFI_FV_FILETYPE_DXE_CORE 0x05
+#define EFI_FV_FILETYPE_PEIM 0x06
+#define EFI_FV_FILETYPE_DRIVER 0x07
+#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
+#define EFI_FV_FILETYPE_APPLICATION 0x09
+#define EFI_FV_FILETYPE_SMM 0x0A
+#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
+#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
+#define EFI_FV_FILETYPE_SMM_CORE 0x0D
+#define EFI_FV_FILETYPE_OEM_MIN 0xc0
+#define EFI_FV_FILETYPE_OEM_MAX 0xdf
+#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
+#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
+#define EFI_FV_FILETYPE_FFS_MIN 0xf0
+#define EFI_FV_FILETYPE_FFS_MAX 0xff
+#define EFI_FV_FILETYPE_FFS_PAD 0xf0
+
+///
+/// FFS File Attributes.
+///
+#define FFS_ATTRIB_LARGE_FILE 0x01
+#define FFS_ATTRIB_FIXED 0x04
+#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
+#define FFS_ATTRIB_CHECKSUM 0x40
+
+///
+/// FFS File State Bits.
+///
+#define EFI_FILE_HEADER_CONSTRUCTION 0x01
+#define EFI_FILE_HEADER_VALID 0x02
+#define EFI_FILE_DATA_VALID 0x04
+#define EFI_FILE_MARKED_FOR_UPDATE 0x08
+#define EFI_FILE_DELETED 0x10
+#define EFI_FILE_HEADER_INVALID 0x20
+
+
+///
+/// Each file begins with the header that describe the
+/// contents and state of the files.
+///
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file.
+ ///
+ EFI_GUID Name;
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ ///
+ UINT8 Size[3];
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+} EFI_FFS_FILE_HEADER;
+
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file. There may be only
+ /// one instance of a file with the file name GUID of Name in any given firmware
+ /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
+ /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
+ /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
+ /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
+ ///
+ UINT8 Size[3];
+
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+
+ ///
+ /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
+ /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
+ ///
+ UINT32 ExtendedSize;
+} EFI_FFS_FILE_HEADER2;
+
+#define IS_FFS_FILE2(FfsFileHeaderPtr) \
+ (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
+
+#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
+
+#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
+ (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
+
+typedef UINT8 EFI_SECTION_TYPE;
+
+///
+/// Pseudo type. It is used as a wild card when retrieving sections.
+/// The section type EFI_SECTION_ALL matches all section types.
+///
+#define EFI_SECTION_ALL 0x00
+
+///
+/// Encapsulation section Type values.
+///
+#define EFI_SECTION_COMPRESSION 0x01
+
+#define EFI_SECTION_GUID_DEFINED 0x02
+
+#define EFI_SECTION_DISPOSABLE 0x03
+
+///
+/// Leaf section Type values.
+///
+#define EFI_SECTION_PE32 0x10
+#define EFI_SECTION_PIC 0x11
+#define EFI_SECTION_TE 0x12
+#define EFI_SECTION_DXE_DEPEX 0x13
+#define EFI_SECTION_VERSION 0x14
+#define EFI_SECTION_USER_INTERFACE 0x15
+#define EFI_SECTION_COMPATIBILITY16 0x16
+#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
+#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
+#define EFI_SECTION_RAW 0x19
+#define EFI_SECTION_PEI_DEPEX 0x1B
+#define EFI_SECTION_SMM_DEPEX 0x1C
+
+///
+/// Common section header.
+///
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+ EFI_SECTION_TYPE Type;
+ ///
+ /// Declares the section type.
+ ///
+} EFI_COMMON_SECTION_HEADER;
+
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+
+ EFI_SECTION_TYPE Type;
+
+ ///
+ /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
+ /// Size is not equal to 0xFFFFFF, then this field does not exist.
+ ///
+ UINT32 ExtendedSize;
+} EFI_COMMON_SECTION_HEADER2;
+
+///
+/// Leaf section type that contains an
+/// IA-32 16-bit executable image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
+
+///
+/// CompressionType of EFI_COMPRESSION_SECTION.
+///
+#define EFI_NOT_COMPRESSED 0x00
+#define EFI_STANDARD_COMPRESSION 0x01
+///
+/// An encapsulation section type in which the
+/// section data is compressed.
+///
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION;
+
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION2;
+
+///
+/// An encapsulation section type in which the section data is disposable.
+/// A disposable section is an encapsulation section in which the section data may be disposed of during
+/// the process of creating or updating a firmware image without significant impact on the usefulness of
+/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
+/// allows optional or descriptive data to be included with the firmware file which can be removed in
+/// order to conserve space. The contents of this section are implementation specific, but might contain
+/// debug data or detailed integration instructions.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
+
+///
+/// The leaf section which could be used to determine the dispatch order of DXEs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a PI FV.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
+
+///
+/// The leaf section which contains a single GUID.
+///
+typedef struct {
+ ///
+ /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
+
+///
+/// Attributes of EFI_GUID_DEFINED_SECTION.
+///
+#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
+#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
+///
+/// The leaf section which is encapsulation defined by specific GUID.
+///
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION2;
+
+///
+/// The leaf section which contains PE32+ image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
+
+///
+/// The leaf section used to determine the dispatch order of PEIMs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
+
+///
+/// A leaf section type that contains a position-independent-code (PIC) image.
+/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
+/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
+/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
+/// relocation information has been stripped from the image and the image can be moved and will
+/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
+/// be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
+
+///
+/// The leaf section which constains the position-independent-code image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
+
+///
+/// The leaf section which contains an array of zero or more bytes.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
+
+///
+/// The SMM dependency expression section is a leaf section that contains a dependency expression that
+/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
+/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
+/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
+/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
+/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a unicode string that
+/// is human readable file name.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION2;
+
+///
+/// The leaf section which contains a numeric build number and
+/// an optional unicode string that represents the file revision.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT16 BuildNumber;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// A UINT16 that represents a particular build. Subsequent builds have monotonically
+ /// increasing build numbers relative to earlier builds.
+ ///
+ UINT16 BuildNumber;
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION2;
+
+#define IS_SECTION2(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
+
+#define SECTION_SIZE(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
+
+#define SECTION2_SIZE(SectionHeaderPtr) \
+ (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspfv.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspfv.h
new file mode 100644
index 0000000..5696a78
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspfv.h
@@ -0,0 +1,247 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_FV___
+#define __FSP_FV___
+
+///
+/// EFI_FV_FILE_ATTRIBUTES
+///
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+
+//
+// Value of EFI_FV_FILE_ATTRIBUTES.
+//
+#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
+#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
+#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
+
+///
+/// type of EFI FVB attribute
+///
+typedef UINT32 EFI_FVB_ATTRIBUTES_2;
+
+//
+// Attributes bit definitions
+//
+#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB2_READ_STATUS 0x00000004
+#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB2_WRITE_STATUS 0x00000020
+#define EFI_FVB2_LOCK_CAP 0x00000040
+#define EFI_FVB2_LOCK_STATUS 0x00000080
+#define EFI_FVB2_STICKY_WRITE 0x00000200
+#define EFI_FVB2_MEMORY_MAPPED 0x00000400
+#define EFI_FVB2_ERASE_POLARITY 0x00000800
+#define EFI_FVB2_READ_LOCK_CAP 0x00001000
+#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
+#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
+#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
+#define EFI_FVB2_ALIGNMENT 0x001F0000
+#define EFI_FVB2_ALIGNMENT_1 0x00000000
+#define EFI_FVB2_ALIGNMENT_2 0x00010000
+#define EFI_FVB2_ALIGNMENT_4 0x00020000
+#define EFI_FVB2_ALIGNMENT_8 0x00030000
+#define EFI_FVB2_ALIGNMENT_16 0x00040000
+#define EFI_FVB2_ALIGNMENT_32 0x00050000
+#define EFI_FVB2_ALIGNMENT_64 0x00060000
+#define EFI_FVB2_ALIGNMENT_128 0x00070000
+#define EFI_FVB2_ALIGNMENT_256 0x00080000
+#define EFI_FVB2_ALIGNMENT_512 0x00090000
+#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
+#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
+#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
+#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
+#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
+#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
+#define EFI_FVB2_ALIGNMENT_64K 0x00100000
+#define EFI_FVB2_ALIGNMENT_128K 0x00110000
+#define EFI_FVB2_ALIGNMENT_256K 0x00120000
+#define EFI_FVB2_ALIGNMENT_512K 0x00130000
+#define EFI_FVB2_ALIGNMENT_1M 0x00140000
+#define EFI_FVB2_ALIGNMENT_2M 0x00150000
+#define EFI_FVB2_ALIGNMENT_4M 0x00160000
+#define EFI_FVB2_ALIGNMENT_8M 0x00170000
+#define EFI_FVB2_ALIGNMENT_16M 0x00180000
+#define EFI_FVB2_ALIGNMENT_32M 0x00190000
+#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
+#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
+#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
+#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
+#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
+#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
+
+
+typedef struct {
+ ///
+ /// The number of sequential blocks which are of the same size.
+ ///
+ UINT32 NumBlocks;
+ ///
+ /// The size of the blocks.
+ ///
+ UINT32 Length;
+} EFI_FV_BLOCK_MAP_ENTRY;
+
+///
+/// Describes the features and layout of the firmware volume.
+///
+typedef struct {
+ ///
+ /// The first 16 bytes are reserved to allow for the reset vector of
+ /// processors whose reset vector is at address 0.
+ ///
+ UINT8 ZeroVector[16];
+ ///
+ /// Declares the file system with which the firmware volume is formatted.
+ ///
+ EFI_GUID FileSystemGuid;
+ ///
+ /// Length in bytes of the complete firmware volume, including the header.
+ ///
+ UINT64 FvLength;
+ ///
+ /// Set to EFI_FVH_SIGNATURE
+ ///
+ UINT32 Signature;
+ ///
+ /// Declares capabilities and power-on defaults for the firmware volume.
+ ///
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ ///
+ /// Length in bytes of the complete firmware volume header.
+ ///
+ UINT16 HeaderLength;
+ ///
+ /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
+ ///
+ UINT16 Checksum;
+ ///
+ /// Offset, relative to the start of the header, of the extended header
+ /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
+ ///
+ UINT16 ExtHeaderOffset;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT8 Reserved[1];
+ ///
+ /// Set to 2. Future versions of this specification may define new header fields and will
+ /// increment the Revision field accordingly.
+ ///
+ UINT8 Revision;
+ ///
+ /// An array of run-length encoded FvBlockMapEntry structures. The array is
+ /// terminated with an entry of {0,0}.
+ ///
+ EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
+} EFI_FIRMWARE_VOLUME_HEADER;
+
+#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
+
+///
+/// Firmware Volume Header Revision definition
+///
+#define EFI_FVH_REVISION 0x02
+
+///
+/// Extension header pointed by ExtHeaderOffset of volume header.
+///
+typedef struct {
+ ///
+ /// Firmware volume name.
+ ///
+ EFI_GUID FvName;
+ ///
+ /// Size of the rest of the extension header, including this structure.
+ ///
+ UINT32 ExtHeaderSize;
+} EFI_FIRMWARE_VOLUME_EXT_HEADER;
+
+///
+/// Entry struture for describing FV extension header
+///
+typedef struct {
+ ///
+ /// Size of this header extension.
+ ///
+ UINT16 ExtEntrySize;
+ ///
+ /// Type of the header.
+ ///
+ UINT16 ExtEntryType;
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
+
+#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
+///
+/// This extension header provides a mapping between a GUID and an OEM file type.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
+ /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
+ ///
+ UINT32 TypeMask;
+ ///
+ /// An array of GUIDs, each GUID representing an OEM file type.
+ ///
+ /// EFI_GUID Types[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
+
+#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
+
+///
+/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
+/// GUID FormatType type which includes a length and a successive series of data bytes.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// Vendor-specific GUID.
+ ///
+ EFI_GUID FormatType;
+ ///
+ /// An arry of bytes of length Length.
+ ///
+ /// UINT8 Data[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsphob.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsphob.h
new file mode 100644
index 0000000..59e34ef
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsphob.h
@@ -0,0 +1,427 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_HOB_H__
+#define __FSP_HOB_H__
+
+//
+// HobType of EFI_HOB_GENERIC_HEADER.
+//
+#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+#define EFI_HOB_TYPE_UNUSED 0xFFFE
+#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
+
+///
+/// Describes the format and size of the data inside the HOB.
+/// All HOBs must contain this generic HOB header.
+///
+typedef struct {
+ ///
+ /// Identifies the HOB data structure type.
+ ///
+ UINT16 HobType;
+ ///
+ /// The length in bytes of the HOB.
+ ///
+ UINT16 HobLength;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT32 Reserved;
+} EFI_HOB_GENERIC_HEADER;
+
+///
+/// Enumeration of memory types introduced in UEFI.
+///
+typedef enum {
+ ///
+ /// Not used.
+ ///
+ EfiReservedMemoryType,
+ ///
+ /// The code portions of a loaded application.
+ /// (Note that UEFI OS loaders are UEFI applications.)
+ ///
+ EfiLoaderCode,
+ ///
+ /// The data portions of a loaded application and the default data allocation
+ /// type used by an application to allocate pool memory.
+ ///
+ EfiLoaderData,
+ ///
+ /// The code portions of a loaded Boot Services Driver.
+ ///
+ EfiBootServicesCode,
+ ///
+ /// The data portions of a loaded Boot Serves Driver, and the default data
+ /// allocation type used by a Boot Services Driver to allocate pool memory.
+ ///
+ EfiBootServicesData,
+ ///
+ /// The code portions of a loaded Runtime Services Driver.
+ ///
+ EfiRuntimeServicesCode,
+ ///
+ /// The data portions of a loaded Runtime Services Driver and the default
+ /// data allocation type used by a Runtime Services Driver to allocate pool memory.
+ ///
+ EfiRuntimeServicesData,
+ ///
+ /// Free (unallocated) memory.
+ ///
+ EfiConventionalMemory,
+ ///
+ /// Memory in which errors have been detected.
+ ///
+ EfiUnusableMemory,
+ ///
+ /// Memory that holds the ACPI tables.
+ ///
+ EfiACPIReclaimMemory,
+ ///
+ /// Address space reserved for use by the firmware.
+ ///
+ EfiACPIMemoryNVS,
+ ///
+ /// Used by system firmware to request that a memory-mapped IO region
+ /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
+ ///
+ EfiMemoryMappedIO,
+ ///
+ /// System memory-mapped IO region that is used to translate memory
+ /// cycles to IO cycles by the processor.
+ ///
+ EfiMemoryMappedIOPortSpace,
+ ///
+ /// Address space reserved by the firmware for code that is part of the processor.
+ ///
+ EfiPalCode,
+ EfiMaxMemoryType
+} EFI_MEMORY_TYPE;
+
+///
+/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
+/// various attributes of the logical memory allocation. The type field will be used for
+/// subsequent inclusion in the UEFI memory map.
+///
+typedef struct {
+ ///
+ /// A GUID that defines the memory allocation region's type and purpose, as well as
+ /// other fields within the memory allocation HOB. This GUID is used to define the
+ /// additional data within the HOB that may be present for the memory allocation HOB.
+ /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// The base address of memory allocated by this HOB. Type
+ /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
+
+ ///
+ /// The length in bytes of memory allocated by this HOB.
+ ///
+ UINT64 MemoryLength;
+
+ ///
+ /// Defines the type of memory allocated by this HOB. The memory type definition
+ /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
+ /// in AllocatePages() in the UEFI 2.0 specification.
+ ///
+ EFI_MEMORY_TYPE MemoryType;
+
+ ///
+ /// Padding for Itanium processor family
+ ///
+ UINT8 Reserved[4];
+} EFI_HOB_MEMORY_ALLOCATION_HEADER;
+
+///
+/// Describes all memory ranges used during the HOB producer
+/// phase that exist outside the HOB list. This HOB type
+/// describes how memory is used, not the physical attributes of memory.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
+ /// various attributes of the logical memory allocation.
+ ///
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ //
+ // Additional data pertaining to the "Name" Guid memory
+ // may go here.
+ //
+} EFI_HOB_MEMORY_ALLOCATION;
+
+///
+/// The resource type.
+///
+typedef UINT32 EFI_RESOURCE_TYPE;
+
+//
+// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
+//
+#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
+#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
+#define EFI_RESOURCE_IO 0x00000002
+#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
+#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
+#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
+#define EFI_RESOURCE_IO_RESERVED 0x00000006
+#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
+
+///
+/// A type of recount attribute type.
+///
+typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
+
+//
+// These types can be ORed together as needed.
+//
+// The first three enumerations describe settings
+//
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
+//
+// The rest of the settings describe capabilities
+//
+#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
+#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
+#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
+#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
+#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
+
+///
+/// Describes the resource properties of all fixed,
+/// nonrelocatable resource ranges found on the processor
+/// host bus during the HOB producer phase.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID representing the owner of the resource. This GUID is used by HOB
+ /// consumer phase components to correlate device ownership of a resource.
+ ///
+ EFI_GUID Owner;
+ ///
+ /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
+ ///
+ EFI_RESOURCE_TYPE ResourceType;
+ ///
+ /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
+ ///
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ ///
+ /// The physical start address of the resource region.
+ ///
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
+ ///
+ /// The number of bytes of the resource region.
+ ///
+ UINT64 ResourceLength;
+} EFI_HOB_RESOURCE_DESCRIPTOR;
+
+///
+/// Allows writers of executable content in the HOB producer phase to
+/// maintain and manage HOBs with specific GUID.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID that defines the contents of this HOB.
+ ///
+ EFI_GUID Name;
+ //
+ // Guid specific data goes here
+ //
+} EFI_HOB_GUID_TYPE;
+
+///
+/// Union of all the possible HOB Types.
+///
+typedef union {
+ EFI_HOB_GENERIC_HEADER *Header;
+ EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
+ EFI_HOB_GUID_TYPE *Guid;
+ UINT8 *Raw;
+} EFI_PEI_HOB_POINTERS;
+
+
+/**
+ Returns the type of a HOB.
+
+ This macro returns the HobType field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobType.
+
+**/
+#define GET_HOB_TYPE(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
+
+/**
+ Returns the length, in bytes, of a HOB.
+
+ This macro returns the HobLength field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobLength.
+
+**/
+#define GET_HOB_LENGTH(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
+
+/**
+ Returns a pointer to the next HOB in the HOB list.
+
+ This macro returns a pointer to HOB that follows the
+ HOB specified by HobStart in the HOB List.
+
+ @param HobStart A pointer to a HOB.
+
+ @return A pointer to the next HOB in the HOB list.
+
+**/
+#define GET_NEXT_HOB(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
+
+/**
+ Determines if a HOB is the last HOB in the HOB list.
+
+ This macro determine if the HOB specified by HobStart is the
+ last HOB in the HOB list. If HobStart is last HOB in the HOB list,
+ then TRUE is returned. Otherwise, FALSE is returned.
+
+ @param HobStart A pointer to a HOB.
+
+ @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
+ @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
+
+**/
+#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+/**
+ Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns a pointer to the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return A pointer to the data buffer in a HOB.
+
+**/
+#define GET_GUID_HOB_DATA(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return The size of the data buffer.
+**/
+#define GET_GUID_HOB_DATA_SIZE(HobStart) \
+ (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
+
+
+/**
+
+ FSP specific GUID HOB definitions
+
+ **/
+#define FSP_INFO_HEADER_GUID \
+ { \
+ 0x912740BE, 0x2284, 0x4734, {0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C} \
+ }
+
+#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
+ { \
+ 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0xb, 0x7b, 0xa9, 0xe4, 0xb0 } \
+ }
+
+#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
+ { \
+ 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } \
+ }
+
+#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \
+ { \
+ 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } \
+ }
+
+#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \
+ { \
+ 0xd038747c, 0xd00c, 0x4980, { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } \
+ }
+
+#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \
+ { \
+ 0x9c7c3aa7, 0x5332, 0x4917, { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } \
+ }
+
+#define FSP_HOB_GRAPHICS_INFO_GUID \
+{ 0x39f62cce, 0x6825, 0x4669, { 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07 } }
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspinfoheader.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspinfoheader.h
new file mode 100644
index 0000000..e630788
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspinfoheader.h
@@ -0,0 +1,118 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_INFOHEADER_H__
+#define __FSP_INFOHEADER_H__
+
+///
+/// Fixed FSP header offset in the FSP image
+///
+#define FSP_INFO_HEADER_OFF 0x94
+
+#pragma pack(1)
+
+typedef struct {
+ ///
+ /// Signature ('FSPH') for the FSP Information Header
+ ///
+ UINT32 Signature;
+ ///
+ /// Length of the FSP Information Header
+ ///
+ UINT32 HeaderLength;
+ ///
+ /// Reserved
+ ///
+ UINT8 Reserved1[3];
+ ///
+ /// Revision of the FSP Information Header
+ ///
+ UINT8 HeaderRevision;
+ ///
+ /// Revision of the FSP binary
+ ///
+ UINT32 ImageRevision;
+
+
+ ///
+ /// Signature string that will help match the FSP Binary to a supported
+ /// hardware configuration.
+ ///
+ CHAR8 ImageId[8];
+ ///
+ /// Size of the entire FSP binary
+ ///
+ UINT32 ImageSize;
+ ///
+ /// FSP binary preferred base address
+ ///
+ UINT32 ImageBase;
+
+
+ ///
+ /// Attribute for the FSP binary
+ ///
+ UINT32 ImageAttribute;
+ ///
+ /// Offset of the FSP configuration region
+ ///
+ UINT32 CfgRegionOffset;
+ ///
+ /// Size of the FSP configuration region
+ ///
+ UINT32 CfgRegionSize;
+ ///
+ /// Number of API entries this FSP supports
+ ///
+ UINT32 ApiEntryNum;
+
+
+ ///
+ /// TempRamInit API entry offset
+ ///
+ UINT32 TempRamInitEntry;
+ ///
+ /// FspInit API entry offset
+ ///
+ UINT32 FspInitEntry;
+ ///
+ /// NotifyPhase API entry offset
+ ///
+ UINT32 NotifyPhaseEntry;
+ ///
+ /// Reserved
+ ///
+ UINT32 Reserved2;
+
+} FSP_INFO_HEADER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspplatform.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspplatform.h
new file mode 100644
index 0000000..4bb03d5
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspplatform.h
@@ -0,0 +1,75 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_PLATFORM_H__
+#define __FSP_PLATFORM_H__
+
+#pragma pack(1)
+
+typedef struct {
+ uint32_t RedMask;
+ uint32_t GreenMask;
+ uint32_t BlueMask;
+ uint32_t ReservedMask;
+} EFI_PIXEL_BITMASK;
+
+typedef enum {
+ PixelRedGreenBlueReserved8BitPerColor,
+ PixelBlueGreenRedReserved8BitPerColor,
+ PixelBitMask,
+ PixelBltOnly,
+ PixelFormatMax
+} EFI_GRAPHICS_PIXEL_FORMAT;
+
+typedef struct {
+ uint32_t Version;
+ uint32_t HorizontalResolution;
+ uint32_t VerticalResolution;
+ EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
+ EFI_PIXEL_BITMASK PixelInformation;
+ uint32_t PixelsPerScanLine;
+} EFI_GRAPHICS_OUTPUT_MODE_INFORMATION;
+
+typedef struct {
+ uint64_t FrameBufferBase;
+ uint64_t FrameBufferSize;
+ EFI_GRAPHICS_OUTPUT_MODE_INFORMATION GraphicsMode;
+} PLATFORM_GRAPHICS_OUTPUT;
+
+typedef struct {
+ ///
+ /// FSP common runtime data structure
+ ///
+ FSP_INIT_RT_COMMON_BUFFER Common;
+} FSP_INIT_RT_BUFFER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspsupport.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspsupport.h
new file mode 100644
index 0000000..a12cf27
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspsupport.h
@@ -0,0 +1,118 @@
+/**
+
+Copyright (C) 2013-2016 Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_SUPPORT_H__
+#define __FSP_SUPPORT_H__
+
+UINT32
+GetPhysicalLowMemTop (
+ CONST VOID *HobStart
+ );
+
+UINT32
+GetUsableLowMemTop (
+ CONST VOID *HobListPtr
+ );
+
+UINT64
+GetUsableHighMemTop (
+ CONST VOID *HobListPtr
+ );
+
+VOID *
+GetGuidHobDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length,
+ EFI_GUID *Guid
+ );
+
+UINT64
+GetFspReservedMemoryFromGuid (
+ CONST VOID *HobListPtr,
+ UINT64 *FspMemoryLength,
+ EFI_GUID *FspReservedMemoryGuid
+ );
+
+UINT32
+GetTsegReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ );
+
+UINT32
+GetFspReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ );
+
+VOID*
+GetFspNvsDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ );
+
+VOID *
+GetBootloaderTempMemoryBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ );
+
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ );
+
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ );
+
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ );
+
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ );
+
+VOID
+UpdateFspUpdConfigs (
+ UPD_DATA_REGION *UpdDataRgn
+ );
+
+#endif
\ No newline at end of file
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsptypes.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsptypes.h
new file mode 100644
index 0000000..c8e38e4
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fsptypes.h
@@ -0,0 +1,220 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_TYPES_H__
+#define __FSP_TYPES_H__
+
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned long long UINT64;
+
+///
+/// 8-byte signed value.
+///
+typedef long long INT64;
+
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned int UINT32;
+
+///
+/// 4-byte signed value.
+///
+typedef int INT32;
+
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+
+///
+/// 2-byte Character.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+
+///
+/// 1-byte signed value
+///
+typedef char INT8;
+
+///
+/// Undeclared type.
+///
+typedef void VOID;
+
+///
+/// 64-bit physical memory address.
+///
+typedef UINT64 EFI_PHYSICAL_ADDRESS;
+
+///
+/// UEFI and FSP defined status.
+///
+typedef UINT32 EFI_STATUS;
+#define FSP_STATUS EFI_STATUS
+
+///
+/// Datum is read-only.
+///
+#define CONST const
+
+///
+/// Datum is scoped to the current file or function.
+///
+#define STATIC static
+
+///
+/// Boolean true value. UEFI Specification defines this value to be 1,
+/// but this form is more portable.
+///
+#define TRUE ((BOOLEAN)(1==1))
+
+///
+/// Boolean false value. UEFI Specification defines this value to be 0,
+/// but this form is more portable.
+///
+#define FALSE ((BOOLEAN)(0==1))
+
+///
+/// Null pointer
+///
+#ifndef NULL
+#define NULL ((VOID *) 0)
+#endif
+
+///
+/// Modifier to ensure that all API functions use the correct C calling
+/// convention.
+///
+#define EFIAPI __attribute__((cdecl))
+#define FSPAPI EFIAPI
+
+///
+/// 128 bit buffer containing a unique identifier value.
+///
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} EFI_GUID;
+
+/**
+ Returns a 16-bit signature built from 2 ASCII characters.
+
+ This macro returns a 16-bit value built from the two ASCII characters specified
+ by A and B.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+
+ @return A 16-bit value built from the two ASCII characters specified by A and B.
+
+**/
+#define SIGNATURE_16(A, B) ((A) | (B << 8))
+
+/**
+ Returns a 32-bit signature built from 4 ASCII characters.
+
+ This macro returns a 32-bit value built from the four ASCII characters specified
+ by A, B, C, and D.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+ @param C The third ASCII character.
+ @param D The fourth ASCII character.
+
+ @return A 32-bit value built from the two ASCII characters specified by A, B,
+ C and D.
+
+**/
+#define SIGNATURE_32(A, B, C, D) (SIGNATURE_16 (A, B) | (SIGNATURE_16 (C, D) << 16))
+
+/**
+ Returns a 64-bit signature built from 8 ASCII characters.
+
+ This macro returns a 64-bit value built from the eight ASCII characters specified
+ by A, B, C, D, E, F, G,and H.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+ @param C The third ASCII character.
+ @param D The fourth ASCII character.
+ @param E The fifth ASCII character.
+ @param F The sixth ASCII character.
+ @param G The seventh ASCII character.
+ @param H The eighth ASCII character.
+
+ @return A 64-bit value built from the two ASCII characters specified by A, B,
+ C, D, E, F, G and H.
+
+**/
+#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32))
+
+///
+/// Assertion for debug
+///
+#define ASSERT(Expression) do { if (!(Expression)) for (;;); } while (FALSE)
+
+///
+/// Define FSP API return status code.
+/// Compatiable with EFI_STATUS defined in PI Spec.
+///
+#define FSP_SUCCESS 0
+#define FSP_INVALID_PARAMETER 0x80000002
+#define FSP_UNSUPPORTED 0x80000003
+#define FSP_DEVICE_ERROR 0x80000007
+#define FSP_NOT_FOUND 0x8000000E
+#define FSP_ALREADY_STARTED 0x80000014
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspvpd.h b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspvpd.h
new file mode 100644
index 0000000..f5f862a
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/include/fspvpd.h
@@ -0,0 +1,146 @@
+/**
+
+Copyright (C) 2015-2016 Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_VPD_H__
+#define __FSP_VPD_H__
+
+#pragma pack(1)
+
+typedef struct _UPD_DATA_REGION {
+ UINT64 Signature; /* Offset 0x0000 */
+ UINT64 Reserved; /* Offset 0x0008 */
+ UINT8 UnusedUpdSpace0[16]; /* Offset 0x0010 */
+ UINT8 SerialPortType; /* Offset 0x0020 */
+ UINT32 SerialPortAddress; /* Offset 0x0021 */
+ UINT8 SerialPortConfigure; /* Offset 0x0025 */
+ UINT8 SerialPortBaudRate; /* Offset 0x0026 */
+ UINT8 SerialPortControllerInit0; /* Offset 0x0027 */
+ UINT8 SerialPortControllerInit1; /* Offset 0x0028 */
+ UINT8 ConfigIOU1_PciPort3; /* Offset 0x0029 */
+ UINT8 ConfigIOU2_PciPort1; /* Offset 0x002A */
+ UINT8 PowerStateAfterG3; /* Offset 0x002B */
+ UINT8 PchPciPort1; /* Offset 0x002C */
+ UINT8 PchPciPort2; /* Offset 0x002D */
+ UINT8 PchPciPort3; /* Offset 0x002E */
+ UINT8 PchPciPort4; /* Offset 0x002F */
+ UINT8 PchPciPort5; /* Offset 0x0030 */
+ UINT8 PchPciPort6; /* Offset 0x0031 */
+ UINT8 PchPciPort7; /* Offset 0x0032 */
+ UINT8 PchPciPort8; /* Offset 0x0033 */
+ UINT8 HotPlug_PchPciPort1; /* Offset 0x0034 */
+ UINT8 HotPlug_PchPciPort2; /* Offset 0x0035 */
+ UINT8 HotPlug_PchPciPort3; /* Offset 0x0036 */
+ UINT8 HotPlug_PchPciPort4; /* Offset 0x0037 */
+ UINT8 HotPlug_PchPciPort5; /* Offset 0x0038 */
+ UINT8 HotPlug_PchPciPort6; /* Offset 0x0039 */
+ UINT8 HotPlug_PchPciPort7; /* Offset 0x003A */
+ UINT8 HotPlug_PchPciPort8; /* Offset 0x003B */
+ UINT8 Ehci1Enable; /* Offset 0x003C */
+ UINT8 Ehci2Enable; /* Offset 0x003D */
+ UINT8 HyperThreading; /* Offset 0x003E */
+ UINT8 DebugOutputLevel; /* Offset 0x003F */
+ UINT8 TcoTimerHaltLock; /* Offset 0x0040 */
+ UINT8 TurboMode; /* Offset 0x0041 */
+ UINT8 BootPerfMode; /* Offset 0x0042 */
+ UINT8 PciePort1aAspm; /* Offset 0x0043 */
+ UINT8 PciePort1bAspm; /* Offset 0x0044 */
+ UINT8 PciePort3aAspm; /* Offset 0x0045 */
+ UINT8 PciePort3bAspm; /* Offset 0x0046 */
+ UINT8 PciePort3cAspm; /* Offset 0x0047 */
+ UINT8 PciePort3dAspm; /* Offset 0x0048 */
+ UINT8 PchPciePort1Aspm; /* Offset 0x0049 */
+ UINT8 PchPciePort2Aspm; /* Offset 0x004A */
+ UINT8 PchPciePort3Aspm; /* Offset 0x004B */
+ UINT8 PchPciePort4Aspm; /* Offset 0x004C */
+ UINT8 PchPciePort5Aspm; /* Offset 0x004D */
+ UINT8 PchPciePort6Aspm; /* Offset 0x004E */
+ UINT8 PchPciePort7Aspm; /* Offset 0x004F */
+ UINT8 PchPciePort8Aspm; /* Offset 0x0050 */
+ UINT8 DFXEnable; /* Offset 0x0051 */
+ UINT8 ThermalDeviceEnable; /* Offset 0x0052 */
+ UINT8 UnusedUpdSpace1[88]; /* Offset 0x0053 */
+ UINT8 MemEccSupport; /* Offset 0x00AB */
+ UINT8 MemDdrMemoryType; /* Offset 0x00AC */
+ UINT8 MemRankMultiplication; /* Offset 0x00AD */
+ UINT8 MemRankMarginTool; /* Offset 0x00AE */
+ UINT8 MemScrambling; /* Offset 0x00AF */
+ UINT8 MemRefreshMode; /* Offset 0x00B0 */
+ UINT8 MemMcOdtOverride; /* Offset 0x00B1 */
+ UINT8 MemCAParity; /* Offset 0x00B2 */
+ UINT8 MemThermalThrottling; /* Offset 0x00B3 */
+ UINT8 MemPowerSavingsMode; /* Offset 0x00B4 */
+ UINT8 MemElectricalThrottling; /* Offset 0x00B5 */
+ UINT8 MemPagePolicy; /* Offset 0x00B6 */
+ UINT8 MemSocketInterleaveBelow4G; /* Offset 0x00B7 */
+ UINT8 MemChannelInterleave; /* Offset 0x00B8 */
+ UINT8 MemRankInterleave; /* Offset 0x00B9 */
+ UINT8 MemDownEnable; /* Offset 0x00BA */
+ UINT32 MemDownCh0Dimm0SpdPtr; /* Offset 0x00BB */
+ UINT32 MemDownCh0Dimm1SpdPtr; /* Offset 0x00BF */
+ UINT32 MemDownCh1Dimm0SpdPtr; /* Offset 0x00C3 */
+ UINT32 MemDownCh1Dimm1SpdPtr; /* Offset 0x00C7 */
+ UINT8 MemFastBoot; /* Offset 0x00CB */
+ UINT8 pam0_hienable; /* Offset 0x00CC */
+ UINT8 pam1_loenable; /* Offset 0x00CD */
+ UINT8 pam1_hienable; /* Offset 0x00CE */
+ UINT8 pam2_loenable; /* Offset 0x00CF */
+ UINT8 pam2_hienable; /* Offset 0x00D0 */
+ UINT8 pam3_loenable; /* Offset 0x00D1 */
+ UINT8 pam3_hienable; /* Offset 0x00D2 */
+ UINT8 pam4_loenable; /* Offset 0x00D3 */
+ UINT8 pam4_hienable; /* Offset 0x00D4 */
+ UINT8 pam5_loenable; /* Offset 0x00D5 */
+ UINT8 pam5_hienable; /* Offset 0x00D6 */
+ UINT8 pam6_loenable; /* Offset 0x00D7 */
+ UINT8 pam6_hienable; /* Offset 0x00D8 */
+ UINT8 MemAdr; /* Offset 0x00D9 */
+ UINT8 MemAdrResumePath; /* Offset 0x00DA */
+ UINT8 MemBlockScTrafficOnAdr; /* Offset 0x00DB */
+ UINT16 MemPlatformReleaseAdrClampsPort; /* Offset 0x00DC */
+ UINT32 MemPlatformReleaseAdrClampsAnd; /* Offset 0x00DE */
+ UINT32 MemPlatformReleaseAdrClampsOr; /* Offset 0x00E2 */
+ UINT8 UnusedUpdSpace2[24]; /* Offset 0x00E6 */
+ UINT16 PcdRegionTerminator; /* Offset 0x00FE */
+} UPD_DATA_REGION;
+
+#define FSP_IMAGE_ID 0x5F45442D5844425F /* '_BDX-DE_' */
+#define FSP_IMAGE_REV 0x00000301
+
+typedef struct _VPD_DATA_REGION {
+ UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
+ UINT32 PcdImageRevision; /* Offset 0x0008 */
+ UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
+ UINT8 UnusedVpdSpace0[16]; /* Offset 0x0010 */
+ UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
+} VPD_DATA_REGION;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/srx/fspsupport.c b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/srx/fspsupport.c
new file mode 100644
index 0000000..96fd984
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/broadwell_de/srx/fspsupport.c
@@ -0,0 +1,454 @@
+/**
+
+Copyright (C) 2013-2016 Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#include <types.h>
+#include <string.h>
+#include <fsp.h>
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @return The 64-bit value read from Buffer.
+
+**/
+STATIC
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ return *Buffer;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+STATIC
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ )
+{
+ UINT64 LowPartOfGuid1;
+ UINT64 LowPartOfGuid2;
+ UINT64 HighPartOfGuid1;
+ UINT64 HighPartOfGuid2;
+
+ LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
+ LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
+ HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
+ HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
+
+ return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
+}
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+
+ @param Type HOB type to search
+ @param HobStart A pointer to the HOB list
+ @retval a HOB object with matching type; Otherwise NULL.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ /*
+ * Parse the HOB list until end of list or matching type is found.
+ */
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return NULL;
+}
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+
+ @param Guid GUID to search
+ @param HobStart A pointer to the HOB list
+ @retval a HOB object with matching GUID; Otherwise NULL.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+
+ return GuidHob.Raw;
+}
+
+/**
+ This function retrieves the top of usable low memory.
+
+ @param HobListPtr A HOB list pointer.
+ @retval Usable low memory top.
+
+**/
+UINT32
+GetUsableLowMemTop (
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ UINT32 MemLen;
+ /*
+ * Get the HOB list for processing
+ */
+ Hob.Raw = (VOID *)HobStart;
+
+ /*
+ * Collect memory ranges
+ */
+ MemLen = 0x100000;
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
+ /*
+ * Need memory above 1MB to be collected here
+ */
+ if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000 &&
+ Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
+ MemLen += (UINT32) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return MemLen;
+}
+
+/**
+ This function retrieves the top of system low memory.
+
+ @param HobListPtr A HOB list pointer.
+ @retval Usable low memory top.
+
+**/
+UINT32
+GetPhysicalLowMemTop (
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ UINT32 MemBase;
+ UINT32 MemLen;
+
+ /*
+ * Get the HOB list for processing
+ */
+ Hob.Raw = (VOID *)HobStart;
+
+ /*
+ * Collect memory ranges
+ */
+ MemBase = 0x100000;
+ MemLen = 0;
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) ||
+ (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED)) {
+ /*
+ * Need memory above 1MB to be collected here
+ */
+ if (Hob.ResourceDescriptor->PhysicalStart >= MemBase &&
+ Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
+ MemBase = (UINT32) (Hob.ResourceDescriptor->PhysicalStart);
+ MemLen = (UINT32) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return MemBase + MemLen;
+}
+
+/**
+ This function retrieves the top of usable high memory.
+
+ @param HobListPtr A HOB list pointer.
+ @retval Usable high memory top.
+
+**/
+UINT64
+GetUsableHighMemTop (
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ UINT64 MemTop;
+ /*
+ * Get the HOB list for processing
+ */
+ Hob.Raw = (VOID *)HobStart;
+
+ /*
+ * Collect memory ranges
+ */
+ MemTop = 0x100000000;
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
+ /*
+ * Need memory above 1MB to be collected here
+ */
+ if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS) 0x100000000) {
+ MemTop += (UINT64) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return MemTop;
+}
+
+/**
+ This function retrieves a special reserved memory region.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the GUID HOB data buffer length. If the GUID HOB is
+ located, the length will be updated.
+ @param OwnerGuid A pointer to the owner guild.
+ @retval Reserved region start address. 0 if this region does not exist.
+
+**/
+UINT64
+GetFspReservedMemoryFromGuid (
+ CONST VOID *HobListPtr,
+ UINT64 *Length,
+ EFI_GUID *OwnerGuid
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ /*
+ * Get the HOB list for processing
+ */
+ Hob.Raw = (VOID *)HobListPtr;
+
+ /*
+ * Collect memory ranges
+ */
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) {
+ if (CompareGuid(&Hob.ResourceDescriptor->Owner, OwnerGuid)) {
+ if (Length) {
+ *Length = (UINT32) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ return (UINT64)(Hob.ResourceDescriptor->PhysicalStart);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return 0;
+}
+
+/**
+ This function retrieves the TSEG reserved normal memory.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the TSEG reserved memory length buffer. If the GUID HOB is
+ located, the length will be updated.
+ @param Guid A pointer to owner HOB GUID.
+ @retval NULL Failed to find the TSEG reserved memory.
+ @retval others TSEG reserved memory base.
+
+**/
+UINT32
+GetTsegReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ )
+{
+ const EFI_GUID TsegOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
+ UINT64 Length64;
+ UINT32 Base;
+
+ Base = (UINT32)GetFspReservedMemoryFromGuid (HobListPtr, &Length64, (EFI_GUID *)&TsegOwnerHobGuid);
+ if ((Length != 0) && (Base != 0)) {
+ *Length = (UINT32)Length64;
+ }
+
+ return Base;
+}
+
+/**
+ This function retrieves the FSP reserved normal memory.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the FSP reserved memory length buffer. If the GUID HOB is
+ located, the length will be updated.
+ @param Guid A pointer to owner HOB GUID.
+ @retval NULL Failed to find the FSP reserved memory.
+ @retval others FSP reserved memory base.
+
+**/
+UINT32
+GetFspReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ )
+{
+ const EFI_GUID FspOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
+ UINT64 Length64;
+ UINT32 Base;
+
+ Base = (UINT32)GetFspReservedMemoryFromGuid (HobListPtr, &Length64, (EFI_GUID *)&FspOwnerHobGuid);
+ if ((Length != 0) && (Base != 0)) {
+ *Length = (UINT32)Length64;
+ }
+
+ return Base;
+}
+
+/**
+ This function retrieves a GUIDed HOB data buffer and size.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the GUID HOB data buffer length. If the
+ GUID HOB is located, the length will be updated.
+ @param Guid A pointer to HOB GUID.
+ @retval NULL Failed to find the GUID HOB.
+ @retval others GUID HOB data buffer pointer.
+
+**/
+VOID *
+GetGuidHobDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length,
+ EFI_GUID *Guid
+ )
+{
+ UINT8 *GuidHob;
+
+ /* FSP NVS DATA HOB */
+ GuidHob = GetNextGuidHob(Guid, HobListPtr);
+ if (GuidHob == NULL) {
+ return NULL;
+ } else {
+ if (Length) {
+ *Length = GET_GUID_HOB_DATA_SIZE (GuidHob);
+ }
+ return GET_GUID_HOB_DATA (GuidHob);
+ }
+}
+
+/**
+ This function retrieves FSP Non-volatile Storage HOB buffer and size.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the NVS data buffer length. If the FSP NVS
+ HOB is located, the length will be updated.
+ @retval NULL Failed to find the NVS HOB.
+ @retval others FSP NVS data buffer pointer.
+
+**/
+VOID *
+GetFspNvsDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ )
+{
+ const EFI_GUID FspNvsHobGuid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+ return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspNvsHobGuid);
+}
+
+/**
+ This function retrieves Bootloader temporary stack buffer and size.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the Bootloader temporary stack length.
+ If the HOB is located, the length will be updated.
+ @retval NULL Failed to find the Bootloader temporary stack HOB.
+ @retval others Bootloader temporary stackbuffer pointer.
+
+**/
+VOID *
+GetBootloaderTempMemoryBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ )
+{
+ const EFI_GUID FspBootloaderTemporaryMemoryHobGuid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
+ return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspBootloaderTemporaryMemoryHobGuid);
+}
\ No newline at end of file
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspapi.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
new file mode 100644
index 0000000..9520736
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
@@ -0,0 +1,63 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_API_H_
+#define _FSP_API_H_
+
+#pragma pack(1)
+
+typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
+
+typedef struct {
+ VOID *NvsBufferPtr;
+ VOID *RtBufferPtr;
+ CONTINUATION_PROC ContinuationFunc;
+} FSP_INIT_PARAMS;
+
+typedef struct {
+ UINT32 *StackTop;
+ UINT32 BootMode;
+} FSP_INIT_RT_COMMON_BUFFER;
+
+typedef enum {
+ EnumInitPhaseAfterPciEnumeration = 0x20,
+ EnumInitPhaseReadyToBoot = 0x40
+} FSP_INIT_PHASE;
+
+typedef struct {
+ FSP_INIT_PHASE Phase;
+} NOTIFY_PHASE_PARAMS;
+
+#pragma pack()
+
+typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
+typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspffs.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
new file mode 100644
index 0000000..7a7c367
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
@@ -0,0 +1,506 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+
+#ifndef __PI_FIRMWARE_FILE_H__
+#define __PI_FIRMWARE_FILE_H__
+
+#pragma pack(1)
+///
+/// Used to verify the integrity of the file.
+///
+typedef union {
+ struct {
+ ///
+ /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
+ /// header. The State and IntegrityCheck.Checksum.File fields are assumed
+ /// to be zero and the checksum is calculated such that the entire header sums to zero.
+ ///
+ UINT8 Header;
+ ///
+ /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
+ /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
+ /// checksum of the file data.
+ /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
+ /// the IntegrityCheck.Checksum.File field must be initialized with a value of
+ /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
+ /// EFI_FILE_DATA_VALID bit is set in the State field.
+ ///
+ UINT8 File;
+ } Checksum;
+ ///
+ /// This is the full 16 bits of the IntegrityCheck field.
+ ///
+ UINT16 Checksum16;
+} EFI_FFS_INTEGRITY_CHECK;
+
+///
+/// FFS_FIXED_CHECKSUM is the checksum value used when the
+/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
+///
+#define FFS_FIXED_CHECKSUM 0xAA
+
+typedef UINT8 EFI_FV_FILETYPE;
+typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
+typedef UINT8 EFI_FFS_FILE_STATE;
+
+///
+/// File Types Definitions
+///
+#define EFI_FV_FILETYPE_ALL 0x00
+#define EFI_FV_FILETYPE_RAW 0x01
+#define EFI_FV_FILETYPE_FREEFORM 0x02
+#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
+#define EFI_FV_FILETYPE_PEI_CORE 0x04
+#define EFI_FV_FILETYPE_DXE_CORE 0x05
+#define EFI_FV_FILETYPE_PEIM 0x06
+#define EFI_FV_FILETYPE_DRIVER 0x07
+#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
+#define EFI_FV_FILETYPE_APPLICATION 0x09
+#define EFI_FV_FILETYPE_SMM 0x0A
+#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
+#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
+#define EFI_FV_FILETYPE_SMM_CORE 0x0D
+#define EFI_FV_FILETYPE_OEM_MIN 0xc0
+#define EFI_FV_FILETYPE_OEM_MAX 0xdf
+#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
+#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
+#define EFI_FV_FILETYPE_FFS_MIN 0xf0
+#define EFI_FV_FILETYPE_FFS_MAX 0xff
+#define EFI_FV_FILETYPE_FFS_PAD 0xf0
+///
+/// FFS File Attributes.
+///
+#define FFS_ATTRIB_LARGE_FILE 0x01
+#define FFS_ATTRIB_FIXED 0x04
+#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
+#define FFS_ATTRIB_CHECKSUM 0x40
+
+///
+/// FFS File State Bits.
+///
+#define EFI_FILE_HEADER_CONSTRUCTION 0x01
+#define EFI_FILE_HEADER_VALID 0x02
+#define EFI_FILE_DATA_VALID 0x04
+#define EFI_FILE_MARKED_FOR_UPDATE 0x08
+#define EFI_FILE_DELETED 0x10
+#define EFI_FILE_HEADER_INVALID 0x20
+
+
+///
+/// Each file begins with the header that describe the
+/// contents and state of the files.
+///
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file.
+ ///
+ EFI_GUID Name;
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ ///
+ UINT8 Size[3];
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+} EFI_FFS_FILE_HEADER;
+
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file. There may be only
+ /// one instance of a file with the file name GUID of Name in any given firmware
+ /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
+ /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
+ /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
+ /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
+ ///
+ UINT8 Size[3];
+
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+
+ ///
+ /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
+ /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
+ ///
+ UINT32 ExtendedSize;
+} EFI_FFS_FILE_HEADER2;
+
+#define IS_FFS_FILE2(FfsFileHeaderPtr) \
+ (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
+
+#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
+
+#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
+ (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
+
+typedef UINT8 EFI_SECTION_TYPE;
+
+///
+/// Pseudo type. It is used as a wild card when retrieving sections.
+/// The section type EFI_SECTION_ALL matches all section types.
+///
+#define EFI_SECTION_ALL 0x00
+
+///
+/// Encapsulation section Type values.
+///
+#define EFI_SECTION_COMPRESSION 0x01
+
+#define EFI_SECTION_GUID_DEFINED 0x02
+
+#define EFI_SECTION_DISPOSABLE 0x03
+
+///
+/// Leaf section Type values.
+///
+#define EFI_SECTION_PE32 0x10
+#define EFI_SECTION_PIC 0x11
+#define EFI_SECTION_TE 0x12
+#define EFI_SECTION_DXE_DEPEX 0x13
+#define EFI_SECTION_VERSION 0x14
+#define EFI_SECTION_USER_INTERFACE 0x15
+#define EFI_SECTION_COMPATIBILITY16 0x16
+#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
+#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
+#define EFI_SECTION_RAW 0x19
+#define EFI_SECTION_PEI_DEPEX 0x1B
+#define EFI_SECTION_SMM_DEPEX 0x1C
+
+///
+/// Common section header.
+///
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+ EFI_SECTION_TYPE Type;
+ ///
+ /// Declares the section type.
+ ///
+} EFI_COMMON_SECTION_HEADER;
+
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+
+ EFI_SECTION_TYPE Type;
+
+ ///
+ /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
+ /// Size is not equal to 0xFFFFFF, then this field does not exist.
+ ///
+ UINT32 ExtendedSize;
+} EFI_COMMON_SECTION_HEADER2;
+
+///
+/// Leaf section type that contains an
+/// IA-32 16-bit executable image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
+
+///
+/// CompressionType of EFI_COMPRESSION_SECTION.
+///
+#define EFI_NOT_COMPRESSED 0x00
+#define EFI_STANDARD_COMPRESSION 0x01
+///
+/// An encapsulation section type in which the
+/// section data is compressed.
+///
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION;
+
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION2;
+
+///
+/// An encapsulation section type in which the section data is disposable.
+/// A disposable section is an encapsulation section in which the section data may be disposed of during
+/// the process of creating or updating a firmware image without significant impact on the usefulness of
+/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
+/// allows optional or descriptive data to be included with the firmware file which can be removed in
+/// order to conserve space. The contents of this section are implementation specific, but might contain
+/// debug data or detailed integration instructions.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
+
+///
+/// The leaf section which could be used to determine the dispatch order of DXEs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a PI FV.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
+
+///
+/// The leaf section which contains a single GUID.
+///
+typedef struct {
+ ///
+ /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
+
+///
+/// Attributes of EFI_GUID_DEFINED_SECTION.
+///
+#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
+#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
+///
+/// The leaf section which is encapsulation defined by specific GUID.
+///
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION2;
+
+///
+/// The leaf section which contains PE32+ image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
+
+///
+/// The leaf section used to determine the dispatch order of PEIMs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
+
+///
+/// A leaf section type that contains a position-independent-code (PIC) image.
+/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
+/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
+/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
+/// relocation information has been stripped from the image and the image can be moved and will
+/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
+/// be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
+
+///
+/// The leaf section which constains the position-independent-code image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
+
+///
+/// The leaf section which contains an array of zero or more bytes.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
+
+///
+/// The SMM dependency expression section is a leaf section that contains a dependency expression that
+/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
+/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
+/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
+/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
+/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a unicode string that
+/// is human readable file name.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION2;
+
+///
+/// The leaf section which contains a numeric build number and
+/// an optional unicode string that represents the file revision.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT16 BuildNumber;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// A UINT16 that represents a particular build. Subsequent builds have monotonically
+ /// increasing build numbers relative to earlier builds.
+ ///
+ UINT16 BuildNumber;
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION2;
+
+#define IS_SECTION2(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
+
+#define SECTION_SIZE(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
+
+#define SECTION2_SIZE(SectionHeaderPtr) \
+ (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspfv.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
new file mode 100644
index 0000000..75d17fa
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
@@ -0,0 +1,247 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_FIRMWAREVOLUME_H__
+#define __PI_FIRMWAREVOLUME_H__
+
+///
+/// EFI_FV_FILE_ATTRIBUTES
+///
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+
+//
+// Value of EFI_FV_FILE_ATTRIBUTES.
+//
+#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
+#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
+#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
+
+///
+/// type of EFI FVB attribute
+///
+typedef UINT32 EFI_FVB_ATTRIBUTES_2;
+
+//
+// Attributes bit definitions
+//
+#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB2_READ_STATUS 0x00000004
+#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB2_WRITE_STATUS 0x00000020
+#define EFI_FVB2_LOCK_CAP 0x00000040
+#define EFI_FVB2_LOCK_STATUS 0x00000080
+#define EFI_FVB2_STICKY_WRITE 0x00000200
+#define EFI_FVB2_MEMORY_MAPPED 0x00000400
+#define EFI_FVB2_ERASE_POLARITY 0x00000800
+#define EFI_FVB2_READ_LOCK_CAP 0x00001000
+#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
+#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
+#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
+#define EFI_FVB2_ALIGNMENT 0x001F0000
+#define EFI_FVB2_ALIGNMENT_1 0x00000000
+#define EFI_FVB2_ALIGNMENT_2 0x00010000
+#define EFI_FVB2_ALIGNMENT_4 0x00020000
+#define EFI_FVB2_ALIGNMENT_8 0x00030000
+#define EFI_FVB2_ALIGNMENT_16 0x00040000
+#define EFI_FVB2_ALIGNMENT_32 0x00050000
+#define EFI_FVB2_ALIGNMENT_64 0x00060000
+#define EFI_FVB2_ALIGNMENT_128 0x00070000
+#define EFI_FVB2_ALIGNMENT_256 0x00080000
+#define EFI_FVB2_ALIGNMENT_512 0x00090000
+#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
+#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
+#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
+#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
+#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
+#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
+#define EFI_FVB2_ALIGNMENT_64K 0x00100000
+#define EFI_FVB2_ALIGNMENT_128K 0x00110000
+#define EFI_FVB2_ALIGNMENT_256K 0x00120000
+#define EFI_FVB2_ALIGNMENT_512K 0x00130000
+#define EFI_FVB2_ALIGNMENT_1M 0x00140000
+#define EFI_FVB2_ALIGNMENT_2M 0x00150000
+#define EFI_FVB2_ALIGNMENT_4M 0x00160000
+#define EFI_FVB2_ALIGNMENT_8M 0x00170000
+#define EFI_FVB2_ALIGNMENT_16M 0x00180000
+#define EFI_FVB2_ALIGNMENT_32M 0x00190000
+#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
+#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
+#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
+#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
+#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
+#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
+
+
+typedef struct {
+ ///
+ /// The number of sequential blocks which are of the same size.
+ ///
+ UINT32 NumBlocks;
+ ///
+ /// The size of the blocks.
+ ///
+ UINT32 Length;
+} EFI_FV_BLOCK_MAP_ENTRY;
+
+///
+/// Describes the features and layout of the firmware volume.
+///
+typedef struct {
+ ///
+ /// The first 16 bytes are reserved to allow for the reset vector of
+ /// processors whose reset vector is at address 0.
+ ///
+ UINT8 ZeroVector[16];
+ ///
+ /// Declares the file system with which the firmware volume is formatted.
+ ///
+ EFI_GUID FileSystemGuid;
+ ///
+ /// Length in bytes of the complete firmware volume, including the header.
+ ///
+ UINT64 FvLength;
+ ///
+ /// Set to EFI_FVH_SIGNATURE
+ ///
+ UINT32 Signature;
+ ///
+ /// Declares capabilities and power-on defaults for the firmware volume.
+ ///
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ ///
+ /// Length in bytes of the complete firmware volume header.
+ ///
+ UINT16 HeaderLength;
+ ///
+ /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
+ ///
+ UINT16 Checksum;
+ ///
+ /// Offset, relative to the start of the header, of the extended header
+ /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
+ ///
+ UINT16 ExtHeaderOffset;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT8 Reserved[1];
+ ///
+ /// Set to 2. Future versions of this specification may define new header fields and will
+ /// increment the Revision field accordingly.
+ ///
+ UINT8 Revision;
+ ///
+ /// An array of run-length encoded FvBlockMapEntry structures. The array is
+ /// terminated with an entry of {0,0}.
+ ///
+ EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
+} EFI_FIRMWARE_VOLUME_HEADER;
+
+#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
+
+///
+/// Firmware Volume Header Revision definition
+///
+#define EFI_FVH_REVISION 0x02
+
+///
+/// Extension header pointed by ExtHeaderOffset of volume header.
+///
+typedef struct {
+ ///
+ /// Firmware volume name.
+ ///
+ EFI_GUID FvName;
+ ///
+ /// Size of the rest of the extension header, including this structure.
+ ///
+ UINT32 ExtHeaderSize;
+} EFI_FIRMWARE_VOLUME_EXT_HEADER;
+
+///
+/// Entry struture for describing FV extension header
+///
+typedef struct {
+ ///
+ /// Size of this header extension.
+ ///
+ UINT16 ExtEntrySize;
+ ///
+ /// Type of the header.
+ ///
+ UINT16 ExtEntryType;
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
+
+#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
+///
+/// This extension header provides a mapping between a GUID and an OEM file type.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
+ /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
+ ///
+ UINT32 TypeMask;
+ ///
+ /// An array of GUIDs, each GUID representing an OEM file type.
+ ///
+ /// EFI_GUID Types[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
+
+#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
+
+///
+/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
+/// GUID FormatType type which includes a length and a successive series of data bytes.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// Vendor-specific GUID.
+ ///
+ EFI_GUID FormatType;
+ ///
+ /// An arry of bytes of length Length.
+ ///
+ /// UINT8 Data[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fsphob.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
new file mode 100644
index 0000000..5840907
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
@@ -0,0 +1,507 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_HOB_H__
+#define __PI_HOB_H__
+
+//
+// HobType of EFI_HOB_GENERIC_HEADER.
+//
+#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+#define EFI_HOB_TYPE_UNUSED 0xFFFE
+#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
+
+///
+/// Describes the format and size of the data inside the HOB.
+/// All HOBs must contain this generic HOB header.
+///
+typedef struct {
+ ///
+ /// Identifies the HOB data structure type.
+ ///
+ UINT16 HobType;
+ ///
+ /// The length in bytes of the HOB.
+ ///
+ UINT16 HobLength;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT32 Reserved;
+} EFI_HOB_GENERIC_HEADER;
+
+///
+/// Enumeration of memory types introduced in UEFI.
+///
+typedef enum {
+ ///
+ /// Not used.
+ ///
+ EfiReservedMemoryType,
+ ///
+ /// The code portions of a loaded application.
+ /// (Note that UEFI OS loaders are UEFI applications.)
+ ///
+ EfiLoaderCode,
+ ///
+ /// The data portions of a loaded application and the default data allocation
+ /// type used by an application to allocate pool memory.
+ ///
+ EfiLoaderData,
+ ///
+ /// The code portions of a loaded Boot Services Driver.
+ ///
+ EfiBootServicesCode,
+ ///
+ /// The data portions of a loaded Boot Serves Driver, and the default data
+ /// allocation type used by a Boot Services Driver to allocate pool memory.
+ ///
+ EfiBootServicesData,
+ ///
+ /// The code portions of a loaded Runtime Services Driver.
+ ///
+ EfiRuntimeServicesCode,
+ ///
+ /// The data portions of a loaded Runtime Services Driver and the default
+ /// data allocation type used by a Runtime Services Driver to allocate pool memory.
+ ///
+ EfiRuntimeServicesData,
+ ///
+ /// Free (unallocated) memory.
+ ///
+ EfiConventionalMemory,
+ ///
+ /// Memory in which errors have been detected.
+ ///
+ EfiUnusableMemory,
+ ///
+ /// Memory that holds the ACPI tables.
+ ///
+ EfiACPIReclaimMemory,
+ ///
+ /// Address space reserved for use by the firmware.
+ ///
+ EfiACPIMemoryNVS,
+ ///
+ /// Used by system firmware to request that a memory-mapped IO region
+ /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
+ ///
+ EfiMemoryMappedIO,
+ ///
+ /// System memory-mapped IO region that is used to translate memory
+ /// cycles to IO cycles by the processor.
+ ///
+ EfiMemoryMappedIOPortSpace,
+ ///
+ /// Address space reserved by the firmware for code that is part of the processor.
+ ///
+ EfiPalCode,
+ EfiMaxMemoryType
+} EFI_MEMORY_TYPE;
+
+///
+/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
+/// various attributes of the logical memory allocation. The type field will be used for
+/// subsequent inclusion in the UEFI memory map.
+///
+typedef struct {
+ ///
+ /// A GUID that defines the memory allocation region's type and purpose, as well as
+ /// other fields within the memory allocation HOB. This GUID is used to define the
+ /// additional data within the HOB that may be present for the memory allocation HOB.
+ /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// The base address of memory allocated by this HOB. Type
+ /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
+
+ ///
+ /// The length in bytes of memory allocated by this HOB.
+ ///
+ UINT64 MemoryLength;
+
+ ///
+ /// Defines the type of memory allocated by this HOB. The memory type definition
+ /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
+ /// in AllocatePages() in the UEFI 2.0 specification.
+ ///
+ EFI_MEMORY_TYPE MemoryType;
+
+ ///
+ /// Padding for Itanium processor family
+ ///
+ UINT8 Reserved[4];
+} EFI_HOB_MEMORY_ALLOCATION_HEADER;
+
+///
+/// Describes all memory ranges used during the HOB producer
+/// phase that exist outside the HOB list. This HOB type
+/// describes how memory is used, not the physical attributes of memory.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
+ /// various attributes of the logical memory allocation.
+ ///
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ //
+ // Additional data pertaining to the "Name" Guid memory
+ // may go here.
+ //
+} EFI_HOB_MEMORY_ALLOCATION;
+
+///
+/// The resource type.
+///
+typedef UINT32 EFI_RESOURCE_TYPE;
+
+//
+// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
+//
+#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
+#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
+#define EFI_RESOURCE_IO 0x00000002
+#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
+#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
+#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
+#define EFI_RESOURCE_IO_RESERVED 0x00000006
+#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
+
+///
+/// A type of recount attribute type.
+///
+typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
+
+//
+// These types can be ORed together as needed.
+//
+// The first three enumerations describe settings
+//
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
+//
+// The rest of the settings describe capabilities
+//
+#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
+#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
+#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
+#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
+#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
+
+///
+/// Describes the resource properties of all fixed,
+/// nonrelocatable resource ranges found on the processor
+/// host bus during the HOB producer phase.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID representing the owner of the resource. This GUID is used by HOB
+ /// consumer phase components to correlate device ownership of a resource.
+ ///
+ EFI_GUID Owner;
+ ///
+ /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
+ ///
+ EFI_RESOURCE_TYPE ResourceType;
+ ///
+ /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
+ ///
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ ///
+ /// The physical start address of the resource region.
+ ///
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
+ ///
+ /// The number of bytes of the resource region.
+ ///
+ UINT64 ResourceLength;
+} EFI_HOB_RESOURCE_DESCRIPTOR;
+
+///
+/// Allows writers of executable content in the HOB producer phase to
+/// maintain and manage HOBs with specific GUID.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID that defines the contents of this HOB.
+ ///
+ EFI_GUID Name;
+ //
+ // Guid specific data goes here
+ //
+} EFI_HOB_GUID_TYPE;
+
+///
+/// Union of all the possible HOB Types.
+///
+typedef union {
+ EFI_HOB_GENERIC_HEADER *Header;
+ EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
+ EFI_HOB_GUID_TYPE *Guid;
+ UINT8 *Raw;
+} EFI_PEI_HOB_POINTERS;
+
+
+/**
+ Returns the type of a HOB.
+
+ This macro returns the HobType field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobType.
+
+**/
+#define GET_HOB_TYPE(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
+
+/**
+ Returns the length, in bytes, of a HOB.
+
+ This macro returns the HobLength field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobLength.
+
+**/
+#define GET_HOB_LENGTH(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
+
+/**
+ Returns a pointer to the next HOB in the HOB list.
+
+ This macro returns a pointer to HOB that follows the
+ HOB specified by HobStart in the HOB List.
+
+ @param HobStart A pointer to a HOB.
+
+ @return A pointer to the next HOB in the HOB list.
+
+**/
+#define GET_NEXT_HOB(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
+
+/**
+ Determines if a HOB is the last HOB in the HOB list.
+
+ This macro determine if the HOB specified by HobStart is the
+ last HOB in the HOB list. If HobStart is last HOB in the HOB list,
+ then TRUE is returned. Otherwise, FALSE is returned.
+
+ @param HobStart A pointer to a HOB.
+
+ @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
+ @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
+
+**/
+#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+/**
+ Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns a pointer to the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return A pointer to the data buffer in a HOB.
+
+**/
+#define GET_GUID_HOB_DATA(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return The size of the data buffer.
+**/
+#define GET_GUID_HOB_DATA_SIZE(HobStart) \
+ (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the pointer to the HOB list.
+
+ This function returns the pointer to first HOB in the list.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ );
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If HobStart is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ );
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If Guid is NULL, then ASSERT().
+ If HobStart is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+ If Guid is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ );
+
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ );
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
new file mode 100644
index 0000000..0f7b3a9
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
@@ -0,0 +1,62 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_INFO_HEADER_H_
+#define _FSP_INFO_HEADER_H_
+
+#pragma pack(1)
+
+typedef struct {
+
+ UINT32 Signature; // Off 0x94
+ UINT32 HeaderLength;
+ UINT8 Reserved1[3];
+ UINT8 HeaderRevision;
+ UINT32 ImageRevision;
+
+ CHAR8 ImageId[8]; // Off 0xA4
+ UINT32 ImageSize;
+ UINT32 ImageBase;
+
+ UINT32 ImageAttribute; // Off 0xB4
+ UINT32 CfgRegionOffset;
+ UINT32 CfgRegionSize;
+ UINT32 ApiEntryNum;
+
+ UINT32 NemInitEntry; // Off 0xC4
+ UINT32 FspInitEntry;
+ UINT32 NotifyPhaseEntry;
+ UINT32 Reserved2;
+
+} FSP_INFO_HEADER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
new file mode 100644
index 0000000..06cf67e
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
@@ -0,0 +1,63 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_PLATFORM_H_
+#define _FSP_PLATFORM_H_
+
+#include "fsptypes.h"
+#include "fspapi.h"
+#include "mem_config.h"
+
+#pragma pack(1)
+
+typedef struct {
+ MEM_CONFIG *MemoryConfig;
+} FSP_INIT_RT_PLATFORM_BUFFER;
+
+typedef struct {
+ uint8_t HTEnable;
+ uint8_t TurboEnable;
+ uint8_t MemoryDownEnable;
+ uint8_t FastBootEnable;
+} PLATFORM_CONFIG;
+
+typedef struct {
+ const PLATFORM_CONFIG *PlatformConfig;
+} FSP_INIT_RT_CONFIG_BUFFER;
+
+typedef struct {
+ FSP_INIT_RT_COMMON_BUFFER Common;
+ FSP_INIT_RT_CONFIG_BUFFER PlatformConfiguration;
+ FSP_INIT_RT_PLATFORM_BUFFER Platform;
+} FSP_INIT_RT_BUFFER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
new file mode 100644
index 0000000..a3a54c0
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
@@ -0,0 +1,116 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/** \file fsptypes.h
+ *
+ *
+ */
+
+#ifndef __FSP_TYPES_H__
+#define __FSP_TYPES_H__
+
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned long long UINT64;
+///
+/// 8-byte signed value.
+///
+typedef long long INT64;
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned int UINT32;
+///
+/// 4-byte signed value.
+///
+typedef int INT32;
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value
+///
+typedef char INT8;
+
+typedef void VOID;
+
+typedef UINT64 EFI_PHYSICAL_ADDRESS;
+
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} EFI_GUID;
+
+#define CONST const
+#define STATIC static
+
+#define TRUE ((BOOLEAN)(1==1))
+#define FALSE ((BOOLEAN)(0==1))
+
+#define FSPAPI __attribute__((cdecl))
+#define EFIAPI __attribute__((cdecl))
+
+#define ASSERT(Expression) \
+ do { \
+ if (!(Expression)) { \
+ for (;;); \
+ } \
+ } while (FALSE)
+
+typedef UINT32 FSP_STATUS;
+typedef UINT32 EFI_STATUS;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/mem_config.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
new file mode 100644
index 0000000..26deb90
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
@@ -0,0 +1,131 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+//
+// mem_config.h
+//
+
+#ifndef _MEM_CONFIG_H_
+#define _MEM_CONFIG_H_
+
+typedef enum {
+ fi1067_IVB=0,
+ fi1333_IVB,
+ fi1400_IVB,
+ fi1600_IVB,
+ fi1800_IVB,
+ fi1867_IVB,
+ fi2000_IVB,
+ fi2133_IVB,
+ fi2200_IVB,
+ fi2400_IVB,
+ fi2600_IVB,
+ fi2667_IVB,
+ fi2800_IVB,
+ fiUnsupport_IVB,
+}TFrequencyIndex_IVB;
+
+#define NUM_IVB_MEM_CLK_FREQUENCIES 13
+
+// DDR3 memory SPD data
+//
+// NOTE: This only includes the SPD bytes that are relevant to the MRC
+typedef struct { // BYTE
+ uint8_t SPDGeneral; // 0 Number of Serial PD Bytes Written / SPD Device Size / CRC Coverage 1, 2
+ uint8_t SPDRevision; // 1 SPD Revision
+ uint8_t DRAMDeviceType; // 2 DRAM Device Type
+ uint8_t ModuleType; // 3 Module Type
+ uint8_t SDRAMDensityAndBanks; // 4 SDRAM Density and Banks
+ uint8_t SDRAMAddressing; // 5 SDRAM Addressing
+ uint8_t VDD; // 6 Module Nominal Voltage
+ uint8_t ModuleOrganization; // 7 Module Organization
+ uint8_t ModuleMemoryBusWidth; // 8 Module Memory Bus Width
+ uint8_t FineTimebase; // 9 Fine Timebase (FTB) Dividend / Divisor
+ uint8_t TimebaseDividend; // 10 Medium Timebase (MTB) Dividend
+ uint8_t TimebaseDivisor; // 11 Medium Timebase (MTB) Divisor
+ uint8_t SDRAMMinimumCycleTime; // 12 SDRAM Minimum Cycle Time (tCKmin)
+ uint8_t Reserved0; // 13 Reserved0
+ uint8_t CASLatenciesLSB; // 14 CAS Latencies Supported, Least Significant Byte
+ uint8_t CASLatenciesMSB; // 15 CAS Latencies Supported, Most Significant Byte
+ uint8_t MinimumCASLatencyTime; // 16 Minimum CAS Latency Time (tAAmin)
+ uint8_t MinimumWriteRecoveryTime; // 17 Minimum Write Recovery Time (tWRmin)
+ uint8_t MinimumRASToCASDelayTime; // 18 Minimum RAS# to CAS# Delay Time (tRCDmin)
+ uint8_t MinimumRowToRowDelayTime; // 19 Minimum Row Active to Row Active Delay Time (tRRDmin)
+ uint8_t MinimumRowPrechargeDelayTime; // 20 Minimum Row Precharge Delay Time (tRPmin)
+ uint8_t UpperNibblesFortRASAndtRC; // 21 Upper Nibbles for tRAS and tRC
+ uint8_t tRASmin; // 22 Minimum Active to Precharge Delay Time (tRASmin), Least Significant Byte
+ uint8_t tRCmin; // 23 Minimum Active to Active/Refresh Delay Time (tRCmin), Least Significant Byte
+ uint8_t tRFCminLeastSignificantByte; // 24 Minimum Refresh Recovery Delay Time (tRFCmin), Least Significant Byte
+ uint8_t tRFCminMostSignificantByte; // 25 Minimum Refresh Recovery Delay Time (tRFCmin), Most Significant Byte
+ uint8_t tWTRmin; // 26 Minimum Internal Write to Read Command Delay Time (tWTRmin)
+ uint8_t tRTPmin; // 27 Minimum Internal Read to Precharge Command Delay Time (tRTPmin)
+ uint8_t UpperNibbleFortFAW; // 28 Upper Nibble for tFAW
+ uint8_t tFAWmin; // 29 Minimum Four Activate Window Delay Time (tFAWmin)
+ uint8_t SDRAMOptionalFeatures; // 30 SDRAM Optional Features
+ uint8_t SDRAMThermalAndRefreshOptions; // 31 SDRAMThermalAndRefreshOptions
+ uint8_t ModuleThermalSensor; // 32 ModuleThermalSensor
+ uint8_t SDRAMDeviceType; // 33 SDRAM Device Type
+ int8_t tCKminFine; // 34 Fine Offset for SDRAM Minimum Cycle Time (tCKmin)
+ int8_t tAAminFine; // 35 Fine Offset for Minimum CAS Latency Time (tAAmin)
+ int8_t tRCDminFine; // 36 Fine Offset for Minimum RAS# to CAS# Delay Time (tRCDmin)
+ int8_t tRPminFine; // 37 Fine Offset for Minimum Row Precharge Delay Time (tRPmin)
+ int8_t tRCminFine; // 38 Fine Offset for Minimum Active to Active/Refresh Delay Time (tRCmin)
+ uint8_t ReferenceRawCardUsed; // 62 Reference Raw Card Used
+ uint8_t AddressMappingEdgeConnector; // 63 Address Mapping from Edge Connector to DRAM
+ uint8_t ThermalHeatSpreaderSolution; // 64 ThermalHeatSpreaderSolution
+ uint8_t ModuleManufacturerIdCodeLsb; // 117 Module Manufacturer ID Code, Least Significant Byte
+ uint8_t ModuleManufacturerIdCodeMsb; // 118 Module Manufacturer ID Code, Most Significant Byte
+ uint8_t ModuleManufacturingLocation; // 119 Module Manufacturing Location
+ uint8_t ModuleManufacturingDateYear; // 120 Module Manufacturing Date Year
+ uint8_t ModuleManufacturingDateWW; // 121 Module Manufacturing Date creation work week
+ uint8_t ModuleSerialNumberA; // 122 Module Serial Number A
+ uint8_t ModuleSerialNumberB; // 123 Module Serial Number B
+ uint8_t ModuleSerialNumberC; // 124 Module Serial Number C
+ uint8_t ModuleSerialNumberD; // 125 Module Serial Number D
+ uint8_t CRCA; // 126 CRC A
+ uint8_t CRCB; // 127 CRC B
+} DDR3_SPD;
+
+// Configuration for each memory channel/bank
+typedef struct {
+ uint32_t Exists;
+ DDR3_SPD SpdData;
+ uint8_t InitClkPiValue[NUM_IVB_MEM_CLK_FREQUENCIES];
+} MEM_BANK_CONFIG;
+
+// Memory configuration
+typedef struct {
+ MEM_BANK_CONFIG ChannelABank0;
+ MEM_BANK_CONFIG ChannelABank1;
+ MEM_BANK_CONFIG ChannelBBank0;
+ MEM_BANK_CONFIG ChannelBBank1;
+} MEM_CONFIG;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/peifsp.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
new file mode 100644
index 0000000..dc3e60f
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
@@ -0,0 +1,42 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/** \file peifsp.h
+ *
+ *
+ */
+#include <stdint.h>
+#include "fsptypes.h"
+#include "fspfv.h"
+#include "fspffs.h"
+#include "fsphob.h"
+#include "fspapi.h"
+#include "fspplatform.h"
+#include "fspinfoheader.h"
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
new file mode 100644
index 0000000..4214b3a
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
@@ -0,0 +1,207 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/***********************************************************************
+ *
+ * fsphob.c
+ *
+ * HOB infrastructure code.
+ *
+ **********************************************************************/
+#include <string.h>
+
+#include "fsptypes.h"
+#include "fsphob.h"
+
+//
+// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
+//
+extern volatile void *FspHobListPtr;
+
+//
+// Function prototype
+//
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ );
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return The 64-bit value read from Buffer.
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ )
+{
+ UINT64 LowPartOfGuid1;
+ UINT64 LowPartOfGuid2;
+ UINT64 HighPartOfGuid1;
+ UINT64 HighPartOfGuid2;
+
+ LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
+ LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
+ HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
+ HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
+
+ return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
+}
+
+/**
+ Returns the pointer to the HOB list.
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+ ASSERT (FspHobListPtr != NULL);
+ return ((VOID *)FspHobListPtr);
+}
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list until end of list or matching type is found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
new file mode 100644
index 0000000..fdee5f4
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
@@ -0,0 +1,60 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __VPDHEADER_H__
+#define __VPDHEADER_H__
+
+#pragma pack(1)
+
+typedef struct _UPD_DATA_REGION {
+ UINT64 Signature; /* Offset 0x0000 */
+ UINT64 Reserved; /* Offset 0x0008 */
+ UINT8 HTEnable; /* Offset 0x0010 */
+ UINT8 TurboEnable; /* Offset 0x0011 */
+ UINT8 MemoryDownEnable; /* Offset 0x0012 */
+ UINT8 FastBootEnable; /* Offset 0x0013 */
+ UINT16 PcdRegionTerminator; /* Offset 0x0310 */
+} UPD_DATA_REGION;
+
+
+#define VPD_IMAGE_SIGN 0x565053462d325453 /* 'ST2-FSPV' */
+#define VPD_IMAGE_REV 0x00000001
+
+typedef struct _VPD_DATA_REGION {
+ UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
+ UINT32 PcdImageRevision; /* Offset 0x0008 */
+ UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
+ UINT8 Padding0[16]; /* Offset 0x0010 */
+ UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
+} VPD_DATA_REGION;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspapi.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspapi.h
new file mode 100644
index 0000000..18a1582
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspapi.h
@@ -0,0 +1,49 @@
+/**
+
+Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+**/
+
+#ifndef _FSP_API_H_
+#define _FSP_API_H_
+
+#pragma pack(1)
+
+typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
+
+typedef struct {
+ VOID *NvsBufferPtr;
+ VOID *RtBufferPtr;
+ CONTINUATION_PROC ContinuationFunc;
+} FSP_INIT_PARAMS;
+
+typedef struct {
+ UINT32 *StackTop;
+ UINT32 BootMode; /* Refer to boot mode defined in MdePkg\Include\Pi\PiBootMode.h */
+ VOID *UpdDataRgnPtr;
+ UINT32 Reserved[7];
+} FSP_INIT_RT_COMMON_BUFFER;
+
+typedef enum {
+ EnumInitPhaseAfterPciEnumeration = 0x20,
+ EnumInitPhaseReadyToBoot = 0x40
+} FSP_INIT_PHASE;
+
+typedef struct {
+ FSP_INIT_PHASE Phase;
+} NOTIFY_PHASE_PARAMS;
+
+#pragma pack()
+
+
+typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
+typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspffs.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspffs.h
new file mode 100644
index 0000000..7a7c367
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspffs.h
@@ -0,0 +1,506 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+
+#ifndef __PI_FIRMWARE_FILE_H__
+#define __PI_FIRMWARE_FILE_H__
+
+#pragma pack(1)
+///
+/// Used to verify the integrity of the file.
+///
+typedef union {
+ struct {
+ ///
+ /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
+ /// header. The State and IntegrityCheck.Checksum.File fields are assumed
+ /// to be zero and the checksum is calculated such that the entire header sums to zero.
+ ///
+ UINT8 Header;
+ ///
+ /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
+ /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
+ /// checksum of the file data.
+ /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
+ /// the IntegrityCheck.Checksum.File field must be initialized with a value of
+ /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
+ /// EFI_FILE_DATA_VALID bit is set in the State field.
+ ///
+ UINT8 File;
+ } Checksum;
+ ///
+ /// This is the full 16 bits of the IntegrityCheck field.
+ ///
+ UINT16 Checksum16;
+} EFI_FFS_INTEGRITY_CHECK;
+
+///
+/// FFS_FIXED_CHECKSUM is the checksum value used when the
+/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
+///
+#define FFS_FIXED_CHECKSUM 0xAA
+
+typedef UINT8 EFI_FV_FILETYPE;
+typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
+typedef UINT8 EFI_FFS_FILE_STATE;
+
+///
+/// File Types Definitions
+///
+#define EFI_FV_FILETYPE_ALL 0x00
+#define EFI_FV_FILETYPE_RAW 0x01
+#define EFI_FV_FILETYPE_FREEFORM 0x02
+#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
+#define EFI_FV_FILETYPE_PEI_CORE 0x04
+#define EFI_FV_FILETYPE_DXE_CORE 0x05
+#define EFI_FV_FILETYPE_PEIM 0x06
+#define EFI_FV_FILETYPE_DRIVER 0x07
+#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
+#define EFI_FV_FILETYPE_APPLICATION 0x09
+#define EFI_FV_FILETYPE_SMM 0x0A
+#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
+#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
+#define EFI_FV_FILETYPE_SMM_CORE 0x0D
+#define EFI_FV_FILETYPE_OEM_MIN 0xc0
+#define EFI_FV_FILETYPE_OEM_MAX 0xdf
+#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
+#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
+#define EFI_FV_FILETYPE_FFS_MIN 0xf0
+#define EFI_FV_FILETYPE_FFS_MAX 0xff
+#define EFI_FV_FILETYPE_FFS_PAD 0xf0
+///
+/// FFS File Attributes.
+///
+#define FFS_ATTRIB_LARGE_FILE 0x01
+#define FFS_ATTRIB_FIXED 0x04
+#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
+#define FFS_ATTRIB_CHECKSUM 0x40
+
+///
+/// FFS File State Bits.
+///
+#define EFI_FILE_HEADER_CONSTRUCTION 0x01
+#define EFI_FILE_HEADER_VALID 0x02
+#define EFI_FILE_DATA_VALID 0x04
+#define EFI_FILE_MARKED_FOR_UPDATE 0x08
+#define EFI_FILE_DELETED 0x10
+#define EFI_FILE_HEADER_INVALID 0x20
+
+
+///
+/// Each file begins with the header that describe the
+/// contents and state of the files.
+///
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file.
+ ///
+ EFI_GUID Name;
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ ///
+ UINT8 Size[3];
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+} EFI_FFS_FILE_HEADER;
+
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file. There may be only
+ /// one instance of a file with the file name GUID of Name in any given firmware
+ /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
+ /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
+ /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
+ /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
+ ///
+ UINT8 Size[3];
+
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+
+ ///
+ /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
+ /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
+ ///
+ UINT32 ExtendedSize;
+} EFI_FFS_FILE_HEADER2;
+
+#define IS_FFS_FILE2(FfsFileHeaderPtr) \
+ (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
+
+#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
+
+#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
+ (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
+
+typedef UINT8 EFI_SECTION_TYPE;
+
+///
+/// Pseudo type. It is used as a wild card when retrieving sections.
+/// The section type EFI_SECTION_ALL matches all section types.
+///
+#define EFI_SECTION_ALL 0x00
+
+///
+/// Encapsulation section Type values.
+///
+#define EFI_SECTION_COMPRESSION 0x01
+
+#define EFI_SECTION_GUID_DEFINED 0x02
+
+#define EFI_SECTION_DISPOSABLE 0x03
+
+///
+/// Leaf section Type values.
+///
+#define EFI_SECTION_PE32 0x10
+#define EFI_SECTION_PIC 0x11
+#define EFI_SECTION_TE 0x12
+#define EFI_SECTION_DXE_DEPEX 0x13
+#define EFI_SECTION_VERSION 0x14
+#define EFI_SECTION_USER_INTERFACE 0x15
+#define EFI_SECTION_COMPATIBILITY16 0x16
+#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
+#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
+#define EFI_SECTION_RAW 0x19
+#define EFI_SECTION_PEI_DEPEX 0x1B
+#define EFI_SECTION_SMM_DEPEX 0x1C
+
+///
+/// Common section header.
+///
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+ EFI_SECTION_TYPE Type;
+ ///
+ /// Declares the section type.
+ ///
+} EFI_COMMON_SECTION_HEADER;
+
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+
+ EFI_SECTION_TYPE Type;
+
+ ///
+ /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
+ /// Size is not equal to 0xFFFFFF, then this field does not exist.
+ ///
+ UINT32 ExtendedSize;
+} EFI_COMMON_SECTION_HEADER2;
+
+///
+/// Leaf section type that contains an
+/// IA-32 16-bit executable image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
+
+///
+/// CompressionType of EFI_COMPRESSION_SECTION.
+///
+#define EFI_NOT_COMPRESSED 0x00
+#define EFI_STANDARD_COMPRESSION 0x01
+///
+/// An encapsulation section type in which the
+/// section data is compressed.
+///
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION;
+
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION2;
+
+///
+/// An encapsulation section type in which the section data is disposable.
+/// A disposable section is an encapsulation section in which the section data may be disposed of during
+/// the process of creating or updating a firmware image without significant impact on the usefulness of
+/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
+/// allows optional or descriptive data to be included with the firmware file which can be removed in
+/// order to conserve space. The contents of this section are implementation specific, but might contain
+/// debug data or detailed integration instructions.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
+
+///
+/// The leaf section which could be used to determine the dispatch order of DXEs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a PI FV.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
+
+///
+/// The leaf section which contains a single GUID.
+///
+typedef struct {
+ ///
+ /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
+
+///
+/// Attributes of EFI_GUID_DEFINED_SECTION.
+///
+#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
+#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
+///
+/// The leaf section which is encapsulation defined by specific GUID.
+///
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION2;
+
+///
+/// The leaf section which contains PE32+ image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
+
+///
+/// The leaf section used to determine the dispatch order of PEIMs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
+
+///
+/// A leaf section type that contains a position-independent-code (PIC) image.
+/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
+/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
+/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
+/// relocation information has been stripped from the image and the image can be moved and will
+/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
+/// be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
+
+///
+/// The leaf section which constains the position-independent-code image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
+
+///
+/// The leaf section which contains an array of zero or more bytes.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
+
+///
+/// The SMM dependency expression section is a leaf section that contains a dependency expression that
+/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
+/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
+/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
+/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
+/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a unicode string that
+/// is human readable file name.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION2;
+
+///
+/// The leaf section which contains a numeric build number and
+/// an optional unicode string that represents the file revision.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT16 BuildNumber;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// A UINT16 that represents a particular build. Subsequent builds have monotonically
+ /// increasing build numbers relative to earlier builds.
+ ///
+ UINT16 BuildNumber;
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION2;
+
+#define IS_SECTION2(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
+
+#define SECTION_SIZE(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
+
+#define SECTION2_SIZE(SectionHeaderPtr) \
+ (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspfv.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspfv.h
new file mode 100644
index 0000000..75d17fa
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspfv.h
@@ -0,0 +1,247 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_FIRMWAREVOLUME_H__
+#define __PI_FIRMWAREVOLUME_H__
+
+///
+/// EFI_FV_FILE_ATTRIBUTES
+///
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+
+//
+// Value of EFI_FV_FILE_ATTRIBUTES.
+//
+#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
+#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
+#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
+
+///
+/// type of EFI FVB attribute
+///
+typedef UINT32 EFI_FVB_ATTRIBUTES_2;
+
+//
+// Attributes bit definitions
+//
+#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB2_READ_STATUS 0x00000004
+#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB2_WRITE_STATUS 0x00000020
+#define EFI_FVB2_LOCK_CAP 0x00000040
+#define EFI_FVB2_LOCK_STATUS 0x00000080
+#define EFI_FVB2_STICKY_WRITE 0x00000200
+#define EFI_FVB2_MEMORY_MAPPED 0x00000400
+#define EFI_FVB2_ERASE_POLARITY 0x00000800
+#define EFI_FVB2_READ_LOCK_CAP 0x00001000
+#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
+#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
+#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
+#define EFI_FVB2_ALIGNMENT 0x001F0000
+#define EFI_FVB2_ALIGNMENT_1 0x00000000
+#define EFI_FVB2_ALIGNMENT_2 0x00010000
+#define EFI_FVB2_ALIGNMENT_4 0x00020000
+#define EFI_FVB2_ALIGNMENT_8 0x00030000
+#define EFI_FVB2_ALIGNMENT_16 0x00040000
+#define EFI_FVB2_ALIGNMENT_32 0x00050000
+#define EFI_FVB2_ALIGNMENT_64 0x00060000
+#define EFI_FVB2_ALIGNMENT_128 0x00070000
+#define EFI_FVB2_ALIGNMENT_256 0x00080000
+#define EFI_FVB2_ALIGNMENT_512 0x00090000
+#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
+#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
+#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
+#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
+#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
+#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
+#define EFI_FVB2_ALIGNMENT_64K 0x00100000
+#define EFI_FVB2_ALIGNMENT_128K 0x00110000
+#define EFI_FVB2_ALIGNMENT_256K 0x00120000
+#define EFI_FVB2_ALIGNMENT_512K 0x00130000
+#define EFI_FVB2_ALIGNMENT_1M 0x00140000
+#define EFI_FVB2_ALIGNMENT_2M 0x00150000
+#define EFI_FVB2_ALIGNMENT_4M 0x00160000
+#define EFI_FVB2_ALIGNMENT_8M 0x00170000
+#define EFI_FVB2_ALIGNMENT_16M 0x00180000
+#define EFI_FVB2_ALIGNMENT_32M 0x00190000
+#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
+#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
+#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
+#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
+#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
+#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
+
+
+typedef struct {
+ ///
+ /// The number of sequential blocks which are of the same size.
+ ///
+ UINT32 NumBlocks;
+ ///
+ /// The size of the blocks.
+ ///
+ UINT32 Length;
+} EFI_FV_BLOCK_MAP_ENTRY;
+
+///
+/// Describes the features and layout of the firmware volume.
+///
+typedef struct {
+ ///
+ /// The first 16 bytes are reserved to allow for the reset vector of
+ /// processors whose reset vector is at address 0.
+ ///
+ UINT8 ZeroVector[16];
+ ///
+ /// Declares the file system with which the firmware volume is formatted.
+ ///
+ EFI_GUID FileSystemGuid;
+ ///
+ /// Length in bytes of the complete firmware volume, including the header.
+ ///
+ UINT64 FvLength;
+ ///
+ /// Set to EFI_FVH_SIGNATURE
+ ///
+ UINT32 Signature;
+ ///
+ /// Declares capabilities and power-on defaults for the firmware volume.
+ ///
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ ///
+ /// Length in bytes of the complete firmware volume header.
+ ///
+ UINT16 HeaderLength;
+ ///
+ /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
+ ///
+ UINT16 Checksum;
+ ///
+ /// Offset, relative to the start of the header, of the extended header
+ /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
+ ///
+ UINT16 ExtHeaderOffset;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT8 Reserved[1];
+ ///
+ /// Set to 2. Future versions of this specification may define new header fields and will
+ /// increment the Revision field accordingly.
+ ///
+ UINT8 Revision;
+ ///
+ /// An array of run-length encoded FvBlockMapEntry structures. The array is
+ /// terminated with an entry of {0,0}.
+ ///
+ EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
+} EFI_FIRMWARE_VOLUME_HEADER;
+
+#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
+
+///
+/// Firmware Volume Header Revision definition
+///
+#define EFI_FVH_REVISION 0x02
+
+///
+/// Extension header pointed by ExtHeaderOffset of volume header.
+///
+typedef struct {
+ ///
+ /// Firmware volume name.
+ ///
+ EFI_GUID FvName;
+ ///
+ /// Size of the rest of the extension header, including this structure.
+ ///
+ UINT32 ExtHeaderSize;
+} EFI_FIRMWARE_VOLUME_EXT_HEADER;
+
+///
+/// Entry struture for describing FV extension header
+///
+typedef struct {
+ ///
+ /// Size of this header extension.
+ ///
+ UINT16 ExtEntrySize;
+ ///
+ /// Type of the header.
+ ///
+ UINT16 ExtEntryType;
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
+
+#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
+///
+/// This extension header provides a mapping between a GUID and an OEM file type.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
+ /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
+ ///
+ UINT32 TypeMask;
+ ///
+ /// An array of GUIDs, each GUID representing an OEM file type.
+ ///
+ /// EFI_GUID Types[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
+
+#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
+
+///
+/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
+/// GUID FormatType type which includes a length and a successive series of data bytes.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// Vendor-specific GUID.
+ ///
+ EFI_GUID FormatType;
+ ///
+ /// An arry of bytes of length Length.
+ ///
+ /// UINT8 Data[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsphob.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsphob.h
new file mode 100644
index 0000000..5840907
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsphob.h
@@ -0,0 +1,507 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_HOB_H__
+#define __PI_HOB_H__
+
+//
+// HobType of EFI_HOB_GENERIC_HEADER.
+//
+#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+#define EFI_HOB_TYPE_UNUSED 0xFFFE
+#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
+
+///
+/// Describes the format and size of the data inside the HOB.
+/// All HOBs must contain this generic HOB header.
+///
+typedef struct {
+ ///
+ /// Identifies the HOB data structure type.
+ ///
+ UINT16 HobType;
+ ///
+ /// The length in bytes of the HOB.
+ ///
+ UINT16 HobLength;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT32 Reserved;
+} EFI_HOB_GENERIC_HEADER;
+
+///
+/// Enumeration of memory types introduced in UEFI.
+///
+typedef enum {
+ ///
+ /// Not used.
+ ///
+ EfiReservedMemoryType,
+ ///
+ /// The code portions of a loaded application.
+ /// (Note that UEFI OS loaders are UEFI applications.)
+ ///
+ EfiLoaderCode,
+ ///
+ /// The data portions of a loaded application and the default data allocation
+ /// type used by an application to allocate pool memory.
+ ///
+ EfiLoaderData,
+ ///
+ /// The code portions of a loaded Boot Services Driver.
+ ///
+ EfiBootServicesCode,
+ ///
+ /// The data portions of a loaded Boot Serves Driver, and the default data
+ /// allocation type used by a Boot Services Driver to allocate pool memory.
+ ///
+ EfiBootServicesData,
+ ///
+ /// The code portions of a loaded Runtime Services Driver.
+ ///
+ EfiRuntimeServicesCode,
+ ///
+ /// The data portions of a loaded Runtime Services Driver and the default
+ /// data allocation type used by a Runtime Services Driver to allocate pool memory.
+ ///
+ EfiRuntimeServicesData,
+ ///
+ /// Free (unallocated) memory.
+ ///
+ EfiConventionalMemory,
+ ///
+ /// Memory in which errors have been detected.
+ ///
+ EfiUnusableMemory,
+ ///
+ /// Memory that holds the ACPI tables.
+ ///
+ EfiACPIReclaimMemory,
+ ///
+ /// Address space reserved for use by the firmware.
+ ///
+ EfiACPIMemoryNVS,
+ ///
+ /// Used by system firmware to request that a memory-mapped IO region
+ /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
+ ///
+ EfiMemoryMappedIO,
+ ///
+ /// System memory-mapped IO region that is used to translate memory
+ /// cycles to IO cycles by the processor.
+ ///
+ EfiMemoryMappedIOPortSpace,
+ ///
+ /// Address space reserved by the firmware for code that is part of the processor.
+ ///
+ EfiPalCode,
+ EfiMaxMemoryType
+} EFI_MEMORY_TYPE;
+
+///
+/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
+/// various attributes of the logical memory allocation. The type field will be used for
+/// subsequent inclusion in the UEFI memory map.
+///
+typedef struct {
+ ///
+ /// A GUID that defines the memory allocation region's type and purpose, as well as
+ /// other fields within the memory allocation HOB. This GUID is used to define the
+ /// additional data within the HOB that may be present for the memory allocation HOB.
+ /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// The base address of memory allocated by this HOB. Type
+ /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
+
+ ///
+ /// The length in bytes of memory allocated by this HOB.
+ ///
+ UINT64 MemoryLength;
+
+ ///
+ /// Defines the type of memory allocated by this HOB. The memory type definition
+ /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
+ /// in AllocatePages() in the UEFI 2.0 specification.
+ ///
+ EFI_MEMORY_TYPE MemoryType;
+
+ ///
+ /// Padding for Itanium processor family
+ ///
+ UINT8 Reserved[4];
+} EFI_HOB_MEMORY_ALLOCATION_HEADER;
+
+///
+/// Describes all memory ranges used during the HOB producer
+/// phase that exist outside the HOB list. This HOB type
+/// describes how memory is used, not the physical attributes of memory.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
+ /// various attributes of the logical memory allocation.
+ ///
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ //
+ // Additional data pertaining to the "Name" Guid memory
+ // may go here.
+ //
+} EFI_HOB_MEMORY_ALLOCATION;
+
+///
+/// The resource type.
+///
+typedef UINT32 EFI_RESOURCE_TYPE;
+
+//
+// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
+//
+#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
+#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
+#define EFI_RESOURCE_IO 0x00000002
+#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
+#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
+#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
+#define EFI_RESOURCE_IO_RESERVED 0x00000006
+#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
+
+///
+/// A type of recount attribute type.
+///
+typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
+
+//
+// These types can be ORed together as needed.
+//
+// The first three enumerations describe settings
+//
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
+//
+// The rest of the settings describe capabilities
+//
+#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
+#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
+#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
+#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
+#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
+
+///
+/// Describes the resource properties of all fixed,
+/// nonrelocatable resource ranges found on the processor
+/// host bus during the HOB producer phase.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID representing the owner of the resource. This GUID is used by HOB
+ /// consumer phase components to correlate device ownership of a resource.
+ ///
+ EFI_GUID Owner;
+ ///
+ /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
+ ///
+ EFI_RESOURCE_TYPE ResourceType;
+ ///
+ /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
+ ///
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ ///
+ /// The physical start address of the resource region.
+ ///
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
+ ///
+ /// The number of bytes of the resource region.
+ ///
+ UINT64 ResourceLength;
+} EFI_HOB_RESOURCE_DESCRIPTOR;
+
+///
+/// Allows writers of executable content in the HOB producer phase to
+/// maintain and manage HOBs with specific GUID.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID that defines the contents of this HOB.
+ ///
+ EFI_GUID Name;
+ //
+ // Guid specific data goes here
+ //
+} EFI_HOB_GUID_TYPE;
+
+///
+/// Union of all the possible HOB Types.
+///
+typedef union {
+ EFI_HOB_GENERIC_HEADER *Header;
+ EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
+ EFI_HOB_GUID_TYPE *Guid;
+ UINT8 *Raw;
+} EFI_PEI_HOB_POINTERS;
+
+
+/**
+ Returns the type of a HOB.
+
+ This macro returns the HobType field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobType.
+
+**/
+#define GET_HOB_TYPE(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
+
+/**
+ Returns the length, in bytes, of a HOB.
+
+ This macro returns the HobLength field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobLength.
+
+**/
+#define GET_HOB_LENGTH(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
+
+/**
+ Returns a pointer to the next HOB in the HOB list.
+
+ This macro returns a pointer to HOB that follows the
+ HOB specified by HobStart in the HOB List.
+
+ @param HobStart A pointer to a HOB.
+
+ @return A pointer to the next HOB in the HOB list.
+
+**/
+#define GET_NEXT_HOB(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
+
+/**
+ Determines if a HOB is the last HOB in the HOB list.
+
+ This macro determine if the HOB specified by HobStart is the
+ last HOB in the HOB list. If HobStart is last HOB in the HOB list,
+ then TRUE is returned. Otherwise, FALSE is returned.
+
+ @param HobStart A pointer to a HOB.
+
+ @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
+ @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
+
+**/
+#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+/**
+ Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns a pointer to the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return A pointer to the data buffer in a HOB.
+
+**/
+#define GET_GUID_HOB_DATA(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return The size of the data buffer.
+**/
+#define GET_GUID_HOB_DATA_SIZE(HobStart) \
+ (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the pointer to the HOB list.
+
+ This function returns the pointer to first HOB in the list.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ );
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If HobStart is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ );
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If Guid is NULL, then ASSERT().
+ If HobStart is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+ If Guid is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ );
+
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ );
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
new file mode 100644
index 0000000..0f7b3a9
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
@@ -0,0 +1,62 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_INFO_HEADER_H_
+#define _FSP_INFO_HEADER_H_
+
+#pragma pack(1)
+
+typedef struct {
+
+ UINT32 Signature; // Off 0x94
+ UINT32 HeaderLength;
+ UINT8 Reserved1[3];
+ UINT8 HeaderRevision;
+ UINT32 ImageRevision;
+
+ CHAR8 ImageId[8]; // Off 0xA4
+ UINT32 ImageSize;
+ UINT32 ImageBase;
+
+ UINT32 ImageAttribute; // Off 0xB4
+ UINT32 CfgRegionOffset;
+ UINT32 CfgRegionSize;
+ UINT32 ApiEntryNum;
+
+ UINT32 NemInitEntry; // Off 0xC4
+ UINT32 FspInitEntry;
+ UINT32 NotifyPhaseEntry;
+ UINT32 Reserved2;
+
+} FSP_INFO_HEADER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspplatform.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspplatform.h
new file mode 100644
index 0000000..e78ac47
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fspplatform.h
@@ -0,0 +1,52 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_PLATFORM_H_
+#define _FSP_PLATFORM_H_
+
+#include "fsptypes.h"
+#include "fspapi.h"
+#include "mem_config.h"
+
+#pragma pack(1)
+
+typedef struct {
+ MEM_CONFIG *MemoryConfig;
+} FSP_INIT_RT_PLATFORM_BUFFER;
+
+
+typedef struct {
+ FSP_INIT_RT_COMMON_BUFFER Common;
+ FSP_INIT_RT_PLATFORM_BUFFER Platform;
+} FSP_INIT_RT_BUFFER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsptypes.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsptypes.h
new file mode 100644
index 0000000..a3a54c0
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/fsptypes.h
@@ -0,0 +1,116 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/** \file fsptypes.h
+ *
+ *
+ */
+
+#ifndef __FSP_TYPES_H__
+#define __FSP_TYPES_H__
+
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned long long UINT64;
+///
+/// 8-byte signed value.
+///
+typedef long long INT64;
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned int UINT32;
+///
+/// 4-byte signed value.
+///
+typedef int INT32;
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value
+///
+typedef char INT8;
+
+typedef void VOID;
+
+typedef UINT64 EFI_PHYSICAL_ADDRESS;
+
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} EFI_GUID;
+
+#define CONST const
+#define STATIC static
+
+#define TRUE ((BOOLEAN)(1==1))
+#define FALSE ((BOOLEAN)(0==1))
+
+#define FSPAPI __attribute__((cdecl))
+#define EFIAPI __attribute__((cdecl))
+
+#define ASSERT(Expression) \
+ do { \
+ if (!(Expression)) { \
+ for (;;); \
+ } \
+ } while (FALSE)
+
+typedef UINT32 FSP_STATUS;
+typedef UINT32 EFI_STATUS;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/mem_config.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/mem_config.h
new file mode 100644
index 0000000..26deb90
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/mem_config.h
@@ -0,0 +1,131 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+//
+// mem_config.h
+//
+
+#ifndef _MEM_CONFIG_H_
+#define _MEM_CONFIG_H_
+
+typedef enum {
+ fi1067_IVB=0,
+ fi1333_IVB,
+ fi1400_IVB,
+ fi1600_IVB,
+ fi1800_IVB,
+ fi1867_IVB,
+ fi2000_IVB,
+ fi2133_IVB,
+ fi2200_IVB,
+ fi2400_IVB,
+ fi2600_IVB,
+ fi2667_IVB,
+ fi2800_IVB,
+ fiUnsupport_IVB,
+}TFrequencyIndex_IVB;
+
+#define NUM_IVB_MEM_CLK_FREQUENCIES 13
+
+// DDR3 memory SPD data
+//
+// NOTE: This only includes the SPD bytes that are relevant to the MRC
+typedef struct { // BYTE
+ uint8_t SPDGeneral; // 0 Number of Serial PD Bytes Written / SPD Device Size / CRC Coverage 1, 2
+ uint8_t SPDRevision; // 1 SPD Revision
+ uint8_t DRAMDeviceType; // 2 DRAM Device Type
+ uint8_t ModuleType; // 3 Module Type
+ uint8_t SDRAMDensityAndBanks; // 4 SDRAM Density and Banks
+ uint8_t SDRAMAddressing; // 5 SDRAM Addressing
+ uint8_t VDD; // 6 Module Nominal Voltage
+ uint8_t ModuleOrganization; // 7 Module Organization
+ uint8_t ModuleMemoryBusWidth; // 8 Module Memory Bus Width
+ uint8_t FineTimebase; // 9 Fine Timebase (FTB) Dividend / Divisor
+ uint8_t TimebaseDividend; // 10 Medium Timebase (MTB) Dividend
+ uint8_t TimebaseDivisor; // 11 Medium Timebase (MTB) Divisor
+ uint8_t SDRAMMinimumCycleTime; // 12 SDRAM Minimum Cycle Time (tCKmin)
+ uint8_t Reserved0; // 13 Reserved0
+ uint8_t CASLatenciesLSB; // 14 CAS Latencies Supported, Least Significant Byte
+ uint8_t CASLatenciesMSB; // 15 CAS Latencies Supported, Most Significant Byte
+ uint8_t MinimumCASLatencyTime; // 16 Minimum CAS Latency Time (tAAmin)
+ uint8_t MinimumWriteRecoveryTime; // 17 Minimum Write Recovery Time (tWRmin)
+ uint8_t MinimumRASToCASDelayTime; // 18 Minimum RAS# to CAS# Delay Time (tRCDmin)
+ uint8_t MinimumRowToRowDelayTime; // 19 Minimum Row Active to Row Active Delay Time (tRRDmin)
+ uint8_t MinimumRowPrechargeDelayTime; // 20 Minimum Row Precharge Delay Time (tRPmin)
+ uint8_t UpperNibblesFortRASAndtRC; // 21 Upper Nibbles for tRAS and tRC
+ uint8_t tRASmin; // 22 Minimum Active to Precharge Delay Time (tRASmin), Least Significant Byte
+ uint8_t tRCmin; // 23 Minimum Active to Active/Refresh Delay Time (tRCmin), Least Significant Byte
+ uint8_t tRFCminLeastSignificantByte; // 24 Minimum Refresh Recovery Delay Time (tRFCmin), Least Significant Byte
+ uint8_t tRFCminMostSignificantByte; // 25 Minimum Refresh Recovery Delay Time (tRFCmin), Most Significant Byte
+ uint8_t tWTRmin; // 26 Minimum Internal Write to Read Command Delay Time (tWTRmin)
+ uint8_t tRTPmin; // 27 Minimum Internal Read to Precharge Command Delay Time (tRTPmin)
+ uint8_t UpperNibbleFortFAW; // 28 Upper Nibble for tFAW
+ uint8_t tFAWmin; // 29 Minimum Four Activate Window Delay Time (tFAWmin)
+ uint8_t SDRAMOptionalFeatures; // 30 SDRAM Optional Features
+ uint8_t SDRAMThermalAndRefreshOptions; // 31 SDRAMThermalAndRefreshOptions
+ uint8_t ModuleThermalSensor; // 32 ModuleThermalSensor
+ uint8_t SDRAMDeviceType; // 33 SDRAM Device Type
+ int8_t tCKminFine; // 34 Fine Offset for SDRAM Minimum Cycle Time (tCKmin)
+ int8_t tAAminFine; // 35 Fine Offset for Minimum CAS Latency Time (tAAmin)
+ int8_t tRCDminFine; // 36 Fine Offset for Minimum RAS# to CAS# Delay Time (tRCDmin)
+ int8_t tRPminFine; // 37 Fine Offset for Minimum Row Precharge Delay Time (tRPmin)
+ int8_t tRCminFine; // 38 Fine Offset for Minimum Active to Active/Refresh Delay Time (tRCmin)
+ uint8_t ReferenceRawCardUsed; // 62 Reference Raw Card Used
+ uint8_t AddressMappingEdgeConnector; // 63 Address Mapping from Edge Connector to DRAM
+ uint8_t ThermalHeatSpreaderSolution; // 64 ThermalHeatSpreaderSolution
+ uint8_t ModuleManufacturerIdCodeLsb; // 117 Module Manufacturer ID Code, Least Significant Byte
+ uint8_t ModuleManufacturerIdCodeMsb; // 118 Module Manufacturer ID Code, Most Significant Byte
+ uint8_t ModuleManufacturingLocation; // 119 Module Manufacturing Location
+ uint8_t ModuleManufacturingDateYear; // 120 Module Manufacturing Date Year
+ uint8_t ModuleManufacturingDateWW; // 121 Module Manufacturing Date creation work week
+ uint8_t ModuleSerialNumberA; // 122 Module Serial Number A
+ uint8_t ModuleSerialNumberB; // 123 Module Serial Number B
+ uint8_t ModuleSerialNumberC; // 124 Module Serial Number C
+ uint8_t ModuleSerialNumberD; // 125 Module Serial Number D
+ uint8_t CRCA; // 126 CRC A
+ uint8_t CRCB; // 127 CRC B
+} DDR3_SPD;
+
+// Configuration for each memory channel/bank
+typedef struct {
+ uint32_t Exists;
+ DDR3_SPD SpdData;
+ uint8_t InitClkPiValue[NUM_IVB_MEM_CLK_FREQUENCIES];
+} MEM_BANK_CONFIG;
+
+// Memory configuration
+typedef struct {
+ MEM_BANK_CONFIG ChannelABank0;
+ MEM_BANK_CONFIG ChannelABank1;
+ MEM_BANK_CONFIG ChannelBBank0;
+ MEM_BANK_CONFIG ChannelBBank1;
+} MEM_CONFIG;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/peifsp.h b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/peifsp.h
new file mode 100644
index 0000000..dc3e60f
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/include/peifsp.h
@@ -0,0 +1,42 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/** \file peifsp.h
+ *
+ *
+ */
+#include <stdint.h>
+#include "fsptypes.h"
+#include "fspfv.h"
+#include "fspffs.h"
+#include "fsphob.h"
+#include "fspapi.h"
+#include "fspplatform.h"
+#include "fspinfoheader.h"
diff --git a/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/srx/fsphob.c b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/srx/fsphob.c
new file mode 100644
index 0000000..4214b3a
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/ivybridge_i89xx/srx/fsphob.c
@@ -0,0 +1,207 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+/***********************************************************************
+ *
+ * fsphob.c
+ *
+ * HOB infrastructure code.
+ *
+ **********************************************************************/
+#include <string.h>
+
+#include "fsptypes.h"
+#include "fsphob.h"
+
+//
+// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
+//
+extern volatile void *FspHobListPtr;
+
+//
+// Function prototype
+//
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ );
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return The 64-bit value read from Buffer.
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ )
+{
+ UINT64 LowPartOfGuid1;
+ UINT64 LowPartOfGuid2;
+ UINT64 HighPartOfGuid1;
+ UINT64 HighPartOfGuid2;
+
+ LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
+ LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
+ HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
+ HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
+
+ return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
+}
+
+/**
+ Returns the pointer to the HOB list.
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+ ASSERT (FspHobListPtr != NULL);
+ return ((VOID *)FspHobListPtr);
+}
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list until end of list or matching type is found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspapi.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspapi.h
new file mode 100644
index 0000000..5009246
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspapi.h
@@ -0,0 +1,67 @@
+/**
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_API_H_
+#define _FSP_API_H_
+
+#include <fsptypes.h>
+
+#pragma pack(1)
+
+typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
+
+typedef struct {
+ VOID *NvsBufferPtr;
+ VOID *RtBufferPtr;
+ CONTINUATION_PROC ContinuationFunc;
+} FSP_INIT_PARAMS;
+
+typedef struct {
+ UINT32 *StackTop;
+ UINT32 BootMode; /* Refer to boot mode defined in MdePkg\Include\Pi\PiBootMode.h */
+ VOID *UpdDataRgnPtr;
+ UINT32 Reserved[7];
+} FSP_INIT_RT_COMMON_BUFFER;
+
+typedef enum {
+ EnumInitPhaseAfterPciEnumeration = 0x20,
+ EnumInitPhaseReadyToBoot = 0x40
+} FSP_INIT_PHASE;
+
+typedef struct {
+ FSP_INIT_PHASE Phase;
+} NOTIFY_PHASE_PARAMS;
+
+#pragma pack()
+
+typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
+typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
+
+#endif /* _FSP_API_H_ */
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspbootmode.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspbootmode.h
new file mode 100644
index 0000000..16cddf0
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspbootmode.h
@@ -0,0 +1,54 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_BOOT_MODE_H__
+#define __PI_BOOT_MODE_H__
+
+///
+/// EFI boot mode
+///
+typedef UINT32 EFI_BOOT_MODE;
+
+//
+// 0x21 - 0xf..f are reserved.
+//
+#define BOOT_WITH_FULL_CONFIGURATION 0x00
+#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01
+#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02
+#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03
+#define BOOT_WITH_DEFAULT_SETTINGS 0x04
+#define BOOT_ON_S4_RESUME 0x05
+#define BOOT_ON_S5_RESUME 0x06
+#define BOOT_ON_S2_RESUME 0x10
+#define BOOT_ON_S3_RESUME 0x11
+#define BOOT_ON_FLASH_UPDATE 0x12
+#define BOOT_IN_RECOVERY_MODE 0x20
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspffs.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspffs.h
new file mode 100644
index 0000000..9e8244d
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspffs.h
@@ -0,0 +1,507 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_FIRMWARE_FILE_H__
+#define __PI_FIRMWARE_FILE_H__
+
+#include <fsptypes.h>
+
+#pragma pack(1)
+///
+/// Used to verify the integrity of the file.
+///
+typedef union {
+ struct {
+ ///
+ /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
+ /// header. The State and IntegrityCheck.Checksum.File fields are assumed
+ /// to be zero and the checksum is calculated such that the entire header sums to zero.
+ ///
+ UINT8 Header;
+ ///
+ /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
+ /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
+ /// checksum of the file data.
+ /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
+ /// the IntegrityCheck.Checksum.File field must be initialized with a value of
+ /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
+ /// EFI_FILE_DATA_VALID bit is set in the State field.
+ ///
+ UINT8 File;
+ } Checksum;
+ ///
+ /// This is the full 16 bits of the IntegrityCheck field.
+ ///
+ UINT16 Checksum16;
+} EFI_FFS_INTEGRITY_CHECK;
+
+///
+/// FFS_FIXED_CHECKSUM is the checksum value used when the
+/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
+///
+#define FFS_FIXED_CHECKSUM 0xAA
+
+typedef UINT8 EFI_FV_FILETYPE;
+typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
+typedef UINT8 EFI_FFS_FILE_STATE;
+
+///
+/// File Types Definitions
+///
+#define EFI_FV_FILETYPE_ALL 0x00
+#define EFI_FV_FILETYPE_RAW 0x01
+#define EFI_FV_FILETYPE_FREEFORM 0x02
+#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
+#define EFI_FV_FILETYPE_PEI_CORE 0x04
+#define EFI_FV_FILETYPE_DXE_CORE 0x05
+#define EFI_FV_FILETYPE_PEIM 0x06
+#define EFI_FV_FILETYPE_DRIVER 0x07
+#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
+#define EFI_FV_FILETYPE_APPLICATION 0x09
+#define EFI_FV_FILETYPE_SMM 0x0A
+#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
+#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
+#define EFI_FV_FILETYPE_SMM_CORE 0x0D
+#define EFI_FV_FILETYPE_OEM_MIN 0xc0
+#define EFI_FV_FILETYPE_OEM_MAX 0xdf
+#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
+#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
+#define EFI_FV_FILETYPE_FFS_MIN 0xf0
+#define EFI_FV_FILETYPE_FFS_MAX 0xff
+#define EFI_FV_FILETYPE_FFS_PAD 0xf0
+///
+/// FFS File Attributes.
+///
+#define FFS_ATTRIB_LARGE_FILE 0x01
+#define FFS_ATTRIB_FIXED 0x04
+#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
+#define FFS_ATTRIB_CHECKSUM 0x40
+
+///
+/// FFS File State Bits.
+///
+#define EFI_FILE_HEADER_CONSTRUCTION 0x01
+#define EFI_FILE_HEADER_VALID 0x02
+#define EFI_FILE_DATA_VALID 0x04
+#define EFI_FILE_MARKED_FOR_UPDATE 0x08
+#define EFI_FILE_DELETED 0x10
+#define EFI_FILE_HEADER_INVALID 0x20
+
+
+///
+/// Each file begins with the header that describe the
+/// contents and state of the files.
+///
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file.
+ ///
+ EFI_GUID Name;
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ ///
+ UINT8 Size[3];
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+} EFI_FFS_FILE_HEADER;
+
+typedef struct {
+ ///
+ /// This GUID is the file name. It is used to uniquely identify the file. There may be only
+ /// one instance of a file with the file name GUID of Name in any given firmware
+ /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// Used to verify the integrity of the file.
+ ///
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+
+ ///
+ /// Identifies the type of file.
+ ///
+ EFI_FV_FILETYPE Type;
+
+ ///
+ /// Declares various file attribute bits.
+ ///
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+
+ ///
+ /// The length of the file in bytes, including the FFS header.
+ /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
+ /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
+ /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
+ /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
+ ///
+ UINT8 Size[3];
+
+ ///
+ /// Used to track the state of the file throughout the life of the file from creation to deletion.
+ ///
+ EFI_FFS_FILE_STATE State;
+
+ ///
+ /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
+ /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
+ ///
+ UINT32 ExtendedSize;
+} EFI_FFS_FILE_HEADER2;
+
+#define IS_FFS_FILE2(FfsFileHeaderPtr) \
+ (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
+
+#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
+
+#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
+ (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
+
+typedef UINT8 EFI_SECTION_TYPE;
+
+///
+/// Pseudo type. It is used as a wild card when retrieving sections.
+/// The section type EFI_SECTION_ALL matches all section types.
+///
+#define EFI_SECTION_ALL 0x00
+
+///
+/// Encapsulation section Type values.
+///
+#define EFI_SECTION_COMPRESSION 0x01
+
+#define EFI_SECTION_GUID_DEFINED 0x02
+
+#define EFI_SECTION_DISPOSABLE 0x03
+
+///
+/// Leaf section Type values.
+///
+#define EFI_SECTION_PE32 0x10
+#define EFI_SECTION_PIC 0x11
+#define EFI_SECTION_TE 0x12
+#define EFI_SECTION_DXE_DEPEX 0x13
+#define EFI_SECTION_VERSION 0x14
+#define EFI_SECTION_USER_INTERFACE 0x15
+#define EFI_SECTION_COMPATIBILITY16 0x16
+#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
+#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
+#define EFI_SECTION_RAW 0x19
+#define EFI_SECTION_PEI_DEPEX 0x1B
+#define EFI_SECTION_SMM_DEPEX 0x1C
+
+///
+/// Common section header.
+///
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+ EFI_SECTION_TYPE Type;
+ ///
+ /// Declares the section type.
+ ///
+} EFI_COMMON_SECTION_HEADER;
+
+typedef struct {
+ ///
+ /// A 24-bit unsigned integer that contains the total size of the section in bytes,
+ /// including the EFI_COMMON_SECTION_HEADER.
+ ///
+ UINT8 Size[3];
+
+ EFI_SECTION_TYPE Type;
+
+ ///
+ /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
+ /// Size is not equal to 0xFFFFFF, then this field does not exist.
+ ///
+ UINT32 ExtendedSize;
+} EFI_COMMON_SECTION_HEADER2;
+
+///
+/// Leaf section type that contains an
+/// IA-32 16-bit executable image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
+
+///
+/// CompressionType of EFI_COMPRESSION_SECTION.
+///
+#define EFI_NOT_COMPRESSED 0x00
+#define EFI_STANDARD_COMPRESSION 0x01
+///
+/// An encapsulation section type in which the
+/// section data is compressed.
+///
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION;
+
+typedef struct {
+ ///
+ /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// UINT32 that indicates the size of the section data after decompression.
+ ///
+ UINT32 UncompressedLength;
+ ///
+ /// Indicates which compression algorithm is used.
+ ///
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION2;
+
+///
+/// An encapsulation section type in which the section data is disposable.
+/// A disposable section is an encapsulation section in which the section data may be disposed of during
+/// the process of creating or updating a firmware image without significant impact on the usefulness of
+/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
+/// allows optional or descriptive data to be included with the firmware file which can be removed in
+/// order to conserve space. The contents of this section are implementation specific, but might contain
+/// debug data or detailed integration instructions.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
+
+///
+/// The leaf section which could be used to determine the dispatch order of DXEs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a PI FV.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
+
+///
+/// The leaf section which contains a single GUID.
+///
+typedef struct {
+ ///
+ /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
+ ///
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
+
+///
+/// Attributes of EFI_GUID_DEFINED_SECTION.
+///
+#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
+#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
+///
+/// The leaf section which is encapsulation defined by specific GUID.
+///
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION;
+
+typedef struct {
+ ///
+ /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
+ ///
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
+ ///
+ EFI_GUID SectionDefinitionGuid;
+ ///
+ /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
+ ///
+ UINT16 DataOffset;
+ ///
+ /// The bit field that declares some specific characteristics of the section contents.
+ ///
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION2;
+
+///
+/// The leaf section which contains PE32+ image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
+
+///
+/// The leaf section used to determine the dispatch order of PEIMs.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
+
+///
+/// A leaf section type that contains a position-independent-code (PIC) image.
+/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
+/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
+/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
+/// relocation information has been stripped from the image and the image can be moved and will
+/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
+/// be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
+
+///
+/// The leaf section which constains the position-independent-code image.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
+
+///
+/// The leaf section which contains an array of zero or more bytes.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
+
+///
+/// The SMM dependency expression section is a leaf section that contains a dependency expression that
+/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
+/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
+/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
+/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
+/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
+///
+typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
+
+///
+/// The leaf section which contains a unicode string that
+/// is human readable file name.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ CHAR16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION2;
+
+///
+/// The leaf section which contains a numeric build number and
+/// an optional unicode string that represents the file revision.
+///
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT16 BuildNumber;
+
+ ///
+ /// Array of unicode string.
+ ///
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION;
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER2 CommonHeader;
+ ///
+ /// A UINT16 that represents a particular build. Subsequent builds have monotonically
+ /// increasing build numbers relative to earlier builds.
+ ///
+ UINT16 BuildNumber;
+ CHAR16 VersionString[1];
+} EFI_VERSION_SECTION2;
+
+#define IS_SECTION2(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
+
+#define SECTION_SIZE(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
+
+#define SECTION2_SIZE(SectionHeaderPtr) \
+ (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspfv.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspfv.h
new file mode 100644
index 0000000..9688cf4
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspfv.h
@@ -0,0 +1,249 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_FIRMWAREVOLUME_H__
+#define __PI_FIRMWAREVOLUME_H__
+
+#include <fsptypes.h>
+
+///
+/// EFI_FV_FILE_ATTRIBUTES
+///
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+
+//
+// Value of EFI_FV_FILE_ATTRIBUTES.
+//
+#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
+#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
+#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
+
+///
+/// type of EFI FVB attribute
+///
+typedef UINT32 EFI_FVB_ATTRIBUTES_2;
+
+//
+// Attributes bit definitions
+//
+#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB2_READ_STATUS 0x00000004
+#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB2_WRITE_STATUS 0x00000020
+#define EFI_FVB2_LOCK_CAP 0x00000040
+#define EFI_FVB2_LOCK_STATUS 0x00000080
+#define EFI_FVB2_STICKY_WRITE 0x00000200
+#define EFI_FVB2_MEMORY_MAPPED 0x00000400
+#define EFI_FVB2_ERASE_POLARITY 0x00000800
+#define EFI_FVB2_READ_LOCK_CAP 0x00001000
+#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
+#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
+#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
+#define EFI_FVB2_ALIGNMENT 0x001F0000
+#define EFI_FVB2_ALIGNMENT_1 0x00000000
+#define EFI_FVB2_ALIGNMENT_2 0x00010000
+#define EFI_FVB2_ALIGNMENT_4 0x00020000
+#define EFI_FVB2_ALIGNMENT_8 0x00030000
+#define EFI_FVB2_ALIGNMENT_16 0x00040000
+#define EFI_FVB2_ALIGNMENT_32 0x00050000
+#define EFI_FVB2_ALIGNMENT_64 0x00060000
+#define EFI_FVB2_ALIGNMENT_128 0x00070000
+#define EFI_FVB2_ALIGNMENT_256 0x00080000
+#define EFI_FVB2_ALIGNMENT_512 0x00090000
+#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
+#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
+#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
+#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
+#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
+#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
+#define EFI_FVB2_ALIGNMENT_64K 0x00100000
+#define EFI_FVB2_ALIGNMENT_128K 0x00110000
+#define EFI_FVB2_ALIGNMENT_256K 0x00120000
+#define EFI_FVB2_ALIGNMENT_512K 0x00130000
+#define EFI_FVB2_ALIGNMENT_1M 0x00140000
+#define EFI_FVB2_ALIGNMENT_2M 0x00150000
+#define EFI_FVB2_ALIGNMENT_4M 0x00160000
+#define EFI_FVB2_ALIGNMENT_8M 0x00170000
+#define EFI_FVB2_ALIGNMENT_16M 0x00180000
+#define EFI_FVB2_ALIGNMENT_32M 0x00190000
+#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
+#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
+#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
+#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
+#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
+#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
+
+
+typedef struct {
+ ///
+ /// The number of sequential blocks which are of the same size.
+ ///
+ UINT32 NumBlocks;
+ ///
+ /// The size of the blocks.
+ ///
+ UINT32 Length;
+} EFI_FV_BLOCK_MAP_ENTRY;
+
+///
+/// Describes the features and layout of the firmware volume.
+///
+typedef struct {
+ ///
+ /// The first 16 bytes are reserved to allow for the reset vector of
+ /// processors whose reset vector is at address 0.
+ ///
+ UINT8 ZeroVector[16];
+ ///
+ /// Declares the file system with which the firmware volume is formatted.
+ ///
+ EFI_GUID FileSystemGuid;
+ ///
+ /// Length in bytes of the complete firmware volume, including the header.
+ ///
+ UINT64 FvLength;
+ ///
+ /// Set to EFI_FVH_SIGNATURE
+ ///
+ UINT32 Signature;
+ ///
+ /// Declares capabilities and power-on defaults for the firmware volume.
+ ///
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ ///
+ /// Length in bytes of the complete firmware volume header.
+ ///
+ UINT16 HeaderLength;
+ ///
+ /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
+ ///
+ UINT16 Checksum;
+ ///
+ /// Offset, relative to the start of the header, of the extended header
+ /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
+ ///
+ UINT16 ExtHeaderOffset;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT8 Reserved[1];
+ ///
+ /// Set to 2. Future versions of this specification may define new header fields and will
+ /// increment the Revision field accordingly.
+ ///
+ UINT8 Revision;
+ ///
+ /// An array of run-length encoded FvBlockMapEntry structures. The array is
+ /// terminated with an entry of {0,0}.
+ ///
+ EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
+} EFI_FIRMWARE_VOLUME_HEADER;
+
+#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
+
+///
+/// Firmware Volume Header Revision definition
+///
+#define EFI_FVH_REVISION 0x02
+
+///
+/// Extension header pointed by ExtHeaderOffset of volume header.
+///
+typedef struct {
+ ///
+ /// Firmware volume name.
+ ///
+ EFI_GUID FvName;
+ ///
+ /// Size of the rest of the extension header, including this structure.
+ ///
+ UINT32 ExtHeaderSize;
+} EFI_FIRMWARE_VOLUME_EXT_HEADER;
+
+///
+/// Entry struture for describing FV extension header
+///
+typedef struct {
+ ///
+ /// Size of this header extension.
+ ///
+ UINT16 ExtEntrySize;
+ ///
+ /// Type of the header.
+ ///
+ UINT16 ExtEntryType;
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
+
+#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
+///
+/// This extension header provides a mapping between a GUID and an OEM file type.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
+ /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
+ ///
+ UINT32 TypeMask;
+ ///
+ /// An array of GUIDs, each GUID representing an OEM file type.
+ ///
+ /// EFI_GUID Types[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
+
+#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
+
+///
+/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
+/// GUID FormatType type which includes a length and a successive series of data bytes.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// Vendor-specific GUID.
+ ///
+ EFI_GUID FormatType;
+ ///
+ /// An arry of bytes of length Length.
+ ///
+ /// UINT8 Data[1];
+ ///
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspguid.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspguid.h
new file mode 100644
index 0000000..b9a6183
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspguid.h
@@ -0,0 +1,69 @@
+/** @file
+
+Copyright (C) 2014, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_GUID_H__
+#define __FSP_GUID_H__
+
+/**
+
+ FSP specific GUID HOB definitions
+
+ **/
+#define FSP_INFO_HEADER_GUID \
+ { \
+ 0x912740BE, 0x2284, 0x4734, {0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C} \
+ }
+
+#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
+ { \
+ 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0xb, 0x7b, 0xa9, 0xe4, 0xb0 } \
+ }
+
+#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
+ { \
+ 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } \
+ }
+
+#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \
+ { \
+ 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } \
+ }
+
+#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \
+ { \
+ 0xd038747c, 0xd00c, 0x4980, { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } \
+ }
+
+#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \
+ { \
+ 0x9c7c3aa7, 0x5332, 0x4917, { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } \
+ }
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fsphob.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fsphob.h
new file mode 100644
index 0000000..0f743b5
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fsphob.h
@@ -0,0 +1,544 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __PI_HOB_H__
+#define __PI_HOB_H__
+
+#include <fsptypes.h>
+
+//
+// HobType of EFI_HOB_GENERIC_HEADER.
+//
+#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+#define EFI_HOB_TYPE_UNUSED 0xFFFE
+#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
+
+///
+/// Describes the format and size of the data inside the HOB.
+/// All HOBs must contain this generic HOB header.
+///
+typedef struct {
+ ///
+ /// Identifies the HOB data structure type.
+ ///
+ UINT16 HobType;
+ ///
+ /// The length in bytes of the HOB.
+ ///
+ UINT16 HobLength;
+ ///
+ /// This field must always be set to zero.
+ ///
+ UINT32 Reserved;
+} EFI_HOB_GENERIC_HEADER;
+
+///
+/// Enumeration of memory types introduced in UEFI.
+///
+typedef enum {
+ ///
+ /// Not used.
+ ///
+ EfiReservedMemoryType,
+ ///
+ /// The code portions of a loaded application.
+ /// (Note that UEFI OS loaders are UEFI applications.)
+ ///
+ EfiLoaderCode,
+ ///
+ /// The data portions of a loaded application and the default data allocation
+ /// type used by an application to allocate pool memory.
+ ///
+ EfiLoaderData,
+ ///
+ /// The code portions of a loaded Boot Services Driver.
+ ///
+ EfiBootServicesCode,
+ ///
+ /// The data portions of a loaded Boot Serves Driver, and the default data
+ /// allocation type used by a Boot Services Driver to allocate pool memory.
+ ///
+ EfiBootServicesData,
+ ///
+ /// The code portions of a loaded Runtime Services Driver.
+ ///
+ EfiRuntimeServicesCode,
+ ///
+ /// The data portions of a loaded Runtime Services Driver and the default
+ /// data allocation type used by a Runtime Services Driver to allocate pool memory.
+ ///
+ EfiRuntimeServicesData,
+ ///
+ /// Free (unallocated) memory.
+ ///
+ EfiConventionalMemory,
+ ///
+ /// Memory in which errors have been detected.
+ ///
+ EfiUnusableMemory,
+ ///
+ /// Memory that holds the ACPI tables.
+ ///
+ EfiACPIReclaimMemory,
+ ///
+ /// Address space reserved for use by the firmware.
+ ///
+ EfiACPIMemoryNVS,
+ ///
+ /// Used by system firmware to request that a memory-mapped IO region
+ /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
+ ///
+ EfiMemoryMappedIO,
+ ///
+ /// System memory-mapped IO region that is used to translate memory
+ /// cycles to IO cycles by the processor.
+ ///
+ EfiMemoryMappedIOPortSpace,
+ ///
+ /// Address space reserved by the firmware for code that is part of the processor.
+ ///
+ EfiPalCode,
+ EfiMaxMemoryType
+} EFI_MEMORY_TYPE;
+
+///
+/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
+/// various attributes of the logical memory allocation. The type field will be used for
+/// subsequent inclusion in the UEFI memory map.
+///
+typedef struct {
+ ///
+ /// A GUID that defines the memory allocation region's type and purpose, as well as
+ /// other fields within the memory allocation HOB. This GUID is used to define the
+ /// additional data within the HOB that may be present for the memory allocation HOB.
+ /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_GUID Name;
+
+ ///
+ /// The base address of memory allocated by this HOB. Type
+ /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
+ /// specification.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
+
+ ///
+ /// The length in bytes of memory allocated by this HOB.
+ ///
+ UINT64 MemoryLength;
+
+ ///
+ /// Defines the type of memory allocated by this HOB. The memory type definition
+ /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
+ /// in AllocatePages() in the UEFI 2.0 specification.
+ ///
+ EFI_MEMORY_TYPE MemoryType;
+
+ ///
+ /// Padding for Itanium processor family
+ ///
+ UINT8 Reserved[4];
+} EFI_HOB_MEMORY_ALLOCATION_HEADER;
+
+///
+/// Describes all memory ranges used during the HOB producer
+/// phase that exist outside the HOB list. This HOB type
+/// describes how memory is used, not the physical attributes of memory.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
+ /// various attributes of the logical memory allocation.
+ ///
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ //
+ // Additional data pertaining to the "Name" Guid memory
+ // may go here.
+ //
+} EFI_HOB_MEMORY_ALLOCATION;
+
+///
+/// The resource type.
+///
+typedef UINT32 EFI_RESOURCE_TYPE;
+
+//
+// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
+//
+#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
+#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
+#define EFI_RESOURCE_IO 0x00000002
+#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
+#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
+#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
+#define EFI_RESOURCE_IO_RESERVED 0x00000006
+#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
+
+///
+/// A type of recount attribute type.
+///
+typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
+
+//
+// These types can be ORed together as needed.
+//
+// The first three enumerations describe settings
+//
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
+//
+// The rest of the settings describe capabilities
+//
+#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
+#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
+#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
+#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
+#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
+
+///
+/// Describes the resource properties of all fixed,
+/// nonrelocatable resource ranges found on the processor
+/// host bus during the HOB producer phase.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID representing the owner of the resource. This GUID is used by HOB
+ /// consumer phase components to correlate device ownership of a resource.
+ ///
+ EFI_GUID Owner;
+ ///
+ /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
+ ///
+ EFI_RESOURCE_TYPE ResourceType;
+ ///
+ /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
+ ///
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ ///
+ /// The physical start address of the resource region.
+ ///
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
+ ///
+ /// The number of bytes of the resource region.
+ ///
+ UINT64 ResourceLength;
+} EFI_HOB_RESOURCE_DESCRIPTOR;
+
+///
+/// Allows writers of executable content in the HOB producer phase to
+/// maintain and manage HOBs with specific GUID.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// A GUID that defines the contents of this HOB.
+ ///
+ EFI_GUID Name;
+ //
+ // Guid specific data goes here
+ //
+} EFI_HOB_GUID_TYPE;
+
+///
+/// Union of all the possible HOB Types.
+///
+typedef union {
+ EFI_HOB_GENERIC_HEADER *Header;
+ EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
+ EFI_HOB_GUID_TYPE *Guid;
+ UINT8 *Raw;
+} EFI_PEI_HOB_POINTERS;
+
+
+/**
+ Returns the type of a HOB.
+
+ This macro returns the HobType field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobType.
+
+**/
+#define GET_HOB_TYPE(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
+
+/**
+ Returns the length, in bytes, of a HOB.
+
+ This macro returns the HobLength field from the HOB header for the
+ HOB specified by HobStart.
+
+ @param HobStart A pointer to a HOB.
+
+ @return HobLength.
+
+**/
+#define GET_HOB_LENGTH(HobStart) \
+ ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
+
+/**
+ Returns a pointer to the next HOB in the HOB list.
+
+ This macro returns a pointer to HOB that follows the
+ HOB specified by HobStart in the HOB List.
+
+ @param HobStart A pointer to a HOB.
+
+ @return A pointer to the next HOB in the HOB list.
+
+**/
+#define GET_NEXT_HOB(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
+
+/**
+ Determines if a HOB is the last HOB in the HOB list.
+
+ This macro determine if the HOB specified by HobStart is the
+ last HOB in the HOB list. If HobStart is last HOB in the HOB list,
+ then TRUE is returned. Otherwise, FALSE is returned.
+
+ @param HobStart A pointer to a HOB.
+
+ @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
+ @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
+
+**/
+#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+/**
+ Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns a pointer to the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return A pointer to the data buffer in a HOB.
+
+**/
+#define GET_GUID_HOB_DATA(HobStart) \
+ (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
+ HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
+
+ @param GuidHob A pointer to a HOB.
+
+ @return The size of the data buffer.
+**/
+#define GET_GUID_HOB_DATA_SIZE(HobStart) \
+ (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
+
+/**
+ Returns the pointer to the HOB list.
+
+ This function returns the pointer to first HOB in the list.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ );
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If HobStart is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ );
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If Guid is NULL, then ASSERT().
+ If HobStart is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ );
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+ If Guid is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ );
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ );
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return The 64-bit value read from Buffer.
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ );
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspinfoheader.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspinfoheader.h
new file mode 100644
index 0000000..28382cf
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspinfoheader.h
@@ -0,0 +1,62 @@
+/*++
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_INFO_HEADER_H_
+#define _FSP_INFO_HEADER_H_
+
+#pragma pack(1)
+
+typedef struct {
+
+ UINT32 Signature; // Off 0x94
+ UINT32 HeaderLength;
+ UINT8 Reserved1[3];
+ UINT8 HeaderRevision;
+ UINT32 ImageRevision;
+
+ CHAR8 ImageId[8]; // Off 0xA4
+ UINT32 ImageSize;
+ UINT32 ImageBase;
+
+ UINT32 ImageAttribute; // Off 0xB4
+ UINT32 CfgRegionOffset;
+ UINT32 CfgRegionSize;
+ UINT32 ApiEntryNum;
+
+ UINT32 NemInitEntry; // Off 0xC4
+ UINT32 FspInitEntry;
+ UINT32 NotifyPhaseEntry;
+ UINT32 Reserved2;
+
+} FSP_INFO_HEADER;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspplatform.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspplatform.h
new file mode 100644
index 0000000..c35dca0
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspplatform.h
@@ -0,0 +1,114 @@
+/**
+
+Copyright (C) 2013 - 2015, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef _FSP_PLATFORM_H_
+#define _FSP_PLATFORM_H_
+
+#include "fsptypes.h"
+#include "fspapi.h"
+
+//
+// Maximum number of SDRAM channels supported by each CPU
+//
+#define MAX_CHANNELS 2
+//
+// Maximum number of DIMM sockets supported by each channel
+//
+#define MAX_DIMMS 2
+
+#pragma pack(1)
+//
+// SPD DDR3 structure
+//
+typedef struct {
+ UINT8 DRAMDeviceType; // 2 DRAM Device Type
+ UINT8 ModuleType; // 3 Module Type
+ UINT8 SDRAMDensityAndBanks; // 4 SDRAM Density and Banks
+ UINT8 SDRAMAddressing; // 5 SDRAM Addressing
+ UINT8 VDD; // 6 Module Nominal Voltage
+ UINT8 ModuleOrganization; // 7 Module Organization
+ UINT8 ModuleMemoryBusWidth; // 8 Module Memory Bus Width
+ UINT8 TimebaseDividend; // 10 Medium Timebase (MTB) Dividend
+ UINT8 TimebaseDivisor; // 11 Medium Timebase (MTB) Divisor
+ UINT8 SDRAMMinimumCycleTime; // 12 SDRAM Minimum Cycle Time (tCKmin)
+ UINT8 CASLatenciesLSB; // 14 CAS Latencies Supported, Least Significant Byte
+ UINT8 CASLatenciesMSB; // 15 CAS Latencies Supported, Most Significant Byte
+ UINT8 MinimumCASLatencyTime; // 16 Minimum CAS Latency Time (tAAmin)
+ UINT8 MinimumWriteRecoveryTime; // 17 Minimum Write Recovery Time (tWRmin)
+ UINT8 MinimumRASToCASDelayTime; // 18 Minimum RAS# to CAS# Delay Time (tRCDmin)
+ UINT8 MinimumRowToRowDelayTime; // 19 Minimum Row Active to Row Active Delay Time (tRRDmin)
+ UINT8 MinimumRowPrechargeDelayTime; // 20 Minimum Row Precharge Delay Time (tRPmin)
+ UINT8 UpperNibblesFortRASAndtRC; // 21 Upper Nibbles for tRAS and tRC
+ UINT8 tRASmin; // 22 Minimum Active to Precharge Delay Time (tRASmin), Least Significant Byte
+ UINT8 tRCmin; // 23 Minimum Active to Active/Refresh Delay Time (tRCmin), Least Significant Byte
+ UINT8 tRFCminLeastSignificantByte; // 24 Minimum Refresh Recovery Delay Time (tRFCmin), Least Significant Byte
+ UINT8 tRFCminMostSignificantByte; // 25 Minimum Refresh Recovery Delay Time (tRFCmin), Most Significant Byte
+ UINT8 tWTRmin; // 26 Minimum Internal Write to Read Command Delay Time (tWTRmin)
+ UINT8 tRTPmin; // 27 Minimum Internal Read to Precharge Command Delay Time (tRTPmin)
+ UINT8 UpperNibbleFortFAW; // 28 Upper Nibble for tFAW
+ UINT8 tFAWmin; // 29 Minimum Four Activate Window Delay Time (tFAWmin)
+ UINT8 SdramThermalRefreshOption; // 31 SdramThermalRefreshOption
+ UINT8 ModuleThermalSensor; // 32 ModuleThermalSensor
+ UINT8 SDRAMDeviceType; // 33 SDRAM Device Type
+ UINT8 tCKminFine; // 34 Fine Offset for SDRAM Minimum Cycle Time (tCKmin)
+ UINT8 tAAminFine; // 35 Fine Offset for Minimum CAS Latency Time (tAAmin)
+ UINT8 MACCount; // 41 Maximum Activate Count
+ UINT8 ReferenceRawCardUsed; // 62 Reference Raw Card Used
+ UINT8 AddressMappingEdgeConnector; // 63 Address Mapping from Edge Connector to DRAM
+ UINT8 ModuleManufacturerIdCodeLsb; // 117 Module Manufacturer ID Code, Least Significant Byte
+ UINT8 ModuleManufacturerIdCodeMsb; // 118 Module Manufacturer ID Code, Most Significant Byte
+ UINT8 ModuleManufacturingLocation; // 119 Module Manufacturing Location
+ UINT8 ModuleManufacturingDateYear; // 120 Module Manufacturing Date Year
+ UINT8 ModuleManufacturingDateWW; // 121 Module Manufacturing Date creation work week
+ UINT8 ModuleSerialNumberA; // 122 Module Serial Number A
+ UINT8 ModuleSerialNumberB; // 123 Module Serial Number B
+ UINT8 ModuleSerialNumberC; // 124 Module Serial Number C
+ UINT8 ModuleSerialNumberD; // 125 Module Serial Number D
+ UINT8 DramManufacturerIdLsb; // 148 DRAM Manufacturer ID Code, LSB
+ UINT8 DramManufacturerIdMsb; // 149 DRAM Manufacturer ID Code, MSB
+} MEM_DOWN_DIMM_SPD_DATA;
+
+typedef struct {
+ UINT32 MemoryDownDimmPopulation; // 0 - Empty, 1 - DIMM populated
+ MEM_DOWN_DIMM_SPD_DATA MemoryDownDimmSpdData;
+} MEM_DOWN_DIMM_CONFIG;
+
+typedef struct {
+ CONST MEM_DOWN_DIMM_CONFIG *MemDownDimmConfig[MAX_CHANNELS][MAX_DIMMS];
+} FSP_INIT_RT_PLATFORM_BUFFER;
+
+typedef struct {
+ FSP_INIT_RT_COMMON_BUFFER Common;
+ FSP_INIT_RT_PLATFORM_BUFFER Platform;
+} FSP_INIT_RT_BUFFER;
+
+#pragma pack()
+
+#endif
\ No newline at end of file
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspsupport.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspsupport.h
new file mode 100644
index 0000000..dbbbf77
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspsupport.h
@@ -0,0 +1,95 @@
+/** @file
+
+Copyright (C) 2013 - 2014, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __FSP_SUPPORT_H__
+#define __FSP_SUPPORT_H__
+
+#include "fsptypes.h"
+#include "fspfv.h"
+#include "fspffs.h"
+#include "fspapi.h"
+#include "fsphob.h"
+#include "fspguid.h"
+#include "fspplatform.h"
+#include "fspinfoheader.h"
+#include "fspbootmode.h"
+#include "fspvpd.h"
+
+UINT32
+GetUsableLowMemTop (
+ CONST VOID *HobListPtr
+ );
+
+UINT64
+GetUsableHighMemTop (
+ CONST VOID *HobListPtr
+ );
+
+VOID *
+GetGuidHobDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length,
+ EFI_GUID *Guid
+ );
+
+VOID
+GetFspReservedMemoryFromGuid (
+ CONST VOID *HobListPtr,
+ EFI_PHYSICAL_ADDRESS *FspMemoryBase,
+ UINT64 *FspMemoryLength,
+ EFI_GUID *FspReservedMemoryGuid
+ );
+
+UINT32
+GetTsegReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+);
+
+UINT32
+GetFspReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+);
+
+VOID*
+GetFspNvsDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ );
+
+VOID *
+GetBootloaderTempMemoryBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+ );
+
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fsptypes.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fsptypes.h
new file mode 100644
index 0000000..da19250
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fsptypes.h
@@ -0,0 +1,183 @@
+/******************************************************************************
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+ *****************************************************************************/
+
+/** \file fsptypes.h
+ *
+ *
+ */
+
+#ifndef __FSP_TYPES_H__
+#define __FSP_TYPES_H__
+
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned long long UINT64;
+///
+/// 8-byte signed value.
+///
+typedef long long INT64;
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned int UINT32;
+///
+/// 4-byte signed value.
+///
+typedef int INT32;
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value
+///
+typedef char INT8;
+
+typedef void VOID;
+
+typedef UINT64 EFI_PHYSICAL_ADDRESS;
+
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} EFI_GUID;
+
+#define CONST const
+#define STATIC static
+
+#define TRUE ((BOOLEAN)(1==1))
+#define FALSE ((BOOLEAN)(0==1))
+
+static inline void DebugDeadLoop(void) {
+ for (;;);
+}
+
+#define FSPAPI __attribute__((cdecl))
+#define EFIAPI __attribute__((cdecl))
+
+#define _ASSERT(Expression) DebugDeadLoop()
+#define ASSERT(Expression) \
+ do { \
+ if (!(Expression)) { \
+ _ASSERT (Expression); \
+ } \
+ } while (FALSE)
+
+typedef UINT32 FSP_STATUS;
+typedef UINT32 EFI_STATUS;
+
+///
+/// Compatiable with EFI_STATUS defined in PI Spec.
+#define FSP_SUCCESS 0
+#define FSP_INVALID_PARAMETER 0x80000002
+#define FSP_UNSUPPORTED 0x80000003
+#define FSP_DEVICE_ERROR 0x80000007
+#define FSP_NOT_FOUND 0x8000000E
+#define FSP_ALREADY_STARTED 0x80000014
+
+/**
+ Returns a 16-bit signature built from 2 ASCII characters.
+
+ This macro returns a 16-bit value built from the two ASCII characters specified
+ by A and B.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+
+ @return A 16-bit value built from the two ASCII characters specified by A and B.
+
+**/
+#define SIGNATURE_16(A, B) ((A) | (B << 8))
+
+/**
+ Returns a 32-bit signature built from 4 ASCII characters.
+
+ This macro returns a 32-bit value built from the four ASCII characters specified
+ by A, B, C, and D.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+ @param C The third ASCII character.
+ @param D The fourth ASCII character.
+
+ @return A 32-bit value built from the two ASCII characters specified by A, B,
+ C and D.
+
+**/
+#define SIGNATURE_32(A, B, C, D) (SIGNATURE_16 (A, B) | (SIGNATURE_16 (C, D) << 16))
+
+/**
+ Returns a 64-bit signature built from 8 ASCII characters.
+
+ This macro returns a 64-bit value built from the eight ASCII characters specified
+ by A, B, C, D, E, F, G,and H.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+ @param C The third ASCII character.
+ @param D The fourth ASCII character.
+ @param E The fifth ASCII character.
+ @param F The sixth ASCII character.
+ @param G The seventh ASCII character.
+ @param H The eighth ASCII character.
+
+ @return A 64-bit value built from the two ASCII characters specified by A, B,
+ C, D, E, F, G and H.
+
+**/
+#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32))
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspvpd.h b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspvpd.h
new file mode 100644
index 0000000..4ba1a28
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/include/fspvpd.h
@@ -0,0 +1,89 @@
+/** @file
+
+Copyright (C) 2015, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+ This file is automatically generated. Please do NOT modify !!!
+
+**/
+
+#ifndef __FSP_VPD_H__
+#define __FSP_VPD_H__
+
+#pragma pack(1)
+
+
+
+typedef struct _UPD_DATA_REGION {
+ UINT64 Signature; /* Offset 0x0000 */
+ UINT64 Reserved; /* Offset 0x0008 */
+ UINT8 UnusedUpdSpace0[16]; /* Offset 0x0010 */
+ UINT8 PcdMrcInitTsegSize; /* Offset 0x0020 */
+ UINT8 PcdMemoryDown; /* Offset 0x0021 */
+ UINT8 PcdMrcRmtSupport; /* Offset 0x0022 */
+ UINT8 PcdMrcRmtCpgcExpLoopCntValue; /* Offset 0x0023 */
+ UINT8 PcdMrcRmtCpgcNumBursts; /* Offset 0x0024 */
+ UINT8 PcdSpdBaseAddress_0_0; /* Offset 0x0025 */
+ UINT8 PcdSpdBaseAddress_0_1; /* Offset 0x0026 */
+ UINT8 PcdSpdBaseAddress_1_0; /* Offset 0x0027 */
+ UINT8 PcdSpdBaseAddress_1_1; /* Offset 0x0028 */
+ UINT8 PcdExtendedTemperatureEnable; /* Offset 0x0029 */
+ UINT8 UnusedUpdSpace1[6]; /* Offset 0x002A */
+ UINT8 PcdEnableLan; /* Offset 0x0030 */
+ UINT8 PcdEnableSata2; /* Offset 0x0031 */
+ UINT8 PcdEnableSata3; /* Offset 0x0032 */
+ UINT8 PcdEnableIQAT; /* Offset 0x0033 */
+ UINT8 PcdEnableUsb20; /* Offset 0x0034 */
+ UINT8 PcdBifurcation; /* Offset 0x0035 */
+ UINT8 PcdPcieRootPort1DeEmphasis; /* Offset 0x0036 */
+ UINT8 PcdPcieRootPort2DeEmphasis; /* Offset 0x0037 */
+ UINT8 PcdPcieRootPort3DeEmphasis; /* Offset 0x0038 */
+ UINT8 PcdPcieRootPort4DeEmphasis; /* Offset 0x0039 */
+ UINT8 UnusedUpdSpace2[6]; /* Offset 0x003A */
+ UINT8 PcdPrintDebugMessages; /* Offset 0x0040 */
+ UINT8 PcdFastboot; /* Offset 0x0041 */
+ UINT8 PcdEccSupport; /* Offset 0x0042 */
+ UINT8 PcdSerialPortBaudRate; /* Offset 0x0043 */
+ UINT8 PcdCustomerRevision[32]; /* Offset 0x0044 */
+ UINT8 UnusedUpdSpace3[12]; /* Offset 0x0064 */
+ UINT16 PcdRegionTerminator; /* Offset 0x0070 */
+} UPD_DATA_REGION;
+
+#define VPD_IMAGE_ID 0x562D474E524E5641 /* 'AVNRNG-V' */
+#define VPD_IMAGE_REV 0x00000140
+
+typedef struct _VPD_DATA_REGION {
+ UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
+ UINT32 PcdImageRevision; /* Offset 0x0008 */
+ UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
+ UINT8 UnusedVpdSpace0[16]; /* Offset 0x0010 */
+ UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
+ UINT8 PcdSpdWriteProtect; /* Offset 0x0024 */
+} VPD_DATA_REGION;
+
+#pragma pack()
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/srx/fsp_support.c b/src/vendorcode/intel/fsp/fsp1_0/rangeley/srx/fsp_support.c
new file mode 100644
index 0000000..9f15b3e
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/srx/fsp_support.c
@@ -0,0 +1,288 @@
+/** @file
+
+Copyright (C) 2013 - 2014, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#include <types.h>
+#include <string.h>
+#include "fspsupport.h"
+
+/**
+ This function retrieves the top of usable low memory.
+
+ @param HobListPtr A HOB list pointer.
+
+ @retval Usable low memory top.
+
+**/
+UINT32
+GetUsableLowMemTop (
+ CONST VOID *HobStart
+)
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ UINT32 MemLen;
+ /*
+ * Get the HOB list for processing
+ */
+ Hob.Raw = (VOID *)HobStart;
+
+ /*
+ * Collect memory ranges
+ */
+ MemLen = 0x100000;
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
+ /*
+ * Need memory above 1MB to be collected here
+ */
+ if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000 &&
+ Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
+ MemLen += (UINT32) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return MemLen;
+}
+
+/**
+ This function retrieves the top of usable high memory.
+
+ @param HobListPtr A HOB list pointer.
+
+ @retval Usable high memory top.
+
+**/
+UINT64
+GetUsableHighMemTop (
+ CONST VOID *HobStart
+)
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ UINT64 MemTop;
+ /*
+ * Get the HOB list for processing
+ */
+ Hob.Raw = (VOID *)HobStart;
+
+ /*
+ * Collect memory ranges
+ */
+ MemTop = 0x100000000;
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
+ /*
+ * Need memory above 1MB to be collected here
+ */
+ if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS) 0x100000000) {
+ MemTop += (UINT32) (Hob.ResourceDescriptor->ResourceLength);
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ return MemTop;
+}
+
+/**
+ This function retrieves a special reserved memory region.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the GUID HOB data buffer length. If the GUID HOB is
+ located, the length will be updated.
+ @param OwnerGuid A pointer to the owner guild.
+ @retval Reserved region start address. 0 if this region does not exist.
+
+**/
+VOID
+GetFspReservedMemoryFromGuid (
+ CONST VOID *HobListPtr,
+ EFI_PHYSICAL_ADDRESS *Base,
+ UINT64 *Length,
+ EFI_GUID *OwnerGuid
+)
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ /*
+ * Get the HOB list for processing
+ */
+ Hob.Raw = (VOID *)HobListPtr;
+
+ /*
+ * Collect memory ranges
+ */
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) {
+ if (CompareGuid(&Hob.ResourceDescriptor->Owner, OwnerGuid)) {
+ *Base = (EFI_PHYSICAL_ADDRESS) (Hob.ResourceDescriptor->PhysicalStart);
+ *Length = (UINT64) (Hob.ResourceDescriptor->ResourceLength);
+ break;
+ }
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+}
+
+/**
+ This function retrieves the TSEG reserved normal memory.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the TSEG reserved memory length buffer. If the GUID HOB is
+ located, the length will be updated.
+ @param Guid A pointer to owner HOB GUID.
+ @retval NULL Failed to find the TSEG reserved memory.
+ @retval others TSEG reserved memory base.
+
+**/
+UINT32
+GetTsegReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+)
+{
+ const EFI_GUID TsegOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
+ UINT64 Length64 = 0;
+ EFI_PHYSICAL_ADDRESS Base = 0;
+
+ GetFspReservedMemoryFromGuid (HobListPtr, &Base, &Length64, (EFI_GUID *)&TsegOwnerHobGuid);
+ if ((Length != NULL) && (Base != 0)) {
+ *Length = (UINT32)Length64;
+ }
+ return (UINT32)Base;
+}
+
+/**
+ This function retrieves the FSP reserved normal memory.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the FSP reserved memory length buffer. If the GUID HOB is
+ located, the length will be updated.
+ @param Guid A pointer to owner HOB GUID.
+ @retval NULL Failed to find the FSP reserved memory.
+ @retval others FSP reserved memory base.
+
+**/
+UINT32
+GetFspReservedMemory (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+)
+{
+ const EFI_GUID FspOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
+ UINT64 Length64 = 0;
+ EFI_PHYSICAL_ADDRESS Base = 0;
+
+ GetFspReservedMemoryFromGuid (HobListPtr, &Base, &Length64, (EFI_GUID *)&FspOwnerHobGuid);
+ if ((Length != NULL) && (Base != 0)) {
+ *Length = (UINT32)Length64;
+ }
+ return (UINT32)Base;
+}
+
+
+/**
+ This function retrieves a GUIDed HOB data buffer and size.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the GUID HOB data buffer length. If the
+ GUID HOB is located, the length will be updated.
+ @param Guid A pointer to HOB GUID.
+ @retval NULL Failed to find the GUID HOB.
+ @retval others GUID HOB data buffer pointer.
+
+**/
+VOID *
+GetGuidHobDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length,
+ EFI_GUID *Guid
+)
+{
+ UINT8 *GuidHob;
+
+ /* FSP NVS DATA HOB */
+ GuidHob = GetNextGuidHob(Guid, HobListPtr);
+ if (GuidHob == NULL) {
+ return NULL;
+ } else {
+ if (Length) {
+ *Length = GET_GUID_HOB_DATA_SIZE (GuidHob);
+ }
+ return GET_GUID_HOB_DATA (GuidHob);
+ }
+}
+
+/**
+ This function retrieves FSP Non-volatile Storage HOB buffer and size.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the NVS data buffer length. If the FSP NVS
+ HOB is located, the length will be updated.
+ @retval NULL Failed to find the NVS HOB.
+ @retval others FSP NVS data buffer pointer.
+
+**/
+VOID *
+GetFspNvsDataBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+)
+{
+ const EFI_GUID FspNvsHobGuid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+ return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspNvsHobGuid);
+}
+
+
+/**
+ This function retrieves Bootloader temporary stack buffer and size.
+
+ @param HobListPtr A HOB list pointer.
+ @param Length A pointer to the Bootloader temporary stack length.
+ If the HOB is located, the length will be updated.
+ @retval NULL Failed to find the Bootloader temporary stack HOB.
+ @retval others Bootloader temporary stackbuffer pointer.
+
+**/
+VOID *
+GetBootloaderTempMemoryBuffer (
+ CONST VOID *HobListPtr,
+ UINT32 *Length
+)
+{
+ const EFI_GUID FspBootloaderTemporaryMemoryHobGuid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
+ return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspBootloaderTemporaryMemoryHobGuid);
+}
diff --git a/src/vendorcode/intel/fsp/fsp1_0/rangeley/srx/fsphob.c b/src/vendorcode/intel/fsp/fsp1_0/rangeley/srx/fsphob.c
new file mode 100644
index 0000000..4986d52
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp1_0/rangeley/srx/fsphob.c
@@ -0,0 +1,204 @@
+/******************************************************************************
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+ ******************************************************************************/
+
+/***********************************************************************
+ *
+ * fsphob.c
+ *
+ * HOB infrastructure code.
+ *
+ **********************************************************************/
+#include <string.h>
+
+#include "fsptypes.h"
+#include "fsphob.h"
+
+//
+// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
+//
+#ifndef __PRE_RAM__
+extern volatile void *FspHobListPtr;
+#endif
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return The 64-bit value read from Buffer.
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ CONST UINT64 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ CONST EFI_GUID *Guid1,
+ CONST EFI_GUID *Guid2
+ )
+{
+ UINT64 LowPartOfGuid1;
+ UINT64 LowPartOfGuid2;
+ UINT64 HighPartOfGuid1;
+ UINT64 HighPartOfGuid2;
+
+ LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
+ LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
+ HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
+ HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
+
+ return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
+}
+
+/**
+ Returns the pointer to the HOB list.
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+#ifndef __PRE_RAM__
+ ASSERT (FspHobListPtr != NULL);
+ return ((VOID *)FspHobListPtr);
+#else
+ return ((VOID *)NULL);
+#endif
+}
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ UINT16 Type,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list until end of list or matching type is found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ CONST EFI_GUID *Guid,
+ CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf
deleted file mode 100644
index 66ab0d7..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf
+++ /dev/null
@@ -1,328 +0,0 @@
-//
-// This file contains an 'Intel Peripheral Driver' and is
-// licensed for Intel CPUs and chipsets under the terms of your
-// license agreement with Intel or your vendor. This file must not
-// be modified by end users or could render the generated boot loader
-// inoperable.
-//
-// @file
-// Boot Setting File for Platform: Bayley Bay Platform
-//
-// Copyright (c) 2010-2013 Intel Corporation. All rights reserved
-// This software and associated documentation (if any) is furnished
-// under a license and may only be used or copied in accordance
-// with the terms of the license. Except as permitted by such
-// license, no part of this software or documentation may be
-// reproduced, stored in a retrieval system, or transmitted in any
-// form or by any means without the express written consent of
-// Intel Corporation.
-//
-//
-
-
-GlobalDataDef
- SKUID = 0 $_AS_BUILT_ = 0x01 , "DEFAULT"
-EndGlobalData
-
-StructDef
-
- Find "VLV2UPDR"
- Skip 24 bytes
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize 2 bytes $_AS_BUILT_ = 0x1, 0x0 $_DEFAULT_ = 0x0001
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize 2 bytes $_AS_BUILT_ = 0x0, 0x8 $_DEFAULT_ = 0x0800
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA0
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA2
- $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdSataMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_AzaliaConfigPtr 4 bytes $_AS_BUILT_ = 0x0, 0x0, 0x0, 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdGttSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_ISPEnable 1 bytes $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
-
- Find "VLYVIEW1"
- $gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_AS_BUILT_ = 0x2, 0x3, 0x0, 0x0 $_DEFAULT_ = 0x00000302
- Skip 24 bytes
- $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 2
-
- $DIMM_MemDown 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
- $DRAM_Speed 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 2
- $DRAM_Type 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $Rank_En_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $Rank_En_1_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $DIMM_DWidth_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
- $DIMM_Density_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $DIMM_BusWidth_0_0 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 3
- $DIMM_Sides_0_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $tCL 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
- $tRP_tRCD 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
- $tWR 1 byte $_AS_BUILT_ = 0x8 $_DEFAULT_ = 10
- $tWTR 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
- $tRRD 1 byte $_AS_BUILT_ = 0x6 $_DEFAULT_ = 4
- $tRTP 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
- $tFAW 1 byte $_AS_BUILT_ = 0x14 $_DEFAULT_ = 20
-
-EndStruct
-
-List &DRAMSPEED
- Selection 0x0 , "800 MHz"
- Selection 0x1 , "1066 MHz"
- Selection 0x2 , "1333 MHz"
- Selection 0x3 , "1600 MHz"
-EndList
-
-List &DRAMTYPE
- Selection 0x0 , "DDR3"
- Selection 0x1 , "DDR3L"
- Selection 0x2 , "DDR3U"
- //Selection 0x3 , "LPDDR2"
- Selection 0x4 , "LPDDR2"
- Selection 0x5 , "LPDDR3"
- Selection 0x6 , "DDR4"
-EndList
-
-List &DIMMDWIDTH
- Selection 0x0 , "x8"
- Selection 0x1 , "x16"
- Selection 0x2 , "x32"
-EndList
-
-List &DIMMDENSITY
- Selection 0x0 , "1 Gbit"
- Selection 0x1 , "2 Gbit"
- Selection 0x2 , "4 Gbit"
- Selection 0x3 , "8 Gbit"
-EndList
-
-List &DIMMBUSWIDTH
- Selection 0x0 , "8 bits"
- Selection 0x1 , "16 bits"
- Selection 0x2 , "32 bits"
- Selection 0x3 , "64 bits"
-EndList
-
-List &RANKPERDIMM
- Selection 0x1 , "2 Ranks"
- Selection 0x0 , "1 Rank"
-EndList
-
-List &SATA_MODE
- Selection 0x1 , "AHCI"
- Selection 0x0 , "IDE"
-EndList
-
-List &EMMC_MODES
- Selection 0x0 , "Disabled"
- Selection 0x1 , "Auto"
- Selection 0x2 , "eMMC 4.1"
- Selection 0x3 , "eMMC 4.5"
-EndList
-
-List &EN_DIS
- Selection 0x1 , "Enabled"
- Selection 0x0 , "Disabled"
-EndList
-
-List &EN_DIS_AUTO
- Selection 0x2 , "Auto"
- Selection 0x1 , "Enabled"
- Selection 0x0 , "Disabled"
-EndList
-
-List &MMIO_SIZES
- Selection 0x400, "1.0 GB"
- Selection 0x600, "1.5 GB"
- Selection 0x800, "2.0 GB"
-EndList
-
-List &TSEG_SIZES
- Selection 0x01, "1 MB"
- Selection 0x02, "2 MB"
- Selection 0x04, "4 MB"
- Selection 0x08, "8 MB"
-EndList
-
-List &IGDPREALLOC_SIZES
- Selection 0x01, "32 MB"
- Selection 0x02, "64 MB"
- Selection 0x03, "96 MB"
- Selection 0x04, "128 MB"
- Selection 0x05, "160 MB"
- Selection 0x06, "192 MB"
- Selection 0x07, "224 MB"
- Selection 0x08, "256 MB"
- Selection 0x09, "288 MB"
- Selection 0x0A, "320 MB"
- Selection 0x0B, "352 MB"
- Selection 0x0C, "384 MB"
- Selection 0x0D, "416 MB"
- Selection 0x0E, "448 MB"
- Selection 0x0F, "480 MB"
- Selection 0x10, "512 MB"
-EndList
-
-List &APERTURE_SIZES
- Selection 0x1 , "128 MB"
- Selection 0x2 , "256 MB"
- Selection 0x3 , "512 MB"
-EndList
-
-List >T_SIZES
- Selection 0x1 , "1 MB"
- Selection 0x2 , "2 MB"
-EndList
-
-List &PCI_ACPI
- Selection 0x2 , "ACPI Mode"
- Selection 0x1 , "PCI Mode"
- Selection 0x0 , "Disabled"
-EndList
-
-List &PLATFORM_TYPE
- Selection 0x2 , "BayleyBay Platform Type"
- Selection 0x3 , "BakerSport Platform (ECC) Type"
-EndList
-
-BeginInfoBlock
- PPVer "1.0"
- Description "MinnowMax"
-
-EndInfoBlock
-
-Page "Platform"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType, "Platform Type", &PLATFORM_TYPE,
- Help "Select Platform Type."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot, "Enable Secure Boot", &EN_DIS_AUTO,
- Help "Enable/disable secure boot. Auto by default."
-EndPage
-
-Page "North Complex"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize, "Tseg Size", &TSEG_SIZES,
- Help "Size of memory reserved for SMRAM, in MB."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize, "Mmio Size", &MMIO_SIZES,
- Help "Size of memory address space reserved for MMIO (Memory Mapped I/O), in GB."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc, "Internal Graphics Pre-allocated Memory ", &IGDPREALLOC_SIZES,
- Help "Size of memory preallocated for internal graphics"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize, "Aperture Size", &APERTURE_SIZES,
- Help "Select the Aperture Size"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdGttSize, "GTT Size", >T_SIZES,
- Help "Select the GTT Size"
- EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1, "DIMM 0 SPD SMBus Address", HEX,
- Help "Address of DIMM 0. 8 bits"
- EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2, "DIMM 1 SPD SMBus Address", HEX,
- Help "Address of DIMM 1. 8 bits"
-EndPage
-
-Page "Memory Down"
- Combo $DIMM_MemDown, "Enable Memory Down", &EN_DIS,
- Help "Enable = Memory Down, Disable = DIMM"
- Combo $DRAM_Speed, "DRAM Speed", &DRAMSPEED,
- Help "DRAM Speed"
- Combo $DRAM_Type, "DRAM Type", &DRAMTYPE,
- Help "DRAM Type"
- Combo $Rank_En_0_0, "DIMM 0 Enable", &EN_DIS,
- Help "Please populate DIMM slot 0 if only one DIMM is supported."
- Combo $Rank_En_1_0, "DIMM 1 Enable", &EN_DIS,
- Help "DIMM 1 has to be identical to DIMM 0."
- Combo $DIMM_DWidth_0_0, "DIMM_DWidth", &DIMMDWIDTH,
- Help "DRAM device data width."
- Combo $DIMM_Density_0_0, "DIMM_Density", &DIMMDENSITY,
- Help "DRAM device data density."
- Combo $DIMM_BusWidth_0_0, "DIMM_BusWidth", &DIMMBUSWIDTH,
- Help "DIMM Bus Width."
- Combo $DIMM_Sides_0_0, "DIMM_Sides", &RANKPERDIMM,
- Help "Ranks Per DIMM. "
- EditNum $tCL, "tCL", DEC,
- Help "tCL"
- EditNum $tRP_tRCD, "tRP_tRCD", DEC,
- Help "tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc."
- EditNum $tWR, "tWR", DEC,
- Help "tWR in DRAM clk"
- EditNum $tWTR, "tWTR", DEC,
- Help "tWTR in DRAM clk"
- EditNum $tRRD, "tRRD", DEC,
- Help "tRRD in DRAM clk"
- EditNum $tRTP, "tRTP", DEC,
- Help "tRTP in DRAM clk"
- EditNum $tFAW, "tFAW", DEC,
- Help "tFAW in DRAM clk"
-EndPage
-
-Page "South Complex"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdSataMode, "Select SATA Mode", &SATA_MODE,
- Help "Select SATA boot mode. AHCI by default."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci, "Enable XHCI", &EN_DIS,
- Help "Enable/disable XHCI. If enabled, all EHCI ports will be routed to XHCI and EHCI will be disabled."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode, "eMMC Boot Mode", &EMMC_MODES,
- Help "Select EMMC Mode."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio, "Enable SDIO", &EN_DIS,
- Help "Enable/disable SDIO."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard, "Enable SD Card", &EN_DIS,
- Help "Enable/disable the SD Card."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0, "Enable HSUART0", &EN_DIS,
- Help "Enable/disable HSUART0."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1, "Enable HSUART1", &EN_DIS,
- Help "Enable/disable HSUART1."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi, "Enable SPI", &EN_DIS,
- Help "Enable/disable SPI."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan, "Enable LAN", &EN_DIS,
- Help "Enable/disable LAN."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia, "Enable Azalia", &EN_DIS_AUTO,
- Help "Enable/disable Azalia. Auto by default."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata, "Enable SATA", &EN_DIS,
- Help "Enable/disable SATA."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe, "Enable LPE", &PCI_ACPI,
- Help "Choose LPE Mode"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode, "Enable PCI mode for LPSS SIO devices", &EN_DIS,
- Help "Enable PCI Mode for LPSS SIO devices. If disabled, LPSS SIO devices will run in ACPI mode."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0, "Enable DMA0", &EN_DIS,
- Help "Enable/disable DMA0"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1, "Enable DMA1", &EN_DIS,
- Help "Enable/disable DMA1"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0, "Enable I2C0", &EN_DIS,
- Help "Enable/disable I2C0"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1, "Enable I2C1", &EN_DIS,
- Help "Enable/disable I2C1"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2, "Enable I2C2", &EN_DIS,
- Help "Enable/disable I2C2"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3, "Enable I2C3", &EN_DIS,
- Help "Enable/disable I2C3"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4, "Enable I2C4", &EN_DIS,
- Help "Enable/disable I2C4"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5, "Enable I2C5", &EN_DIS,
- Help "Enable/disable I2C5"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6, "Enable I2C6", &EN_DIS,
- Help "Enable/disable I2C6"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0, "Enable PWM0", &EN_DIS,
- Help "Enable/disable PWM0"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1, "Enable PWM1", &EN_DIS,
- Help "Enable/disable PWM1"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi, "Enable HSI", &EN_DIS,
- Help "Enable/disable HSI"
- Combo $gPlatformFspPkgTokenSpaceGuid_ISPEnable, "Enable ISP", &EN_DIS,
- Help "Enable/disable ISP."
-EndPage
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf
deleted file mode 100644
index 6992fe7..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf
+++ /dev/null
@@ -1,328 +0,0 @@
-//
-// This file contains an 'Intel Peripheral Driver' and is
-// licensed for Intel CPUs and chipsets under the terms of your
-// license agreement with Intel or your vendor. This file must not
-// be modified by end users or could render the generated boot loader
-// inoperable.
-//
-// @file
-// Boot Setting File for Platform: Bayley Bay Platform
-//
-// Copyright (c) 2010-2013 Intel Corporation. All rights reserved
-// This software and associated documentation (if any) is furnished
-// under a license and may only be used or copied in accordance
-// with the terms of the license. Except as permitted by such
-// license, no part of this software or documentation may be
-// reproduced, stored in a retrieval system, or transmitted in any
-// form or by any means without the express written consent of
-// Intel Corporation.
-//
-//
-
-
-GlobalDataDef
- SKUID = 0 $_AS_BUILT_ = 0x01 , "DEFAULT"
-EndGlobalData
-
-StructDef
-
- Find "VLV2UPDR"
- Skip 24 bytes
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize 2 bytes $_AS_BUILT_ = 0x1, 0x0 $_DEFAULT_ = 0x0001
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize 2 bytes $_AS_BUILT_ = 0x0, 0x8 $_DEFAULT_ = 0x0800
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA0
- $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0xA2
- $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdSataMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_AzaliaConfigPtr 4 bytes $_AS_BUILT_ = 0x0, 0x0, 0x0, 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdGttSize 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_ISPEnable 1 bytes $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
-
- Find "VLYVIEW1"
- $gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_AS_BUILT_ = 0x2, 0x3, 0x0, 0x0 $_DEFAULT_ = 0x00000302
- Skip 24 bytes
- $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 2
- $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 2
-
- $DIMM_MemDown 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
- $DRAM_Speed 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 2
- $DRAM_Type 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $Rank_En_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 1
- $Rank_En_1_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $DIMM_DWidth_0_0 1 byte $_AS_BUILT_ = 0x1 $_DEFAULT_ = 0
- $DIMM_Density_0_0 1 byte $_AS_BUILT_ = 0x2 $_DEFAULT_ = 1
- $DIMM_BusWidth_0_0 1 byte $_AS_BUILT_ = 0x3 $_DEFAULT_ = 3
- $DIMM_Sides_0_0 1 byte $_AS_BUILT_ = 0x0 $_DEFAULT_ = 0
- $tCL 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
- $tRP_tRCD 1 byte $_AS_BUILT_ = 0x7 $_DEFAULT_ = 9
- $tWR 1 byte $_AS_BUILT_ = 0x8 $_DEFAULT_ = 10
- $tWTR 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
- $tRRD 1 byte $_AS_BUILT_ = 0x6 $_DEFAULT_ = 4
- $tRTP 1 byte $_AS_BUILT_ = 0x4 $_DEFAULT_ = 5
- $tFAW 1 byte $_AS_BUILT_ = 0x14 $_DEFAULT_ = 20
-
-EndStruct
-
-List &DRAMSPEED
- Selection 0x0 , "800 MHz"
- Selection 0x1 , "1066 MHz"
- Selection 0x2 , "1333 MHz"
- Selection 0x3 , "1600 MHz"
-EndList
-
-List &DRAMTYPE
- Selection 0x0 , "DDR3"
- Selection 0x1 , "DDR3L"
- Selection 0x2 , "DDR3U"
- //Selection 0x3 , "LPDDR2"
- Selection 0x4 , "LPDDR2"
- Selection 0x5 , "LPDDR3"
- Selection 0x6 , "DDR4"
-EndList
-
-List &DIMMDWIDTH
- Selection 0x0 , "x8"
- Selection 0x1 , "x16"
- Selection 0x2 , "x32"
-EndList
-
-List &DIMMDENSITY
- Selection 0x0 , "1 Gbit"
- Selection 0x1 , "2 Gbit"
- Selection 0x2 , "4 Gbit"
- Selection 0x3 , "8 Gbit"
-EndList
-
-List &DIMMBUSWIDTH
- Selection 0x0 , "8 bits"
- Selection 0x1 , "16 bits"
- Selection 0x2 , "32 bits"
- Selection 0x3 , "64 bits"
-EndList
-
-List &RANKPERDIMM
- Selection 0x1 , "2 Ranks"
- Selection 0x0 , "1 Rank"
-EndList
-
-List &SATA_MODE
- Selection 0x1 , "AHCI"
- Selection 0x0 , "IDE"
-EndList
-
-List &EMMC_MODES
- Selection 0x0 , "Disabled"
- Selection 0x1 , "Auto"
- Selection 0x2 , "eMMC 4.1"
- Selection 0x3 , "eMMC 4.5"
-EndList
-
-List &EN_DIS
- Selection 0x1 , "Enabled"
- Selection 0x0 , "Disabled"
-EndList
-
-List &EN_DIS_AUTO
- Selection 0x2 , "Auto"
- Selection 0x1 , "Enabled"
- Selection 0x0 , "Disabled"
-EndList
-
-List &MMIO_SIZES
- Selection 0x400, "1.0 GB"
- Selection 0x600, "1.5 GB"
- Selection 0x800, "2.0 GB"
-EndList
-
-List &TSEG_SIZES
- Selection 0x01, "1 MB"
- Selection 0x02, "2 MB"
- Selection 0x04, "4 MB"
- Selection 0x08, "8 MB"
-EndList
-
-List &IGDPREALLOC_SIZES
- Selection 0x01, "32 MB"
- Selection 0x02, "64 MB"
- Selection 0x03, "96 MB"
- Selection 0x04, "128 MB"
- Selection 0x05, "160 MB"
- Selection 0x06, "192 MB"
- Selection 0x07, "224 MB"
- Selection 0x08, "256 MB"
- Selection 0x09, "288 MB"
- Selection 0x0A, "320 MB"
- Selection 0x0B, "352 MB"
- Selection 0x0C, "384 MB"
- Selection 0x0D, "416 MB"
- Selection 0x0E, "448 MB"
- Selection 0x0F, "480 MB"
- Selection 0x10, "512 MB"
-EndList
-
-List &APERTURE_SIZES
- Selection 0x1 , "128 MB"
- Selection 0x2 , "256 MB"
- Selection 0x3 , "512 MB"
-EndList
-
-List >T_SIZES
- Selection 0x1 , "1 MB"
- Selection 0x2 , "2 MB"
-EndList
-
-List &PCI_ACPI
- Selection 0x2 , "ACPI Mode"
- Selection 0x1 , "PCI Mode"
- Selection 0x0 , "Disabled"
-EndList
-
-List &PLATFORM_TYPE
- Selection 0x2 , "BayleyBay Platform Type"
- Selection 0x3 , "BakerSport Platform (ECC) Type"
-EndList
-
-BeginInfoBlock
- PPVer "1.0"
- Description "MinnowMax"
-
-EndInfoBlock
-
-Page "Platform"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdPlatformType, "Platform Type", &PLATFORM_TYPE,
- Help "Select Platform Type."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot, "Enable Secure Boot", &EN_DIS_AUTO,
- Help "Enable/disable secure boot. Auto by default."
-EndPage
-
-Page "North Complex"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitTsegSize, "Tseg Size", &TSEG_SIZES,
- Help "Size of memory reserved for SMRAM, in MB."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitMmioSize, "Mmio Size", &MMIO_SIZES,
- Help "Size of memory address space reserved for MMIO (Memory Mapped I/O), in GB."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdIgdDvmt50PreAlloc, "Internal Graphics Pre-allocated Memory ", &IGDPREALLOC_SIZES,
- Help "Size of memory preallocated for internal graphics"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdApertureSize, "Aperture Size", &APERTURE_SIZES,
- Help "Select the Aperture Size"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdGttSize, "GTT Size", >T_SIZES,
- Help "Select the GTT Size"
- EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr1, "DIMM 0 SPD SMBus Address", HEX,
- Help "Address of DIMM 0. 8 bits"
- EditNum $gPlatformFspPkgTokenSpaceGuid_PcdMrcInitSPDAddr2, "DIMM 1 SPD SMBus Address", HEX,
- Help "Address of DIMM 1. 8 bits"
-EndPage
-
-Page "Memory Down"
- Combo $DIMM_MemDown, "Enable Memory Down", &EN_DIS,
- Help "Enable = Memory Down, Disable = DIMM"
- Combo $DRAM_Speed, "DRAM Speed", &DRAMSPEED,
- Help "DRAM Speed"
- Combo $DRAM_Type, "DRAM Type", &DRAMTYPE,
- Help "DRAM Type"
- Combo $Rank_En_0_0, "DIMM 0 Enable", &EN_DIS,
- Help "Please populate DIMM slot 0 if only one DIMM is supported."
- Combo $Rank_En_1_0, "DIMM 1 Enable", &EN_DIS,
- Help "DIMM 1 has to be identical to DIMM 0."
- Combo $DIMM_DWidth_0_0, "DIMM_DWidth", &DIMMDWIDTH,
- Help "DRAM device data width."
- Combo $DIMM_Density_0_0, "DIMM_Density", &DIMMDENSITY,
- Help "DRAM device data density."
- Combo $DIMM_BusWidth_0_0, "DIMM_BusWidth", &DIMMBUSWIDTH,
- Help "DIMM Bus Width."
- Combo $DIMM_Sides_0_0, "DIMM_Sides", &RANKPERDIMM,
- Help "Ranks Per DIMM. "
- EditNum $tCL, "tCL", DEC,
- Help "tCL"
- EditNum $tRP_tRCD, "tRP_tRCD", DEC,
- Help "tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc."
- EditNum $tWR, "tWR", DEC,
- Help "tWR in DRAM clk"
- EditNum $tWTR, "tWTR", DEC,
- Help "tWTR in DRAM clk"
- EditNum $tRRD, "tRRD", DEC,
- Help "tRRD in DRAM clk"
- EditNum $tRTP, "tRTP", DEC,
- Help "tRTP in DRAM clk"
- EditNum $tFAW, "tFAW", DEC,
- Help "tFAW in DRAM clk"
-EndPage
-
-Page "South Complex"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdSataMode, "Select SATA Mode", &SATA_MODE,
- Help "Select SATA boot mode. AHCI by default."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableXhci, "Enable XHCI", &EN_DIS,
- Help "Enable/disable XHCI. If enabled, all EHCI ports will be routed to XHCI and EHCI will be disabled."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdeMMCBootMode, "eMMC Boot Mode", &EMMC_MODES,
- Help "Select EMMC Mode."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdio, "Enable SDIO", &EN_DIS,
- Help "Enable/disable SDIO."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSdcard, "Enable SD Card", &EN_DIS,
- Help "Enable/disable the SD Card."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart0, "Enable HSUART0", &EN_DIS,
- Help "Enable/disable HSUART0."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsuart1, "Enable HSUART1", &EN_DIS,
- Help "Enable/disable HSUART1."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSpi, "Enable SPI", &EN_DIS,
- Help "Enable/disable SPI."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLan, "Enable LAN", &EN_DIS,
- Help "Enable/disable LAN."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableAzalia, "Enable Azalia", &EN_DIS_AUTO,
- Help "Enable/disable Azalia. Auto by default."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableSata, "Enable SATA", &EN_DIS,
- Help "Enable/disable SATA."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableLpe, "Enable LPE", &PCI_ACPI,
- Help "Choose LPE Mode"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdLpssSioEnablePciMode, "Enable PCI mode for LPSS SIO devices", &EN_DIS,
- Help "Enable PCI Mode for LPSS SIO devices. If disabled, LPSS SIO devices will run in ACPI mode."
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma0, "Enable DMA0", &EN_DIS,
- Help "Enable/disable DMA0"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableDma1, "Enable DMA1", &EN_DIS,
- Help "Enable/disable DMA1"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C0, "Enable I2C0", &EN_DIS,
- Help "Enable/disable I2C0"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C1, "Enable I2C1", &EN_DIS,
- Help "Enable/disable I2C1"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C2, "Enable I2C2", &EN_DIS,
- Help "Enable/disable I2C2"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C3, "Enable I2C3", &EN_DIS,
- Help "Enable/disable I2C3"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C4, "Enable I2C4", &EN_DIS,
- Help "Enable/disable I2C4"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C5, "Enable I2C5", &EN_DIS,
- Help "Enable/disable I2C5"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableI2C6, "Enable I2C6", &EN_DIS,
- Help "Enable/disable I2C6"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm0, "Enable PWM0", &EN_DIS,
- Help "Enable/disable PWM0"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnablePwm1, "Enable PWM1", &EN_DIS,
- Help "Enable/disable PWM1"
- Combo $gPlatformFspPkgTokenSpaceGuid_PcdEnableHsi, "Enable HSI", &EN_DIS,
- Help "Enable/disable HSI"
- Combo $gPlatformFspPkgTokenSpaceGuid_ISPEnable, "Enable ISP", &EN_DIS,
- Help "Enable/disable ISP."
-EndPage
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/azalia.h b/src/vendorcode/intel/fsp1_0/baytrail/include/azalia.h
deleted file mode 100644
index c58cf4c..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/azalia.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/**@file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _AZALIA_H_
-#define _AZALIA_H_
-
-#include <stdint.h>
-
-#pragma pack(1)
-
-typedef struct {
- uint32_t VendorDeviceId;
- uint16_t SubSystemId;
- uint8_t RevisionId; /// 0xFF applies to all steppings
- uint8_t FrontPanelSupport;
- uint16_t NumberOfRearJacks;
- uint16_t NumberOfFrontJacks;
-} PCH_AZALIA_VERB_TABLE_HEADER;
-
-typedef struct {
- PCH_AZALIA_VERB_TABLE_HEADER VerbTableHeader;
- uint32_t *VerbTableData;
-} PCH_AZALIA_VERB_TABLE;
-
-typedef struct {
- uint8_t Pme : 1; /// 0: Disable; 1: Enable
- uint8_t DS : 1; /// 0: Docking is not supported; 1:Docking is supported
- uint8_t DA : 1; /// 0: Docking is not attached; 1:Docking is attached
- uint8_t HdmiCodec : 1; /// 0: Disable; 1: Enable
- uint8_t AzaliaVCi : 1; /// 0: Disable; 1: Enable
- uint8_t Rsvdbits : 3;
- uint8_t AzaliaVerbTableNum; /// Number of verb tables provided by platform
- PCH_AZALIA_VERB_TABLE *AzaliaVerbTable; /// Pointer to the actual verb table(s)
- uint16_t ResetWaitTimer; /// The delay timer after Azalia reset, the value is number of microseconds
-} PCH_AZALIA_CONFIG;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h
deleted file mode 100644
index f2e1d8f..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/** \file fsp.h
- *
- *
- */
-#include <stdint.h>
-#include "fsptypes.h"
-#include "fspfv.h"
-#include "fspffs.h"
-#include "fsphob.h"
-#include "fspapi.h"
-#include "fspplatform.h"
-#include "fspinfoheader.h"
-#include "fspvpd.h"
-
-#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \
-{ 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
-#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
-{ 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0xb, 0x7b, 0xa9, 0xe4, 0xb0 } }
-#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \
-{ 0xd038747c, 0xd00c, 0x4980, { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } }
-#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \
-{ 0x9c7c3aa7, 0x5332, 0x4917, { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } }
-#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
-{ 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
-
-//
-// 0x21 - 0xf..f are reserved.
-//
-#define BOOT_WITH_FULL_CONFIGURATION 0x00
-#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01
-#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02
-#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03
-#define BOOT_WITH_DEFAULT_SETTINGS 0x04
-#define BOOT_ON_S4_RESUME 0x05
-#define BOOT_ON_S5_RESUME 0x06
-#define BOOT_ON_S2_RESUME 0x10
-#define BOOT_ON_S3_RESUME 0x11
-#define BOOT_ON_FLASH_UPDATE 0x12
-#define BOOT_IN_RECOVERY_MODE 0x20
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fspapi.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspapi.h
deleted file mode 100644
index 26afc0e..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fspapi.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_API_H_
-#define _FSP_API_H_
-
-#pragma pack(1)
-
-typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
-
-typedef struct {
- VOID *NvsBufferPtr;
- VOID *RtBufferPtr;
- CONTINUATION_PROC ContinuationFunc;
-} FSP_INIT_PARAMS;
-
-typedef struct {
- UINT32 *StackTop;
- UINT32 BootMode;
- VOID *UpdDataRgnPtr;
- UINT32 Reserved[7];
-} FSP_INIT_RT_COMMON_BUFFER;
-
-typedef enum {
- EnumInitPhaseAfterPciEnumeration = 0x20,
- EnumInitPhaseReadyToBoot = 0x40
-} FSP_INIT_PHASE;
-
-typedef struct {
- FSP_INIT_PHASE Phase;
-} NOTIFY_PHASE_PARAMS;
-
-#pragma pack()
-
-typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
-typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fspffs.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspffs.h
deleted file mode 100644
index f3b83b2..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fspffs.h
+++ /dev/null
@@ -1,506 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-
-#ifndef __PI_FIRMWARE_FILE_H__
-#define __PI_FIRMWARE_FILE_H__
-
-#pragma pack(1)
-///
-/// Used to verify the integrity of the file.
-///
-typedef union {
- struct {
- ///
- /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
- /// header. The State and IntegrityCheck.Checksum.File fields are assumed
- /// to be zero and the checksum is calculated such that the entire header sums to zero.
- ///
- UINT8 Header;
- ///
- /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
- /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
- /// checksum of the file data.
- /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
- /// the IntegrityCheck.Checksum.File field must be initialized with a value of
- /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
- /// EFI_FILE_DATA_VALID bit is set in the State field.
- ///
- UINT8 File;
- } Checksum;
- ///
- /// This is the full 16 bits of the IntegrityCheck field.
- ///
- UINT16 Checksum16;
-} EFI_FFS_INTEGRITY_CHECK;
-
-///
-/// FFS_FIXED_CHECKSUM is the checksum value used when the
-/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
-///
-#define FFS_FIXED_CHECKSUM 0xAA
-
-typedef UINT8 EFI_FV_FILETYPE;
-typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
-typedef UINT8 EFI_FFS_FILE_STATE;
-
-///
-/// File Types Definitions
-///
-#define EFI_FV_FILETYPE_ALL 0x00
-#define EFI_FV_FILETYPE_RAW 0x01
-#define EFI_FV_FILETYPE_FREEFORM 0x02
-#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
-#define EFI_FV_FILETYPE_PEI_CORE 0x04
-#define EFI_FV_FILETYPE_DXE_CORE 0x05
-#define EFI_FV_FILETYPE_PEIM 0x06
-#define EFI_FV_FILETYPE_DRIVER 0x07
-#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
-#define EFI_FV_FILETYPE_APPLICATION 0x09
-#define EFI_FV_FILETYPE_SMM 0x0A
-#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
-#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
-#define EFI_FV_FILETYPE_SMM_CORE 0x0D
-#define EFI_FV_FILETYPE_OEM_MIN 0xc0
-#define EFI_FV_FILETYPE_OEM_MAX 0xdf
-#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
-#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
-#define EFI_FV_FILETYPE_FFS_MIN 0xf0
-#define EFI_FV_FILETYPE_FFS_MAX 0xff
-#define EFI_FV_FILETYPE_FFS_PAD 0xf0
-///
-/// FFS File Attributes.
-///
-#define FFS_ATTRIB_LARGE_FILE 0x01
-#define FFS_ATTRIB_FIXED 0x04
-#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
-#define FFS_ATTRIB_CHECKSUM 0x40
-
-///
-/// FFS File State Bits.
-///
-#define EFI_FILE_HEADER_CONSTRUCTION 0x01
-#define EFI_FILE_HEADER_VALID 0x02
-#define EFI_FILE_DATA_VALID 0x04
-#define EFI_FILE_MARKED_FOR_UPDATE 0x08
-#define EFI_FILE_DELETED 0x10
-#define EFI_FILE_HEADER_INVALID 0x20
-
-
-///
-/// Each file begins with the header that describe the
-/// contents and state of the files.
-///
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file.
- ///
- EFI_GUID Name;
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
- ///
- /// The length of the file in bytes, including the FFS header.
- ///
- UINT8 Size[3];
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-} EFI_FFS_FILE_HEADER;
-
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file. There may be only
- /// one instance of a file with the file name GUID of Name in any given firmware
- /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
- ///
- EFI_GUID Name;
-
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
-
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
-
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
-
- ///
- /// The length of the file in bytes, including the FFS header.
- /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
- /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
- /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
- /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
- ///
- UINT8 Size[3];
-
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-
- ///
- /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
- /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
- ///
- UINT32 ExtendedSize;
-} EFI_FFS_FILE_HEADER2;
-
-#define IS_FFS_FILE2(FfsFileHeaderPtr) \
- (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
-
-#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
-
-#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
- (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
-
-typedef UINT8 EFI_SECTION_TYPE;
-
-///
-/// Pseudo type. It is used as a wild card when retrieving sections.
-/// The section type EFI_SECTION_ALL matches all section types.
-///
-#define EFI_SECTION_ALL 0x00
-
-///
-/// Encapsulation section Type values.
-///
-#define EFI_SECTION_COMPRESSION 0x01
-
-#define EFI_SECTION_GUID_DEFINED 0x02
-
-#define EFI_SECTION_DISPOSABLE 0x03
-
-///
-/// Leaf section Type values.
-///
-#define EFI_SECTION_PE32 0x10
-#define EFI_SECTION_PIC 0x11
-#define EFI_SECTION_TE 0x12
-#define EFI_SECTION_DXE_DEPEX 0x13
-#define EFI_SECTION_VERSION 0x14
-#define EFI_SECTION_USER_INTERFACE 0x15
-#define EFI_SECTION_COMPATIBILITY16 0x16
-#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
-#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
-#define EFI_SECTION_RAW 0x19
-#define EFI_SECTION_PEI_DEPEX 0x1B
-#define EFI_SECTION_SMM_DEPEX 0x1C
-
-///
-/// Common section header.
-///
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
- EFI_SECTION_TYPE Type;
- ///
- /// Declares the section type.
- ///
-} EFI_COMMON_SECTION_HEADER;
-
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
-
- EFI_SECTION_TYPE Type;
-
- ///
- /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
- /// Size is not equal to 0xFFFFFF, then this field does not exist.
- ///
- UINT32 ExtendedSize;
-} EFI_COMMON_SECTION_HEADER2;
-
-///
-/// Leaf section type that contains an
-/// IA-32 16-bit executable image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
-
-///
-/// CompressionType of EFI_COMPRESSION_SECTION.
-///
-#define EFI_NOT_COMPRESSED 0x00
-#define EFI_STANDARD_COMPRESSION 0x01
-///
-/// An encapsulation section type in which the
-/// section data is compressed.
-///
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION;
-
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION2;
-
-///
-/// An encapsulation section type in which the section data is disposable.
-/// A disposable section is an encapsulation section in which the section data may be disposed of during
-/// the process of creating or updating a firmware image without significant impact on the usefulness of
-/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
-/// allows optional or descriptive data to be included with the firmware file which can be removed in
-/// order to conserve space. The contents of this section are implementation specific, but might contain
-/// debug data or detailed integration instructions.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
-
-///
-/// The leaf section which could be used to determine the dispatch order of DXEs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a PI FV.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
-
-///
-/// The leaf section which contains a single GUID.
-///
-typedef struct {
- ///
- /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
-
-///
-/// Attributes of EFI_GUID_DEFINED_SECTION.
-///
-#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
-#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
-///
-/// The leaf section which is encapsulation defined by specific GUID.
-///
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION2;
-
-///
-/// The leaf section which contains PE32+ image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
-
-///
-/// The leaf section used to determine the dispatch order of PEIMs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
-
-///
-/// A leaf section type that contains a position-independent-code (PIC) image.
-/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
-/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
-/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
-/// relocation information has been stripped from the image and the image can be moved and will
-/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
-/// be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
-
-///
-/// The leaf section which constains the position-independent-code image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
-
-///
-/// The leaf section which contains an array of zero or more bytes.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
-
-///
-/// The SMM dependency expression section is a leaf section that contains a dependency expression that
-/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
-/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
-/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
-/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
-/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a unicode string that
-/// is human readable file name.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION2;
-
-///
-/// The leaf section which contains a numeric build number and
-/// an optional unicode string that represents the file revision.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
- UINT16 BuildNumber;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// A UINT16 that represents a particular build. Subsequent builds have monotonically
- /// increasing build numbers relative to earlier builds.
- ///
- UINT16 BuildNumber;
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION2;
-
-#define IS_SECTION2(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
-
-#define SECTION_SIZE(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
-
-#define SECTION2_SIZE(SectionHeaderPtr) \
- (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fspfv.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspfv.h
deleted file mode 100644
index 26c00f2..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fspfv.h
+++ /dev/null
@@ -1,247 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_FIRMWAREVOLUME_H__
-#define __PI_FIRMWAREVOLUME_H__
-
-///
-/// EFI_FV_FILE_ATTRIBUTES
-///
-typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
-
-//
-// Value of EFI_FV_FILE_ATTRIBUTES.
-//
-#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
-#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
-#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
-
-///
-/// type of EFI FVB attribute
-///
-typedef UINT32 EFI_FVB_ATTRIBUTES_2;
-
-//
-// Attributes bit definitions
-//
-#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
-#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
-#define EFI_FVB2_READ_STATUS 0x00000004
-#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
-#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
-#define EFI_FVB2_WRITE_STATUS 0x00000020
-#define EFI_FVB2_LOCK_CAP 0x00000040
-#define EFI_FVB2_LOCK_STATUS 0x00000080
-#define EFI_FVB2_STICKY_WRITE 0x00000200
-#define EFI_FVB2_MEMORY_MAPPED 0x00000400
-#define EFI_FVB2_ERASE_POLARITY 0x00000800
-#define EFI_FVB2_READ_LOCK_CAP 0x00001000
-#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
-#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
-#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
-#define EFI_FVB2_ALIGNMENT 0x001F0000
-#define EFI_FVB2_ALIGNMENT_1 0x00000000
-#define EFI_FVB2_ALIGNMENT_2 0x00010000
-#define EFI_FVB2_ALIGNMENT_4 0x00020000
-#define EFI_FVB2_ALIGNMENT_8 0x00030000
-#define EFI_FVB2_ALIGNMENT_16 0x00040000
-#define EFI_FVB2_ALIGNMENT_32 0x00050000
-#define EFI_FVB2_ALIGNMENT_64 0x00060000
-#define EFI_FVB2_ALIGNMENT_128 0x00070000
-#define EFI_FVB2_ALIGNMENT_256 0x00080000
-#define EFI_FVB2_ALIGNMENT_512 0x00090000
-#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
-#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
-#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
-#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
-#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
-#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
-#define EFI_FVB2_ALIGNMENT_64K 0x00100000
-#define EFI_FVB2_ALIGNMENT_128K 0x00110000
-#define EFI_FVB2_ALIGNMENT_256K 0x00120000
-#define EFI_FVB2_ALIGNMENT_512K 0x00130000
-#define EFI_FVB2_ALIGNMENT_1M 0x00140000
-#define EFI_FVB2_ALIGNMENT_2M 0x00150000
-#define EFI_FVB2_ALIGNMENT_4M 0x00160000
-#define EFI_FVB2_ALIGNMENT_8M 0x00170000
-#define EFI_FVB2_ALIGNMENT_16M 0x00180000
-#define EFI_FVB2_ALIGNMENT_32M 0x00190000
-#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
-#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
-#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
-#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
-#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
-#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
-
-
-typedef struct {
- ///
- /// The number of sequential blocks which are of the same size.
- ///
- UINT32 NumBlocks;
- ///
- /// The size of the blocks.
- ///
- UINT32 Length;
-} EFI_FV_BLOCK_MAP_ENTRY;
-
-///
-/// Describes the features and layout of the firmware volume.
-///
-typedef struct {
- ///
- /// The first 16 bytes are reserved to allow for the reset vector of
- /// processors whose reset vector is at address 0.
- ///
- UINT8 ZeroVector[16];
- ///
- /// Declares the file system with which the firmware volume is formatted.
- ///
- EFI_GUID FileSystemGuid;
- ///
- /// Length in bytes of the complete firmware volume, including the header.
- ///
- UINT64 FvLength;
- ///
- /// Set to EFI_FVH_SIGNATURE
- ///
- UINT32 Signature;
- ///
- /// Declares capabilities and power-on defaults for the firmware volume.
- ///
- EFI_FVB_ATTRIBUTES_2 Attributes;
- ///
- /// Length in bytes of the complete firmware volume header.
- ///
- UINT16 HeaderLength;
- ///
- /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
- ///
- UINT16 Checksum;
- ///
- /// Offset, relative to the start of the header, of the extended header
- /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
- ///
- UINT16 ExtHeaderOffset;
- ///
- /// This field must always be set to zero.
- ///
- UINT8 Reserved[1];
- ///
- /// Set to 2. Future versions of this specification may define new header fields and will
- /// increment the Revision field accordingly.
- ///
- UINT8 Revision;
- ///
- /// An array of run-length encoded FvBlockMapEntry structures. The array is
- /// terminated with an entry of {0,0}.
- ///
- EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
-} EFI_FIRMWARE_VOLUME_HEADER;
-
-#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
-
-///
-/// Firmware Volume Header Revision definition
-///
-#define EFI_FVH_REVISION 0x02
-
-///
-/// Extension header pointed by ExtHeaderOffset of volume header.
-///
-typedef struct {
- ///
- /// Firmware volume name.
- ///
- EFI_GUID FvName;
- ///
- /// Size of the rest of the extension header, including this structure.
- ///
- UINT32 ExtHeaderSize;
-} EFI_FIRMWARE_VOLUME_EXT_HEADER;
-
-///
-/// Entry struture for describing FV extension header
-///
-typedef struct {
- ///
- /// Size of this header extension.
- ///
- UINT16 ExtEntrySize;
- ///
- /// Type of the header.
- ///
- UINT16 ExtEntryType;
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
-
-#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
-///
-/// This extension header provides a mapping between a GUID and an OEM file type.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
- /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
- ///
- UINT32 TypeMask;
- ///
- /// An array of GUIDs, each GUID representing an OEM file type.
- ///
- /// EFI_GUID Types[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
-
-#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
-
-///
-/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
-/// GUID FormatType type which includes a length and a successive series of data bytes.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// Vendor-specific GUID.
- ///
- EFI_GUID FormatType;
- ///
- /// An arry of bytes of length Length.
- ///
- /// UINT8 Data[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fsphob.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsphob.h
deleted file mode 100644
index 7edef0d..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fsphob.h
+++ /dev/null
@@ -1,542 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_HOB_H__
-#define __PI_HOB_H__
-
-//
-// HobType of EFI_HOB_GENERIC_HEADER.
-//
-#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
-#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
-#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
-#define EFI_HOB_TYPE_UNUSED 0xFFFE
-#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
-
-///
-/// Describes the format and size of the data inside the HOB.
-/// All HOBs must contain this generic HOB header.
-///
-typedef struct {
- ///
- /// Identifies the HOB data structure type.
- ///
- UINT16 HobType;
- ///
- /// The length in bytes of the HOB.
- ///
- UINT16 HobLength;
- ///
- /// This field must always be set to zero.
- ///
- UINT32 Reserved;
-} EFI_HOB_GENERIC_HEADER;
-
-///
-/// Enumeration of memory types introduced in UEFI.
-///
-typedef enum {
- ///
- /// Not used.
- ///
- EfiReservedMemoryType,
- ///
- /// The code portions of a loaded application.
- /// (Note that UEFI OS loaders are UEFI applications.)
- ///
- EfiLoaderCode,
- ///
- /// The data portions of a loaded application and the default data allocation
- /// type used by an application to allocate pool memory.
- ///
- EfiLoaderData,
- ///
- /// The code portions of a loaded Boot Services Driver.
- ///
- EfiBootServicesCode,
- ///
- /// The data portions of a loaded Boot Serves Driver, and the default data
- /// allocation type used by a Boot Services Driver to allocate pool memory.
- ///
- EfiBootServicesData,
- ///
- /// The code portions of a loaded Runtime Services Driver.
- ///
- EfiRuntimeServicesCode,
- ///
- /// The data portions of a loaded Runtime Services Driver and the default
- /// data allocation type used by a Runtime Services Driver to allocate pool memory.
- ///
- EfiRuntimeServicesData,
- ///
- /// Free (unallocated) memory.
- ///
- EfiConventionalMemory,
- ///
- /// Memory in which errors have been detected.
- ///
- EfiUnusableMemory,
- ///
- /// Memory that holds the ACPI tables.
- ///
- EfiACPIReclaimMemory,
- ///
- /// Address space reserved for use by the firmware.
- ///
- EfiACPIMemoryNVS,
- ///
- /// Used by system firmware to request that a memory-mapped IO region
- /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
- ///
- EfiMemoryMappedIO,
- ///
- /// System memory-mapped IO region that is used to translate memory
- /// cycles to IO cycles by the processor.
- ///
- EfiMemoryMappedIOPortSpace,
- ///
- /// Address space reserved by the firmware for code that is part of the processor.
- ///
- EfiPalCode,
- EfiMaxMemoryType
-} EFI_MEMORY_TYPE;
-
-///
-/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
-/// various attributes of the logical memory allocation. The type field will be used for
-/// subsequent inclusion in the UEFI memory map.
-///
-typedef struct {
- ///
- /// A GUID that defines the memory allocation region's type and purpose, as well as
- /// other fields within the memory allocation HOB. This GUID is used to define the
- /// additional data within the HOB that may be present for the memory allocation HOB.
- /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
- /// specification.
- ///
- EFI_GUID Name;
-
- ///
- /// The base address of memory allocated by this HOB. Type
- /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
- /// specification.
- ///
- EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
-
- ///
- /// The length in bytes of memory allocated by this HOB.
- ///
- UINT64 MemoryLength;
-
- ///
- /// Defines the type of memory allocated by this HOB. The memory type definition
- /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
- /// in AllocatePages() in the UEFI 2.0 specification.
- ///
- EFI_MEMORY_TYPE MemoryType;
-
- ///
- /// Padding for Itanium processor family
- ///
- UINT8 Reserved[4];
-} EFI_HOB_MEMORY_ALLOCATION_HEADER;
-
-///
-/// Describes all memory ranges used during the HOB producer
-/// phase that exist outside the HOB list. This HOB type
-/// describes how memory is used, not the physical attributes of memory.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
- /// various attributes of the logical memory allocation.
- ///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
- //
- // Additional data pertaining to the "Name" Guid memory
- // may go here.
- //
-} EFI_HOB_MEMORY_ALLOCATION;
-
-///
-/// The resource type.
-///
-typedef UINT32 EFI_RESOURCE_TYPE;
-
-//
-// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
-//
-#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
-#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
-#define EFI_RESOURCE_IO 0x00000002
-#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
-#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
-#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
-#define EFI_RESOURCE_IO_RESERVED 0x00000006
-#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
-
-///
-/// A type of recount attribute type.
-///
-typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
-
-//
-// These types can be ORed together as needed.
-//
-// The first three enumerations describe settings
-//
-#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
-#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
-#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
-//
-// The rest of the settings describe capabilities
-//
-#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
-#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
-#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
-#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
-#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
-
-///
-/// Describes the resource properties of all fixed,
-/// nonrelocatable resource ranges found on the processor
-/// host bus during the HOB producer phase.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID representing the owner of the resource. This GUID is used by HOB
- /// consumer phase components to correlate device ownership of a resource.
- ///
- EFI_GUID Owner;
- ///
- /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
- ///
- EFI_RESOURCE_TYPE ResourceType;
- ///
- /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
- ///
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
- ///
- /// The physical start address of the resource region.
- ///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
- ///
- /// The number of bytes of the resource region.
- ///
- UINT64 ResourceLength;
-} EFI_HOB_RESOURCE_DESCRIPTOR;
-
-///
-/// Allows writers of executable content in the HOB producer phase to
-/// maintain and manage HOBs with specific GUID.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID that defines the contents of this HOB.
- ///
- EFI_GUID Name;
- //
- // Guid specific data goes here
- //
-} EFI_HOB_GUID_TYPE;
-
-///
-/// Union of all the possible HOB Types.
-///
-typedef union {
- EFI_HOB_GENERIC_HEADER *Header;
- EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
- EFI_HOB_GUID_TYPE *Guid;
- UINT8 *Raw;
-} EFI_PEI_HOB_POINTERS;
-
-
-/**
- Returns the type of a HOB.
-
- This macro returns the HobType field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobType.
-
-**/
-#define GET_HOB_TYPE(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
-
-/**
- Returns the length, in bytes, of a HOB.
-
- This macro returns the HobLength field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobLength.
-
-**/
-#define GET_HOB_LENGTH(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
-
-/**
- Returns a pointer to the next HOB in the HOB list.
-
- This macro returns a pointer to HOB that follows the
- HOB specified by HobStart in the HOB List.
-
- @param HobStart A pointer to a HOB.
-
- @return A pointer to the next HOB in the HOB list.
-
-**/
-#define GET_NEXT_HOB(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
-
-/**
- Determines if a HOB is the last HOB in the HOB list.
-
- This macro determine if the HOB specified by HobStart is the
- last HOB in the HOB list. If HobStart is last HOB in the HOB list,
- then TRUE is returned. Otherwise, FALSE is returned.
-
- @param HobStart A pointer to a HOB.
-
- @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
- @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
-
-**/
-#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
-
-/**
- Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns a pointer to the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return A pointer to the data buffer in a HOB.
-
-**/
-#define GET_GUID_HOB_DATA(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return The size of the data buffer.
-**/
-#define GET_GUID_HOB_DATA_SIZE(HobStart) \
- (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the pointer to the HOB list.
-
- This function returns the pointer to first HOB in the list.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @return The pointer to the HOB list.
-
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- );
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-
- This function searches the first instance of a HOB type from the starting HOB pointer.
- If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If HobStart is NULL, then ASSERT().
-
- @param Type The HOB type to return.
- @param HobStart The starting HOB pointer to search from.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-
- This function searches the first instance of a HOB type among the whole HOB list.
- If there does not exist such HOB type in the HOB list, it will return NULL.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @param Type The HOB type to return.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- );
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-
- This function searches the first instance of a HOB from the starting HOB pointer.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If Guid is NULL, then ASSERT().
- If HobStart is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
- @param HobStart A pointer to a Guid.
-
- @return The next instance of the matched GUID HOB from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-
- This function searches the first instance of a HOB among the whole HOB list.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
-
- If the pointer to the HOB list is NULL, then ASSERT().
- If Guid is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
-
- @return The first instance of the matched GUID HOB among the whole HOB list.
-
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- );
-
-/**
- Compares two GUIDs.
-
- This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
- If there are any bit differences in the two GUIDs, then FALSE is returned.
-
- If Guid1 is NULL, then ASSERT().
- If Guid2 is NULL, then ASSERT().
-
- @param Guid1 A pointer to a 128 bit GUID.
- @param Guid2 A pointer to a 128 bit GUID.
-
- @retval TRUE Guid1 and Guid2 are identical.
- @retval FALSE Guid1 and Guid2 are not identical.
-
-**/
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- );
-
-/**
- Reads a 64-bit value from memory that may be unaligned.
-
- This function returns the 64-bit value pointed to by Buffer. The function
- guarantees that the read operation does not produce an alignment fault.
-
- If the Buffer is NULL, then ASSERT().
-
- @param Buffer Pointer to a 64-bit value that may be unaligned.
-
- @return The 64-bit value read from Buffer.
-
-**/
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- );
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspinfoheader.h
deleted file mode 100644
index b277bcd..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fspinfoheader.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_INFO_HEADER_H_
-#define _FSP_INFO_HEADER_H_
-
-#pragma pack(1)
-
-typedef struct {
-
- UINT32 Signature; // Off 0x94
- UINT32 HeaderLength;
- UINT8 Reserved1[3];
- UINT8 HeaderRevision;
- UINT32 ImageRevision;
-
- CHAR8 ImageId[8]; // Off 0xA4
- UINT32 ImageSize;
- UINT32 ImageBase;
-
- UINT32 ImageAttribute; // Off 0xB4
- UINT32 CfgRegionOffset;
- UINT32 CfgRegionSize;
- UINT32 ApiEntryNum;
-
- UINT32 NemInitEntry; // Off 0xC4
- UINT32 FspInitEntry;
- UINT32 NotifyPhaseEntry;
- UINT32 Reserved2;
-
-} FSP_INFO_HEADER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspplatform.h
deleted file mode 100644
index 81f7b66..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fspplatform.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_PLATFORM_H_
-#define _FSP_PLATFORM_H_
-
-#include "fsptypes.h"
-#include "fspapi.h"
-#include "azalia.h"
-
-#pragma pack(1)
-
-typedef struct {
- FSP_INIT_RT_COMMON_BUFFER Common;
-} FSP_INIT_RT_BUFFER;
-
-#pragma pack()
-
-//
-// Function prototypes for board_fsp.c
-//
-void
-GetFspReservedMemoryFromGuid (
- uint32_t *FspMemoryBase,
- uint32_t *FspMemoryLength,
- EFI_GUID FspReservedMemoryGuid
- );
-
-void
-GetFspNVStorageMemory (
- void **FspNVStorageHob,
- uint16_t *DataSize
- );
-
-void
-GetTempRamStack (
- void **TempRamStackPtr,
- uint16_t *DataSize
- );
-
-void
-GetHighMemorySize (
- uint64_t *HighMemoryLength
- );
-
-void
-GetLowMemorySize (
- uint32_t *LowMemoryLength
- );
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsptypes.h
deleted file mode 100644
index 4a313ad..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fsptypes.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/** \file fsptypes.h
- *
- *
- */
-
-#ifndef __FSP_TYPES_H__
-#define __FSP_TYPES_H__
-
-///
-/// 8-byte unsigned value.
-///
-typedef unsigned long long UINT64;
-///
-/// 8-byte signed value.
-///
-typedef long long INT64;
-///
-/// 4-byte unsigned value.
-///
-typedef unsigned int UINT32;
-///
-/// 4-byte signed value.
-///
-typedef int INT32;
-///
-/// 2-byte unsigned value.
-///
-typedef unsigned short UINT16;
-///
-/// 2-byte Character. Unless otherwise specified all strings are stored in the
-/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
-///
-typedef unsigned short CHAR16;
-///
-/// 2-byte signed value.
-///
-typedef short INT16;
-///
-/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
-/// values are undefined.
-///
-typedef unsigned char BOOLEAN;
-///
-/// 1-byte unsigned value.
-///
-typedef unsigned char UINT8;
-///
-/// 1-byte Character
-///
-typedef char CHAR8;
-///
-/// 1-byte signed value
-///
-typedef char INT8;
-
-typedef void VOID;
-
-typedef UINT64 EFI_PHYSICAL_ADDRESS;
-
-typedef struct {
- UINT32 Data1;
- UINT16 Data2;
- UINT16 Data3;
- UINT8 Data4[8];
-} EFI_GUID;
-
-#define CONST const
-#define STATIC static
-
-#define TRUE ((BOOLEAN)(1==1))
-#define FALSE ((BOOLEAN)(0==1))
-
-#define FSPAPI __attribute__((cdecl))
-#define EFIAPI __attribute__((cdecl))
-
-#define ASSERT(Expression) \
- do { \
- if (!(Expression)) { \
- for (;;); \
- } \
- } while (FALSE)
-
-typedef UINT32 FSP_STATUS;
-typedef UINT32 EFI_STATUS;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
deleted file mode 100644
index 4bdcb79..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/**
-
-Copyright (C) 2013-2015 Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSPVPD_H__
-#define __FSPVPD_H__
-
-#pragma pack(1)
-
-typedef struct {
- UINT8 EnableMemoryDown;
- UINT8 DRAMSpeed; /* DRAM Speed */
- UINT8 DRAMType; /* DRAM Type */
- UINT8 DIMM0Enable; /* DIMM 0 Enable */
- UINT8 DIMM1Enable; /* DIMM 1 Enable */
- UINT8 DIMMDWidth; /* DRAM device data width */
- UINT8 DIMMDensity; /* DRAM device data density */
- UINT8 DIMMBusWidth; /* DIMM Bus Width */
- UINT8 DIMMSides; /* Ranks Per DIMM */
- UINT8 DIMMtCL; /* tCL */
- UINT8 DIMMtRPtRCD; /* tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc. */
- UINT8 DIMMtWR; /* tWR in DRAM clk */
- UINT8 DIMMtWTR; /* tWTR in DRAM clk */
- UINT8 DIMMtRRD; /* tRRD in DRAM clk */
- UINT8 DIMMtRTP; /* tRTP in DRAM clk */
- UINT8 DIMMtFAW; /* tFAW in DRAM clk */
-} MEMORY_DOWN_DATA;
-
-
-typedef struct _UPD_DATA_REGION {
- UINT64 Signature; /* Offset 0x0000 */
- UINT32 RESERVED1; /* Offset 0x0008 */
- UINT8 Padding0[20]; /* Offset 0x000C */
- UINT16 PcdMrcInitTsegSize; /* Offset 0x0020 */
- UINT16 PcdMrcInitMmioSize; /* Offset 0x0022 */
- UINT8 PcdMrcInitSPDAddr1; /* Offset 0x0024 */
- UINT8 PcdMrcInitSPDAddr2; /* Offset 0x0025 */
- UINT8 PcdeMMCBootMode; /* Offset 0x0026 */
- UINT8 PcdEnableSdio; /* Offset 0x0027 */
- UINT8 PcdEnableSdcard; /* Offset 0x0028 */
- UINT8 PcdEnableHsuart0; /* Offset 0x0029 */
- UINT8 PcdEnableHsuart1; /* Offset 0x002A */
- UINT8 PcdEnableSpi; /* Offset 0x002B */
- UINT8 ReservedUpdSpace1; /* Offset 0x002C */
- UINT8 PcdEnableSata; /* Offset 0x002D */
- UINT8 PcdSataMode; /* Offset 0x002E */
- UINT8 PcdEnableAzalia; /* Offset 0x002F */
- UINT32 AzaliaConfigPtr; /* Offset 0x0030 */
- UINT8 PcdEnableXhci; /* Offset 0x0034 */
- UINT8 PcdEnableLpe; /* Offset 0x0035 */
- UINT8 PcdLpssSioEnablePciMode; /* Offset 0x0036 */
- UINT8 PcdEnableDma0; /* Offset 0x0037 */
- UINT8 PcdEnableDma1; /* Offset 0x0038 */
- UINT8 PcdEnableI2C0; /* Offset 0x0039 */
- UINT8 PcdEnableI2C1; /* Offset 0x003A */
- UINT8 PcdEnableI2C2; /* Offset 0x003B */
- UINT8 PcdEnableI2C3; /* Offset 0x003C */
- UINT8 PcdEnableI2C4; /* Offset 0x003D */
- UINT8 PcdEnableI2C5; /* Offset 0x003E */
- UINT8 PcdEnableI2C6; /* Offset 0x003F */
- UINT8 PcdEnablePwm0; /* Offset 0x0040 */
- UINT8 PcdEnablePwm1; /* Offset 0x0041 */
- UINT8 PcdEnableHsi; /* Offset 0x0042 */
- UINT8 PcdIgdDvmt50PreAlloc; /* Offset 0x0043 */
- UINT8 PcdApertureSize; /* Offset 0x0044 */
- UINT8 PcdGttSize; /* Offset 0x0045 */
- UINT32 SerialDebugPortAddress; /* Offset 0x0046 */
- UINT8 SerialDebugPortType; /* Offset 0x004A */
- UINT8 PcdMrcDebugMsg; /* Offset 0x004B */
- UINT8 ISPEnable; /* Offset 0x004C */
- UINT8 PcdSccEnablePciMode; /* Offset 0x004D */
- UINT8 IgdRenderStandby; /* Offset 0x004E */
- UINT8 TxeUmaEnable; /* Offset 0x004F */
- UINT8 PcdOsSelection; /* Offset 0x0050 */
- UINT8 PcdEMMC45DDR50Enabled; /* Offset 0x0051 */
- UINT8 PcdEMMC45HS200Enabled; /* Offset 0x0052 */
- UINT8 PcdEMMC45RetuneTimerValue; /* Offset 0x0053 */
- UINT8 PcdEnableIgd; /* Offset 0x0054 */
- UINT8 AutoSelfRefreshEnable; /* Offset 0x0055 */
- UINT16 APTaskTimeoutCnt; /* Offset 0x0056 */
- UINT8 UnusedUpdSpace1[152]; /* Offset 0x0058 */
- MEMORY_DOWN_DATA PcdMemoryParameters; /* Offset 0x00F0 */
- UINT16 PcdRegionTerminator; /* Offset 0x0100 */
-} UPD_DATA_REGION;
-
-
-typedef struct _VPD_DATA_REGION {
- UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
- UINT32 PcdImageRevision; /* Offset 0x0008 */
- UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
- UINT8 Padding0[16]; /* Offset 0x0010 */
- UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
- UINT8 PcdPlatformType; /* Offset 0x0024 */
- UINT8 PcdEnableSecureBoot; /* Offset 0x0025 */
- UINT8 PcdMemoryParameters[16]; /* Offset 0x0026 */
-} VPD_DATA_REGION;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/srx/board_fsp.c b/src/vendorcode/intel/fsp1_0/baytrail/srx/board_fsp.c
deleted file mode 100644
index 2cb3492..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/srx/board_fsp.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/***********************************************************************
- *
- * board_fsp.c
- *
- * Parse HOB to get system data.
- *
- **********************************************************************/
-#include "fsp.h"
-
-void
-GetLowMemorySize (
- uint32_t *LowMemoryLength
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- *LowMemoryLength = 0x100000;
-
- //
- // Get the HOB list for processing
- //
- Hob.Raw = GetHobList();
-
- //
- // Collect memory ranges
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
- //
- // Need memory above 1MB to be collected here
- //
- if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000 &&
- Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
- *LowMemoryLength += (uint32_t) (Hob.ResourceDescriptor->ResourceLength);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return;
-}
-
-void
-GetHighMemorySize (
- uint64_t *HighMemoryLength
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- *HighMemoryLength = 0x0;
-
- //
- // Get the HOB list for processing
- //
- Hob.Raw = GetHobList();
-
- //
- // Collect memory ranges
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
- //
- // Need memory above 4GB to be collected here
- //
- if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS) 0x100000000) {
- *HighMemoryLength += (uint64_t) (Hob.ResourceDescriptor->ResourceLength);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return;
-}
-
-void
-GetFspReservedMemoryFromGuid (
- uint32_t *FspMemoryBase,
- uint32_t *FspMemoryLength,
- EFI_GUID FspReservedMemoryGuid
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- //
- // Get the HOB list for processing
- //
- Hob.Raw = GetHobList();
- *FspMemoryBase = 0;
- *FspMemoryLength = 0;
-
- //
- // Collect memory ranges
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) {
- if (CompareGuid(&Hob.ResourceDescriptor->Owner, &FspReservedMemoryGuid)) {
- *FspMemoryBase = (uint32_t) (Hob.ResourceDescriptor->PhysicalStart);
- *FspMemoryLength = (uint32_t) (Hob.ResourceDescriptor->ResourceLength);
- break;
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return;
-}
-
-void
-GetFspNVStorageMemory (
- VOID **FspNVStorageHob,
- uint16_t *DataSize
- )
-{
-
- EFI_GUID FspNVStorageHobGuid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
- uint8_t *GuidHob;
- EFI_HOB_GENERIC_HEADER *GuidHobHdr;
-
- GuidHob = GetFirstGuidHob(&FspNVStorageHobGuid);
- if (!GuidHob) {
- *FspNVStorageHob = 0;
- *DataSize = 0;
- } else {
- *FspNVStorageHob = GET_GUID_HOB_DATA (GuidHob);
- GuidHobHdr = (EFI_HOB_GENERIC_HEADER *)GuidHob;
- *DataSize = GET_GUID_HOB_DATA_SIZE (GuidHobHdr);
- }
-}
-
-void
-GetTempRamStack (
- VOID **TempRamStackPtr,
- uint16_t *DataSize
- )
-{
-
- EFI_GUID FspBootloaderTemporaryMemoryHobGuid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
- uint8_t *GuidHob;
- EFI_HOB_GENERIC_HEADER *GuidHobHdr;
-
- GuidHob = GetFirstGuidHob(&FspBootloaderTemporaryMemoryHobGuid);
- if (!GuidHob) {
- *TempRamStackPtr = 0;
- *DataSize = 0;
- } else {
- *TempRamStackPtr = GET_GUID_HOB_DATA (GuidHob);
- GuidHobHdr = (EFI_HOB_GENERIC_HEADER *)GuidHob;
- *DataSize = GET_GUID_HOB_DATA_SIZE (GuidHobHdr);
- }
-}
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c
deleted file mode 100644
index 5d6e890..0000000
--- a/src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c
+++ /dev/null
@@ -1,198 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/***********************************************************************
- *
- * fsphob.c
- *
- * HOB infrastructure code.
- *
- **********************************************************************/
-#include <string.h>
-
-#include "fsptypes.h"
-#include "fsphob.h"
-
-//
-// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
-//
-extern volatile void *FspHobListPtr;
-
-/**
- Reads a 64-bit value from memory that may be unaligned.
-
- This function returns the 64-bit value pointed to by Buffer. The function
- guarantees that the read operation does not produce an alignment fault.
-
- If the Buffer is NULL, then ASSERT().
-
- @param Buffer Pointer to a 64-bit value that may be unaligned.
-
- @return The 64-bit value read from Buffer.
-
-**/
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- )
-{
- ASSERT (Buffer != NULL);
-
- return *Buffer;
-}
-
-/**
- Compares two GUIDs.
-
- This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
- If there are any bit differences in the two GUIDs, then FALSE is returned.
-
- If Guid1 is NULL, then ASSERT().
- If Guid2 is NULL, then ASSERT().
-
- @param Guid1 A pointer to a 128 bit GUID.
- @param Guid2 A pointer to a 128 bit GUID.
-
- @retval TRUE Guid1 and Guid2 are identical.
- @retval FALSE Guid1 and Guid2 are not identical.
-
-**/
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- )
-{
- UINT64 LowPartOfGuid1;
- UINT64 LowPartOfGuid2;
- UINT64 HighPartOfGuid1;
- UINT64 HighPartOfGuid2;
-
- LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
- LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
- HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
- HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
-
- return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
-}
-
-/**
- Returns the pointer to the HOB list.
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- )
-{
- ASSERT (FspHobListPtr != NULL);
- return ((VOID *)FspHobListPtr);
-}
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- ASSERT (HobStart != NULL);
-
- Hob.Raw = (UINT8 *) HobStart;
- //
- // Parse the HOB list until end of list or matching type is found.
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == Type) {
- return Hob.Raw;
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
- return NULL;
-}
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextHob (Type, HobList);
-}
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS GuidHob;
-
- GuidHob.Raw = (UINT8 *) HobStart;
- while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
- if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
- break;
- }
- GuidHob.Raw = GET_NEXT_HOB (GuidHob);
- }
- return GuidHob.Raw;
-}
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextGuidHob (Guid, HobList);
-}
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsp.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsp.h
deleted file mode 100644
index 22d2ee9..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsp.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_H__
-#define __FSP_H__
-
-#include "fsptypes.h"
-#include "fspfv.h"
-#include "fspffs.h"
-#include "fspapi.h"
-#include "fsphob.h"
-#include "fspplatform.h"
-#include "fspinfoheader.h"
-#include "fspbootmode.h"
-#include "fspvpd.h"
-#include "fspsupport.h"
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspapi.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspapi.h
deleted file mode 100644
index 0211e26..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspapi.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_API_H__
-#define __FSP_API_H__
-
-///
-/// FSP Init continuation function prototype.
-/// Control will be returned to this callback function after FspInit API call.
-///
-typedef VOID (FSPAPI *CONTINUATION_PROC) (EFI_STATUS Status, VOID *HobListPtr);
-
-#pragma pack(1)
-
-typedef struct {
- ///
- /// Non-volatile storage buffer pointer.
- ///
- VOID *NvsBufferPtr;
- ///
- /// Runtime buffer pointer
- ///
- VOID *RtBufferPtr;
- ///
- /// Continuation function address
- ///
- CONTINUATION_PROC ContinuationFunc;
-} FSP_INIT_PARAMS;
-
-typedef struct {
- ///
- /// Stack top pointer used by the bootloader.
- /// The new stack frame will be set up at this location after FspInit API call.
- ///
- UINT32 *StackTop;
- ///
- /// Current system boot mode.
- ///
- UINT32 BootMode;
- ///
- /// User platform configuraiton data region pointer.
- ///
- VOID *UpdDataRgnPtr;
- ///
- /// Reserved
- ///
- UINT32 Reserved[7];
-} FSP_INIT_RT_COMMON_BUFFER;
-
-typedef enum {
- ///
- /// Notification code for post PCI enuermation
- ///
- EnumInitPhaseAfterPciEnumeration = 0x20,
- ///
- /// Notification code before transfering control to the payload
- ///
- EnumInitPhaseReadyToBoot = 0x40
-} FSP_INIT_PHASE;
-
-typedef struct {
- ///
- /// Notification phase used for NotifyPhase API
- ///
- FSP_INIT_PHASE Phase;
-} NOTIFY_PHASE_PARAMS;
-
-#pragma pack()
-
-///
-/// FspInit API function prototype
-///
-typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
-
-///
-/// NotifyPhase API function prototype
-///
-typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspbootmode.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspbootmode.h
deleted file mode 100644
index f3c121b..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspbootmode.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_BOOTMODE_H__
-#define __FSP_BOOTMODE_H__
-
-///
-/// EFI boot mode
-///
-typedef UINT32 EFI_BOOT_MODE;
-
-//
-// 0x21 - 0xf..f are reserved.
-//
-#define BOOT_WITH_FULL_CONFIGURATION 0x00
-#define BOOT_ON_S3_RESUME 0x11
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspffs.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspffs.h
deleted file mode 100644
index 9c4e669..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspffs.h
+++ /dev/null
@@ -1,506 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_FFS_H__
-#define __FSP_FFS_H__
-
-#pragma pack(1)
-///
-/// Used to verify the integrity of the file.
-///
-typedef union {
- struct {
- ///
- /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
- /// header. The State and IntegrityCheck.Checksum.File fields are assumed
- /// to be zero and the checksum is calculated such that the entire header sums to zero.
- ///
- UINT8 Header;
- ///
- /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
- /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
- /// checksum of the file data.
- /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
- /// the IntegrityCheck.Checksum.File field must be initialized with a value of
- /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
- /// EFI_FILE_DATA_VALID bit is set in the State field.
- ///
- UINT8 File;
- } Checksum;
- ///
- /// This is the full 16 bits of the IntegrityCheck field.
- ///
- UINT16 Checksum16;
-} EFI_FFS_INTEGRITY_CHECK;
-
-///
-/// FFS_FIXED_CHECKSUM is the checksum value used when the
-/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
-///
-#define FFS_FIXED_CHECKSUM 0xAA
-
-typedef UINT8 EFI_FV_FILETYPE;
-typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
-typedef UINT8 EFI_FFS_FILE_STATE;
-
-///
-/// File Types Definitions
-///
-#define EFI_FV_FILETYPE_ALL 0x00
-#define EFI_FV_FILETYPE_RAW 0x01
-#define EFI_FV_FILETYPE_FREEFORM 0x02
-#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
-#define EFI_FV_FILETYPE_PEI_CORE 0x04
-#define EFI_FV_FILETYPE_DXE_CORE 0x05
-#define EFI_FV_FILETYPE_PEIM 0x06
-#define EFI_FV_FILETYPE_DRIVER 0x07
-#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
-#define EFI_FV_FILETYPE_APPLICATION 0x09
-#define EFI_FV_FILETYPE_SMM 0x0A
-#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
-#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
-#define EFI_FV_FILETYPE_SMM_CORE 0x0D
-#define EFI_FV_FILETYPE_OEM_MIN 0xc0
-#define EFI_FV_FILETYPE_OEM_MAX 0xdf
-#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
-#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
-#define EFI_FV_FILETYPE_FFS_MIN 0xf0
-#define EFI_FV_FILETYPE_FFS_MAX 0xff
-#define EFI_FV_FILETYPE_FFS_PAD 0xf0
-
-///
-/// FFS File Attributes.
-///
-#define FFS_ATTRIB_LARGE_FILE 0x01
-#define FFS_ATTRIB_FIXED 0x04
-#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
-#define FFS_ATTRIB_CHECKSUM 0x40
-
-///
-/// FFS File State Bits.
-///
-#define EFI_FILE_HEADER_CONSTRUCTION 0x01
-#define EFI_FILE_HEADER_VALID 0x02
-#define EFI_FILE_DATA_VALID 0x04
-#define EFI_FILE_MARKED_FOR_UPDATE 0x08
-#define EFI_FILE_DELETED 0x10
-#define EFI_FILE_HEADER_INVALID 0x20
-
-
-///
-/// Each file begins with the header that describe the
-/// contents and state of the files.
-///
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file.
- ///
- EFI_GUID Name;
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
- ///
- /// The length of the file in bytes, including the FFS header.
- ///
- UINT8 Size[3];
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-} EFI_FFS_FILE_HEADER;
-
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file. There may be only
- /// one instance of a file with the file name GUID of Name in any given firmware
- /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
- ///
- EFI_GUID Name;
-
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
-
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
-
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
-
- ///
- /// The length of the file in bytes, including the FFS header.
- /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
- /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
- /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
- /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
- ///
- UINT8 Size[3];
-
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-
- ///
- /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
- /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
- ///
- UINT32 ExtendedSize;
-} EFI_FFS_FILE_HEADER2;
-
-#define IS_FFS_FILE2(FfsFileHeaderPtr) \
- (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
-
-#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
-
-#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
- (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
-
-typedef UINT8 EFI_SECTION_TYPE;
-
-///
-/// Pseudo type. It is used as a wild card when retrieving sections.
-/// The section type EFI_SECTION_ALL matches all section types.
-///
-#define EFI_SECTION_ALL 0x00
-
-///
-/// Encapsulation section Type values.
-///
-#define EFI_SECTION_COMPRESSION 0x01
-
-#define EFI_SECTION_GUID_DEFINED 0x02
-
-#define EFI_SECTION_DISPOSABLE 0x03
-
-///
-/// Leaf section Type values.
-///
-#define EFI_SECTION_PE32 0x10
-#define EFI_SECTION_PIC 0x11
-#define EFI_SECTION_TE 0x12
-#define EFI_SECTION_DXE_DEPEX 0x13
-#define EFI_SECTION_VERSION 0x14
-#define EFI_SECTION_USER_INTERFACE 0x15
-#define EFI_SECTION_COMPATIBILITY16 0x16
-#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
-#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
-#define EFI_SECTION_RAW 0x19
-#define EFI_SECTION_PEI_DEPEX 0x1B
-#define EFI_SECTION_SMM_DEPEX 0x1C
-
-///
-/// Common section header.
-///
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
- EFI_SECTION_TYPE Type;
- ///
- /// Declares the section type.
- ///
-} EFI_COMMON_SECTION_HEADER;
-
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
-
- EFI_SECTION_TYPE Type;
-
- ///
- /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
- /// Size is not equal to 0xFFFFFF, then this field does not exist.
- ///
- UINT32 ExtendedSize;
-} EFI_COMMON_SECTION_HEADER2;
-
-///
-/// Leaf section type that contains an
-/// IA-32 16-bit executable image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
-
-///
-/// CompressionType of EFI_COMPRESSION_SECTION.
-///
-#define EFI_NOT_COMPRESSED 0x00
-#define EFI_STANDARD_COMPRESSION 0x01
-///
-/// An encapsulation section type in which the
-/// section data is compressed.
-///
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION;
-
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION2;
-
-///
-/// An encapsulation section type in which the section data is disposable.
-/// A disposable section is an encapsulation section in which the section data may be disposed of during
-/// the process of creating or updating a firmware image without significant impact on the usefulness of
-/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
-/// allows optional or descriptive data to be included with the firmware file which can be removed in
-/// order to conserve space. The contents of this section are implementation specific, but might contain
-/// debug data or detailed integration instructions.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
-
-///
-/// The leaf section which could be used to determine the dispatch order of DXEs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a PI FV.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
-
-///
-/// The leaf section which contains a single GUID.
-///
-typedef struct {
- ///
- /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
-
-///
-/// Attributes of EFI_GUID_DEFINED_SECTION.
-///
-#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
-#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
-///
-/// The leaf section which is encapsulation defined by specific GUID.
-///
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION2;
-
-///
-/// The leaf section which contains PE32+ image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
-
-///
-/// The leaf section used to determine the dispatch order of PEIMs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
-
-///
-/// A leaf section type that contains a position-independent-code (PIC) image.
-/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
-/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
-/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
-/// relocation information has been stripped from the image and the image can be moved and will
-/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
-/// be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
-
-///
-/// The leaf section which constains the position-independent-code image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
-
-///
-/// The leaf section which contains an array of zero or more bytes.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
-
-///
-/// The SMM dependency expression section is a leaf section that contains a dependency expression that
-/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
-/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
-/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
-/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
-/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a unicode string that
-/// is human readable file name.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION2;
-
-///
-/// The leaf section which contains a numeric build number and
-/// an optional unicode string that represents the file revision.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
- UINT16 BuildNumber;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// A UINT16 that represents a particular build. Subsequent builds have monotonically
- /// increasing build numbers relative to earlier builds.
- ///
- UINT16 BuildNumber;
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION2;
-
-#define IS_SECTION2(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
-
-#define SECTION_SIZE(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
-
-#define SECTION2_SIZE(SectionHeaderPtr) \
- (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspfv.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspfv.h
deleted file mode 100644
index 5696a78..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspfv.h
+++ /dev/null
@@ -1,247 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_FV___
-#define __FSP_FV___
-
-///
-/// EFI_FV_FILE_ATTRIBUTES
-///
-typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
-
-//
-// Value of EFI_FV_FILE_ATTRIBUTES.
-//
-#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
-#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
-#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
-
-///
-/// type of EFI FVB attribute
-///
-typedef UINT32 EFI_FVB_ATTRIBUTES_2;
-
-//
-// Attributes bit definitions
-//
-#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
-#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
-#define EFI_FVB2_READ_STATUS 0x00000004
-#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
-#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
-#define EFI_FVB2_WRITE_STATUS 0x00000020
-#define EFI_FVB2_LOCK_CAP 0x00000040
-#define EFI_FVB2_LOCK_STATUS 0x00000080
-#define EFI_FVB2_STICKY_WRITE 0x00000200
-#define EFI_FVB2_MEMORY_MAPPED 0x00000400
-#define EFI_FVB2_ERASE_POLARITY 0x00000800
-#define EFI_FVB2_READ_LOCK_CAP 0x00001000
-#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
-#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
-#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
-#define EFI_FVB2_ALIGNMENT 0x001F0000
-#define EFI_FVB2_ALIGNMENT_1 0x00000000
-#define EFI_FVB2_ALIGNMENT_2 0x00010000
-#define EFI_FVB2_ALIGNMENT_4 0x00020000
-#define EFI_FVB2_ALIGNMENT_8 0x00030000
-#define EFI_FVB2_ALIGNMENT_16 0x00040000
-#define EFI_FVB2_ALIGNMENT_32 0x00050000
-#define EFI_FVB2_ALIGNMENT_64 0x00060000
-#define EFI_FVB2_ALIGNMENT_128 0x00070000
-#define EFI_FVB2_ALIGNMENT_256 0x00080000
-#define EFI_FVB2_ALIGNMENT_512 0x00090000
-#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
-#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
-#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
-#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
-#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
-#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
-#define EFI_FVB2_ALIGNMENT_64K 0x00100000
-#define EFI_FVB2_ALIGNMENT_128K 0x00110000
-#define EFI_FVB2_ALIGNMENT_256K 0x00120000
-#define EFI_FVB2_ALIGNMENT_512K 0x00130000
-#define EFI_FVB2_ALIGNMENT_1M 0x00140000
-#define EFI_FVB2_ALIGNMENT_2M 0x00150000
-#define EFI_FVB2_ALIGNMENT_4M 0x00160000
-#define EFI_FVB2_ALIGNMENT_8M 0x00170000
-#define EFI_FVB2_ALIGNMENT_16M 0x00180000
-#define EFI_FVB2_ALIGNMENT_32M 0x00190000
-#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
-#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
-#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
-#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
-#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
-#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
-
-
-typedef struct {
- ///
- /// The number of sequential blocks which are of the same size.
- ///
- UINT32 NumBlocks;
- ///
- /// The size of the blocks.
- ///
- UINT32 Length;
-} EFI_FV_BLOCK_MAP_ENTRY;
-
-///
-/// Describes the features and layout of the firmware volume.
-///
-typedef struct {
- ///
- /// The first 16 bytes are reserved to allow for the reset vector of
- /// processors whose reset vector is at address 0.
- ///
- UINT8 ZeroVector[16];
- ///
- /// Declares the file system with which the firmware volume is formatted.
- ///
- EFI_GUID FileSystemGuid;
- ///
- /// Length in bytes of the complete firmware volume, including the header.
- ///
- UINT64 FvLength;
- ///
- /// Set to EFI_FVH_SIGNATURE
- ///
- UINT32 Signature;
- ///
- /// Declares capabilities and power-on defaults for the firmware volume.
- ///
- EFI_FVB_ATTRIBUTES_2 Attributes;
- ///
- /// Length in bytes of the complete firmware volume header.
- ///
- UINT16 HeaderLength;
- ///
- /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
- ///
- UINT16 Checksum;
- ///
- /// Offset, relative to the start of the header, of the extended header
- /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
- ///
- UINT16 ExtHeaderOffset;
- ///
- /// This field must always be set to zero.
- ///
- UINT8 Reserved[1];
- ///
- /// Set to 2. Future versions of this specification may define new header fields and will
- /// increment the Revision field accordingly.
- ///
- UINT8 Revision;
- ///
- /// An array of run-length encoded FvBlockMapEntry structures. The array is
- /// terminated with an entry of {0,0}.
- ///
- EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
-} EFI_FIRMWARE_VOLUME_HEADER;
-
-#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
-
-///
-/// Firmware Volume Header Revision definition
-///
-#define EFI_FVH_REVISION 0x02
-
-///
-/// Extension header pointed by ExtHeaderOffset of volume header.
-///
-typedef struct {
- ///
- /// Firmware volume name.
- ///
- EFI_GUID FvName;
- ///
- /// Size of the rest of the extension header, including this structure.
- ///
- UINT32 ExtHeaderSize;
-} EFI_FIRMWARE_VOLUME_EXT_HEADER;
-
-///
-/// Entry struture for describing FV extension header
-///
-typedef struct {
- ///
- /// Size of this header extension.
- ///
- UINT16 ExtEntrySize;
- ///
- /// Type of the header.
- ///
- UINT16 ExtEntryType;
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
-
-#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
-///
-/// This extension header provides a mapping between a GUID and an OEM file type.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
- /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
- ///
- UINT32 TypeMask;
- ///
- /// An array of GUIDs, each GUID representing an OEM file type.
- ///
- /// EFI_GUID Types[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
-
-#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
-
-///
-/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
-/// GUID FormatType type which includes a length and a successive series of data bytes.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// Vendor-specific GUID.
- ///
- EFI_GUID FormatType;
- ///
- /// An arry of bytes of length Length.
- ///
- /// UINT8 Data[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsphob.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsphob.h
deleted file mode 100644
index 59e34ef..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsphob.h
+++ /dev/null
@@ -1,427 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_HOB_H__
-#define __FSP_HOB_H__
-
-//
-// HobType of EFI_HOB_GENERIC_HEADER.
-//
-#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
-#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
-#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
-#define EFI_HOB_TYPE_UNUSED 0xFFFE
-#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
-
-///
-/// Describes the format and size of the data inside the HOB.
-/// All HOBs must contain this generic HOB header.
-///
-typedef struct {
- ///
- /// Identifies the HOB data structure type.
- ///
- UINT16 HobType;
- ///
- /// The length in bytes of the HOB.
- ///
- UINT16 HobLength;
- ///
- /// This field must always be set to zero.
- ///
- UINT32 Reserved;
-} EFI_HOB_GENERIC_HEADER;
-
-///
-/// Enumeration of memory types introduced in UEFI.
-///
-typedef enum {
- ///
- /// Not used.
- ///
- EfiReservedMemoryType,
- ///
- /// The code portions of a loaded application.
- /// (Note that UEFI OS loaders are UEFI applications.)
- ///
- EfiLoaderCode,
- ///
- /// The data portions of a loaded application and the default data allocation
- /// type used by an application to allocate pool memory.
- ///
- EfiLoaderData,
- ///
- /// The code portions of a loaded Boot Services Driver.
- ///
- EfiBootServicesCode,
- ///
- /// The data portions of a loaded Boot Serves Driver, and the default data
- /// allocation type used by a Boot Services Driver to allocate pool memory.
- ///
- EfiBootServicesData,
- ///
- /// The code portions of a loaded Runtime Services Driver.
- ///
- EfiRuntimeServicesCode,
- ///
- /// The data portions of a loaded Runtime Services Driver and the default
- /// data allocation type used by a Runtime Services Driver to allocate pool memory.
- ///
- EfiRuntimeServicesData,
- ///
- /// Free (unallocated) memory.
- ///
- EfiConventionalMemory,
- ///
- /// Memory in which errors have been detected.
- ///
- EfiUnusableMemory,
- ///
- /// Memory that holds the ACPI tables.
- ///
- EfiACPIReclaimMemory,
- ///
- /// Address space reserved for use by the firmware.
- ///
- EfiACPIMemoryNVS,
- ///
- /// Used by system firmware to request that a memory-mapped IO region
- /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
- ///
- EfiMemoryMappedIO,
- ///
- /// System memory-mapped IO region that is used to translate memory
- /// cycles to IO cycles by the processor.
- ///
- EfiMemoryMappedIOPortSpace,
- ///
- /// Address space reserved by the firmware for code that is part of the processor.
- ///
- EfiPalCode,
- EfiMaxMemoryType
-} EFI_MEMORY_TYPE;
-
-///
-/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
-/// various attributes of the logical memory allocation. The type field will be used for
-/// subsequent inclusion in the UEFI memory map.
-///
-typedef struct {
- ///
- /// A GUID that defines the memory allocation region's type and purpose, as well as
- /// other fields within the memory allocation HOB. This GUID is used to define the
- /// additional data within the HOB that may be present for the memory allocation HOB.
- /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
- /// specification.
- ///
- EFI_GUID Name;
-
- ///
- /// The base address of memory allocated by this HOB. Type
- /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
- /// specification.
- ///
- EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
-
- ///
- /// The length in bytes of memory allocated by this HOB.
- ///
- UINT64 MemoryLength;
-
- ///
- /// Defines the type of memory allocated by this HOB. The memory type definition
- /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
- /// in AllocatePages() in the UEFI 2.0 specification.
- ///
- EFI_MEMORY_TYPE MemoryType;
-
- ///
- /// Padding for Itanium processor family
- ///
- UINT8 Reserved[4];
-} EFI_HOB_MEMORY_ALLOCATION_HEADER;
-
-///
-/// Describes all memory ranges used during the HOB producer
-/// phase that exist outside the HOB list. This HOB type
-/// describes how memory is used, not the physical attributes of memory.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
- /// various attributes of the logical memory allocation.
- ///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
- //
- // Additional data pertaining to the "Name" Guid memory
- // may go here.
- //
-} EFI_HOB_MEMORY_ALLOCATION;
-
-///
-/// The resource type.
-///
-typedef UINT32 EFI_RESOURCE_TYPE;
-
-//
-// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
-//
-#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
-#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
-#define EFI_RESOURCE_IO 0x00000002
-#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
-#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
-#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
-#define EFI_RESOURCE_IO_RESERVED 0x00000006
-#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
-
-///
-/// A type of recount attribute type.
-///
-typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
-
-//
-// These types can be ORed together as needed.
-//
-// The first three enumerations describe settings
-//
-#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
-#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
-#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
-//
-// The rest of the settings describe capabilities
-//
-#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
-#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
-#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
-#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
-#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
-
-///
-/// Describes the resource properties of all fixed,
-/// nonrelocatable resource ranges found on the processor
-/// host bus during the HOB producer phase.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID representing the owner of the resource. This GUID is used by HOB
- /// consumer phase components to correlate device ownership of a resource.
- ///
- EFI_GUID Owner;
- ///
- /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
- ///
- EFI_RESOURCE_TYPE ResourceType;
- ///
- /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
- ///
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
- ///
- /// The physical start address of the resource region.
- ///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
- ///
- /// The number of bytes of the resource region.
- ///
- UINT64 ResourceLength;
-} EFI_HOB_RESOURCE_DESCRIPTOR;
-
-///
-/// Allows writers of executable content in the HOB producer phase to
-/// maintain and manage HOBs with specific GUID.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID that defines the contents of this HOB.
- ///
- EFI_GUID Name;
- //
- // Guid specific data goes here
- //
-} EFI_HOB_GUID_TYPE;
-
-///
-/// Union of all the possible HOB Types.
-///
-typedef union {
- EFI_HOB_GENERIC_HEADER *Header;
- EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
- EFI_HOB_GUID_TYPE *Guid;
- UINT8 *Raw;
-} EFI_PEI_HOB_POINTERS;
-
-
-/**
- Returns the type of a HOB.
-
- This macro returns the HobType field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobType.
-
-**/
-#define GET_HOB_TYPE(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
-
-/**
- Returns the length, in bytes, of a HOB.
-
- This macro returns the HobLength field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobLength.
-
-**/
-#define GET_HOB_LENGTH(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
-
-/**
- Returns a pointer to the next HOB in the HOB list.
-
- This macro returns a pointer to HOB that follows the
- HOB specified by HobStart in the HOB List.
-
- @param HobStart A pointer to a HOB.
-
- @return A pointer to the next HOB in the HOB list.
-
-**/
-#define GET_NEXT_HOB(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
-
-/**
- Determines if a HOB is the last HOB in the HOB list.
-
- This macro determine if the HOB specified by HobStart is the
- last HOB in the HOB list. If HobStart is last HOB in the HOB list,
- then TRUE is returned. Otherwise, FALSE is returned.
-
- @param HobStart A pointer to a HOB.
-
- @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
- @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
-
-**/
-#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
-
-/**
- Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns a pointer to the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return A pointer to the data buffer in a HOB.
-
-**/
-#define GET_GUID_HOB_DATA(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return The size of the data buffer.
-**/
-#define GET_GUID_HOB_DATA_SIZE(HobStart) \
- (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
-
-
-/**
-
- FSP specific GUID HOB definitions
-
- **/
-#define FSP_INFO_HEADER_GUID \
- { \
- 0x912740BE, 0x2284, 0x4734, {0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C} \
- }
-
-#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
- { \
- 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0xb, 0x7b, 0xa9, 0xe4, 0xb0 } \
- }
-
-#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
- { \
- 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } \
- }
-
-#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \
- { \
- 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } \
- }
-
-#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \
- { \
- 0xd038747c, 0xd00c, 0x4980, { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } \
- }
-
-#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \
- { \
- 0x9c7c3aa7, 0x5332, 0x4917, { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } \
- }
-
-#define FSP_HOB_GRAPHICS_INFO_GUID \
-{ 0x39f62cce, 0x6825, 0x4669, { 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07 } }
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspinfoheader.h
deleted file mode 100644
index e630788..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspinfoheader.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_INFOHEADER_H__
-#define __FSP_INFOHEADER_H__
-
-///
-/// Fixed FSP header offset in the FSP image
-///
-#define FSP_INFO_HEADER_OFF 0x94
-
-#pragma pack(1)
-
-typedef struct {
- ///
- /// Signature ('FSPH') for the FSP Information Header
- ///
- UINT32 Signature;
- ///
- /// Length of the FSP Information Header
- ///
- UINT32 HeaderLength;
- ///
- /// Reserved
- ///
- UINT8 Reserved1[3];
- ///
- /// Revision of the FSP Information Header
- ///
- UINT8 HeaderRevision;
- ///
- /// Revision of the FSP binary
- ///
- UINT32 ImageRevision;
-
-
- ///
- /// Signature string that will help match the FSP Binary to a supported
- /// hardware configuration.
- ///
- CHAR8 ImageId[8];
- ///
- /// Size of the entire FSP binary
- ///
- UINT32 ImageSize;
- ///
- /// FSP binary preferred base address
- ///
- UINT32 ImageBase;
-
-
- ///
- /// Attribute for the FSP binary
- ///
- UINT32 ImageAttribute;
- ///
- /// Offset of the FSP configuration region
- ///
- UINT32 CfgRegionOffset;
- ///
- /// Size of the FSP configuration region
- ///
- UINT32 CfgRegionSize;
- ///
- /// Number of API entries this FSP supports
- ///
- UINT32 ApiEntryNum;
-
-
- ///
- /// TempRamInit API entry offset
- ///
- UINT32 TempRamInitEntry;
- ///
- /// FspInit API entry offset
- ///
- UINT32 FspInitEntry;
- ///
- /// NotifyPhase API entry offset
- ///
- UINT32 NotifyPhaseEntry;
- ///
- /// Reserved
- ///
- UINT32 Reserved2;
-
-} FSP_INFO_HEADER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspplatform.h
deleted file mode 100644
index 4bb03d5..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspplatform.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_PLATFORM_H__
-#define __FSP_PLATFORM_H__
-
-#pragma pack(1)
-
-typedef struct {
- uint32_t RedMask;
- uint32_t GreenMask;
- uint32_t BlueMask;
- uint32_t ReservedMask;
-} EFI_PIXEL_BITMASK;
-
-typedef enum {
- PixelRedGreenBlueReserved8BitPerColor,
- PixelBlueGreenRedReserved8BitPerColor,
- PixelBitMask,
- PixelBltOnly,
- PixelFormatMax
-} EFI_GRAPHICS_PIXEL_FORMAT;
-
-typedef struct {
- uint32_t Version;
- uint32_t HorizontalResolution;
- uint32_t VerticalResolution;
- EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
- EFI_PIXEL_BITMASK PixelInformation;
- uint32_t PixelsPerScanLine;
-} EFI_GRAPHICS_OUTPUT_MODE_INFORMATION;
-
-typedef struct {
- uint64_t FrameBufferBase;
- uint64_t FrameBufferSize;
- EFI_GRAPHICS_OUTPUT_MODE_INFORMATION GraphicsMode;
-} PLATFORM_GRAPHICS_OUTPUT;
-
-typedef struct {
- ///
- /// FSP common runtime data structure
- ///
- FSP_INIT_RT_COMMON_BUFFER Common;
-} FSP_INIT_RT_BUFFER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspsupport.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspsupport.h
deleted file mode 100644
index a12cf27..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspsupport.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/**
-
-Copyright (C) 2013-2016 Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_SUPPORT_H__
-#define __FSP_SUPPORT_H__
-
-UINT32
-GetPhysicalLowMemTop (
- CONST VOID *HobStart
- );
-
-UINT32
-GetUsableLowMemTop (
- CONST VOID *HobListPtr
- );
-
-UINT64
-GetUsableHighMemTop (
- CONST VOID *HobListPtr
- );
-
-VOID *
-GetGuidHobDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length,
- EFI_GUID *Guid
- );
-
-UINT64
-GetFspReservedMemoryFromGuid (
- CONST VOID *HobListPtr,
- UINT64 *FspMemoryLength,
- EFI_GUID *FspReservedMemoryGuid
- );
-
-UINT32
-GetTsegReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
- );
-
-UINT32
-GetFspReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
- );
-
-VOID*
-GetFspNvsDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
- );
-
-VOID *
-GetBootloaderTempMemoryBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
- );
-
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- );
-
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- );
-
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- );
-
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- );
-
-VOID
-UpdateFspUpdConfigs (
- UPD_DATA_REGION *UpdDataRgn
- );
-
-#endif
\ No newline at end of file
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsptypes.h
deleted file mode 100644
index c8e38e4..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fsptypes.h
+++ /dev/null
@@ -1,220 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_TYPES_H__
-#define __FSP_TYPES_H__
-
-///
-/// 8-byte unsigned value.
-///
-typedef unsigned long long UINT64;
-
-///
-/// 8-byte signed value.
-///
-typedef long long INT64;
-
-///
-/// 4-byte unsigned value.
-///
-typedef unsigned int UINT32;
-
-///
-/// 4-byte signed value.
-///
-typedef int INT32;
-
-///
-/// 2-byte unsigned value.
-///
-typedef unsigned short UINT16;
-
-///
-/// 2-byte Character.
-///
-typedef unsigned short CHAR16;
-///
-/// 2-byte signed value.
-///
-typedef short INT16;
-
-///
-/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
-/// values are undefined.
-///
-typedef unsigned char BOOLEAN;
-
-///
-/// 1-byte unsigned value.
-///
-typedef unsigned char UINT8;
-
-///
-/// 1-byte Character
-///
-typedef char CHAR8;
-
-///
-/// 1-byte signed value
-///
-typedef char INT8;
-
-///
-/// Undeclared type.
-///
-typedef void VOID;
-
-///
-/// 64-bit physical memory address.
-///
-typedef UINT64 EFI_PHYSICAL_ADDRESS;
-
-///
-/// UEFI and FSP defined status.
-///
-typedef UINT32 EFI_STATUS;
-#define FSP_STATUS EFI_STATUS
-
-///
-/// Datum is read-only.
-///
-#define CONST const
-
-///
-/// Datum is scoped to the current file or function.
-///
-#define STATIC static
-
-///
-/// Boolean true value. UEFI Specification defines this value to be 1,
-/// but this form is more portable.
-///
-#define TRUE ((BOOLEAN)(1==1))
-
-///
-/// Boolean false value. UEFI Specification defines this value to be 0,
-/// but this form is more portable.
-///
-#define FALSE ((BOOLEAN)(0==1))
-
-///
-/// Null pointer
-///
-#ifndef NULL
-#define NULL ((VOID *) 0)
-#endif
-
-///
-/// Modifier to ensure that all API functions use the correct C calling
-/// convention.
-///
-#define EFIAPI __attribute__((cdecl))
-#define FSPAPI EFIAPI
-
-///
-/// 128 bit buffer containing a unique identifier value.
-///
-typedef struct {
- UINT32 Data1;
- UINT16 Data2;
- UINT16 Data3;
- UINT8 Data4[8];
-} EFI_GUID;
-
-/**
- Returns a 16-bit signature built from 2 ASCII characters.
-
- This macro returns a 16-bit value built from the two ASCII characters specified
- by A and B.
-
- @param A The first ASCII character.
- @param B The second ASCII character.
-
- @return A 16-bit value built from the two ASCII characters specified by A and B.
-
-**/
-#define SIGNATURE_16(A, B) ((A) | (B << 8))
-
-/**
- Returns a 32-bit signature built from 4 ASCII characters.
-
- This macro returns a 32-bit value built from the four ASCII characters specified
- by A, B, C, and D.
-
- @param A The first ASCII character.
- @param B The second ASCII character.
- @param C The third ASCII character.
- @param D The fourth ASCII character.
-
- @return A 32-bit value built from the two ASCII characters specified by A, B,
- C and D.
-
-**/
-#define SIGNATURE_32(A, B, C, D) (SIGNATURE_16 (A, B) | (SIGNATURE_16 (C, D) << 16))
-
-/**
- Returns a 64-bit signature built from 8 ASCII characters.
-
- This macro returns a 64-bit value built from the eight ASCII characters specified
- by A, B, C, D, E, F, G,and H.
-
- @param A The first ASCII character.
- @param B The second ASCII character.
- @param C The third ASCII character.
- @param D The fourth ASCII character.
- @param E The fifth ASCII character.
- @param F The sixth ASCII character.
- @param G The seventh ASCII character.
- @param H The eighth ASCII character.
-
- @return A 64-bit value built from the two ASCII characters specified by A, B,
- C, D, E, F, G and H.
-
-**/
-#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
- (SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32))
-
-///
-/// Assertion for debug
-///
-#define ASSERT(Expression) do { if (!(Expression)) for (;;); } while (FALSE)
-
-///
-/// Define FSP API return status code.
-/// Compatiable with EFI_STATUS defined in PI Spec.
-///
-#define FSP_SUCCESS 0
-#define FSP_INVALID_PARAMETER 0x80000002
-#define FSP_UNSUPPORTED 0x80000003
-#define FSP_DEVICE_ERROR 0x80000007
-#define FSP_NOT_FOUND 0x8000000E
-#define FSP_ALREADY_STARTED 0x80000014
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspvpd.h
deleted file mode 100644
index f5f862a..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/include/fspvpd.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
-
-Copyright (C) 2015-2016 Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_VPD_H__
-#define __FSP_VPD_H__
-
-#pragma pack(1)
-
-typedef struct _UPD_DATA_REGION {
- UINT64 Signature; /* Offset 0x0000 */
- UINT64 Reserved; /* Offset 0x0008 */
- UINT8 UnusedUpdSpace0[16]; /* Offset 0x0010 */
- UINT8 SerialPortType; /* Offset 0x0020 */
- UINT32 SerialPortAddress; /* Offset 0x0021 */
- UINT8 SerialPortConfigure; /* Offset 0x0025 */
- UINT8 SerialPortBaudRate; /* Offset 0x0026 */
- UINT8 SerialPortControllerInit0; /* Offset 0x0027 */
- UINT8 SerialPortControllerInit1; /* Offset 0x0028 */
- UINT8 ConfigIOU1_PciPort3; /* Offset 0x0029 */
- UINT8 ConfigIOU2_PciPort1; /* Offset 0x002A */
- UINT8 PowerStateAfterG3; /* Offset 0x002B */
- UINT8 PchPciPort1; /* Offset 0x002C */
- UINT8 PchPciPort2; /* Offset 0x002D */
- UINT8 PchPciPort3; /* Offset 0x002E */
- UINT8 PchPciPort4; /* Offset 0x002F */
- UINT8 PchPciPort5; /* Offset 0x0030 */
- UINT8 PchPciPort6; /* Offset 0x0031 */
- UINT8 PchPciPort7; /* Offset 0x0032 */
- UINT8 PchPciPort8; /* Offset 0x0033 */
- UINT8 HotPlug_PchPciPort1; /* Offset 0x0034 */
- UINT8 HotPlug_PchPciPort2; /* Offset 0x0035 */
- UINT8 HotPlug_PchPciPort3; /* Offset 0x0036 */
- UINT8 HotPlug_PchPciPort4; /* Offset 0x0037 */
- UINT8 HotPlug_PchPciPort5; /* Offset 0x0038 */
- UINT8 HotPlug_PchPciPort6; /* Offset 0x0039 */
- UINT8 HotPlug_PchPciPort7; /* Offset 0x003A */
- UINT8 HotPlug_PchPciPort8; /* Offset 0x003B */
- UINT8 Ehci1Enable; /* Offset 0x003C */
- UINT8 Ehci2Enable; /* Offset 0x003D */
- UINT8 HyperThreading; /* Offset 0x003E */
- UINT8 DebugOutputLevel; /* Offset 0x003F */
- UINT8 TcoTimerHaltLock; /* Offset 0x0040 */
- UINT8 TurboMode; /* Offset 0x0041 */
- UINT8 BootPerfMode; /* Offset 0x0042 */
- UINT8 PciePort1aAspm; /* Offset 0x0043 */
- UINT8 PciePort1bAspm; /* Offset 0x0044 */
- UINT8 PciePort3aAspm; /* Offset 0x0045 */
- UINT8 PciePort3bAspm; /* Offset 0x0046 */
- UINT8 PciePort3cAspm; /* Offset 0x0047 */
- UINT8 PciePort3dAspm; /* Offset 0x0048 */
- UINT8 PchPciePort1Aspm; /* Offset 0x0049 */
- UINT8 PchPciePort2Aspm; /* Offset 0x004A */
- UINT8 PchPciePort3Aspm; /* Offset 0x004B */
- UINT8 PchPciePort4Aspm; /* Offset 0x004C */
- UINT8 PchPciePort5Aspm; /* Offset 0x004D */
- UINT8 PchPciePort6Aspm; /* Offset 0x004E */
- UINT8 PchPciePort7Aspm; /* Offset 0x004F */
- UINT8 PchPciePort8Aspm; /* Offset 0x0050 */
- UINT8 DFXEnable; /* Offset 0x0051 */
- UINT8 ThermalDeviceEnable; /* Offset 0x0052 */
- UINT8 UnusedUpdSpace1[88]; /* Offset 0x0053 */
- UINT8 MemEccSupport; /* Offset 0x00AB */
- UINT8 MemDdrMemoryType; /* Offset 0x00AC */
- UINT8 MemRankMultiplication; /* Offset 0x00AD */
- UINT8 MemRankMarginTool; /* Offset 0x00AE */
- UINT8 MemScrambling; /* Offset 0x00AF */
- UINT8 MemRefreshMode; /* Offset 0x00B0 */
- UINT8 MemMcOdtOverride; /* Offset 0x00B1 */
- UINT8 MemCAParity; /* Offset 0x00B2 */
- UINT8 MemThermalThrottling; /* Offset 0x00B3 */
- UINT8 MemPowerSavingsMode; /* Offset 0x00B4 */
- UINT8 MemElectricalThrottling; /* Offset 0x00B5 */
- UINT8 MemPagePolicy; /* Offset 0x00B6 */
- UINT8 MemSocketInterleaveBelow4G; /* Offset 0x00B7 */
- UINT8 MemChannelInterleave; /* Offset 0x00B8 */
- UINT8 MemRankInterleave; /* Offset 0x00B9 */
- UINT8 MemDownEnable; /* Offset 0x00BA */
- UINT32 MemDownCh0Dimm0SpdPtr; /* Offset 0x00BB */
- UINT32 MemDownCh0Dimm1SpdPtr; /* Offset 0x00BF */
- UINT32 MemDownCh1Dimm0SpdPtr; /* Offset 0x00C3 */
- UINT32 MemDownCh1Dimm1SpdPtr; /* Offset 0x00C7 */
- UINT8 MemFastBoot; /* Offset 0x00CB */
- UINT8 pam0_hienable; /* Offset 0x00CC */
- UINT8 pam1_loenable; /* Offset 0x00CD */
- UINT8 pam1_hienable; /* Offset 0x00CE */
- UINT8 pam2_loenable; /* Offset 0x00CF */
- UINT8 pam2_hienable; /* Offset 0x00D0 */
- UINT8 pam3_loenable; /* Offset 0x00D1 */
- UINT8 pam3_hienable; /* Offset 0x00D2 */
- UINT8 pam4_loenable; /* Offset 0x00D3 */
- UINT8 pam4_hienable; /* Offset 0x00D4 */
- UINT8 pam5_loenable; /* Offset 0x00D5 */
- UINT8 pam5_hienable; /* Offset 0x00D6 */
- UINT8 pam6_loenable; /* Offset 0x00D7 */
- UINT8 pam6_hienable; /* Offset 0x00D8 */
- UINT8 MemAdr; /* Offset 0x00D9 */
- UINT8 MemAdrResumePath; /* Offset 0x00DA */
- UINT8 MemBlockScTrafficOnAdr; /* Offset 0x00DB */
- UINT16 MemPlatformReleaseAdrClampsPort; /* Offset 0x00DC */
- UINT32 MemPlatformReleaseAdrClampsAnd; /* Offset 0x00DE */
- UINT32 MemPlatformReleaseAdrClampsOr; /* Offset 0x00E2 */
- UINT8 UnusedUpdSpace2[24]; /* Offset 0x00E6 */
- UINT16 PcdRegionTerminator; /* Offset 0x00FE */
-} UPD_DATA_REGION;
-
-#define FSP_IMAGE_ID 0x5F45442D5844425F /* '_BDX-DE_' */
-#define FSP_IMAGE_REV 0x00000301
-
-typedef struct _VPD_DATA_REGION {
- UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
- UINT32 PcdImageRevision; /* Offset 0x0008 */
- UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
- UINT8 UnusedVpdSpace0[16]; /* Offset 0x0010 */
- UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
-} VPD_DATA_REGION;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/broadwell_de/srx/fspsupport.c b/src/vendorcode/intel/fsp1_0/broadwell_de/srx/fspsupport.c
deleted file mode 100644
index 96fd984..0000000
--- a/src/vendorcode/intel/fsp1_0/broadwell_de/srx/fspsupport.c
+++ /dev/null
@@ -1,454 +0,0 @@
-/**
-
-Copyright (C) 2013-2016 Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#include <types.h>
-#include <string.h>
-#include <fsp.h>
-
-/**
- Reads a 64-bit value from memory that may be unaligned.
-
- This function returns the 64-bit value pointed to by Buffer. The function
- guarantees that the read operation does not produce an alignment fault.
-
- If the Buffer is NULL, then ASSERT().
-
- @param Buffer Pointer to a 64-bit value that may be unaligned.
- @return The 64-bit value read from Buffer.
-
-**/
-STATIC
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- )
-{
- ASSERT (Buffer != NULL);
- return *Buffer;
-}
-
-/**
- Compares two GUIDs.
-
- This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
- If there are any bit differences in the two GUIDs, then FALSE is returned.
-
- If Guid1 is NULL, then ASSERT().
- If Guid2 is NULL, then ASSERT().
-
- @param Guid1 A pointer to a 128 bit GUID.
- @param Guid2 A pointer to a 128 bit GUID.
- @retval TRUE Guid1 and Guid2 are identical.
- @retval FALSE Guid1 and Guid2 are not identical.
-
-**/
-STATIC
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- )
-{
- UINT64 LowPartOfGuid1;
- UINT64 LowPartOfGuid2;
- UINT64 HighPartOfGuid1;
- UINT64 HighPartOfGuid2;
-
- LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
- LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
- HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
- HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
-
- return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
-}
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-
- @param Type HOB type to search
- @param HobStart A pointer to the HOB list
- @retval a HOB object with matching type; Otherwise NULL.
-
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- ASSERT (HobStart != NULL);
-
- Hob.Raw = (UINT8 *) HobStart;
- /*
- * Parse the HOB list until end of list or matching type is found.
- */
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == Type) {
- return Hob.Raw;
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return NULL;
-}
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-
- @param Guid GUID to search
- @param HobStart A pointer to the HOB list
- @retval a HOB object with matching GUID; Otherwise NULL.
-
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS GuidHob;
-
- GuidHob.Raw = (UINT8 *) HobStart;
- while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
- if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
- break;
- }
- GuidHob.Raw = GET_NEXT_HOB (GuidHob);
- }
-
- return GuidHob.Raw;
-}
-
-/**
- This function retrieves the top of usable low memory.
-
- @param HobListPtr A HOB list pointer.
- @retval Usable low memory top.
-
-**/
-UINT32
-GetUsableLowMemTop (
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
- UINT32 MemLen;
- /*
- * Get the HOB list for processing
- */
- Hob.Raw = (VOID *)HobStart;
-
- /*
- * Collect memory ranges
- */
- MemLen = 0x100000;
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
- /*
- * Need memory above 1MB to be collected here
- */
- if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000 &&
- Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
- MemLen += (UINT32) (Hob.ResourceDescriptor->ResourceLength);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return MemLen;
-}
-
-/**
- This function retrieves the top of system low memory.
-
- @param HobListPtr A HOB list pointer.
- @retval Usable low memory top.
-
-**/
-UINT32
-GetPhysicalLowMemTop (
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
- UINT32 MemBase;
- UINT32 MemLen;
-
- /*
- * Get the HOB list for processing
- */
- Hob.Raw = (VOID *)HobStart;
-
- /*
- * Collect memory ranges
- */
- MemBase = 0x100000;
- MemLen = 0;
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) ||
- (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED)) {
- /*
- * Need memory above 1MB to be collected here
- */
- if (Hob.ResourceDescriptor->PhysicalStart >= MemBase &&
- Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
- MemBase = (UINT32) (Hob.ResourceDescriptor->PhysicalStart);
- MemLen = (UINT32) (Hob.ResourceDescriptor->ResourceLength);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return MemBase + MemLen;
-}
-
-/**
- This function retrieves the top of usable high memory.
-
- @param HobListPtr A HOB list pointer.
- @retval Usable high memory top.
-
-**/
-UINT64
-GetUsableHighMemTop (
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
- UINT64 MemTop;
- /*
- * Get the HOB list for processing
- */
- Hob.Raw = (VOID *)HobStart;
-
- /*
- * Collect memory ranges
- */
- MemTop = 0x100000000;
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
- /*
- * Need memory above 1MB to be collected here
- */
- if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS) 0x100000000) {
- MemTop += (UINT64) (Hob.ResourceDescriptor->ResourceLength);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return MemTop;
-}
-
-/**
- This function retrieves a special reserved memory region.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the GUID HOB data buffer length. If the GUID HOB is
- located, the length will be updated.
- @param OwnerGuid A pointer to the owner guild.
- @retval Reserved region start address. 0 if this region does not exist.
-
-**/
-UINT64
-GetFspReservedMemoryFromGuid (
- CONST VOID *HobListPtr,
- UINT64 *Length,
- EFI_GUID *OwnerGuid
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- /*
- * Get the HOB list for processing
- */
- Hob.Raw = (VOID *)HobListPtr;
-
- /*
- * Collect memory ranges
- */
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) {
- if (CompareGuid(&Hob.ResourceDescriptor->Owner, OwnerGuid)) {
- if (Length) {
- *Length = (UINT32) (Hob.ResourceDescriptor->ResourceLength);
- }
- return (UINT64)(Hob.ResourceDescriptor->PhysicalStart);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return 0;
-}
-
-/**
- This function retrieves the TSEG reserved normal memory.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the TSEG reserved memory length buffer. If the GUID HOB is
- located, the length will be updated.
- @param Guid A pointer to owner HOB GUID.
- @retval NULL Failed to find the TSEG reserved memory.
- @retval others TSEG reserved memory base.
-
-**/
-UINT32
-GetTsegReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
- )
-{
- const EFI_GUID TsegOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
- UINT64 Length64;
- UINT32 Base;
-
- Base = (UINT32)GetFspReservedMemoryFromGuid (HobListPtr, &Length64, (EFI_GUID *)&TsegOwnerHobGuid);
- if ((Length != 0) && (Base != 0)) {
- *Length = (UINT32)Length64;
- }
-
- return Base;
-}
-
-/**
- This function retrieves the FSP reserved normal memory.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the FSP reserved memory length buffer. If the GUID HOB is
- located, the length will be updated.
- @param Guid A pointer to owner HOB GUID.
- @retval NULL Failed to find the FSP reserved memory.
- @retval others FSP reserved memory base.
-
-**/
-UINT32
-GetFspReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
- )
-{
- const EFI_GUID FspOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
- UINT64 Length64;
- UINT32 Base;
-
- Base = (UINT32)GetFspReservedMemoryFromGuid (HobListPtr, &Length64, (EFI_GUID *)&FspOwnerHobGuid);
- if ((Length != 0) && (Base != 0)) {
- *Length = (UINT32)Length64;
- }
-
- return Base;
-}
-
-/**
- This function retrieves a GUIDed HOB data buffer and size.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the GUID HOB data buffer length. If the
- GUID HOB is located, the length will be updated.
- @param Guid A pointer to HOB GUID.
- @retval NULL Failed to find the GUID HOB.
- @retval others GUID HOB data buffer pointer.
-
-**/
-VOID *
-GetGuidHobDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length,
- EFI_GUID *Guid
- )
-{
- UINT8 *GuidHob;
-
- /* FSP NVS DATA HOB */
- GuidHob = GetNextGuidHob(Guid, HobListPtr);
- if (GuidHob == NULL) {
- return NULL;
- } else {
- if (Length) {
- *Length = GET_GUID_HOB_DATA_SIZE (GuidHob);
- }
- return GET_GUID_HOB_DATA (GuidHob);
- }
-}
-
-/**
- This function retrieves FSP Non-volatile Storage HOB buffer and size.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the NVS data buffer length. If the FSP NVS
- HOB is located, the length will be updated.
- @retval NULL Failed to find the NVS HOB.
- @retval others FSP NVS data buffer pointer.
-
-**/
-VOID *
-GetFspNvsDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
- )
-{
- const EFI_GUID FspNvsHobGuid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
- return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspNvsHobGuid);
-}
-
-/**
- This function retrieves Bootloader temporary stack buffer and size.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the Bootloader temporary stack length.
- If the HOB is located, the length will be updated.
- @retval NULL Failed to find the Bootloader temporary stack HOB.
- @retval others Bootloader temporary stackbuffer pointer.
-
-**/
-VOID *
-GetBootloaderTempMemoryBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
- )
-{
- const EFI_GUID FspBootloaderTemporaryMemoryHobGuid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
- return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspBootloaderTemporaryMemoryHobGuid);
-}
\ No newline at end of file
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspapi.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
deleted file mode 100644
index 9520736..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_API_H_
-#define _FSP_API_H_
-
-#pragma pack(1)
-
-typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
-
-typedef struct {
- VOID *NvsBufferPtr;
- VOID *RtBufferPtr;
- CONTINUATION_PROC ContinuationFunc;
-} FSP_INIT_PARAMS;
-
-typedef struct {
- UINT32 *StackTop;
- UINT32 BootMode;
-} FSP_INIT_RT_COMMON_BUFFER;
-
-typedef enum {
- EnumInitPhaseAfterPciEnumeration = 0x20,
- EnumInitPhaseReadyToBoot = 0x40
-} FSP_INIT_PHASE;
-
-typedef struct {
- FSP_INIT_PHASE Phase;
-} NOTIFY_PHASE_PARAMS;
-
-#pragma pack()
-
-typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
-typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspffs.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
deleted file mode 100644
index 7a7c367..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
+++ /dev/null
@@ -1,506 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-
-#ifndef __PI_FIRMWARE_FILE_H__
-#define __PI_FIRMWARE_FILE_H__
-
-#pragma pack(1)
-///
-/// Used to verify the integrity of the file.
-///
-typedef union {
- struct {
- ///
- /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
- /// header. The State and IntegrityCheck.Checksum.File fields are assumed
- /// to be zero and the checksum is calculated such that the entire header sums to zero.
- ///
- UINT8 Header;
- ///
- /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
- /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
- /// checksum of the file data.
- /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
- /// the IntegrityCheck.Checksum.File field must be initialized with a value of
- /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
- /// EFI_FILE_DATA_VALID bit is set in the State field.
- ///
- UINT8 File;
- } Checksum;
- ///
- /// This is the full 16 bits of the IntegrityCheck field.
- ///
- UINT16 Checksum16;
-} EFI_FFS_INTEGRITY_CHECK;
-
-///
-/// FFS_FIXED_CHECKSUM is the checksum value used when the
-/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
-///
-#define FFS_FIXED_CHECKSUM 0xAA
-
-typedef UINT8 EFI_FV_FILETYPE;
-typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
-typedef UINT8 EFI_FFS_FILE_STATE;
-
-///
-/// File Types Definitions
-///
-#define EFI_FV_FILETYPE_ALL 0x00
-#define EFI_FV_FILETYPE_RAW 0x01
-#define EFI_FV_FILETYPE_FREEFORM 0x02
-#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
-#define EFI_FV_FILETYPE_PEI_CORE 0x04
-#define EFI_FV_FILETYPE_DXE_CORE 0x05
-#define EFI_FV_FILETYPE_PEIM 0x06
-#define EFI_FV_FILETYPE_DRIVER 0x07
-#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
-#define EFI_FV_FILETYPE_APPLICATION 0x09
-#define EFI_FV_FILETYPE_SMM 0x0A
-#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
-#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
-#define EFI_FV_FILETYPE_SMM_CORE 0x0D
-#define EFI_FV_FILETYPE_OEM_MIN 0xc0
-#define EFI_FV_FILETYPE_OEM_MAX 0xdf
-#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
-#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
-#define EFI_FV_FILETYPE_FFS_MIN 0xf0
-#define EFI_FV_FILETYPE_FFS_MAX 0xff
-#define EFI_FV_FILETYPE_FFS_PAD 0xf0
-///
-/// FFS File Attributes.
-///
-#define FFS_ATTRIB_LARGE_FILE 0x01
-#define FFS_ATTRIB_FIXED 0x04
-#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
-#define FFS_ATTRIB_CHECKSUM 0x40
-
-///
-/// FFS File State Bits.
-///
-#define EFI_FILE_HEADER_CONSTRUCTION 0x01
-#define EFI_FILE_HEADER_VALID 0x02
-#define EFI_FILE_DATA_VALID 0x04
-#define EFI_FILE_MARKED_FOR_UPDATE 0x08
-#define EFI_FILE_DELETED 0x10
-#define EFI_FILE_HEADER_INVALID 0x20
-
-
-///
-/// Each file begins with the header that describe the
-/// contents and state of the files.
-///
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file.
- ///
- EFI_GUID Name;
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
- ///
- /// The length of the file in bytes, including the FFS header.
- ///
- UINT8 Size[3];
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-} EFI_FFS_FILE_HEADER;
-
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file. There may be only
- /// one instance of a file with the file name GUID of Name in any given firmware
- /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
- ///
- EFI_GUID Name;
-
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
-
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
-
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
-
- ///
- /// The length of the file in bytes, including the FFS header.
- /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
- /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
- /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
- /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
- ///
- UINT8 Size[3];
-
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-
- ///
- /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
- /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
- ///
- UINT32 ExtendedSize;
-} EFI_FFS_FILE_HEADER2;
-
-#define IS_FFS_FILE2(FfsFileHeaderPtr) \
- (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
-
-#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
-
-#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
- (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
-
-typedef UINT8 EFI_SECTION_TYPE;
-
-///
-/// Pseudo type. It is used as a wild card when retrieving sections.
-/// The section type EFI_SECTION_ALL matches all section types.
-///
-#define EFI_SECTION_ALL 0x00
-
-///
-/// Encapsulation section Type values.
-///
-#define EFI_SECTION_COMPRESSION 0x01
-
-#define EFI_SECTION_GUID_DEFINED 0x02
-
-#define EFI_SECTION_DISPOSABLE 0x03
-
-///
-/// Leaf section Type values.
-///
-#define EFI_SECTION_PE32 0x10
-#define EFI_SECTION_PIC 0x11
-#define EFI_SECTION_TE 0x12
-#define EFI_SECTION_DXE_DEPEX 0x13
-#define EFI_SECTION_VERSION 0x14
-#define EFI_SECTION_USER_INTERFACE 0x15
-#define EFI_SECTION_COMPATIBILITY16 0x16
-#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
-#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
-#define EFI_SECTION_RAW 0x19
-#define EFI_SECTION_PEI_DEPEX 0x1B
-#define EFI_SECTION_SMM_DEPEX 0x1C
-
-///
-/// Common section header.
-///
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
- EFI_SECTION_TYPE Type;
- ///
- /// Declares the section type.
- ///
-} EFI_COMMON_SECTION_HEADER;
-
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
-
- EFI_SECTION_TYPE Type;
-
- ///
- /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
- /// Size is not equal to 0xFFFFFF, then this field does not exist.
- ///
- UINT32 ExtendedSize;
-} EFI_COMMON_SECTION_HEADER2;
-
-///
-/// Leaf section type that contains an
-/// IA-32 16-bit executable image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
-
-///
-/// CompressionType of EFI_COMPRESSION_SECTION.
-///
-#define EFI_NOT_COMPRESSED 0x00
-#define EFI_STANDARD_COMPRESSION 0x01
-///
-/// An encapsulation section type in which the
-/// section data is compressed.
-///
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION;
-
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION2;
-
-///
-/// An encapsulation section type in which the section data is disposable.
-/// A disposable section is an encapsulation section in which the section data may be disposed of during
-/// the process of creating or updating a firmware image without significant impact on the usefulness of
-/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
-/// allows optional or descriptive data to be included with the firmware file which can be removed in
-/// order to conserve space. The contents of this section are implementation specific, but might contain
-/// debug data or detailed integration instructions.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
-
-///
-/// The leaf section which could be used to determine the dispatch order of DXEs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a PI FV.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
-
-///
-/// The leaf section which contains a single GUID.
-///
-typedef struct {
- ///
- /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
-
-///
-/// Attributes of EFI_GUID_DEFINED_SECTION.
-///
-#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
-#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
-///
-/// The leaf section which is encapsulation defined by specific GUID.
-///
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION2;
-
-///
-/// The leaf section which contains PE32+ image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
-
-///
-/// The leaf section used to determine the dispatch order of PEIMs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
-
-///
-/// A leaf section type that contains a position-independent-code (PIC) image.
-/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
-/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
-/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
-/// relocation information has been stripped from the image and the image can be moved and will
-/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
-/// be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
-
-///
-/// The leaf section which constains the position-independent-code image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
-
-///
-/// The leaf section which contains an array of zero or more bytes.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
-
-///
-/// The SMM dependency expression section is a leaf section that contains a dependency expression that
-/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
-/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
-/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
-/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
-/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a unicode string that
-/// is human readable file name.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION2;
-
-///
-/// The leaf section which contains a numeric build number and
-/// an optional unicode string that represents the file revision.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
- UINT16 BuildNumber;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// A UINT16 that represents a particular build. Subsequent builds have monotonically
- /// increasing build numbers relative to earlier builds.
- ///
- UINT16 BuildNumber;
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION2;
-
-#define IS_SECTION2(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
-
-#define SECTION_SIZE(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
-
-#define SECTION2_SIZE(SectionHeaderPtr) \
- (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
deleted file mode 100644
index 75d17fa..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
+++ /dev/null
@@ -1,247 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_FIRMWAREVOLUME_H__
-#define __PI_FIRMWAREVOLUME_H__
-
-///
-/// EFI_FV_FILE_ATTRIBUTES
-///
-typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
-
-//
-// Value of EFI_FV_FILE_ATTRIBUTES.
-//
-#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
-#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
-#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
-
-///
-/// type of EFI FVB attribute
-///
-typedef UINT32 EFI_FVB_ATTRIBUTES_2;
-
-//
-// Attributes bit definitions
-//
-#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
-#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
-#define EFI_FVB2_READ_STATUS 0x00000004
-#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
-#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
-#define EFI_FVB2_WRITE_STATUS 0x00000020
-#define EFI_FVB2_LOCK_CAP 0x00000040
-#define EFI_FVB2_LOCK_STATUS 0x00000080
-#define EFI_FVB2_STICKY_WRITE 0x00000200
-#define EFI_FVB2_MEMORY_MAPPED 0x00000400
-#define EFI_FVB2_ERASE_POLARITY 0x00000800
-#define EFI_FVB2_READ_LOCK_CAP 0x00001000
-#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
-#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
-#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
-#define EFI_FVB2_ALIGNMENT 0x001F0000
-#define EFI_FVB2_ALIGNMENT_1 0x00000000
-#define EFI_FVB2_ALIGNMENT_2 0x00010000
-#define EFI_FVB2_ALIGNMENT_4 0x00020000
-#define EFI_FVB2_ALIGNMENT_8 0x00030000
-#define EFI_FVB2_ALIGNMENT_16 0x00040000
-#define EFI_FVB2_ALIGNMENT_32 0x00050000
-#define EFI_FVB2_ALIGNMENT_64 0x00060000
-#define EFI_FVB2_ALIGNMENT_128 0x00070000
-#define EFI_FVB2_ALIGNMENT_256 0x00080000
-#define EFI_FVB2_ALIGNMENT_512 0x00090000
-#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
-#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
-#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
-#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
-#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
-#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
-#define EFI_FVB2_ALIGNMENT_64K 0x00100000
-#define EFI_FVB2_ALIGNMENT_128K 0x00110000
-#define EFI_FVB2_ALIGNMENT_256K 0x00120000
-#define EFI_FVB2_ALIGNMENT_512K 0x00130000
-#define EFI_FVB2_ALIGNMENT_1M 0x00140000
-#define EFI_FVB2_ALIGNMENT_2M 0x00150000
-#define EFI_FVB2_ALIGNMENT_4M 0x00160000
-#define EFI_FVB2_ALIGNMENT_8M 0x00170000
-#define EFI_FVB2_ALIGNMENT_16M 0x00180000
-#define EFI_FVB2_ALIGNMENT_32M 0x00190000
-#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
-#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
-#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
-#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
-#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
-#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
-
-
-typedef struct {
- ///
- /// The number of sequential blocks which are of the same size.
- ///
- UINT32 NumBlocks;
- ///
- /// The size of the blocks.
- ///
- UINT32 Length;
-} EFI_FV_BLOCK_MAP_ENTRY;
-
-///
-/// Describes the features and layout of the firmware volume.
-///
-typedef struct {
- ///
- /// The first 16 bytes are reserved to allow for the reset vector of
- /// processors whose reset vector is at address 0.
- ///
- UINT8 ZeroVector[16];
- ///
- /// Declares the file system with which the firmware volume is formatted.
- ///
- EFI_GUID FileSystemGuid;
- ///
- /// Length in bytes of the complete firmware volume, including the header.
- ///
- UINT64 FvLength;
- ///
- /// Set to EFI_FVH_SIGNATURE
- ///
- UINT32 Signature;
- ///
- /// Declares capabilities and power-on defaults for the firmware volume.
- ///
- EFI_FVB_ATTRIBUTES_2 Attributes;
- ///
- /// Length in bytes of the complete firmware volume header.
- ///
- UINT16 HeaderLength;
- ///
- /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
- ///
- UINT16 Checksum;
- ///
- /// Offset, relative to the start of the header, of the extended header
- /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
- ///
- UINT16 ExtHeaderOffset;
- ///
- /// This field must always be set to zero.
- ///
- UINT8 Reserved[1];
- ///
- /// Set to 2. Future versions of this specification may define new header fields and will
- /// increment the Revision field accordingly.
- ///
- UINT8 Revision;
- ///
- /// An array of run-length encoded FvBlockMapEntry structures. The array is
- /// terminated with an entry of {0,0}.
- ///
- EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
-} EFI_FIRMWARE_VOLUME_HEADER;
-
-#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
-
-///
-/// Firmware Volume Header Revision definition
-///
-#define EFI_FVH_REVISION 0x02
-
-///
-/// Extension header pointed by ExtHeaderOffset of volume header.
-///
-typedef struct {
- ///
- /// Firmware volume name.
- ///
- EFI_GUID FvName;
- ///
- /// Size of the rest of the extension header, including this structure.
- ///
- UINT32 ExtHeaderSize;
-} EFI_FIRMWARE_VOLUME_EXT_HEADER;
-
-///
-/// Entry struture for describing FV extension header
-///
-typedef struct {
- ///
- /// Size of this header extension.
- ///
- UINT16 ExtEntrySize;
- ///
- /// Type of the header.
- ///
- UINT16 ExtEntryType;
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
-
-#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
-///
-/// This extension header provides a mapping between a GUID and an OEM file type.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
- /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
- ///
- UINT32 TypeMask;
- ///
- /// An array of GUIDs, each GUID representing an OEM file type.
- ///
- /// EFI_GUID Types[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
-
-#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
-
-///
-/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
-/// GUID FormatType type which includes a length and a successive series of data bytes.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// Vendor-specific GUID.
- ///
- EFI_GUID FormatType;
- ///
- /// An arry of bytes of length Length.
- ///
- /// UINT8 Data[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsphob.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
deleted file mode 100644
index 5840907..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
+++ /dev/null
@@ -1,507 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_HOB_H__
-#define __PI_HOB_H__
-
-//
-// HobType of EFI_HOB_GENERIC_HEADER.
-//
-#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
-#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
-#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
-#define EFI_HOB_TYPE_UNUSED 0xFFFE
-#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
-
-///
-/// Describes the format and size of the data inside the HOB.
-/// All HOBs must contain this generic HOB header.
-///
-typedef struct {
- ///
- /// Identifies the HOB data structure type.
- ///
- UINT16 HobType;
- ///
- /// The length in bytes of the HOB.
- ///
- UINT16 HobLength;
- ///
- /// This field must always be set to zero.
- ///
- UINT32 Reserved;
-} EFI_HOB_GENERIC_HEADER;
-
-///
-/// Enumeration of memory types introduced in UEFI.
-///
-typedef enum {
- ///
- /// Not used.
- ///
- EfiReservedMemoryType,
- ///
- /// The code portions of a loaded application.
- /// (Note that UEFI OS loaders are UEFI applications.)
- ///
- EfiLoaderCode,
- ///
- /// The data portions of a loaded application and the default data allocation
- /// type used by an application to allocate pool memory.
- ///
- EfiLoaderData,
- ///
- /// The code portions of a loaded Boot Services Driver.
- ///
- EfiBootServicesCode,
- ///
- /// The data portions of a loaded Boot Serves Driver, and the default data
- /// allocation type used by a Boot Services Driver to allocate pool memory.
- ///
- EfiBootServicesData,
- ///
- /// The code portions of a loaded Runtime Services Driver.
- ///
- EfiRuntimeServicesCode,
- ///
- /// The data portions of a loaded Runtime Services Driver and the default
- /// data allocation type used by a Runtime Services Driver to allocate pool memory.
- ///
- EfiRuntimeServicesData,
- ///
- /// Free (unallocated) memory.
- ///
- EfiConventionalMemory,
- ///
- /// Memory in which errors have been detected.
- ///
- EfiUnusableMemory,
- ///
- /// Memory that holds the ACPI tables.
- ///
- EfiACPIReclaimMemory,
- ///
- /// Address space reserved for use by the firmware.
- ///
- EfiACPIMemoryNVS,
- ///
- /// Used by system firmware to request that a memory-mapped IO region
- /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
- ///
- EfiMemoryMappedIO,
- ///
- /// System memory-mapped IO region that is used to translate memory
- /// cycles to IO cycles by the processor.
- ///
- EfiMemoryMappedIOPortSpace,
- ///
- /// Address space reserved by the firmware for code that is part of the processor.
- ///
- EfiPalCode,
- EfiMaxMemoryType
-} EFI_MEMORY_TYPE;
-
-///
-/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
-/// various attributes of the logical memory allocation. The type field will be used for
-/// subsequent inclusion in the UEFI memory map.
-///
-typedef struct {
- ///
- /// A GUID that defines the memory allocation region's type and purpose, as well as
- /// other fields within the memory allocation HOB. This GUID is used to define the
- /// additional data within the HOB that may be present for the memory allocation HOB.
- /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
- /// specification.
- ///
- EFI_GUID Name;
-
- ///
- /// The base address of memory allocated by this HOB. Type
- /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
- /// specification.
- ///
- EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
-
- ///
- /// The length in bytes of memory allocated by this HOB.
- ///
- UINT64 MemoryLength;
-
- ///
- /// Defines the type of memory allocated by this HOB. The memory type definition
- /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
- /// in AllocatePages() in the UEFI 2.0 specification.
- ///
- EFI_MEMORY_TYPE MemoryType;
-
- ///
- /// Padding for Itanium processor family
- ///
- UINT8 Reserved[4];
-} EFI_HOB_MEMORY_ALLOCATION_HEADER;
-
-///
-/// Describes all memory ranges used during the HOB producer
-/// phase that exist outside the HOB list. This HOB type
-/// describes how memory is used, not the physical attributes of memory.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
- /// various attributes of the logical memory allocation.
- ///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
- //
- // Additional data pertaining to the "Name" Guid memory
- // may go here.
- //
-} EFI_HOB_MEMORY_ALLOCATION;
-
-///
-/// The resource type.
-///
-typedef UINT32 EFI_RESOURCE_TYPE;
-
-//
-// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
-//
-#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
-#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
-#define EFI_RESOURCE_IO 0x00000002
-#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
-#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
-#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
-#define EFI_RESOURCE_IO_RESERVED 0x00000006
-#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
-
-///
-/// A type of recount attribute type.
-///
-typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
-
-//
-// These types can be ORed together as needed.
-//
-// The first three enumerations describe settings
-//
-#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
-#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
-#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
-//
-// The rest of the settings describe capabilities
-//
-#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
-#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
-#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
-#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
-#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
-
-///
-/// Describes the resource properties of all fixed,
-/// nonrelocatable resource ranges found on the processor
-/// host bus during the HOB producer phase.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID representing the owner of the resource. This GUID is used by HOB
- /// consumer phase components to correlate device ownership of a resource.
- ///
- EFI_GUID Owner;
- ///
- /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
- ///
- EFI_RESOURCE_TYPE ResourceType;
- ///
- /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
- ///
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
- ///
- /// The physical start address of the resource region.
- ///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
- ///
- /// The number of bytes of the resource region.
- ///
- UINT64 ResourceLength;
-} EFI_HOB_RESOURCE_DESCRIPTOR;
-
-///
-/// Allows writers of executable content in the HOB producer phase to
-/// maintain and manage HOBs with specific GUID.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID that defines the contents of this HOB.
- ///
- EFI_GUID Name;
- //
- // Guid specific data goes here
- //
-} EFI_HOB_GUID_TYPE;
-
-///
-/// Union of all the possible HOB Types.
-///
-typedef union {
- EFI_HOB_GENERIC_HEADER *Header;
- EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
- EFI_HOB_GUID_TYPE *Guid;
- UINT8 *Raw;
-} EFI_PEI_HOB_POINTERS;
-
-
-/**
- Returns the type of a HOB.
-
- This macro returns the HobType field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobType.
-
-**/
-#define GET_HOB_TYPE(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
-
-/**
- Returns the length, in bytes, of a HOB.
-
- This macro returns the HobLength field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobLength.
-
-**/
-#define GET_HOB_LENGTH(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
-
-/**
- Returns a pointer to the next HOB in the HOB list.
-
- This macro returns a pointer to HOB that follows the
- HOB specified by HobStart in the HOB List.
-
- @param HobStart A pointer to a HOB.
-
- @return A pointer to the next HOB in the HOB list.
-
-**/
-#define GET_NEXT_HOB(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
-
-/**
- Determines if a HOB is the last HOB in the HOB list.
-
- This macro determine if the HOB specified by HobStart is the
- last HOB in the HOB list. If HobStart is last HOB in the HOB list,
- then TRUE is returned. Otherwise, FALSE is returned.
-
- @param HobStart A pointer to a HOB.
-
- @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
- @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
-
-**/
-#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
-
-/**
- Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns a pointer to the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return A pointer to the data buffer in a HOB.
-
-**/
-#define GET_GUID_HOB_DATA(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return The size of the data buffer.
-**/
-#define GET_GUID_HOB_DATA_SIZE(HobStart) \
- (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the pointer to the HOB list.
-
- This function returns the pointer to first HOB in the list.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @return The pointer to the HOB list.
-
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- );
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-
- This function searches the first instance of a HOB type from the starting HOB pointer.
- If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If HobStart is NULL, then ASSERT().
-
- @param Type The HOB type to return.
- @param HobStart The starting HOB pointer to search from.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-
- This function searches the first instance of a HOB type among the whole HOB list.
- If there does not exist such HOB type in the HOB list, it will return NULL.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @param Type The HOB type to return.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- );
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-
- This function searches the first instance of a HOB from the starting HOB pointer.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If Guid is NULL, then ASSERT().
- If HobStart is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
- @param HobStart A pointer to a Guid.
-
- @return The next instance of the matched GUID HOB from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-
- This function searches the first instance of a HOB among the whole HOB list.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
-
- If the pointer to the HOB list is NULL, then ASSERT().
- If Guid is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
-
- @return The first instance of the matched GUID HOB among the whole HOB list.
-
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- );
-
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- );
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
deleted file mode 100644
index 0f7b3a9..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_INFO_HEADER_H_
-#define _FSP_INFO_HEADER_H_
-
-#pragma pack(1)
-
-typedef struct {
-
- UINT32 Signature; // Off 0x94
- UINT32 HeaderLength;
- UINT8 Reserved1[3];
- UINT8 HeaderRevision;
- UINT32 ImageRevision;
-
- CHAR8 ImageId[8]; // Off 0xA4
- UINT32 ImageSize;
- UINT32 ImageBase;
-
- UINT32 ImageAttribute; // Off 0xB4
- UINT32 CfgRegionOffset;
- UINT32 CfgRegionSize;
- UINT32 ApiEntryNum;
-
- UINT32 NemInitEntry; // Off 0xC4
- UINT32 FspInitEntry;
- UINT32 NotifyPhaseEntry;
- UINT32 Reserved2;
-
-} FSP_INFO_HEADER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
deleted file mode 100644
index 06cf67e..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_PLATFORM_H_
-#define _FSP_PLATFORM_H_
-
-#include "fsptypes.h"
-#include "fspapi.h"
-#include "mem_config.h"
-
-#pragma pack(1)
-
-typedef struct {
- MEM_CONFIG *MemoryConfig;
-} FSP_INIT_RT_PLATFORM_BUFFER;
-
-typedef struct {
- uint8_t HTEnable;
- uint8_t TurboEnable;
- uint8_t MemoryDownEnable;
- uint8_t FastBootEnable;
-} PLATFORM_CONFIG;
-
-typedef struct {
- const PLATFORM_CONFIG *PlatformConfig;
-} FSP_INIT_RT_CONFIG_BUFFER;
-
-typedef struct {
- FSP_INIT_RT_COMMON_BUFFER Common;
- FSP_INIT_RT_CONFIG_BUFFER PlatformConfiguration;
- FSP_INIT_RT_PLATFORM_BUFFER Platform;
-} FSP_INIT_RT_BUFFER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
deleted file mode 100644
index a3a54c0..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/** \file fsptypes.h
- *
- *
- */
-
-#ifndef __FSP_TYPES_H__
-#define __FSP_TYPES_H__
-
-///
-/// 8-byte unsigned value.
-///
-typedef unsigned long long UINT64;
-///
-/// 8-byte signed value.
-///
-typedef long long INT64;
-///
-/// 4-byte unsigned value.
-///
-typedef unsigned int UINT32;
-///
-/// 4-byte signed value.
-///
-typedef int INT32;
-///
-/// 2-byte unsigned value.
-///
-typedef unsigned short UINT16;
-///
-/// 2-byte Character. Unless otherwise specified all strings are stored in the
-/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
-///
-typedef unsigned short CHAR16;
-///
-/// 2-byte signed value.
-///
-typedef short INT16;
-///
-/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
-/// values are undefined.
-///
-typedef unsigned char BOOLEAN;
-///
-/// 1-byte unsigned value.
-///
-typedef unsigned char UINT8;
-///
-/// 1-byte Character
-///
-typedef char CHAR8;
-///
-/// 1-byte signed value
-///
-typedef char INT8;
-
-typedef void VOID;
-
-typedef UINT64 EFI_PHYSICAL_ADDRESS;
-
-typedef struct {
- UINT32 Data1;
- UINT16 Data2;
- UINT16 Data3;
- UINT8 Data4[8];
-} EFI_GUID;
-
-#define CONST const
-#define STATIC static
-
-#define TRUE ((BOOLEAN)(1==1))
-#define FALSE ((BOOLEAN)(0==1))
-
-#define FSPAPI __attribute__((cdecl))
-#define EFIAPI __attribute__((cdecl))
-
-#define ASSERT(Expression) \
- do { \
- if (!(Expression)) { \
- for (;;); \
- } \
- } while (FALSE)
-
-typedef UINT32 FSP_STATUS;
-typedef UINT32 EFI_STATUS;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/mem_config.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
deleted file mode 100644
index 26deb90..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-//
-// mem_config.h
-//
-
-#ifndef _MEM_CONFIG_H_
-#define _MEM_CONFIG_H_
-
-typedef enum {
- fi1067_IVB=0,
- fi1333_IVB,
- fi1400_IVB,
- fi1600_IVB,
- fi1800_IVB,
- fi1867_IVB,
- fi2000_IVB,
- fi2133_IVB,
- fi2200_IVB,
- fi2400_IVB,
- fi2600_IVB,
- fi2667_IVB,
- fi2800_IVB,
- fiUnsupport_IVB,
-}TFrequencyIndex_IVB;
-
-#define NUM_IVB_MEM_CLK_FREQUENCIES 13
-
-// DDR3 memory SPD data
-//
-// NOTE: This only includes the SPD bytes that are relevant to the MRC
-typedef struct { // BYTE
- uint8_t SPDGeneral; // 0 Number of Serial PD Bytes Written / SPD Device Size / CRC Coverage 1, 2
- uint8_t SPDRevision; // 1 SPD Revision
- uint8_t DRAMDeviceType; // 2 DRAM Device Type
- uint8_t ModuleType; // 3 Module Type
- uint8_t SDRAMDensityAndBanks; // 4 SDRAM Density and Banks
- uint8_t SDRAMAddressing; // 5 SDRAM Addressing
- uint8_t VDD; // 6 Module Nominal Voltage
- uint8_t ModuleOrganization; // 7 Module Organization
- uint8_t ModuleMemoryBusWidth; // 8 Module Memory Bus Width
- uint8_t FineTimebase; // 9 Fine Timebase (FTB) Dividend / Divisor
- uint8_t TimebaseDividend; // 10 Medium Timebase (MTB) Dividend
- uint8_t TimebaseDivisor; // 11 Medium Timebase (MTB) Divisor
- uint8_t SDRAMMinimumCycleTime; // 12 SDRAM Minimum Cycle Time (tCKmin)
- uint8_t Reserved0; // 13 Reserved0
- uint8_t CASLatenciesLSB; // 14 CAS Latencies Supported, Least Significant Byte
- uint8_t CASLatenciesMSB; // 15 CAS Latencies Supported, Most Significant Byte
- uint8_t MinimumCASLatencyTime; // 16 Minimum CAS Latency Time (tAAmin)
- uint8_t MinimumWriteRecoveryTime; // 17 Minimum Write Recovery Time (tWRmin)
- uint8_t MinimumRASToCASDelayTime; // 18 Minimum RAS# to CAS# Delay Time (tRCDmin)
- uint8_t MinimumRowToRowDelayTime; // 19 Minimum Row Active to Row Active Delay Time (tRRDmin)
- uint8_t MinimumRowPrechargeDelayTime; // 20 Minimum Row Precharge Delay Time (tRPmin)
- uint8_t UpperNibblesFortRASAndtRC; // 21 Upper Nibbles for tRAS and tRC
- uint8_t tRASmin; // 22 Minimum Active to Precharge Delay Time (tRASmin), Least Significant Byte
- uint8_t tRCmin; // 23 Minimum Active to Active/Refresh Delay Time (tRCmin), Least Significant Byte
- uint8_t tRFCminLeastSignificantByte; // 24 Minimum Refresh Recovery Delay Time (tRFCmin), Least Significant Byte
- uint8_t tRFCminMostSignificantByte; // 25 Minimum Refresh Recovery Delay Time (tRFCmin), Most Significant Byte
- uint8_t tWTRmin; // 26 Minimum Internal Write to Read Command Delay Time (tWTRmin)
- uint8_t tRTPmin; // 27 Minimum Internal Read to Precharge Command Delay Time (tRTPmin)
- uint8_t UpperNibbleFortFAW; // 28 Upper Nibble for tFAW
- uint8_t tFAWmin; // 29 Minimum Four Activate Window Delay Time (tFAWmin)
- uint8_t SDRAMOptionalFeatures; // 30 SDRAM Optional Features
- uint8_t SDRAMThermalAndRefreshOptions; // 31 SDRAMThermalAndRefreshOptions
- uint8_t ModuleThermalSensor; // 32 ModuleThermalSensor
- uint8_t SDRAMDeviceType; // 33 SDRAM Device Type
- int8_t tCKminFine; // 34 Fine Offset for SDRAM Minimum Cycle Time (tCKmin)
- int8_t tAAminFine; // 35 Fine Offset for Minimum CAS Latency Time (tAAmin)
- int8_t tRCDminFine; // 36 Fine Offset for Minimum RAS# to CAS# Delay Time (tRCDmin)
- int8_t tRPminFine; // 37 Fine Offset for Minimum Row Precharge Delay Time (tRPmin)
- int8_t tRCminFine; // 38 Fine Offset for Minimum Active to Active/Refresh Delay Time (tRCmin)
- uint8_t ReferenceRawCardUsed; // 62 Reference Raw Card Used
- uint8_t AddressMappingEdgeConnector; // 63 Address Mapping from Edge Connector to DRAM
- uint8_t ThermalHeatSpreaderSolution; // 64 ThermalHeatSpreaderSolution
- uint8_t ModuleManufacturerIdCodeLsb; // 117 Module Manufacturer ID Code, Least Significant Byte
- uint8_t ModuleManufacturerIdCodeMsb; // 118 Module Manufacturer ID Code, Most Significant Byte
- uint8_t ModuleManufacturingLocation; // 119 Module Manufacturing Location
- uint8_t ModuleManufacturingDateYear; // 120 Module Manufacturing Date Year
- uint8_t ModuleManufacturingDateWW; // 121 Module Manufacturing Date creation work week
- uint8_t ModuleSerialNumberA; // 122 Module Serial Number A
- uint8_t ModuleSerialNumberB; // 123 Module Serial Number B
- uint8_t ModuleSerialNumberC; // 124 Module Serial Number C
- uint8_t ModuleSerialNumberD; // 125 Module Serial Number D
- uint8_t CRCA; // 126 CRC A
- uint8_t CRCB; // 127 CRC B
-} DDR3_SPD;
-
-// Configuration for each memory channel/bank
-typedef struct {
- uint32_t Exists;
- DDR3_SPD SpdData;
- uint8_t InitClkPiValue[NUM_IVB_MEM_CLK_FREQUENCIES];
-} MEM_BANK_CONFIG;
-
-// Memory configuration
-typedef struct {
- MEM_BANK_CONFIG ChannelABank0;
- MEM_BANK_CONFIG ChannelABank1;
- MEM_BANK_CONFIG ChannelBBank0;
- MEM_BANK_CONFIG ChannelBBank1;
-} MEM_CONFIG;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/peifsp.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
deleted file mode 100644
index dc3e60f..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/** \file peifsp.h
- *
- *
- */
-#include <stdint.h>
-#include "fsptypes.h"
-#include "fspfv.h"
-#include "fspffs.h"
-#include "fsphob.h"
-#include "fspapi.h"
-#include "fspplatform.h"
-#include "fspinfoheader.h"
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
deleted file mode 100644
index 4214b3a..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/***********************************************************************
- *
- * fsphob.c
- *
- * HOB infrastructure code.
- *
- **********************************************************************/
-#include <string.h>
-
-#include "fsptypes.h"
-#include "fsphob.h"
-
-//
-// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
-//
-extern volatile void *FspHobListPtr;
-
-//
-// Function prototype
-//
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- );
-
-/**
- Reads a 64-bit value from memory that may be unaligned.
-
- This function returns the 64-bit value pointed to by Buffer. The function
- guarantees that the read operation does not produce an alignment fault.
-
- If the Buffer is NULL, then ASSERT().
-
- @param Buffer Pointer to a 64-bit value that may be unaligned.
-
- @return The 64-bit value read from Buffer.
-
-**/
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- )
-{
- ASSERT (Buffer != NULL);
-
- return *Buffer;
-}
-
-/**
- Compares two GUIDs.
-
- This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
- If there are any bit differences in the two GUIDs, then FALSE is returned.
-
- If Guid1 is NULL, then ASSERT().
- If Guid2 is NULL, then ASSERT().
-
- @param Guid1 A pointer to a 128 bit GUID.
- @param Guid2 A pointer to a 128 bit GUID.
-
- @retval TRUE Guid1 and Guid2 are identical.
- @retval FALSE Guid1 and Guid2 are not identical.
-
-**/
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- )
-{
- UINT64 LowPartOfGuid1;
- UINT64 LowPartOfGuid2;
- UINT64 HighPartOfGuid1;
- UINT64 HighPartOfGuid2;
-
- LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
- LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
- HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
- HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
-
- return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
-}
-
-/**
- Returns the pointer to the HOB list.
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- )
-{
- ASSERT (FspHobListPtr != NULL);
- return ((VOID *)FspHobListPtr);
-}
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- ASSERT (HobStart != NULL);
-
- Hob.Raw = (UINT8 *) HobStart;
- //
- // Parse the HOB list until end of list or matching type is found.
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == Type) {
- return Hob.Raw;
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
- return NULL;
-}
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextHob (Type, HobList);
-}
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS GuidHob;
-
- GuidHob.Raw = (UINT8 *) HobStart;
- while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
- if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
- break;
- }
- GuidHob.Raw = GET_NEXT_HOB (GuidHob);
- }
- return GuidHob.Raw;
-}
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextGuidHob (Guid, HobList);
-}
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
deleted file mode 100644
index fdee5f4..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __VPDHEADER_H__
-#define __VPDHEADER_H__
-
-#pragma pack(1)
-
-typedef struct _UPD_DATA_REGION {
- UINT64 Signature; /* Offset 0x0000 */
- UINT64 Reserved; /* Offset 0x0008 */
- UINT8 HTEnable; /* Offset 0x0010 */
- UINT8 TurboEnable; /* Offset 0x0011 */
- UINT8 MemoryDownEnable; /* Offset 0x0012 */
- UINT8 FastBootEnable; /* Offset 0x0013 */
- UINT16 PcdRegionTerminator; /* Offset 0x0310 */
-} UPD_DATA_REGION;
-
-
-#define VPD_IMAGE_SIGN 0x565053462d325453 /* 'ST2-FSPV' */
-#define VPD_IMAGE_REV 0x00000001
-
-typedef struct _VPD_DATA_REGION {
- UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
- UINT32 PcdImageRevision; /* Offset 0x0008 */
- UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
- UINT8 Padding0[16]; /* Offset 0x0010 */
- UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
-} VPD_DATA_REGION;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h
deleted file mode 100644
index 18a1582..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/**
-
-Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.
-This software and associated documentation (if any) is furnished
-under a license and may only be used or copied in accordance
-with the terms of the license. Except as permitted by such
-license, no part of this software or documentation may be
-reproduced, stored in a retrieval system, or transmitted in any
-form or by any means without the express written consent of
-Intel Corporation.
-
-**/
-
-#ifndef _FSP_API_H_
-#define _FSP_API_H_
-
-#pragma pack(1)
-
-typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
-
-typedef struct {
- VOID *NvsBufferPtr;
- VOID *RtBufferPtr;
- CONTINUATION_PROC ContinuationFunc;
-} FSP_INIT_PARAMS;
-
-typedef struct {
- UINT32 *StackTop;
- UINT32 BootMode; /* Refer to boot mode defined in MdePkg\Include\Pi\PiBootMode.h */
- VOID *UpdDataRgnPtr;
- UINT32 Reserved[7];
-} FSP_INIT_RT_COMMON_BUFFER;
-
-typedef enum {
- EnumInitPhaseAfterPciEnumeration = 0x20,
- EnumInitPhaseReadyToBoot = 0x40
-} FSP_INIT_PHASE;
-
-typedef struct {
- FSP_INIT_PHASE Phase;
-} NOTIFY_PHASE_PARAMS;
-
-#pragma pack()
-
-
-typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
-typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspffs.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspffs.h
deleted file mode 100644
index 7a7c367..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspffs.h
+++ /dev/null
@@ -1,506 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-
-#ifndef __PI_FIRMWARE_FILE_H__
-#define __PI_FIRMWARE_FILE_H__
-
-#pragma pack(1)
-///
-/// Used to verify the integrity of the file.
-///
-typedef union {
- struct {
- ///
- /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
- /// header. The State and IntegrityCheck.Checksum.File fields are assumed
- /// to be zero and the checksum is calculated such that the entire header sums to zero.
- ///
- UINT8 Header;
- ///
- /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
- /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
- /// checksum of the file data.
- /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
- /// the IntegrityCheck.Checksum.File field must be initialized with a value of
- /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
- /// EFI_FILE_DATA_VALID bit is set in the State field.
- ///
- UINT8 File;
- } Checksum;
- ///
- /// This is the full 16 bits of the IntegrityCheck field.
- ///
- UINT16 Checksum16;
-} EFI_FFS_INTEGRITY_CHECK;
-
-///
-/// FFS_FIXED_CHECKSUM is the checksum value used when the
-/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
-///
-#define FFS_FIXED_CHECKSUM 0xAA
-
-typedef UINT8 EFI_FV_FILETYPE;
-typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
-typedef UINT8 EFI_FFS_FILE_STATE;
-
-///
-/// File Types Definitions
-///
-#define EFI_FV_FILETYPE_ALL 0x00
-#define EFI_FV_FILETYPE_RAW 0x01
-#define EFI_FV_FILETYPE_FREEFORM 0x02
-#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
-#define EFI_FV_FILETYPE_PEI_CORE 0x04
-#define EFI_FV_FILETYPE_DXE_CORE 0x05
-#define EFI_FV_FILETYPE_PEIM 0x06
-#define EFI_FV_FILETYPE_DRIVER 0x07
-#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
-#define EFI_FV_FILETYPE_APPLICATION 0x09
-#define EFI_FV_FILETYPE_SMM 0x0A
-#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
-#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
-#define EFI_FV_FILETYPE_SMM_CORE 0x0D
-#define EFI_FV_FILETYPE_OEM_MIN 0xc0
-#define EFI_FV_FILETYPE_OEM_MAX 0xdf
-#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
-#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
-#define EFI_FV_FILETYPE_FFS_MIN 0xf0
-#define EFI_FV_FILETYPE_FFS_MAX 0xff
-#define EFI_FV_FILETYPE_FFS_PAD 0xf0
-///
-/// FFS File Attributes.
-///
-#define FFS_ATTRIB_LARGE_FILE 0x01
-#define FFS_ATTRIB_FIXED 0x04
-#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
-#define FFS_ATTRIB_CHECKSUM 0x40
-
-///
-/// FFS File State Bits.
-///
-#define EFI_FILE_HEADER_CONSTRUCTION 0x01
-#define EFI_FILE_HEADER_VALID 0x02
-#define EFI_FILE_DATA_VALID 0x04
-#define EFI_FILE_MARKED_FOR_UPDATE 0x08
-#define EFI_FILE_DELETED 0x10
-#define EFI_FILE_HEADER_INVALID 0x20
-
-
-///
-/// Each file begins with the header that describe the
-/// contents and state of the files.
-///
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file.
- ///
- EFI_GUID Name;
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
- ///
- /// The length of the file in bytes, including the FFS header.
- ///
- UINT8 Size[3];
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-} EFI_FFS_FILE_HEADER;
-
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file. There may be only
- /// one instance of a file with the file name GUID of Name in any given firmware
- /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
- ///
- EFI_GUID Name;
-
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
-
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
-
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
-
- ///
- /// The length of the file in bytes, including the FFS header.
- /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
- /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
- /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
- /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
- ///
- UINT8 Size[3];
-
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-
- ///
- /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
- /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
- ///
- UINT32 ExtendedSize;
-} EFI_FFS_FILE_HEADER2;
-
-#define IS_FFS_FILE2(FfsFileHeaderPtr) \
- (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
-
-#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
-
-#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
- (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
-
-typedef UINT8 EFI_SECTION_TYPE;
-
-///
-/// Pseudo type. It is used as a wild card when retrieving sections.
-/// The section type EFI_SECTION_ALL matches all section types.
-///
-#define EFI_SECTION_ALL 0x00
-
-///
-/// Encapsulation section Type values.
-///
-#define EFI_SECTION_COMPRESSION 0x01
-
-#define EFI_SECTION_GUID_DEFINED 0x02
-
-#define EFI_SECTION_DISPOSABLE 0x03
-
-///
-/// Leaf section Type values.
-///
-#define EFI_SECTION_PE32 0x10
-#define EFI_SECTION_PIC 0x11
-#define EFI_SECTION_TE 0x12
-#define EFI_SECTION_DXE_DEPEX 0x13
-#define EFI_SECTION_VERSION 0x14
-#define EFI_SECTION_USER_INTERFACE 0x15
-#define EFI_SECTION_COMPATIBILITY16 0x16
-#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
-#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
-#define EFI_SECTION_RAW 0x19
-#define EFI_SECTION_PEI_DEPEX 0x1B
-#define EFI_SECTION_SMM_DEPEX 0x1C
-
-///
-/// Common section header.
-///
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
- EFI_SECTION_TYPE Type;
- ///
- /// Declares the section type.
- ///
-} EFI_COMMON_SECTION_HEADER;
-
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
-
- EFI_SECTION_TYPE Type;
-
- ///
- /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
- /// Size is not equal to 0xFFFFFF, then this field does not exist.
- ///
- UINT32 ExtendedSize;
-} EFI_COMMON_SECTION_HEADER2;
-
-///
-/// Leaf section type that contains an
-/// IA-32 16-bit executable image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
-
-///
-/// CompressionType of EFI_COMPRESSION_SECTION.
-///
-#define EFI_NOT_COMPRESSED 0x00
-#define EFI_STANDARD_COMPRESSION 0x01
-///
-/// An encapsulation section type in which the
-/// section data is compressed.
-///
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION;
-
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION2;
-
-///
-/// An encapsulation section type in which the section data is disposable.
-/// A disposable section is an encapsulation section in which the section data may be disposed of during
-/// the process of creating or updating a firmware image without significant impact on the usefulness of
-/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
-/// allows optional or descriptive data to be included with the firmware file which can be removed in
-/// order to conserve space. The contents of this section are implementation specific, but might contain
-/// debug data or detailed integration instructions.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
-
-///
-/// The leaf section which could be used to determine the dispatch order of DXEs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a PI FV.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
-
-///
-/// The leaf section which contains a single GUID.
-///
-typedef struct {
- ///
- /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
-
-///
-/// Attributes of EFI_GUID_DEFINED_SECTION.
-///
-#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
-#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
-///
-/// The leaf section which is encapsulation defined by specific GUID.
-///
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION2;
-
-///
-/// The leaf section which contains PE32+ image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
-
-///
-/// The leaf section used to determine the dispatch order of PEIMs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
-
-///
-/// A leaf section type that contains a position-independent-code (PIC) image.
-/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
-/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
-/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
-/// relocation information has been stripped from the image and the image can be moved and will
-/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
-/// be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
-
-///
-/// The leaf section which constains the position-independent-code image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
-
-///
-/// The leaf section which contains an array of zero or more bytes.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
-
-///
-/// The SMM dependency expression section is a leaf section that contains a dependency expression that
-/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
-/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
-/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
-/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
-/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a unicode string that
-/// is human readable file name.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION2;
-
-///
-/// The leaf section which contains a numeric build number and
-/// an optional unicode string that represents the file revision.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
- UINT16 BuildNumber;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// A UINT16 that represents a particular build. Subsequent builds have monotonically
- /// increasing build numbers relative to earlier builds.
- ///
- UINT16 BuildNumber;
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION2;
-
-#define IS_SECTION2(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
-
-#define SECTION_SIZE(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
-
-#define SECTION2_SIZE(SectionHeaderPtr) \
- (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspfv.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspfv.h
deleted file mode 100644
index 75d17fa..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspfv.h
+++ /dev/null
@@ -1,247 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_FIRMWAREVOLUME_H__
-#define __PI_FIRMWAREVOLUME_H__
-
-///
-/// EFI_FV_FILE_ATTRIBUTES
-///
-typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
-
-//
-// Value of EFI_FV_FILE_ATTRIBUTES.
-//
-#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
-#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
-#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
-
-///
-/// type of EFI FVB attribute
-///
-typedef UINT32 EFI_FVB_ATTRIBUTES_2;
-
-//
-// Attributes bit definitions
-//
-#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
-#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
-#define EFI_FVB2_READ_STATUS 0x00000004
-#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
-#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
-#define EFI_FVB2_WRITE_STATUS 0x00000020
-#define EFI_FVB2_LOCK_CAP 0x00000040
-#define EFI_FVB2_LOCK_STATUS 0x00000080
-#define EFI_FVB2_STICKY_WRITE 0x00000200
-#define EFI_FVB2_MEMORY_MAPPED 0x00000400
-#define EFI_FVB2_ERASE_POLARITY 0x00000800
-#define EFI_FVB2_READ_LOCK_CAP 0x00001000
-#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
-#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
-#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
-#define EFI_FVB2_ALIGNMENT 0x001F0000
-#define EFI_FVB2_ALIGNMENT_1 0x00000000
-#define EFI_FVB2_ALIGNMENT_2 0x00010000
-#define EFI_FVB2_ALIGNMENT_4 0x00020000
-#define EFI_FVB2_ALIGNMENT_8 0x00030000
-#define EFI_FVB2_ALIGNMENT_16 0x00040000
-#define EFI_FVB2_ALIGNMENT_32 0x00050000
-#define EFI_FVB2_ALIGNMENT_64 0x00060000
-#define EFI_FVB2_ALIGNMENT_128 0x00070000
-#define EFI_FVB2_ALIGNMENT_256 0x00080000
-#define EFI_FVB2_ALIGNMENT_512 0x00090000
-#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
-#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
-#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
-#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
-#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
-#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
-#define EFI_FVB2_ALIGNMENT_64K 0x00100000
-#define EFI_FVB2_ALIGNMENT_128K 0x00110000
-#define EFI_FVB2_ALIGNMENT_256K 0x00120000
-#define EFI_FVB2_ALIGNMENT_512K 0x00130000
-#define EFI_FVB2_ALIGNMENT_1M 0x00140000
-#define EFI_FVB2_ALIGNMENT_2M 0x00150000
-#define EFI_FVB2_ALIGNMENT_4M 0x00160000
-#define EFI_FVB2_ALIGNMENT_8M 0x00170000
-#define EFI_FVB2_ALIGNMENT_16M 0x00180000
-#define EFI_FVB2_ALIGNMENT_32M 0x00190000
-#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
-#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
-#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
-#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
-#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
-#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
-
-
-typedef struct {
- ///
- /// The number of sequential blocks which are of the same size.
- ///
- UINT32 NumBlocks;
- ///
- /// The size of the blocks.
- ///
- UINT32 Length;
-} EFI_FV_BLOCK_MAP_ENTRY;
-
-///
-/// Describes the features and layout of the firmware volume.
-///
-typedef struct {
- ///
- /// The first 16 bytes are reserved to allow for the reset vector of
- /// processors whose reset vector is at address 0.
- ///
- UINT8 ZeroVector[16];
- ///
- /// Declares the file system with which the firmware volume is formatted.
- ///
- EFI_GUID FileSystemGuid;
- ///
- /// Length in bytes of the complete firmware volume, including the header.
- ///
- UINT64 FvLength;
- ///
- /// Set to EFI_FVH_SIGNATURE
- ///
- UINT32 Signature;
- ///
- /// Declares capabilities and power-on defaults for the firmware volume.
- ///
- EFI_FVB_ATTRIBUTES_2 Attributes;
- ///
- /// Length in bytes of the complete firmware volume header.
- ///
- UINT16 HeaderLength;
- ///
- /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
- ///
- UINT16 Checksum;
- ///
- /// Offset, relative to the start of the header, of the extended header
- /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
- ///
- UINT16 ExtHeaderOffset;
- ///
- /// This field must always be set to zero.
- ///
- UINT8 Reserved[1];
- ///
- /// Set to 2. Future versions of this specification may define new header fields and will
- /// increment the Revision field accordingly.
- ///
- UINT8 Revision;
- ///
- /// An array of run-length encoded FvBlockMapEntry structures. The array is
- /// terminated with an entry of {0,0}.
- ///
- EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
-} EFI_FIRMWARE_VOLUME_HEADER;
-
-#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
-
-///
-/// Firmware Volume Header Revision definition
-///
-#define EFI_FVH_REVISION 0x02
-
-///
-/// Extension header pointed by ExtHeaderOffset of volume header.
-///
-typedef struct {
- ///
- /// Firmware volume name.
- ///
- EFI_GUID FvName;
- ///
- /// Size of the rest of the extension header, including this structure.
- ///
- UINT32 ExtHeaderSize;
-} EFI_FIRMWARE_VOLUME_EXT_HEADER;
-
-///
-/// Entry struture for describing FV extension header
-///
-typedef struct {
- ///
- /// Size of this header extension.
- ///
- UINT16 ExtEntrySize;
- ///
- /// Type of the header.
- ///
- UINT16 ExtEntryType;
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
-
-#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
-///
-/// This extension header provides a mapping between a GUID and an OEM file type.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
- /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
- ///
- UINT32 TypeMask;
- ///
- /// An array of GUIDs, each GUID representing an OEM file type.
- ///
- /// EFI_GUID Types[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
-
-#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
-
-///
-/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
-/// GUID FormatType type which includes a length and a successive series of data bytes.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// Vendor-specific GUID.
- ///
- EFI_GUID FormatType;
- ///
- /// An arry of bytes of length Length.
- ///
- /// UINT8 Data[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsphob.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsphob.h
deleted file mode 100644
index 5840907..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsphob.h
+++ /dev/null
@@ -1,507 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_HOB_H__
-#define __PI_HOB_H__
-
-//
-// HobType of EFI_HOB_GENERIC_HEADER.
-//
-#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
-#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
-#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
-#define EFI_HOB_TYPE_UNUSED 0xFFFE
-#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
-
-///
-/// Describes the format and size of the data inside the HOB.
-/// All HOBs must contain this generic HOB header.
-///
-typedef struct {
- ///
- /// Identifies the HOB data structure type.
- ///
- UINT16 HobType;
- ///
- /// The length in bytes of the HOB.
- ///
- UINT16 HobLength;
- ///
- /// This field must always be set to zero.
- ///
- UINT32 Reserved;
-} EFI_HOB_GENERIC_HEADER;
-
-///
-/// Enumeration of memory types introduced in UEFI.
-///
-typedef enum {
- ///
- /// Not used.
- ///
- EfiReservedMemoryType,
- ///
- /// The code portions of a loaded application.
- /// (Note that UEFI OS loaders are UEFI applications.)
- ///
- EfiLoaderCode,
- ///
- /// The data portions of a loaded application and the default data allocation
- /// type used by an application to allocate pool memory.
- ///
- EfiLoaderData,
- ///
- /// The code portions of a loaded Boot Services Driver.
- ///
- EfiBootServicesCode,
- ///
- /// The data portions of a loaded Boot Serves Driver, and the default data
- /// allocation type used by a Boot Services Driver to allocate pool memory.
- ///
- EfiBootServicesData,
- ///
- /// The code portions of a loaded Runtime Services Driver.
- ///
- EfiRuntimeServicesCode,
- ///
- /// The data portions of a loaded Runtime Services Driver and the default
- /// data allocation type used by a Runtime Services Driver to allocate pool memory.
- ///
- EfiRuntimeServicesData,
- ///
- /// Free (unallocated) memory.
- ///
- EfiConventionalMemory,
- ///
- /// Memory in which errors have been detected.
- ///
- EfiUnusableMemory,
- ///
- /// Memory that holds the ACPI tables.
- ///
- EfiACPIReclaimMemory,
- ///
- /// Address space reserved for use by the firmware.
- ///
- EfiACPIMemoryNVS,
- ///
- /// Used by system firmware to request that a memory-mapped IO region
- /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
- ///
- EfiMemoryMappedIO,
- ///
- /// System memory-mapped IO region that is used to translate memory
- /// cycles to IO cycles by the processor.
- ///
- EfiMemoryMappedIOPortSpace,
- ///
- /// Address space reserved by the firmware for code that is part of the processor.
- ///
- EfiPalCode,
- EfiMaxMemoryType
-} EFI_MEMORY_TYPE;
-
-///
-/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
-/// various attributes of the logical memory allocation. The type field will be used for
-/// subsequent inclusion in the UEFI memory map.
-///
-typedef struct {
- ///
- /// A GUID that defines the memory allocation region's type and purpose, as well as
- /// other fields within the memory allocation HOB. This GUID is used to define the
- /// additional data within the HOB that may be present for the memory allocation HOB.
- /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
- /// specification.
- ///
- EFI_GUID Name;
-
- ///
- /// The base address of memory allocated by this HOB. Type
- /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
- /// specification.
- ///
- EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
-
- ///
- /// The length in bytes of memory allocated by this HOB.
- ///
- UINT64 MemoryLength;
-
- ///
- /// Defines the type of memory allocated by this HOB. The memory type definition
- /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
- /// in AllocatePages() in the UEFI 2.0 specification.
- ///
- EFI_MEMORY_TYPE MemoryType;
-
- ///
- /// Padding for Itanium processor family
- ///
- UINT8 Reserved[4];
-} EFI_HOB_MEMORY_ALLOCATION_HEADER;
-
-///
-/// Describes all memory ranges used during the HOB producer
-/// phase that exist outside the HOB list. This HOB type
-/// describes how memory is used, not the physical attributes of memory.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
- /// various attributes of the logical memory allocation.
- ///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
- //
- // Additional data pertaining to the "Name" Guid memory
- // may go here.
- //
-} EFI_HOB_MEMORY_ALLOCATION;
-
-///
-/// The resource type.
-///
-typedef UINT32 EFI_RESOURCE_TYPE;
-
-//
-// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
-//
-#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
-#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
-#define EFI_RESOURCE_IO 0x00000002
-#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
-#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
-#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
-#define EFI_RESOURCE_IO_RESERVED 0x00000006
-#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
-
-///
-/// A type of recount attribute type.
-///
-typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
-
-//
-// These types can be ORed together as needed.
-//
-// The first three enumerations describe settings
-//
-#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
-#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
-#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
-//
-// The rest of the settings describe capabilities
-//
-#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
-#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
-#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
-#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
-#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
-
-///
-/// Describes the resource properties of all fixed,
-/// nonrelocatable resource ranges found on the processor
-/// host bus during the HOB producer phase.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID representing the owner of the resource. This GUID is used by HOB
- /// consumer phase components to correlate device ownership of a resource.
- ///
- EFI_GUID Owner;
- ///
- /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
- ///
- EFI_RESOURCE_TYPE ResourceType;
- ///
- /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
- ///
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
- ///
- /// The physical start address of the resource region.
- ///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
- ///
- /// The number of bytes of the resource region.
- ///
- UINT64 ResourceLength;
-} EFI_HOB_RESOURCE_DESCRIPTOR;
-
-///
-/// Allows writers of executable content in the HOB producer phase to
-/// maintain and manage HOBs with specific GUID.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID that defines the contents of this HOB.
- ///
- EFI_GUID Name;
- //
- // Guid specific data goes here
- //
-} EFI_HOB_GUID_TYPE;
-
-///
-/// Union of all the possible HOB Types.
-///
-typedef union {
- EFI_HOB_GENERIC_HEADER *Header;
- EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
- EFI_HOB_GUID_TYPE *Guid;
- UINT8 *Raw;
-} EFI_PEI_HOB_POINTERS;
-
-
-/**
- Returns the type of a HOB.
-
- This macro returns the HobType field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobType.
-
-**/
-#define GET_HOB_TYPE(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
-
-/**
- Returns the length, in bytes, of a HOB.
-
- This macro returns the HobLength field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobLength.
-
-**/
-#define GET_HOB_LENGTH(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
-
-/**
- Returns a pointer to the next HOB in the HOB list.
-
- This macro returns a pointer to HOB that follows the
- HOB specified by HobStart in the HOB List.
-
- @param HobStart A pointer to a HOB.
-
- @return A pointer to the next HOB in the HOB list.
-
-**/
-#define GET_NEXT_HOB(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
-
-/**
- Determines if a HOB is the last HOB in the HOB list.
-
- This macro determine if the HOB specified by HobStart is the
- last HOB in the HOB list. If HobStart is last HOB in the HOB list,
- then TRUE is returned. Otherwise, FALSE is returned.
-
- @param HobStart A pointer to a HOB.
-
- @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
- @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
-
-**/
-#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
-
-/**
- Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns a pointer to the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return A pointer to the data buffer in a HOB.
-
-**/
-#define GET_GUID_HOB_DATA(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return The size of the data buffer.
-**/
-#define GET_GUID_HOB_DATA_SIZE(HobStart) \
- (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the pointer to the HOB list.
-
- This function returns the pointer to first HOB in the list.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @return The pointer to the HOB list.
-
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- );
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-
- This function searches the first instance of a HOB type from the starting HOB pointer.
- If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If HobStart is NULL, then ASSERT().
-
- @param Type The HOB type to return.
- @param HobStart The starting HOB pointer to search from.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-
- This function searches the first instance of a HOB type among the whole HOB list.
- If there does not exist such HOB type in the HOB list, it will return NULL.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @param Type The HOB type to return.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- );
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-
- This function searches the first instance of a HOB from the starting HOB pointer.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If Guid is NULL, then ASSERT().
- If HobStart is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
- @param HobStart A pointer to a Guid.
-
- @return The next instance of the matched GUID HOB from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-
- This function searches the first instance of a HOB among the whole HOB list.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
-
- If the pointer to the HOB list is NULL, then ASSERT().
- If Guid is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
-
- @return The first instance of the matched GUID HOB among the whole HOB list.
-
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- );
-
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- );
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
deleted file mode 100644
index 0f7b3a9..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_INFO_HEADER_H_
-#define _FSP_INFO_HEADER_H_
-
-#pragma pack(1)
-
-typedef struct {
-
- UINT32 Signature; // Off 0x94
- UINT32 HeaderLength;
- UINT8 Reserved1[3];
- UINT8 HeaderRevision;
- UINT32 ImageRevision;
-
- CHAR8 ImageId[8]; // Off 0xA4
- UINT32 ImageSize;
- UINT32 ImageBase;
-
- UINT32 ImageAttribute; // Off 0xB4
- UINT32 CfgRegionOffset;
- UINT32 CfgRegionSize;
- UINT32 ApiEntryNum;
-
- UINT32 NemInitEntry; // Off 0xC4
- UINT32 FspInitEntry;
- UINT32 NotifyPhaseEntry;
- UINT32 Reserved2;
-
-} FSP_INFO_HEADER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspplatform.h
deleted file mode 100644
index e78ac47..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspplatform.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_PLATFORM_H_
-#define _FSP_PLATFORM_H_
-
-#include "fsptypes.h"
-#include "fspapi.h"
-#include "mem_config.h"
-
-#pragma pack(1)
-
-typedef struct {
- MEM_CONFIG *MemoryConfig;
-} FSP_INIT_RT_PLATFORM_BUFFER;
-
-
-typedef struct {
- FSP_INIT_RT_COMMON_BUFFER Common;
- FSP_INIT_RT_PLATFORM_BUFFER Platform;
-} FSP_INIT_RT_BUFFER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsptypes.h
deleted file mode 100644
index a3a54c0..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsptypes.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/** \file fsptypes.h
- *
- *
- */
-
-#ifndef __FSP_TYPES_H__
-#define __FSP_TYPES_H__
-
-///
-/// 8-byte unsigned value.
-///
-typedef unsigned long long UINT64;
-///
-/// 8-byte signed value.
-///
-typedef long long INT64;
-///
-/// 4-byte unsigned value.
-///
-typedef unsigned int UINT32;
-///
-/// 4-byte signed value.
-///
-typedef int INT32;
-///
-/// 2-byte unsigned value.
-///
-typedef unsigned short UINT16;
-///
-/// 2-byte Character. Unless otherwise specified all strings are stored in the
-/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
-///
-typedef unsigned short CHAR16;
-///
-/// 2-byte signed value.
-///
-typedef short INT16;
-///
-/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
-/// values are undefined.
-///
-typedef unsigned char BOOLEAN;
-///
-/// 1-byte unsigned value.
-///
-typedef unsigned char UINT8;
-///
-/// 1-byte Character
-///
-typedef char CHAR8;
-///
-/// 1-byte signed value
-///
-typedef char INT8;
-
-typedef void VOID;
-
-typedef UINT64 EFI_PHYSICAL_ADDRESS;
-
-typedef struct {
- UINT32 Data1;
- UINT16 Data2;
- UINT16 Data3;
- UINT8 Data4[8];
-} EFI_GUID;
-
-#define CONST const
-#define STATIC static
-
-#define TRUE ((BOOLEAN)(1==1))
-#define FALSE ((BOOLEAN)(0==1))
-
-#define FSPAPI __attribute__((cdecl))
-#define EFIAPI __attribute__((cdecl))
-
-#define ASSERT(Expression) \
- do { \
- if (!(Expression)) { \
- for (;;); \
- } \
- } while (FALSE)
-
-typedef UINT32 FSP_STATUS;
-typedef UINT32 EFI_STATUS;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/mem_config.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/mem_config.h
deleted file mode 100644
index 26deb90..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/mem_config.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-//
-// mem_config.h
-//
-
-#ifndef _MEM_CONFIG_H_
-#define _MEM_CONFIG_H_
-
-typedef enum {
- fi1067_IVB=0,
- fi1333_IVB,
- fi1400_IVB,
- fi1600_IVB,
- fi1800_IVB,
- fi1867_IVB,
- fi2000_IVB,
- fi2133_IVB,
- fi2200_IVB,
- fi2400_IVB,
- fi2600_IVB,
- fi2667_IVB,
- fi2800_IVB,
- fiUnsupport_IVB,
-}TFrequencyIndex_IVB;
-
-#define NUM_IVB_MEM_CLK_FREQUENCIES 13
-
-// DDR3 memory SPD data
-//
-// NOTE: This only includes the SPD bytes that are relevant to the MRC
-typedef struct { // BYTE
- uint8_t SPDGeneral; // 0 Number of Serial PD Bytes Written / SPD Device Size / CRC Coverage 1, 2
- uint8_t SPDRevision; // 1 SPD Revision
- uint8_t DRAMDeviceType; // 2 DRAM Device Type
- uint8_t ModuleType; // 3 Module Type
- uint8_t SDRAMDensityAndBanks; // 4 SDRAM Density and Banks
- uint8_t SDRAMAddressing; // 5 SDRAM Addressing
- uint8_t VDD; // 6 Module Nominal Voltage
- uint8_t ModuleOrganization; // 7 Module Organization
- uint8_t ModuleMemoryBusWidth; // 8 Module Memory Bus Width
- uint8_t FineTimebase; // 9 Fine Timebase (FTB) Dividend / Divisor
- uint8_t TimebaseDividend; // 10 Medium Timebase (MTB) Dividend
- uint8_t TimebaseDivisor; // 11 Medium Timebase (MTB) Divisor
- uint8_t SDRAMMinimumCycleTime; // 12 SDRAM Minimum Cycle Time (tCKmin)
- uint8_t Reserved0; // 13 Reserved0
- uint8_t CASLatenciesLSB; // 14 CAS Latencies Supported, Least Significant Byte
- uint8_t CASLatenciesMSB; // 15 CAS Latencies Supported, Most Significant Byte
- uint8_t MinimumCASLatencyTime; // 16 Minimum CAS Latency Time (tAAmin)
- uint8_t MinimumWriteRecoveryTime; // 17 Minimum Write Recovery Time (tWRmin)
- uint8_t MinimumRASToCASDelayTime; // 18 Minimum RAS# to CAS# Delay Time (tRCDmin)
- uint8_t MinimumRowToRowDelayTime; // 19 Minimum Row Active to Row Active Delay Time (tRRDmin)
- uint8_t MinimumRowPrechargeDelayTime; // 20 Minimum Row Precharge Delay Time (tRPmin)
- uint8_t UpperNibblesFortRASAndtRC; // 21 Upper Nibbles for tRAS and tRC
- uint8_t tRASmin; // 22 Minimum Active to Precharge Delay Time (tRASmin), Least Significant Byte
- uint8_t tRCmin; // 23 Minimum Active to Active/Refresh Delay Time (tRCmin), Least Significant Byte
- uint8_t tRFCminLeastSignificantByte; // 24 Minimum Refresh Recovery Delay Time (tRFCmin), Least Significant Byte
- uint8_t tRFCminMostSignificantByte; // 25 Minimum Refresh Recovery Delay Time (tRFCmin), Most Significant Byte
- uint8_t tWTRmin; // 26 Minimum Internal Write to Read Command Delay Time (tWTRmin)
- uint8_t tRTPmin; // 27 Minimum Internal Read to Precharge Command Delay Time (tRTPmin)
- uint8_t UpperNibbleFortFAW; // 28 Upper Nibble for tFAW
- uint8_t tFAWmin; // 29 Minimum Four Activate Window Delay Time (tFAWmin)
- uint8_t SDRAMOptionalFeatures; // 30 SDRAM Optional Features
- uint8_t SDRAMThermalAndRefreshOptions; // 31 SDRAMThermalAndRefreshOptions
- uint8_t ModuleThermalSensor; // 32 ModuleThermalSensor
- uint8_t SDRAMDeviceType; // 33 SDRAM Device Type
- int8_t tCKminFine; // 34 Fine Offset for SDRAM Minimum Cycle Time (tCKmin)
- int8_t tAAminFine; // 35 Fine Offset for Minimum CAS Latency Time (tAAmin)
- int8_t tRCDminFine; // 36 Fine Offset for Minimum RAS# to CAS# Delay Time (tRCDmin)
- int8_t tRPminFine; // 37 Fine Offset for Minimum Row Precharge Delay Time (tRPmin)
- int8_t tRCminFine; // 38 Fine Offset for Minimum Active to Active/Refresh Delay Time (tRCmin)
- uint8_t ReferenceRawCardUsed; // 62 Reference Raw Card Used
- uint8_t AddressMappingEdgeConnector; // 63 Address Mapping from Edge Connector to DRAM
- uint8_t ThermalHeatSpreaderSolution; // 64 ThermalHeatSpreaderSolution
- uint8_t ModuleManufacturerIdCodeLsb; // 117 Module Manufacturer ID Code, Least Significant Byte
- uint8_t ModuleManufacturerIdCodeMsb; // 118 Module Manufacturer ID Code, Most Significant Byte
- uint8_t ModuleManufacturingLocation; // 119 Module Manufacturing Location
- uint8_t ModuleManufacturingDateYear; // 120 Module Manufacturing Date Year
- uint8_t ModuleManufacturingDateWW; // 121 Module Manufacturing Date creation work week
- uint8_t ModuleSerialNumberA; // 122 Module Serial Number A
- uint8_t ModuleSerialNumberB; // 123 Module Serial Number B
- uint8_t ModuleSerialNumberC; // 124 Module Serial Number C
- uint8_t ModuleSerialNumberD; // 125 Module Serial Number D
- uint8_t CRCA; // 126 CRC A
- uint8_t CRCB; // 127 CRC B
-} DDR3_SPD;
-
-// Configuration for each memory channel/bank
-typedef struct {
- uint32_t Exists;
- DDR3_SPD SpdData;
- uint8_t InitClkPiValue[NUM_IVB_MEM_CLK_FREQUENCIES];
-} MEM_BANK_CONFIG;
-
-// Memory configuration
-typedef struct {
- MEM_BANK_CONFIG ChannelABank0;
- MEM_BANK_CONFIG ChannelABank1;
- MEM_BANK_CONFIG ChannelBBank0;
- MEM_BANK_CONFIG ChannelBBank1;
-} MEM_CONFIG;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/peifsp.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/peifsp.h
deleted file mode 100644
index dc3e60f..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/peifsp.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/** \file peifsp.h
- *
- *
- */
-#include <stdint.h>
-#include "fsptypes.h"
-#include "fspfv.h"
-#include "fspffs.h"
-#include "fsphob.h"
-#include "fspapi.h"
-#include "fspplatform.h"
-#include "fspinfoheader.h"
diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c
deleted file mode 100644
index 4214b3a..0000000
--- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-/***********************************************************************
- *
- * fsphob.c
- *
- * HOB infrastructure code.
- *
- **********************************************************************/
-#include <string.h>
-
-#include "fsptypes.h"
-#include "fsphob.h"
-
-//
-// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
-//
-extern volatile void *FspHobListPtr;
-
-//
-// Function prototype
-//
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- );
-
-/**
- Reads a 64-bit value from memory that may be unaligned.
-
- This function returns the 64-bit value pointed to by Buffer. The function
- guarantees that the read operation does not produce an alignment fault.
-
- If the Buffer is NULL, then ASSERT().
-
- @param Buffer Pointer to a 64-bit value that may be unaligned.
-
- @return The 64-bit value read from Buffer.
-
-**/
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- )
-{
- ASSERT (Buffer != NULL);
-
- return *Buffer;
-}
-
-/**
- Compares two GUIDs.
-
- This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
- If there are any bit differences in the two GUIDs, then FALSE is returned.
-
- If Guid1 is NULL, then ASSERT().
- If Guid2 is NULL, then ASSERT().
-
- @param Guid1 A pointer to a 128 bit GUID.
- @param Guid2 A pointer to a 128 bit GUID.
-
- @retval TRUE Guid1 and Guid2 are identical.
- @retval FALSE Guid1 and Guid2 are not identical.
-
-**/
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- )
-{
- UINT64 LowPartOfGuid1;
- UINT64 LowPartOfGuid2;
- UINT64 HighPartOfGuid1;
- UINT64 HighPartOfGuid2;
-
- LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
- LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
- HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
- HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
-
- return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
-}
-
-/**
- Returns the pointer to the HOB list.
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- )
-{
- ASSERT (FspHobListPtr != NULL);
- return ((VOID *)FspHobListPtr);
-}
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- ASSERT (HobStart != NULL);
-
- Hob.Raw = (UINT8 *) HobStart;
- //
- // Parse the HOB list until end of list or matching type is found.
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == Type) {
- return Hob.Raw;
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
- return NULL;
-}
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextHob (Type, HobList);
-}
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS GuidHob;
-
- GuidHob.Raw = (UINT8 *) HobStart;
- while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
- if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
- break;
- }
- GuidHob.Raw = GET_NEXT_HOB (GuidHob);
- }
- return GuidHob.Raw;
-}
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextGuidHob (Guid, HobList);
-}
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspapi.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspapi.h
deleted file mode 100644
index 5009246..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspapi.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/**
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_API_H_
-#define _FSP_API_H_
-
-#include <fsptypes.h>
-
-#pragma pack(1)
-
-typedef VOID (* CONTINUATION_PROC)(EFI_STATUS Status, VOID *HobListPtr);
-
-typedef struct {
- VOID *NvsBufferPtr;
- VOID *RtBufferPtr;
- CONTINUATION_PROC ContinuationFunc;
-} FSP_INIT_PARAMS;
-
-typedef struct {
- UINT32 *StackTop;
- UINT32 BootMode; /* Refer to boot mode defined in MdePkg\Include\Pi\PiBootMode.h */
- VOID *UpdDataRgnPtr;
- UINT32 Reserved[7];
-} FSP_INIT_RT_COMMON_BUFFER;
-
-typedef enum {
- EnumInitPhaseAfterPciEnumeration = 0x20,
- EnumInitPhaseReadyToBoot = 0x40
-} FSP_INIT_PHASE;
-
-typedef struct {
- FSP_INIT_PHASE Phase;
-} NOTIFY_PHASE_PARAMS;
-
-#pragma pack()
-
-typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr);
-typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr);
-
-#endif /* _FSP_API_H_ */
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspbootmode.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspbootmode.h
deleted file mode 100644
index 16cddf0..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspbootmode.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_BOOT_MODE_H__
-#define __PI_BOOT_MODE_H__
-
-///
-/// EFI boot mode
-///
-typedef UINT32 EFI_BOOT_MODE;
-
-//
-// 0x21 - 0xf..f are reserved.
-//
-#define BOOT_WITH_FULL_CONFIGURATION 0x00
-#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01
-#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02
-#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03
-#define BOOT_WITH_DEFAULT_SETTINGS 0x04
-#define BOOT_ON_S4_RESUME 0x05
-#define BOOT_ON_S5_RESUME 0x06
-#define BOOT_ON_S2_RESUME 0x10
-#define BOOT_ON_S3_RESUME 0x11
-#define BOOT_ON_FLASH_UPDATE 0x12
-#define BOOT_IN_RECOVERY_MODE 0x20
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspffs.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspffs.h
deleted file mode 100644
index 9e8244d..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspffs.h
+++ /dev/null
@@ -1,507 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_FIRMWARE_FILE_H__
-#define __PI_FIRMWARE_FILE_H__
-
-#include <fsptypes.h>
-
-#pragma pack(1)
-///
-/// Used to verify the integrity of the file.
-///
-typedef union {
- struct {
- ///
- /// The IntegrityCheck.Checksum.Header field is an 8-bit checksum of the file
- /// header. The State and IntegrityCheck.Checksum.File fields are assumed
- /// to be zero and the checksum is calculated such that the entire header sums to zero.
- ///
- UINT8 Header;
- ///
- /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
- /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
- /// checksum of the file data.
- /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
- /// the IntegrityCheck.Checksum.File field must be initialized with a value of
- /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
- /// EFI_FILE_DATA_VALID bit is set in the State field.
- ///
- UINT8 File;
- } Checksum;
- ///
- /// This is the full 16 bits of the IntegrityCheck field.
- ///
- UINT16 Checksum16;
-} EFI_FFS_INTEGRITY_CHECK;
-
-///
-/// FFS_FIXED_CHECKSUM is the checksum value used when the
-/// FFS_ATTRIB_CHECKSUM attribute bit is clear.
-///
-#define FFS_FIXED_CHECKSUM 0xAA
-
-typedef UINT8 EFI_FV_FILETYPE;
-typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
-typedef UINT8 EFI_FFS_FILE_STATE;
-
-///
-/// File Types Definitions
-///
-#define EFI_FV_FILETYPE_ALL 0x00
-#define EFI_FV_FILETYPE_RAW 0x01
-#define EFI_FV_FILETYPE_FREEFORM 0x02
-#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
-#define EFI_FV_FILETYPE_PEI_CORE 0x04
-#define EFI_FV_FILETYPE_DXE_CORE 0x05
-#define EFI_FV_FILETYPE_PEIM 0x06
-#define EFI_FV_FILETYPE_DRIVER 0x07
-#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
-#define EFI_FV_FILETYPE_APPLICATION 0x09
-#define EFI_FV_FILETYPE_SMM 0x0A
-#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
-#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
-#define EFI_FV_FILETYPE_SMM_CORE 0x0D
-#define EFI_FV_FILETYPE_OEM_MIN 0xc0
-#define EFI_FV_FILETYPE_OEM_MAX 0xdf
-#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
-#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
-#define EFI_FV_FILETYPE_FFS_MIN 0xf0
-#define EFI_FV_FILETYPE_FFS_MAX 0xff
-#define EFI_FV_FILETYPE_FFS_PAD 0xf0
-///
-/// FFS File Attributes.
-///
-#define FFS_ATTRIB_LARGE_FILE 0x01
-#define FFS_ATTRIB_FIXED 0x04
-#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
-#define FFS_ATTRIB_CHECKSUM 0x40
-
-///
-/// FFS File State Bits.
-///
-#define EFI_FILE_HEADER_CONSTRUCTION 0x01
-#define EFI_FILE_HEADER_VALID 0x02
-#define EFI_FILE_DATA_VALID 0x04
-#define EFI_FILE_MARKED_FOR_UPDATE 0x08
-#define EFI_FILE_DELETED 0x10
-#define EFI_FILE_HEADER_INVALID 0x20
-
-
-///
-/// Each file begins with the header that describe the
-/// contents and state of the files.
-///
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file.
- ///
- EFI_GUID Name;
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
- ///
- /// The length of the file in bytes, including the FFS header.
- ///
- UINT8 Size[3];
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-} EFI_FFS_FILE_HEADER;
-
-typedef struct {
- ///
- /// This GUID is the file name. It is used to uniquely identify the file. There may be only
- /// one instance of a file with the file name GUID of Name in any given firmware
- /// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
- ///
- EFI_GUID Name;
-
- ///
- /// Used to verify the integrity of the file.
- ///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
-
- ///
- /// Identifies the type of file.
- ///
- EFI_FV_FILETYPE Type;
-
- ///
- /// Declares various file attribute bits.
- ///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
-
- ///
- /// The length of the file in bytes, including the FFS header.
- /// The length of the file data is either (Size - sizeof(EFI_FFS_FILE_HEADER)). This calculation means a
- /// zero-length file has a Size of 24 bytes, which is sizeof(EFI_FFS_FILE_HEADER).
- /// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
- /// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
- ///
- UINT8 Size[3];
-
- ///
- /// Used to track the state of the file throughout the life of the file from creation to deletion.
- ///
- EFI_FFS_FILE_STATE State;
-
- ///
- /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
- /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
- ///
- UINT32 ExtendedSize;
-} EFI_FFS_FILE_HEADER2;
-
-#define IS_FFS_FILE2(FfsFileHeaderPtr) \
- (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
-
-#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
-
-#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
- (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
-
-typedef UINT8 EFI_SECTION_TYPE;
-
-///
-/// Pseudo type. It is used as a wild card when retrieving sections.
-/// The section type EFI_SECTION_ALL matches all section types.
-///
-#define EFI_SECTION_ALL 0x00
-
-///
-/// Encapsulation section Type values.
-///
-#define EFI_SECTION_COMPRESSION 0x01
-
-#define EFI_SECTION_GUID_DEFINED 0x02
-
-#define EFI_SECTION_DISPOSABLE 0x03
-
-///
-/// Leaf section Type values.
-///
-#define EFI_SECTION_PE32 0x10
-#define EFI_SECTION_PIC 0x11
-#define EFI_SECTION_TE 0x12
-#define EFI_SECTION_DXE_DEPEX 0x13
-#define EFI_SECTION_VERSION 0x14
-#define EFI_SECTION_USER_INTERFACE 0x15
-#define EFI_SECTION_COMPATIBILITY16 0x16
-#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
-#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
-#define EFI_SECTION_RAW 0x19
-#define EFI_SECTION_PEI_DEPEX 0x1B
-#define EFI_SECTION_SMM_DEPEX 0x1C
-
-///
-/// Common section header.
-///
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
- EFI_SECTION_TYPE Type;
- ///
- /// Declares the section type.
- ///
-} EFI_COMMON_SECTION_HEADER;
-
-typedef struct {
- ///
- /// A 24-bit unsigned integer that contains the total size of the section in bytes,
- /// including the EFI_COMMON_SECTION_HEADER.
- ///
- UINT8 Size[3];
-
- EFI_SECTION_TYPE Type;
-
- ///
- /// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
- /// Size is not equal to 0xFFFFFF, then this field does not exist.
- ///
- UINT32 ExtendedSize;
-} EFI_COMMON_SECTION_HEADER2;
-
-///
-/// Leaf section type that contains an
-/// IA-32 16-bit executable image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_COMPATIBILITY16_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_COMPATIBILITY16_SECTION2;
-
-///
-/// CompressionType of EFI_COMPRESSION_SECTION.
-///
-#define EFI_NOT_COMPRESSED 0x00
-#define EFI_STANDARD_COMPRESSION 0x01
-///
-/// An encapsulation section type in which the
-/// section data is compressed.
-///
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION;
-
-typedef struct {
- ///
- /// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// UINT32 that indicates the size of the section data after decompression.
- ///
- UINT32 UncompressedLength;
- ///
- /// Indicates which compression algorithm is used.
- ///
- UINT8 CompressionType;
-} EFI_COMPRESSION_SECTION2;
-
-///
-/// An encapsulation section type in which the section data is disposable.
-/// A disposable section is an encapsulation section in which the section data may be disposed of during
-/// the process of creating or updating a firmware image without significant impact on the usefulness of
-/// the file. The Type field in the section header is set to EFI_SECTION_DISPOSABLE. This
-/// allows optional or descriptive data to be included with the firmware file which can be removed in
-/// order to conserve space. The contents of this section are implementation specific, but might contain
-/// debug data or detailed integration instructions.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
-
-///
-/// The leaf section which could be used to determine the dispatch order of DXEs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a PI FV.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
-
-///
-/// The leaf section which contains a single GUID.
-///
-typedef struct {
- ///
- /// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// This GUID is defined by the creator of the file. It is a vendor-defined file type.
- ///
- EFI_GUID SubTypeGuid;
-} EFI_FREEFORM_SUBTYPE_GUID_SECTION2;
-
-///
-/// Attributes of EFI_GUID_DEFINED_SECTION.
-///
-#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
-#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
-///
-/// The leaf section which is encapsulation defined by specific GUID.
-///
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION;
-
-typedef struct {
- ///
- /// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
- ///
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
- ///
- EFI_GUID SectionDefinitionGuid;
- ///
- /// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
- ///
- UINT16 DataOffset;
- ///
- /// The bit field that declares some specific characteristics of the section contents.
- ///
- UINT16 Attributes;
-} EFI_GUID_DEFINED_SECTION2;
-
-///
-/// The leaf section which contains PE32+ image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
-
-///
-/// The leaf section used to determine the dispatch order of PEIMs.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
-
-///
-/// A leaf section type that contains a position-independent-code (PIC) image.
-/// A PIC image section is a leaf section that contains a position-independent-code (PIC) image.
-/// In addition to normal PE32+ images that contain relocation information, PEIM executables may be
-/// PIC and are referred to as PIC images. A PIC image is the same as a PE32+ image except that all
-/// relocation information has been stripped from the image and the image can be moved and will
-/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
-/// be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
-
-///
-/// The leaf section which constains the position-independent-code image.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
-
-///
-/// The leaf section which contains an array of zero or more bytes.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
-
-///
-/// The SMM dependency expression section is a leaf section that contains a dependency expression that
-/// is used to determine the dispatch order for SMM drivers. Before the SMRAM invocation of the
-/// SMM driver's entry point, this dependency expression must evaluate to TRUE. See the Platform
-/// Initialization Specification, Volume 2, for details regarding the format of the dependency expression.
-/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
-/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
-///
-typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
-
-///
-/// The leaf section which contains a unicode string that
-/// is human readable file name.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- CHAR16 FileNameString[1];
-} EFI_USER_INTERFACE_SECTION2;
-
-///
-/// The leaf section which contains a numeric build number and
-/// an optional unicode string that represents the file revision.
-///
-typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
- UINT16 BuildNumber;
-
- ///
- /// Array of unicode string.
- ///
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION;
-
-typedef struct {
- EFI_COMMON_SECTION_HEADER2 CommonHeader;
- ///
- /// A UINT16 that represents a particular build. Subsequent builds have monotonically
- /// increasing build numbers relative to earlier builds.
- ///
- UINT16 BuildNumber;
- CHAR16 VersionString[1];
-} EFI_VERSION_SECTION2;
-
-#define IS_SECTION2(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
-
-#define SECTION_SIZE(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
-
-#define SECTION2_SIZE(SectionHeaderPtr) \
- (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspfv.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspfv.h
deleted file mode 100644
index 9688cf4..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspfv.h
+++ /dev/null
@@ -1,249 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_FIRMWAREVOLUME_H__
-#define __PI_FIRMWAREVOLUME_H__
-
-#include <fsptypes.h>
-
-///
-/// EFI_FV_FILE_ATTRIBUTES
-///
-typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
-
-//
-// Value of EFI_FV_FILE_ATTRIBUTES.
-//
-#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
-#define EFI_FV_FILE_ATTRIB_FIXED 0x00000100
-#define EFI_FV_FILE_ATTRIB_MEMORY_MAPPED 0x00000200
-
-///
-/// type of EFI FVB attribute
-///
-typedef UINT32 EFI_FVB_ATTRIBUTES_2;
-
-//
-// Attributes bit definitions
-//
-#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
-#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
-#define EFI_FVB2_READ_STATUS 0x00000004
-#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
-#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
-#define EFI_FVB2_WRITE_STATUS 0x00000020
-#define EFI_FVB2_LOCK_CAP 0x00000040
-#define EFI_FVB2_LOCK_STATUS 0x00000080
-#define EFI_FVB2_STICKY_WRITE 0x00000200
-#define EFI_FVB2_MEMORY_MAPPED 0x00000400
-#define EFI_FVB2_ERASE_POLARITY 0x00000800
-#define EFI_FVB2_READ_LOCK_CAP 0x00001000
-#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
-#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
-#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
-#define EFI_FVB2_ALIGNMENT 0x001F0000
-#define EFI_FVB2_ALIGNMENT_1 0x00000000
-#define EFI_FVB2_ALIGNMENT_2 0x00010000
-#define EFI_FVB2_ALIGNMENT_4 0x00020000
-#define EFI_FVB2_ALIGNMENT_8 0x00030000
-#define EFI_FVB2_ALIGNMENT_16 0x00040000
-#define EFI_FVB2_ALIGNMENT_32 0x00050000
-#define EFI_FVB2_ALIGNMENT_64 0x00060000
-#define EFI_FVB2_ALIGNMENT_128 0x00070000
-#define EFI_FVB2_ALIGNMENT_256 0x00080000
-#define EFI_FVB2_ALIGNMENT_512 0x00090000
-#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
-#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
-#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
-#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
-#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
-#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
-#define EFI_FVB2_ALIGNMENT_64K 0x00100000
-#define EFI_FVB2_ALIGNMENT_128K 0x00110000
-#define EFI_FVB2_ALIGNMENT_256K 0x00120000
-#define EFI_FVB2_ALIGNMENT_512K 0x00130000
-#define EFI_FVB2_ALIGNMENT_1M 0x00140000
-#define EFI_FVB2_ALIGNMENT_2M 0x00150000
-#define EFI_FVB2_ALIGNMENT_4M 0x00160000
-#define EFI_FVB2_ALIGNMENT_8M 0x00170000
-#define EFI_FVB2_ALIGNMENT_16M 0x00180000
-#define EFI_FVB2_ALIGNMENT_32M 0x00190000
-#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
-#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
-#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
-#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
-#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
-#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
-
-
-typedef struct {
- ///
- /// The number of sequential blocks which are of the same size.
- ///
- UINT32 NumBlocks;
- ///
- /// The size of the blocks.
- ///
- UINT32 Length;
-} EFI_FV_BLOCK_MAP_ENTRY;
-
-///
-/// Describes the features and layout of the firmware volume.
-///
-typedef struct {
- ///
- /// The first 16 bytes are reserved to allow for the reset vector of
- /// processors whose reset vector is at address 0.
- ///
- UINT8 ZeroVector[16];
- ///
- /// Declares the file system with which the firmware volume is formatted.
- ///
- EFI_GUID FileSystemGuid;
- ///
- /// Length in bytes of the complete firmware volume, including the header.
- ///
- UINT64 FvLength;
- ///
- /// Set to EFI_FVH_SIGNATURE
- ///
- UINT32 Signature;
- ///
- /// Declares capabilities and power-on defaults for the firmware volume.
- ///
- EFI_FVB_ATTRIBUTES_2 Attributes;
- ///
- /// Length in bytes of the complete firmware volume header.
- ///
- UINT16 HeaderLength;
- ///
- /// A 16-bit checksum of the firmware volume header. A valid header sums to zero.
- ///
- UINT16 Checksum;
- ///
- /// Offset, relative to the start of the header, of the extended header
- /// (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is no extended header.
- ///
- UINT16 ExtHeaderOffset;
- ///
- /// This field must always be set to zero.
- ///
- UINT8 Reserved[1];
- ///
- /// Set to 2. Future versions of this specification may define new header fields and will
- /// increment the Revision field accordingly.
- ///
- UINT8 Revision;
- ///
- /// An array of run-length encoded FvBlockMapEntry structures. The array is
- /// terminated with an entry of {0,0}.
- ///
- EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
-} EFI_FIRMWARE_VOLUME_HEADER;
-
-#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
-
-///
-/// Firmware Volume Header Revision definition
-///
-#define EFI_FVH_REVISION 0x02
-
-///
-/// Extension header pointed by ExtHeaderOffset of volume header.
-///
-typedef struct {
- ///
- /// Firmware volume name.
- ///
- EFI_GUID FvName;
- ///
- /// Size of the rest of the extension header, including this structure.
- ///
- UINT32 ExtHeaderSize;
-} EFI_FIRMWARE_VOLUME_EXT_HEADER;
-
-///
-/// Entry struture for describing FV extension header
-///
-typedef struct {
- ///
- /// Size of this header extension.
- ///
- UINT16 ExtEntrySize;
- ///
- /// Type of the header.
- ///
- UINT16 ExtEntryType;
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY;
-
-#define EFI_FV_EXT_TYPE_OEM_TYPE 0x01
-///
-/// This extension header provides a mapping between a GUID and an OEM file type.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
- /// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
- ///
- UINT32 TypeMask;
- ///
- /// An array of GUIDs, each GUID representing an OEM file type.
- ///
- /// EFI_GUID Types[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
-
-#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
-
-///
-/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
-/// GUID FormatType type which includes a length and a successive series of data bytes.
-///
-typedef struct {
- ///
- /// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
- ///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
- ///
- /// Vendor-specific GUID.
- ///
- EFI_GUID FormatType;
- ///
- /// An arry of bytes of length Length.
- ///
- /// UINT8 Data[1];
- ///
-} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspguid.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspguid.h
deleted file mode 100644
index b9a6183..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspguid.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/** @file
-
-Copyright (C) 2014, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_GUID_H__
-#define __FSP_GUID_H__
-
-/**
-
- FSP specific GUID HOB definitions
-
- **/
-#define FSP_INFO_HEADER_GUID \
- { \
- 0x912740BE, 0x2284, 0x4734, {0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C} \
- }
-
-#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
- { \
- 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0xb, 0x7b, 0xa9, 0xe4, 0xb0 } \
- }
-
-#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \
- { \
- 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } \
- }
-
-#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \
- { \
- 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } \
- }
-
-#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \
- { \
- 0xd038747c, 0xd00c, 0x4980, { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } \
- }
-
-#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \
- { \
- 0x9c7c3aa7, 0x5332, 0x4917, { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } \
- }
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fsphob.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fsphob.h
deleted file mode 100644
index 0f743b5..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fsphob.h
+++ /dev/null
@@ -1,544 +0,0 @@
-/** @file
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __PI_HOB_H__
-#define __PI_HOB_H__
-
-#include <fsptypes.h>
-
-//
-// HobType of EFI_HOB_GENERIC_HEADER.
-//
-#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
-#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
-#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
-#define EFI_HOB_TYPE_UNUSED 0xFFFE
-#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
-
-///
-/// Describes the format and size of the data inside the HOB.
-/// All HOBs must contain this generic HOB header.
-///
-typedef struct {
- ///
- /// Identifies the HOB data structure type.
- ///
- UINT16 HobType;
- ///
- /// The length in bytes of the HOB.
- ///
- UINT16 HobLength;
- ///
- /// This field must always be set to zero.
- ///
- UINT32 Reserved;
-} EFI_HOB_GENERIC_HEADER;
-
-///
-/// Enumeration of memory types introduced in UEFI.
-///
-typedef enum {
- ///
- /// Not used.
- ///
- EfiReservedMemoryType,
- ///
- /// The code portions of a loaded application.
- /// (Note that UEFI OS loaders are UEFI applications.)
- ///
- EfiLoaderCode,
- ///
- /// The data portions of a loaded application and the default data allocation
- /// type used by an application to allocate pool memory.
- ///
- EfiLoaderData,
- ///
- /// The code portions of a loaded Boot Services Driver.
- ///
- EfiBootServicesCode,
- ///
- /// The data portions of a loaded Boot Serves Driver, and the default data
- /// allocation type used by a Boot Services Driver to allocate pool memory.
- ///
- EfiBootServicesData,
- ///
- /// The code portions of a loaded Runtime Services Driver.
- ///
- EfiRuntimeServicesCode,
- ///
- /// The data portions of a loaded Runtime Services Driver and the default
- /// data allocation type used by a Runtime Services Driver to allocate pool memory.
- ///
- EfiRuntimeServicesData,
- ///
- /// Free (unallocated) memory.
- ///
- EfiConventionalMemory,
- ///
- /// Memory in which errors have been detected.
- ///
- EfiUnusableMemory,
- ///
- /// Memory that holds the ACPI tables.
- ///
- EfiACPIReclaimMemory,
- ///
- /// Address space reserved for use by the firmware.
- ///
- EfiACPIMemoryNVS,
- ///
- /// Used by system firmware to request that a memory-mapped IO region
- /// be mapped by the OS to a virtual address so it can be accessed by EFI runtime services.
- ///
- EfiMemoryMappedIO,
- ///
- /// System memory-mapped IO region that is used to translate memory
- /// cycles to IO cycles by the processor.
- ///
- EfiMemoryMappedIOPortSpace,
- ///
- /// Address space reserved by the firmware for code that is part of the processor.
- ///
- EfiPalCode,
- EfiMaxMemoryType
-} EFI_MEMORY_TYPE;
-
-///
-/// EFI_HOB_MEMORY_ALLOCATION_HEADER describes the
-/// various attributes of the logical memory allocation. The type field will be used for
-/// subsequent inclusion in the UEFI memory map.
-///
-typedef struct {
- ///
- /// A GUID that defines the memory allocation region's type and purpose, as well as
- /// other fields within the memory allocation HOB. This GUID is used to define the
- /// additional data within the HOB that may be present for the memory allocation HOB.
- /// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
- /// specification.
- ///
- EFI_GUID Name;
-
- ///
- /// The base address of memory allocated by this HOB. Type
- /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
- /// specification.
- ///
- EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
-
- ///
- /// The length in bytes of memory allocated by this HOB.
- ///
- UINT64 MemoryLength;
-
- ///
- /// Defines the type of memory allocated by this HOB. The memory type definition
- /// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
- /// in AllocatePages() in the UEFI 2.0 specification.
- ///
- EFI_MEMORY_TYPE MemoryType;
-
- ///
- /// Padding for Itanium processor family
- ///
- UINT8 Reserved[4];
-} EFI_HOB_MEMORY_ALLOCATION_HEADER;
-
-///
-/// Describes all memory ranges used during the HOB producer
-/// phase that exist outside the HOB list. This HOB type
-/// describes how memory is used, not the physical attributes of memory.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
- /// various attributes of the logical memory allocation.
- ///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
- //
- // Additional data pertaining to the "Name" Guid memory
- // may go here.
- //
-} EFI_HOB_MEMORY_ALLOCATION;
-
-///
-/// The resource type.
-///
-typedef UINT32 EFI_RESOURCE_TYPE;
-
-//
-// Value of ResourceType in EFI_HOB_RESOURCE_DESCRIPTOR.
-//
-#define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000
-#define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001
-#define EFI_RESOURCE_IO 0x00000002
-#define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003
-#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
-#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
-#define EFI_RESOURCE_IO_RESERVED 0x00000006
-#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
-
-///
-/// A type of recount attribute type.
-///
-typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
-
-//
-// These types can be ORed together as needed.
-//
-// The first three enumerations describe settings
-//
-#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
-#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
-#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
-//
-// The rest of the settings describe capabilities
-//
-#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
-#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
-#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
-#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
-#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
-#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
-#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
-
-///
-/// Describes the resource properties of all fixed,
-/// nonrelocatable resource ranges found on the processor
-/// host bus during the HOB producer phase.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID representing the owner of the resource. This GUID is used by HOB
- /// consumer phase components to correlate device ownership of a resource.
- ///
- EFI_GUID Owner;
- ///
- /// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
- ///
- EFI_RESOURCE_TYPE ResourceType;
- ///
- /// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
- ///
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
- ///
- /// The physical start address of the resource region.
- ///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
- ///
- /// The number of bytes of the resource region.
- ///
- UINT64 ResourceLength;
-} EFI_HOB_RESOURCE_DESCRIPTOR;
-
-///
-/// Allows writers of executable content in the HOB producer phase to
-/// maintain and manage HOBs with specific GUID.
-///
-typedef struct {
- ///
- /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
- ///
- EFI_HOB_GENERIC_HEADER Header;
- ///
- /// A GUID that defines the contents of this HOB.
- ///
- EFI_GUID Name;
- //
- // Guid specific data goes here
- //
-} EFI_HOB_GUID_TYPE;
-
-///
-/// Union of all the possible HOB Types.
-///
-typedef union {
- EFI_HOB_GENERIC_HEADER *Header;
- EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
- EFI_HOB_GUID_TYPE *Guid;
- UINT8 *Raw;
-} EFI_PEI_HOB_POINTERS;
-
-
-/**
- Returns the type of a HOB.
-
- This macro returns the HobType field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobType.
-
-**/
-#define GET_HOB_TYPE(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobType)
-
-/**
- Returns the length, in bytes, of a HOB.
-
- This macro returns the HobLength field from the HOB header for the
- HOB specified by HobStart.
-
- @param HobStart A pointer to a HOB.
-
- @return HobLength.
-
-**/
-#define GET_HOB_LENGTH(HobStart) \
- ((*(EFI_HOB_GENERIC_HEADER **)&(HobStart))->HobLength)
-
-/**
- Returns a pointer to the next HOB in the HOB list.
-
- This macro returns a pointer to HOB that follows the
- HOB specified by HobStart in the HOB List.
-
- @param HobStart A pointer to a HOB.
-
- @return A pointer to the next HOB in the HOB list.
-
-**/
-#define GET_NEXT_HOB(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + GET_HOB_LENGTH (HobStart))
-
-/**
- Determines if a HOB is the last HOB in the HOB list.
-
- This macro determine if the HOB specified by HobStart is the
- last HOB in the HOB list. If HobStart is last HOB in the HOB list,
- then TRUE is returned. Otherwise, FALSE is returned.
-
- @param HobStart A pointer to a HOB.
-
- @retval TRUE The HOB specified by HobStart is the last HOB in the HOB list.
- @retval FALSE The HOB specified by HobStart is not the last HOB in the HOB list.
-
-**/
-#define END_OF_HOB_LIST(HobStart) (GET_HOB_TYPE (HobStart) == (UINT16)EFI_HOB_TYPE_END_OF_HOB_LIST)
-
-/**
- Returns a pointer to data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns a pointer to the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return A pointer to the data buffer in a HOB.
-
-**/
-#define GET_GUID_HOB_DATA(HobStart) \
- (VOID *)(*(UINT8 **)&(HobStart) + sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the size of the data buffer from a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- This macro returns the size, in bytes, of the data buffer in a HOB specified by HobStart.
- HobStart is assumed to be a HOB of type EFI_HOB_TYPE_GUID_EXTENSION.
-
- @param GuidHob A pointer to a HOB.
-
- @return The size of the data buffer.
-**/
-#define GET_GUID_HOB_DATA_SIZE(HobStart) \
- (UINT16)(GET_HOB_LENGTH (HobStart) - sizeof (EFI_HOB_GUID_TYPE))
-
-/**
- Returns the pointer to the HOB list.
-
- This function returns the pointer to first HOB in the list.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @return The pointer to the HOB list.
-
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- );
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-
- This function searches the first instance of a HOB type from the starting HOB pointer.
- If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If HobStart is NULL, then ASSERT().
-
- @param Type The HOB type to return.
- @param HobStart The starting HOB pointer to search from.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-
- This function searches the first instance of a HOB type among the whole HOB list.
- If there does not exist such HOB type in the HOB list, it will return NULL.
-
- If the pointer to the HOB list is NULL, then ASSERT().
-
- @param Type The HOB type to return.
-
- @return The next instance of a HOB type from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- );
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-
- This function searches the first instance of a HOB from the starting HOB pointer.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
- In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
- unconditionally: it returns HobStart back if HobStart itself meets the requirement;
- caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
-
- If Guid is NULL, then ASSERT().
- If HobStart is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
- @param HobStart A pointer to a Guid.
-
- @return The next instance of the matched GUID HOB from the starting HOB.
-
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- );
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-
- This function searches the first instance of a HOB among the whole HOB list.
- Such HOB should satisfy two conditions:
- its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
- If there does not exist such HOB from the starting HOB pointer, it will return NULL.
- Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
- to extract the data section and its size info respectively.
-
- If the pointer to the HOB list is NULL, then ASSERT().
- If Guid is NULL, then ASSERT().
-
- @param Guid The GUID to match with in the HOB list.
-
- @return The first instance of the matched GUID HOB among the whole HOB list.
-
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- );
-
-/**
- Compares two GUIDs.
-
- This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
- If there are any bit differences in the two GUIDs, then FALSE is returned.
-
- If Guid1 is NULL, then ASSERT().
- If Guid2 is NULL, then ASSERT().
-
- @param Guid1 A pointer to a 128 bit GUID.
- @param Guid2 A pointer to a 128 bit GUID.
-
- @retval TRUE Guid1 and Guid2 are identical.
- @retval FALSE Guid1 and Guid2 are not identical.
-
-**/
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- );
-
-/**
- Reads a 64-bit value from memory that may be unaligned.
-
- This function returns the 64-bit value pointed to by Buffer. The function
- guarantees that the read operation does not produce an alignment fault.
-
- If the Buffer is NULL, then ASSERT().
-
- @param Buffer Pointer to a 64-bit value that may be unaligned.
-
- @return The 64-bit value read from Buffer.
-
-**/
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- );
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspinfoheader.h
deleted file mode 100644
index 28382cf..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspinfoheader.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*++
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_INFO_HEADER_H_
-#define _FSP_INFO_HEADER_H_
-
-#pragma pack(1)
-
-typedef struct {
-
- UINT32 Signature; // Off 0x94
- UINT32 HeaderLength;
- UINT8 Reserved1[3];
- UINT8 HeaderRevision;
- UINT32 ImageRevision;
-
- CHAR8 ImageId[8]; // Off 0xA4
- UINT32 ImageSize;
- UINT32 ImageBase;
-
- UINT32 ImageAttribute; // Off 0xB4
- UINT32 CfgRegionOffset;
- UINT32 CfgRegionSize;
- UINT32 ApiEntryNum;
-
- UINT32 NemInitEntry; // Off 0xC4
- UINT32 FspInitEntry;
- UINT32 NotifyPhaseEntry;
- UINT32 Reserved2;
-
-} FSP_INFO_HEADER;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h
deleted file mode 100644
index c35dca0..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/**
-
-Copyright (C) 2013 - 2015, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef _FSP_PLATFORM_H_
-#define _FSP_PLATFORM_H_
-
-#include "fsptypes.h"
-#include "fspapi.h"
-
-//
-// Maximum number of SDRAM channels supported by each CPU
-//
-#define MAX_CHANNELS 2
-//
-// Maximum number of DIMM sockets supported by each channel
-//
-#define MAX_DIMMS 2
-
-#pragma pack(1)
-//
-// SPD DDR3 structure
-//
-typedef struct {
- UINT8 DRAMDeviceType; // 2 DRAM Device Type
- UINT8 ModuleType; // 3 Module Type
- UINT8 SDRAMDensityAndBanks; // 4 SDRAM Density and Banks
- UINT8 SDRAMAddressing; // 5 SDRAM Addressing
- UINT8 VDD; // 6 Module Nominal Voltage
- UINT8 ModuleOrganization; // 7 Module Organization
- UINT8 ModuleMemoryBusWidth; // 8 Module Memory Bus Width
- UINT8 TimebaseDividend; // 10 Medium Timebase (MTB) Dividend
- UINT8 TimebaseDivisor; // 11 Medium Timebase (MTB) Divisor
- UINT8 SDRAMMinimumCycleTime; // 12 SDRAM Minimum Cycle Time (tCKmin)
- UINT8 CASLatenciesLSB; // 14 CAS Latencies Supported, Least Significant Byte
- UINT8 CASLatenciesMSB; // 15 CAS Latencies Supported, Most Significant Byte
- UINT8 MinimumCASLatencyTime; // 16 Minimum CAS Latency Time (tAAmin)
- UINT8 MinimumWriteRecoveryTime; // 17 Minimum Write Recovery Time (tWRmin)
- UINT8 MinimumRASToCASDelayTime; // 18 Minimum RAS# to CAS# Delay Time (tRCDmin)
- UINT8 MinimumRowToRowDelayTime; // 19 Minimum Row Active to Row Active Delay Time (tRRDmin)
- UINT8 MinimumRowPrechargeDelayTime; // 20 Minimum Row Precharge Delay Time (tRPmin)
- UINT8 UpperNibblesFortRASAndtRC; // 21 Upper Nibbles for tRAS and tRC
- UINT8 tRASmin; // 22 Minimum Active to Precharge Delay Time (tRASmin), Least Significant Byte
- UINT8 tRCmin; // 23 Minimum Active to Active/Refresh Delay Time (tRCmin), Least Significant Byte
- UINT8 tRFCminLeastSignificantByte; // 24 Minimum Refresh Recovery Delay Time (tRFCmin), Least Significant Byte
- UINT8 tRFCminMostSignificantByte; // 25 Minimum Refresh Recovery Delay Time (tRFCmin), Most Significant Byte
- UINT8 tWTRmin; // 26 Minimum Internal Write to Read Command Delay Time (tWTRmin)
- UINT8 tRTPmin; // 27 Minimum Internal Read to Precharge Command Delay Time (tRTPmin)
- UINT8 UpperNibbleFortFAW; // 28 Upper Nibble for tFAW
- UINT8 tFAWmin; // 29 Minimum Four Activate Window Delay Time (tFAWmin)
- UINT8 SdramThermalRefreshOption; // 31 SdramThermalRefreshOption
- UINT8 ModuleThermalSensor; // 32 ModuleThermalSensor
- UINT8 SDRAMDeviceType; // 33 SDRAM Device Type
- UINT8 tCKminFine; // 34 Fine Offset for SDRAM Minimum Cycle Time (tCKmin)
- UINT8 tAAminFine; // 35 Fine Offset for Minimum CAS Latency Time (tAAmin)
- UINT8 MACCount; // 41 Maximum Activate Count
- UINT8 ReferenceRawCardUsed; // 62 Reference Raw Card Used
- UINT8 AddressMappingEdgeConnector; // 63 Address Mapping from Edge Connector to DRAM
- UINT8 ModuleManufacturerIdCodeLsb; // 117 Module Manufacturer ID Code, Least Significant Byte
- UINT8 ModuleManufacturerIdCodeMsb; // 118 Module Manufacturer ID Code, Most Significant Byte
- UINT8 ModuleManufacturingLocation; // 119 Module Manufacturing Location
- UINT8 ModuleManufacturingDateYear; // 120 Module Manufacturing Date Year
- UINT8 ModuleManufacturingDateWW; // 121 Module Manufacturing Date creation work week
- UINT8 ModuleSerialNumberA; // 122 Module Serial Number A
- UINT8 ModuleSerialNumberB; // 123 Module Serial Number B
- UINT8 ModuleSerialNumberC; // 124 Module Serial Number C
- UINT8 ModuleSerialNumberD; // 125 Module Serial Number D
- UINT8 DramManufacturerIdLsb; // 148 DRAM Manufacturer ID Code, LSB
- UINT8 DramManufacturerIdMsb; // 149 DRAM Manufacturer ID Code, MSB
-} MEM_DOWN_DIMM_SPD_DATA;
-
-typedef struct {
- UINT32 MemoryDownDimmPopulation; // 0 - Empty, 1 - DIMM populated
- MEM_DOWN_DIMM_SPD_DATA MemoryDownDimmSpdData;
-} MEM_DOWN_DIMM_CONFIG;
-
-typedef struct {
- CONST MEM_DOWN_DIMM_CONFIG *MemDownDimmConfig[MAX_CHANNELS][MAX_DIMMS];
-} FSP_INIT_RT_PLATFORM_BUFFER;
-
-typedef struct {
- FSP_INIT_RT_COMMON_BUFFER Common;
- FSP_INIT_RT_PLATFORM_BUFFER Platform;
-} FSP_INIT_RT_BUFFER;
-
-#pragma pack()
-
-#endif
\ No newline at end of file
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspsupport.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspsupport.h
deleted file mode 100644
index dbbbf77..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspsupport.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/** @file
-
-Copyright (C) 2013 - 2014, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#ifndef __FSP_SUPPORT_H__
-#define __FSP_SUPPORT_H__
-
-#include "fsptypes.h"
-#include "fspfv.h"
-#include "fspffs.h"
-#include "fspapi.h"
-#include "fsphob.h"
-#include "fspguid.h"
-#include "fspplatform.h"
-#include "fspinfoheader.h"
-#include "fspbootmode.h"
-#include "fspvpd.h"
-
-UINT32
-GetUsableLowMemTop (
- CONST VOID *HobListPtr
- );
-
-UINT64
-GetUsableHighMemTop (
- CONST VOID *HobListPtr
- );
-
-VOID *
-GetGuidHobDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length,
- EFI_GUID *Guid
- );
-
-VOID
-GetFspReservedMemoryFromGuid (
- CONST VOID *HobListPtr,
- EFI_PHYSICAL_ADDRESS *FspMemoryBase,
- UINT64 *FspMemoryLength,
- EFI_GUID *FspReservedMemoryGuid
- );
-
-UINT32
-GetTsegReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
-);
-
-UINT32
-GetFspReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
-);
-
-VOID*
-GetFspNvsDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
- );
-
-VOID *
-GetBootloaderTempMemoryBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
- );
-
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fsptypes.h
deleted file mode 100644
index da19250..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fsptypes.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/******************************************************************************
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
- *****************************************************************************/
-
-/** \file fsptypes.h
- *
- *
- */
-
-#ifndef __FSP_TYPES_H__
-#define __FSP_TYPES_H__
-
-///
-/// 8-byte unsigned value.
-///
-typedef unsigned long long UINT64;
-///
-/// 8-byte signed value.
-///
-typedef long long INT64;
-///
-/// 4-byte unsigned value.
-///
-typedef unsigned int UINT32;
-///
-/// 4-byte signed value.
-///
-typedef int INT32;
-///
-/// 2-byte unsigned value.
-///
-typedef unsigned short UINT16;
-///
-/// 2-byte Character. Unless otherwise specified all strings are stored in the
-/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
-///
-typedef unsigned short CHAR16;
-///
-/// 2-byte signed value.
-///
-typedef short INT16;
-///
-/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
-/// values are undefined.
-///
-typedef unsigned char BOOLEAN;
-///
-/// 1-byte unsigned value.
-///
-typedef unsigned char UINT8;
-///
-/// 1-byte Character
-///
-typedef char CHAR8;
-///
-/// 1-byte signed value
-///
-typedef char INT8;
-
-typedef void VOID;
-
-typedef UINT64 EFI_PHYSICAL_ADDRESS;
-
-typedef struct {
- UINT32 Data1;
- UINT16 Data2;
- UINT16 Data3;
- UINT8 Data4[8];
-} EFI_GUID;
-
-#define CONST const
-#define STATIC static
-
-#define TRUE ((BOOLEAN)(1==1))
-#define FALSE ((BOOLEAN)(0==1))
-
-static inline void DebugDeadLoop(void) {
- for (;;);
-}
-
-#define FSPAPI __attribute__((cdecl))
-#define EFIAPI __attribute__((cdecl))
-
-#define _ASSERT(Expression) DebugDeadLoop()
-#define ASSERT(Expression) \
- do { \
- if (!(Expression)) { \
- _ASSERT (Expression); \
- } \
- } while (FALSE)
-
-typedef UINT32 FSP_STATUS;
-typedef UINT32 EFI_STATUS;
-
-///
-/// Compatiable with EFI_STATUS defined in PI Spec.
-#define FSP_SUCCESS 0
-#define FSP_INVALID_PARAMETER 0x80000002
-#define FSP_UNSUPPORTED 0x80000003
-#define FSP_DEVICE_ERROR 0x80000007
-#define FSP_NOT_FOUND 0x8000000E
-#define FSP_ALREADY_STARTED 0x80000014
-
-/**
- Returns a 16-bit signature built from 2 ASCII characters.
-
- This macro returns a 16-bit value built from the two ASCII characters specified
- by A and B.
-
- @param A The first ASCII character.
- @param B The second ASCII character.
-
- @return A 16-bit value built from the two ASCII characters specified by A and B.
-
-**/
-#define SIGNATURE_16(A, B) ((A) | (B << 8))
-
-/**
- Returns a 32-bit signature built from 4 ASCII characters.
-
- This macro returns a 32-bit value built from the four ASCII characters specified
- by A, B, C, and D.
-
- @param A The first ASCII character.
- @param B The second ASCII character.
- @param C The third ASCII character.
- @param D The fourth ASCII character.
-
- @return A 32-bit value built from the two ASCII characters specified by A, B,
- C and D.
-
-**/
-#define SIGNATURE_32(A, B, C, D) (SIGNATURE_16 (A, B) | (SIGNATURE_16 (C, D) << 16))
-
-/**
- Returns a 64-bit signature built from 8 ASCII characters.
-
- This macro returns a 64-bit value built from the eight ASCII characters specified
- by A, B, C, D, E, F, G,and H.
-
- @param A The first ASCII character.
- @param B The second ASCII character.
- @param C The third ASCII character.
- @param D The fourth ASCII character.
- @param E The fifth ASCII character.
- @param F The sixth ASCII character.
- @param G The seventh ASCII character.
- @param H The eighth ASCII character.
-
- @return A 64-bit value built from the two ASCII characters specified by A, B,
- C, D, E, F, G and H.
-
-**/
-#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
- (SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32))
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspvpd.h
deleted file mode 100644
index 4ba1a28..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/include/fspvpd.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/** @file
-
-Copyright (C) 2015, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
- This file is automatically generated. Please do NOT modify !!!
-
-**/
-
-#ifndef __FSP_VPD_H__
-#define __FSP_VPD_H__
-
-#pragma pack(1)
-
-
-
-typedef struct _UPD_DATA_REGION {
- UINT64 Signature; /* Offset 0x0000 */
- UINT64 Reserved; /* Offset 0x0008 */
- UINT8 UnusedUpdSpace0[16]; /* Offset 0x0010 */
- UINT8 PcdMrcInitTsegSize; /* Offset 0x0020 */
- UINT8 PcdMemoryDown; /* Offset 0x0021 */
- UINT8 PcdMrcRmtSupport; /* Offset 0x0022 */
- UINT8 PcdMrcRmtCpgcExpLoopCntValue; /* Offset 0x0023 */
- UINT8 PcdMrcRmtCpgcNumBursts; /* Offset 0x0024 */
- UINT8 PcdSpdBaseAddress_0_0; /* Offset 0x0025 */
- UINT8 PcdSpdBaseAddress_0_1; /* Offset 0x0026 */
- UINT8 PcdSpdBaseAddress_1_0; /* Offset 0x0027 */
- UINT8 PcdSpdBaseAddress_1_1; /* Offset 0x0028 */
- UINT8 PcdExtendedTemperatureEnable; /* Offset 0x0029 */
- UINT8 UnusedUpdSpace1[6]; /* Offset 0x002A */
- UINT8 PcdEnableLan; /* Offset 0x0030 */
- UINT8 PcdEnableSata2; /* Offset 0x0031 */
- UINT8 PcdEnableSata3; /* Offset 0x0032 */
- UINT8 PcdEnableIQAT; /* Offset 0x0033 */
- UINT8 PcdEnableUsb20; /* Offset 0x0034 */
- UINT8 PcdBifurcation; /* Offset 0x0035 */
- UINT8 PcdPcieRootPort1DeEmphasis; /* Offset 0x0036 */
- UINT8 PcdPcieRootPort2DeEmphasis; /* Offset 0x0037 */
- UINT8 PcdPcieRootPort3DeEmphasis; /* Offset 0x0038 */
- UINT8 PcdPcieRootPort4DeEmphasis; /* Offset 0x0039 */
- UINT8 UnusedUpdSpace2[6]; /* Offset 0x003A */
- UINT8 PcdPrintDebugMessages; /* Offset 0x0040 */
- UINT8 PcdFastboot; /* Offset 0x0041 */
- UINT8 PcdEccSupport; /* Offset 0x0042 */
- UINT8 PcdSerialPortBaudRate; /* Offset 0x0043 */
- UINT8 PcdCustomerRevision[32]; /* Offset 0x0044 */
- UINT8 UnusedUpdSpace3[12]; /* Offset 0x0064 */
- UINT16 PcdRegionTerminator; /* Offset 0x0070 */
-} UPD_DATA_REGION;
-
-#define VPD_IMAGE_ID 0x562D474E524E5641 /* 'AVNRNG-V' */
-#define VPD_IMAGE_REV 0x00000140
-
-typedef struct _VPD_DATA_REGION {
- UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
- UINT32 PcdImageRevision; /* Offset 0x0008 */
- UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
- UINT8 UnusedVpdSpace0[16]; /* Offset 0x0010 */
- UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
- UINT8 PcdSpdWriteProtect; /* Offset 0x0024 */
-} VPD_DATA_REGION;
-
-#pragma pack()
-
-#endif
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/srx/fsp_support.c b/src/vendorcode/intel/fsp1_0/rangeley/srx/fsp_support.c
deleted file mode 100644
index 9f15b3e..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/srx/fsp_support.c
+++ /dev/null
@@ -1,288 +0,0 @@
-/** @file
-
-Copyright (C) 2013 - 2014, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
-**/
-
-#include <types.h>
-#include <string.h>
-#include "fspsupport.h"
-
-/**
- This function retrieves the top of usable low memory.
-
- @param HobListPtr A HOB list pointer.
-
- @retval Usable low memory top.
-
-**/
-UINT32
-GetUsableLowMemTop (
- CONST VOID *HobStart
-)
-{
- EFI_PEI_HOB_POINTERS Hob;
- UINT32 MemLen;
- /*
- * Get the HOB list for processing
- */
- Hob.Raw = (VOID *)HobStart;
-
- /*
- * Collect memory ranges
- */
- MemLen = 0x100000;
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
- /*
- * Need memory above 1MB to be collected here
- */
- if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000 &&
- Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) 0x100000000) {
- MemLen += (UINT32) (Hob.ResourceDescriptor->ResourceLength);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return MemLen;
-}
-
-/**
- This function retrieves the top of usable high memory.
-
- @param HobListPtr A HOB list pointer.
-
- @retval Usable high memory top.
-
-**/
-UINT64
-GetUsableHighMemTop (
- CONST VOID *HobStart
-)
-{
- EFI_PEI_HOB_POINTERS Hob;
- UINT64 MemTop;
- /*
- * Get the HOB list for processing
- */
- Hob.Raw = (VOID *)HobStart;
-
- /*
- * Collect memory ranges
- */
- MemTop = 0x100000000;
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
- /*
- * Need memory above 1MB to be collected here
- */
- if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS) 0x100000000) {
- MemTop += (UINT32) (Hob.ResourceDescriptor->ResourceLength);
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return MemTop;
-}
-
-/**
- This function retrieves a special reserved memory region.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the GUID HOB data buffer length. If the GUID HOB is
- located, the length will be updated.
- @param OwnerGuid A pointer to the owner guild.
- @retval Reserved region start address. 0 if this region does not exist.
-
-**/
-VOID
-GetFspReservedMemoryFromGuid (
- CONST VOID *HobListPtr,
- EFI_PHYSICAL_ADDRESS *Base,
- UINT64 *Length,
- EFI_GUID *OwnerGuid
-)
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- /*
- * Get the HOB list for processing
- */
- Hob.Raw = (VOID *)HobListPtr;
-
- /*
- * Collect memory ranges
- */
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) {
- if (CompareGuid(&Hob.ResourceDescriptor->Owner, OwnerGuid)) {
- *Base = (EFI_PHYSICAL_ADDRESS) (Hob.ResourceDescriptor->PhysicalStart);
- *Length = (UINT64) (Hob.ResourceDescriptor->ResourceLength);
- break;
- }
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-}
-
-/**
- This function retrieves the TSEG reserved normal memory.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the TSEG reserved memory length buffer. If the GUID HOB is
- located, the length will be updated.
- @param Guid A pointer to owner HOB GUID.
- @retval NULL Failed to find the TSEG reserved memory.
- @retval others TSEG reserved memory base.
-
-**/
-UINT32
-GetTsegReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
-)
-{
- const EFI_GUID TsegOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
- UINT64 Length64 = 0;
- EFI_PHYSICAL_ADDRESS Base = 0;
-
- GetFspReservedMemoryFromGuid (HobListPtr, &Base, &Length64, (EFI_GUID *)&TsegOwnerHobGuid);
- if ((Length != NULL) && (Base != 0)) {
- *Length = (UINT32)Length64;
- }
- return (UINT32)Base;
-}
-
-/**
- This function retrieves the FSP reserved normal memory.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the FSP reserved memory length buffer. If the GUID HOB is
- located, the length will be updated.
- @param Guid A pointer to owner HOB GUID.
- @retval NULL Failed to find the FSP reserved memory.
- @retval others FSP reserved memory base.
-
-**/
-UINT32
-GetFspReservedMemory (
- CONST VOID *HobListPtr,
- UINT32 *Length
-)
-{
- const EFI_GUID FspOwnerHobGuid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
- UINT64 Length64 = 0;
- EFI_PHYSICAL_ADDRESS Base = 0;
-
- GetFspReservedMemoryFromGuid (HobListPtr, &Base, &Length64, (EFI_GUID *)&FspOwnerHobGuid);
- if ((Length != NULL) && (Base != 0)) {
- *Length = (UINT32)Length64;
- }
- return (UINT32)Base;
-}
-
-
-/**
- This function retrieves a GUIDed HOB data buffer and size.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the GUID HOB data buffer length. If the
- GUID HOB is located, the length will be updated.
- @param Guid A pointer to HOB GUID.
- @retval NULL Failed to find the GUID HOB.
- @retval others GUID HOB data buffer pointer.
-
-**/
-VOID *
-GetGuidHobDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length,
- EFI_GUID *Guid
-)
-{
- UINT8 *GuidHob;
-
- /* FSP NVS DATA HOB */
- GuidHob = GetNextGuidHob(Guid, HobListPtr);
- if (GuidHob == NULL) {
- return NULL;
- } else {
- if (Length) {
- *Length = GET_GUID_HOB_DATA_SIZE (GuidHob);
- }
- return GET_GUID_HOB_DATA (GuidHob);
- }
-}
-
-/**
- This function retrieves FSP Non-volatile Storage HOB buffer and size.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the NVS data buffer length. If the FSP NVS
- HOB is located, the length will be updated.
- @retval NULL Failed to find the NVS HOB.
- @retval others FSP NVS data buffer pointer.
-
-**/
-VOID *
-GetFspNvsDataBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
-)
-{
- const EFI_GUID FspNvsHobGuid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
- return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspNvsHobGuid);
-}
-
-
-/**
- This function retrieves Bootloader temporary stack buffer and size.
-
- @param HobListPtr A HOB list pointer.
- @param Length A pointer to the Bootloader temporary stack length.
- If the HOB is located, the length will be updated.
- @retval NULL Failed to find the Bootloader temporary stack HOB.
- @retval others Bootloader temporary stackbuffer pointer.
-
-**/
-VOID *
-GetBootloaderTempMemoryBuffer (
- CONST VOID *HobListPtr,
- UINT32 *Length
-)
-{
- const EFI_GUID FspBootloaderTemporaryMemoryHobGuid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
- return GetGuidHobDataBuffer (HobListPtr, Length, (EFI_GUID *)&FspBootloaderTemporaryMemoryHobGuid);
-}
diff --git a/src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c
deleted file mode 100644
index 4986d52..0000000
--- a/src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/******************************************************************************
-
-Copyright (C) 2013, Intel Corporation
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
- be used to endorse or promote products derived from this software without
- specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- THE POSSIBILITY OF SUCH DAMAGE.
-
- ******************************************************************************/
-
-/***********************************************************************
- *
- * fsphob.c
- *
- * HOB infrastructure code.
- *
- **********************************************************************/
-#include <string.h>
-
-#include "fsptypes.h"
-#include "fsphob.h"
-
-//
-// Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
-//
-#ifndef __PRE_RAM__
-extern volatile void *FspHobListPtr;
-#endif
-
-/**
- Reads a 64-bit value from memory that may be unaligned.
-
- This function returns the 64-bit value pointed to by Buffer. The function
- guarantees that the read operation does not produce an alignment fault.
-
- If the Buffer is NULL, then ASSERT().
-
- @param Buffer Pointer to a 64-bit value that may be unaligned.
-
- @return The 64-bit value read from Buffer.
-
-**/
-UINT64
-EFIAPI
-ReadUnaligned64 (
- CONST UINT64 *Buffer
- )
-{
- ASSERT (Buffer != NULL);
-
- return *Buffer;
-}
-
-/**
- Compares two GUIDs.
-
- This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
- If there are any bit differences in the two GUIDs, then FALSE is returned.
-
- If Guid1 is NULL, then ASSERT().
- If Guid2 is NULL, then ASSERT().
-
- @param Guid1 A pointer to a 128 bit GUID.
- @param Guid2 A pointer to a 128 bit GUID.
-
- @retval TRUE Guid1 and Guid2 are identical.
- @retval FALSE Guid1 and Guid2 are not identical.
-
-**/
-BOOLEAN
-EFIAPI
-CompareGuid (
- CONST EFI_GUID *Guid1,
- CONST EFI_GUID *Guid2
- )
-{
- UINT64 LowPartOfGuid1;
- UINT64 LowPartOfGuid2;
- UINT64 HighPartOfGuid1;
- UINT64 HighPartOfGuid2;
-
- LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
- LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
- HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
- HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
-
- return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
-}
-
-/**
- Returns the pointer to the HOB list.
-**/
-VOID *
-EFIAPI
-GetHobList (
- VOID
- )
-{
-#ifndef __PRE_RAM__
- ASSERT (FspHobListPtr != NULL);
- return ((VOID *)FspHobListPtr);
-#else
- return ((VOID *)NULL);
-#endif
-}
-
-/**
- Returns the next instance of a HOB type from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextHob (
- UINT16 Type,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- ASSERT (HobStart != NULL);
-
- Hob.Raw = (UINT8 *) HobStart;
- //
- // Parse the HOB list until end of list or matching type is found.
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == Type) {
- return Hob.Raw;
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
- return NULL;
-}
-
-/**
- Returns the first instance of a HOB type among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstHob (
- UINT16 Type
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextHob (Type, HobList);
-}
-
-/**
- Returns the next instance of the matched GUID HOB from the starting HOB.
-**/
-VOID *
-EFIAPI
-GetNextGuidHob (
- CONST EFI_GUID *Guid,
- CONST VOID *HobStart
- )
-{
- EFI_PEI_HOB_POINTERS GuidHob;
-
- GuidHob.Raw = (UINT8 *) HobStart;
- while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
- if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
- break;
- }
- GuidHob.Raw = GET_NEXT_HOB (GuidHob);
- }
- return GuidHob.Raw;
-}
-
-/**
- Returns the first instance of the matched GUID HOB among the whole HOB list.
-**/
-VOID *
-EFIAPI
-GetFirstGuidHob (
- CONST EFI_GUID *Guid
- )
-{
- VOID *HobList;
-
- HobList = GetHobList ();
- return GetNextGuidHob (Guid, HobList);
-}
1
0
Patch set updated for coreboot: soc/intel/quark: Add IntelQNCConfig.h from EDK-II
by Leroy P Leahy 24 Apr '16
by Leroy P Leahy 24 Apr '16
24 Apr '16
Leroy P Leahy (leroy.p.leahy(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14497
-gerrit
commit 4862938ac0ce624f05887138bf81a44ff8bcf265
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Sat Apr 23 17:27:44 2016 -0700
soc/intel/quark: Add IntelQNCConfig.h from EDK-II
Add the EDK-II Quark file IntelQNCConfig.h. This adds the definitions
for the temperature sensor.
TEST=Build and run on Galileo Gen2
Change-Id: I70896e6187b878ea572535432912f1d4db895a99
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
---
src/soc/intel/quark/include/soc/IntelQNCConfig.h | 73 ++++++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/src/soc/intel/quark/include/soc/IntelQNCConfig.h b/src/soc/intel/quark/include/soc/IntelQNCConfig.h
new file mode 100644
index 0000000..0375397
--- /dev/null
+++ b/src/soc/intel/quark/include/soc/IntelQNCConfig.h
@@ -0,0 +1,73 @@
+/** @file
+Some configuration of QNC Package
+
+Copyright (c) 2013-2015 Intel Corporation.
+
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __INTEL_QNC_CONFIG_H__
+#define __INTEL_QNC_CONFIG_H__
+
+//
+// QNC Fixed configurations.
+//
+
+//
+// Memory arbiter fixed config values.
+//
+#define QNC_FIXED_CONFIG_ASTATUS ((UINT32) (\
+ (ASTATUS_PRI_NORMAL << ASTATUS0_DEFAULT_BP) | \
+ (ASTATUS_PRI_NORMAL << ASTATUS1_DEFAULT_BP) | \
+ (ASTATUS_PRI_URGENT << ASTATUS0_RASISED_BP) | \
+ (ASTATUS_PRI_URGENT << ASTATUS1_RASISED_BP) \
+ ))
+
+//
+// Memory Manager fixed config values.
+//
+#define V_DRAM_NON_HOST_RQ_LIMIT 2
+
+//
+// RMU Thermal config fixed config values for TS in Vref Mode.
+//
+#define V_TSCGF1_CONFIG_ISNSCURRENTSEL_VREF_MODE 0x04
+#define V_TSCGF2_CONFIG2_ISPARECTRL_VREF_MODE 0x01
+#define V_TSCGF1_CONFIG_IBGEN_VREF_MODE 1
+#define V_TSCGF2_CONFIG_IDSCONTROL_VREF_MODE 0x011b
+#define V_TSCGF2_CONFIG2_ICALCOARSETUNE_VREF_MODE 0x34
+
+//
+// RMU Thermal config fixed config values for TS in Ratiometric mode.
+//
+#define V_TSCGF1_CONFIG_ISNSCURRENTSEL_RATIO_MODE 0x04
+#define V_TSCGF1_CONFIG_ISNSCHOPSEL_RATIO_MODE 0x02
+#define V_TSCGF1_CONFIG_ISNSINTERNALVREFEN_RATIO_MODE 1
+#define V_TSCGF2_CONFIG_IDSCONTROL_RATIO_MODE 0x011f
+#define V_TSCGF2_CONFIG_IDSTIMING_RATIO_MODE 0x0001
+#define V_TSCGF2_CONFIG2_ICALCONFIGSEL_RATIO_MODE 0x01
+#define V_TSCGF2_CONFIG2_ISPARECTRL_RATIO_MODE 0x00
+#define V_TSCGF1_CONFIG_IBGEN_RATIO_MODE 0
+#define V_TSCGF1_CONFIG_IBGCHOPEN_RATIO_MODE 0
+#define V_TSCGF3_CONFIG_ITSGAMMACOEFF_RATIO_MODE 0xC8
+#define V_TSCGF2_CONFIG2_ICALCOARSETUNE_RATIO_MODE 0x17
+
+//
+// iCLK fixed config values.
+//
+#define V_MUXTOP_FLEX2 3
+#define V_MUXTOP_FLEX1 1
+
+//
+// PCIe Root Port fixed config values.
+//
+#define V_PCIE_ROOT_PORT_SBIC_VALUE (B_QNC_PCIE_IOSFSBCTL_SBIC_IDLE_NEVER)
+
+#endif
1
0
New patch to review for coreboot: soc/intel/quark: Add IntelQNCConfig.h from EDK-II
by Leroy P Leahy 24 Apr '16
by Leroy P Leahy 24 Apr '16
24 Apr '16
Leroy P Leahy (leroy.p.leahy(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14497
-gerrit
commit 219b9ec07a46e46a6a22e50e4ba6f202450c5295
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Sat Apr 23 17:27:44 2016 -0700
soc/intel/quark: Add IntelQNCConfig.h from EDK-II
Add the EDK-II Quark file IntelQNCConfig.h. This adds the definitions
for the temperature sensor.
TEST=Build and run on Galileo Gen2
Change-Id: I70896e6187b878ea572535432912f1d4db895a99
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
---
src/soc/intel/quark/include/soc/IntelQNCConfig.h | 74 ++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/src/soc/intel/quark/include/soc/IntelQNCConfig.h b/src/soc/intel/quark/include/soc/IntelQNCConfig.h
new file mode 100644
index 0000000..16da9e0
--- /dev/null
+++ b/src/soc/intel/quark/include/soc/IntelQNCConfig.h
@@ -0,0 +1,74 @@
+/** @file
+Some configuration of QNC Package
+
+Copyright (c) 2013-2015 Intel Corporation.
+
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __INTEL_QNC_CONFIG_H__
+#define __INTEL_QNC_CONFIG_H__
+
+//
+// QNC Fixed configurations.
+//
+
+//
+// Memory arbiter fixed config values.
+//
+#define QNC_FIXED_CONFIG_ASTATUS ((UINT32) (\
+ (ASTATUS_PRI_NORMAL << ASTATUS0_DEFAULT_BP) | \
+ (ASTATUS_PRI_NORMAL << ASTATUS1_DEFAULT_BP) | \
+ (ASTATUS_PRI_URGENT << ASTATUS0_RASISED_BP) | \
+ (ASTATUS_PRI_URGENT << ASTATUS1_RASISED_BP) \
+ ))
+
+//
+// Memory Manager fixed config values.
+//
+#define V_DRAM_NON_HOST_RQ_LIMIT 2
+
+//
+// RMU Thermal config fixed config values for TS in Vref Mode.
+//
+#define V_TSCGF1_CONFIG_ISNSCURRENTSEL_VREF_MODE 0x04
+#define V_TSCGF2_CONFIG2_ISPARECTRL_VREF_MODE 0x01
+#define V_TSCGF1_CONFIG_IBGEN_VREF_MODE 1
+#define V_TSCGF2_CONFIG_IDSCONTROL_VREF_MODE 0x011b
+#define V_TSCGF2_CONFIG2_ICALCOARSETUNE_VREF_MODE 0x34
+
+//
+// RMU Thermal config fixed config values for TS in Ratiometric mode.
+//
+#define V_TSCGF1_CONFIG_ISNSCURRENTSEL_RATIO_MODE 0x04
+#define V_TSCGF1_CONFIG_ISNSCHOPSEL_RATIO_MODE 0x02
+#define V_TSCGF1_CONFIG_ISNSINTERNALVREFEN_RATIO_MODE 1
+#define V_TSCGF2_CONFIG_IDSCONTROL_RATIO_MODE 0x011f
+#define V_TSCGF2_CONFIG_IDSTIMING_RATIO_MODE 0x0001
+#define V_TSCGF2_CONFIG2_ICALCONFIGSEL_RATIO_MODE 0x01
+#define V_TSCGF2_CONFIG2_ISPARECTRL_RATIO_MODE 0x00
+#define V_TSCGF1_CONFIG_IBGEN_RATIO_MODE 0
+#define V_TSCGF1_CONFIG_IBGCHOPEN_RATIO_MODE 0
+#define V_TSCGF3_CONFIG_ITSGAMMACOEFF_RATIO_MODE 0xC8
+#define V_TSCGF2_CONFIG2_ICALCOARSETUNE_RATIO_MODE 0x17
+
+//
+// iCLK fixed config values.
+//
+#define V_MUXTOP_FLEX2 3
+#define V_MUXTOP_FLEX1 1
+
+//
+// PCIe Root Port fixed config values.
+//
+#define V_PCIE_ROOT_PORT_SBIC_VALUE (B_QNC_PCIE_IOSFSBCTL_SBIC_IDLE_NEVER)
+
+#endif
+
1
0
New patch to review for coreboot: soc/intel/quark: Add USB PHY initialization
by Leroy P Leahy 24 Apr '16
by Leroy P Leahy 24 Apr '16
24 Apr '16
Leroy P Leahy (leroy.p.leahy(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14496
-gerrit
commit 2bc492d8849915a57da2916ba630e1a98eedb490
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Sat Apr 23 12:41:08 2016 -0700
soc/intel/quark: Add USB PHY initialization
Add register access support using register scripts.
Initialize the USB PHY using register scripts.
TEST=Build and run on Galileo Gen2
Change-Id: I34a8e78eab3c7314ca34343eccc8aeef0622798a
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
---
src/soc/intel/quark/Kconfig | 1 +
src/soc/intel/quark/Makefile.inc | 3 +
src/soc/intel/quark/include/soc/pci_devs.h | 1 +
src/soc/intel/quark/include/soc/reg_access.h | 61 ++++++++++++++
src/soc/intel/quark/include/soc/romstage.h | 7 +-
src/soc/intel/quark/reg_access.c | 115 +++++++++++++++++++++++++++
src/soc/intel/quark/romstage/mtrr.c | 25 ------
src/soc/intel/quark/usb.c | 92 +++++++++++++++++++++
8 files changed, 274 insertions(+), 31 deletions(-)
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index aab509a..8485aa3 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_RAMSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_VERSTAGE_X86_32
+ select REG_SCRIPT
select SOC_INTEL_COMMON
select SOC_SETS_MTRRS
select TSC_CONSTANT_RATE
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc
index d8650fa..3a865b8 100644
--- a/src/soc/intel/quark/Makefile.inc
+++ b/src/soc/intel/quark/Makefile.inc
@@ -19,6 +19,7 @@ subdirs-y += romstage
subdirs-y += ../../../cpu/x86/tsc
romstage-y += memmap.c
+romstage-y += reg_access.c
romstage-y += tsc_freq.c
romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
@@ -27,9 +28,11 @@ ramstage-y += chip.c
ramstage-y += memmap.c
ramstage-y += northcluster.c
ramstage-y += pmc.c
+ramstage-y += reg_access.c
ramstage-y += tsc_freq.c
ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c
+ramstage-y += usb.c
CPPFLAGS_common += -I$(src)/soc/intel/quark
CPPFLAGS_common += -I$(src)/soc/intel/quark/include
diff --git a/src/soc/intel/quark/include/soc/pci_devs.h b/src/soc/intel/quark/include/soc/pci_devs.h
index 4f577ce..7503178 100644
--- a/src/soc/intel/quark/include/soc/pci_devs.h
+++ b/src/soc/intel/quark/include/soc/pci_devs.h
@@ -26,6 +26,7 @@
#define MC_BDF PCI_DEV(PCI_BUS_NUMBER_QNC, MC_DEV, MC_FUN)
/* IO Fabric 1 */
+#define EHCI_DEVID 0x0939
#define HSUART_DEVID 0x0936
#define SIO1_DEV 0x14
diff --git a/src/soc/intel/quark/include/soc/reg_access.h b/src/soc/intel/quark/include/soc/reg_access.h
new file mode 100644
index 0000000..0126011
--- /dev/null
+++ b/src/soc/intel/quark/include/soc/reg_access.h
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _QUARK_REG_ACCESS_H_
+#define _QUARK_REG_ACCESS_H_
+
+#include <fsp/util.h>
+#include <reg_script.h>
+#include <soc/QuarkNcSocId.h>
+
+enum {
+ USB_PHY_REGS = 1
+};
+
+#if ENV_RAMSTAGE
+enum {
+ REG_ACCESS_TYPE = REG_SCRIPT_TYPE_PLATFORM_BASE
+};
+
+#define REG_ACCESS(cmd_, reg_, size_, mask_, value_, timeout_, reg_set_) \
+ _REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_##cmd_, REG_ACCESS_TYPE, \
+ size_, reg_, mask_, value_, timeout_, reg_set_)
+#define REG_USB_ACCESS(cmd_, reg_, mask_, value_, timeout_) \
+ REG_ACCESS(cmd_, reg_, REG_SCRIPT_SIZE_32, mask_, value_, timeout_, \
+ USB_PHY_REGS)
+#define REG_USB_READ(reg_) \
+ REG_USB_ACCESS(READ, reg_, 0, 0, 0)
+#define REG_USB_WRITE(reg_, value_) \
+ REG_USB_ACCESS(WRITE, reg_, 0, value_, 0)
+#define REG_USB_AND(reg_, value_) \
+ REG_USB_RMW(reg_, value_, 0)
+#define REG_USB_RMW(reg_, mask_, value_) \
+ REG_USB_ACCESS(RMW, reg_, mask_, value_, 0)
+#define REG_USB_RXW(reg_, mask_, value_) \
+ REG_USB_ACCESS(RXW, reg_, mask_, value_, 0)
+#define REG_USB_OR(reg_, value_) \
+ REG_USB_RMW(reg_, 0xffffffff, value_)
+#define REG_USB_POLL(reg_, mask_, value_, timeout_) \
+ REG_USB_ACCESS(POLL, reg_, mask_, value_, timeout_)
+#define REG_USB_XOR(reg_, value_) \
+ REG_USB_RXW(reg_, 0xffffffff, value_)
+#endif /* ENV_RAMSTAGE */
+
+void mcr_write(uint8_t opcode, uint8_t port, uint32_t reg_address);
+uint32_t mdr_read(void);
+void mdr_write(uint32_t value);
+void mea_write(uint32_t reg_address);
+
+#endif /* _QUARK_REG_ACCESS_H_ */
diff --git a/src/soc/intel/quark/include/soc/romstage.h b/src/soc/intel/quark/include/soc/romstage.h
index c2c7e9c..c344ada 100644
--- a/src/soc/intel/quark/include/soc/romstage.h
+++ b/src/soc/intel/quark/include/soc/romstage.h
@@ -23,13 +23,8 @@
#endif
#include <fsp/romstage.h>
-#include <fsp/util.h>
-#include <soc/QuarkNcSocId.h>
+#include <soc/reg_access.h>
-void mcr_write(uint8_t opcode, uint8_t port, uint32_t reg_address);
-uint32_t mdr_read(void);
-void mdr_write(uint32_t value);
-void mea_write(uint32_t reg_address);
uint32_t port_reg_read(uint8_t port, uint32_t offset);
void port_reg_write(uint8_t port, uint32_t offset, uint32_t value);
void report_platform_info(void);
diff --git a/src/soc/intel/quark/reg_access.c b/src/soc/intel/quark/reg_access.c
new file mode 100644
index 0000000..ebc200a
--- /dev/null
+++ b/src/soc/intel/quark/reg_access.c
@@ -0,0 +1,115 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied wacbmem_entryanty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define __SIMPLE_DEVICE__
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <soc/pci_devs.h>
+#include <soc/reg_access.h>
+
+void mcr_write(uint8_t opcode, uint8_t port, uint32_t reg_address)
+{
+ pci_write_config32(MC_BDF, QNC_ACCESS_PORT_MCR,
+ (opcode << QNC_MCR_OP_OFFSET)
+ | ((uint32_t)port << QNC_MCR_PORT_OFFSET)
+ | ((reg_address & QNC_MCR_MASK) << QNC_MCR_REG_OFFSET)
+ | QNC_MCR_BYTE_ENABLES);
+}
+
+uint32_t mdr_read(void)
+{
+ return pci_read_config32(MC_BDF, QNC_ACCESS_PORT_MDR);
+}
+
+void mdr_write(uint32_t value)
+{
+ pci_write_config32(MC_BDF, QNC_ACCESS_PORT_MDR, value);
+}
+
+void mea_write(uint32_t reg_address)
+{
+ pci_write_config32(MC_BDF, QNC_ACCESS_PORT_MEA, reg_address
+ & QNC_MEA_MASK);
+}
+
+#if ENV_RAMSTAGE
+static uint32_t reg_usb_read(uint32_t reg_address)
+{
+ /* Read the USB register */
+ mea_write(reg_address);
+ mcr_write(QUARK_ALT_OPCODE_READ, QUARK_SC_USB_AFE_SB_PORT_ID,
+ reg_address);
+ return mdr_read();
+}
+
+static void reg_usb_write(uint32_t reg_address, uint32_t value)
+{
+ /* Write the USB register */
+ mea_write(reg_address);
+ mdr_write(value);
+ mcr_write(QUARK_ALT_OPCODE_WRITE, QUARK_SC_USB_AFE_SB_PORT_ID,
+ reg_address);
+}
+
+static uint64_t reg_read(struct reg_script_context *ctx)
+{
+ const struct reg_script *step = ctx->step;
+ uint64_t value = 0;
+
+ switch (step->id) {
+ default:
+ printk(BIOS_ERR,
+ "ERROR - Unknown register set (0x%08x)!\n",
+ step->id);
+ break;
+
+ case USB_PHY_REGS:
+ value = reg_usb_read(step->reg);
+ break;
+ }
+ return value;
+}
+
+static void reg_write(struct reg_script_context *ctx)
+{
+ const struct reg_script *step = ctx->step;
+
+ switch (step->id) {
+ default:
+ printk(BIOS_ERR,
+ "ERROR - Unknown register set (0x%08x)!\n",
+ step->id);
+ break;
+
+ case USB_PHY_REGS:
+ reg_usb_write(step->reg, (uint32_t)step->value);
+ break;
+ }
+}
+
+const struct reg_script_bus_entry reg_script_bus_table[] = {
+ {REG_ACCESS_TYPE, reg_read, reg_write}
+};
+
+const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries)
+{
+ /* Return the table size and address */
+ *table_entries = sizeof(reg_script_bus_table)
+ / sizeof(reg_script_bus_table[0]);
+ return ®_script_bus_table[0];
+}
+
+#endif /* ENV_RAMSTAGE */
diff --git a/src/soc/intel/quark/romstage/mtrr.c b/src/soc/intel/quark/romstage/mtrr.c
index 8b237a3..f03be1d 100644
--- a/src/soc/intel/quark/romstage/mtrr.c
+++ b/src/soc/intel/quark/romstage/mtrr.c
@@ -21,31 +21,6 @@
#include <soc/pci_devs.h>
#include <soc/romstage.h>
-void mcr_write(uint8_t opcode, uint8_t port, uint32_t reg_address)
-{
- pci_write_config32(MC_BDF, QNC_ACCESS_PORT_MCR,
- (opcode << QNC_MCR_OP_OFFSET)
- | ((uint32_t)port << QNC_MCR_PORT_OFFSET)
- | ((reg_address & QNC_MCR_MASK) << QNC_MCR_REG_OFFSET)
- | QNC_MCR_BYTE_ENABLES);
-}
-
-uint32_t mdr_read(void)
-{
- return pci_read_config32(MC_BDF, QNC_ACCESS_PORT_MDR);
-}
-
-void mdr_write(uint32_t value)
-{
- pci_write_config32(MC_BDF, QNC_ACCESS_PORT_MDR, value);
-}
-
-void mea_write(uint32_t reg_address)
-{
- pci_write_config32(MC_BDF, QNC_ACCESS_PORT_MEA, reg_address
- & QNC_MEA_MASK);
-}
-
static uint32_t mtrr_index_to_host_bridge_register_offset(unsigned long index)
{
uint32_t offset;
diff --git a/src/soc/intel/quark/usb.c b/src/soc/intel/quark/usb.c
new file mode 100644
index 0000000..22ce24a
--- /dev/null
+++ b/src/soc/intel/quark/usb.c
@@ -0,0 +1,92 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/pci_ids.h>
+#include <soc/pci_devs.h>
+#include <soc/reg_access.h>
+
+/* USB Phy Registers */
+#define USB2_GLOBAL_PORT 0x4001
+#define USB2_PLL1 0x7F02
+#define USB2_PLL2 0x7F03
+#define USB2_COMPBG 0x7F04
+
+/* In order to configure the USB PHY to use clk120 (ickusbcoreclk) as PLL
+ * reference clock and Port2 as a USB device port, the following sequence must
+ * be followed
+ */
+static const struct reg_script init_script[] = {
+
+ /* Sighting #4930631 PDNRESCFG [8:7] of USB2_GLOBAL_PORT = 11b.
+ * For port 0 & 1 as host and port 2 as device.
+ */
+ REG_USB_RXW(USB2_GLOBAL_PORT, ~(BIT8 | BIT7 | BIT1), (BIT8 | BIT7)),
+
+ /*
+ * Sighting #4930653 Required BIOS change on Disconnect vref to change
+ * to 600mV.
+ */
+ REG_USB_RXW(USB2_COMPBG, ~(BIT10 | BIT9 | BIT8 | BIT7),
+ (BIT10 | BIT7)),
+
+ /* Sideband register write to USB AFE (Phy)
+ * (pllbypass) to bypass/Disable PLL before switch
+ */
+ REG_USB_OR(USB2_PLL2, BIT29),
+
+ /* Sideband register write to USB AFE (Phy)
+ * (coreclksel) to select 120MHz (ickusbcoreclk) clk source.
+ * (Default 0 to select 96MHz (ickusbclk96_npad/ppad))
+ */
+ REG_USB_OR(USB2_PLL1, BIT1),
+
+ /* Sideband register write to USB AFE (Phy)
+ * (divide by 8) to achieve internal 480MHz clock
+ * for 120MHz input refclk. (Default: 4'b1000 (divide by 10) for 96MHz)
+ */
+ REG_USB_RXW(USB2_PLL1, ~(BIT6 | BIT5 | BIT4 | BIT3), BIT6),
+
+ /* Sideband register write to USB AFE (Phy)
+ * Clear (pllbypass)
+ */
+ REG_USB_AND(USB2_PLL2, ~BIT29),
+
+ /* Sideband register write to USB AFE (Phy)
+ * Set (startlock) to force the PLL FSM to restart the lock
+ * sequence due to input clock/freq switch.
+ */
+ REG_USB_OR(USB2_PLL2, BIT24),
+ REG_SCRIPT_END
+};
+
+static void init(device_t dev)
+{
+ printk(BIOS_INFO, "Initializing USB PLLs\n");
+ reg_script_run_on_dev(dev, init_script);
+}
+
+static struct device_operations device_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = init,
+};
+
+static const struct pci_driver gfx_driver __pci_driver = {
+ .ops = &device_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = EHCI_DEVID,
+};
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