Werner Zeh (werner.zeh(a)siemens.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14505
-gerrit
commit e2ea3e792546d3778a5f9d1b4254ecf766ae65c1
Author: Werner Zeh <werner.zeh(a)siemens.com>
Date: Fri Apr 22 14:14:45 2016 +0200
vendorcode/siemens: Add hwilib for Siemens specific info struct
Add a library which unifies access to Siemens specific hardware information
data. This library is meant to be used with Siemens platforms and can be
selected in Kconfig. The needed source of information has to be present
in cbfs.
This lib can be used in romstage and ramstage.
Change-Id: I2c6e003b0c123b4cf6a84906c2b133b8c38c8b1a
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
src/vendorcode/Makefile.inc | 1 +
src/vendorcode/siemens/Kconfig | 20 ++
src/vendorcode/siemens/Makefile.inc | 16 ++
src/vendorcode/siemens/hwilib/Makefile.inc | 19 ++
src/vendorcode/siemens/hwilib/hwilib.c | 321 +++++++++++++++++++++++++++++
src/vendorcode/siemens/hwilib/hwilib.h | 74 +++++++
6 files changed, 451 insertions(+)
diff --git a/src/vendorcode/Makefile.inc b/src/vendorcode/Makefile.inc
index 741a04a..440972f 100644
--- a/src/vendorcode/Makefile.inc
+++ b/src/vendorcode/Makefile.inc
@@ -1,3 +1,4 @@
subdirs-y += amd
subdirs-y += google
subdirs-y += intel
+subdirs-y += siemens
diff --git a/src/vendorcode/siemens/Kconfig b/src/vendorcode/siemens/Kconfig
new file mode 100644
index 0000000..8bbab62
--- /dev/null
+++ b/src/vendorcode/siemens/Kconfig
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Siemens AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config USE_SIEMENS_HWILIB
+ bool
+ default n
+
+source "src/vendorcode/siemens/*/Kconfig"
diff --git a/src/vendorcode/siemens/Makefile.inc b/src/vendorcode/siemens/Makefile.inc
new file mode 100644
index 0000000..ece2b4d
--- /dev/null
+++ b/src/vendorcode/siemens/Makefile.inc
@@ -0,0 +1,16 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Siemens AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+subdirs-$(CONFIG_USE_SIEMENS_HWILIB) += hwilib
diff --git a/src/vendorcode/siemens/hwilib/Makefile.inc b/src/vendorcode/siemens/hwilib/Makefile.inc
new file mode 100644
index 0000000..1c6f6c9
--- /dev/null
+++ b/src/vendorcode/siemens/hwilib/Makefile.inc
@@ -0,0 +1,19 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Siemens AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+CFLAGS_x86_32 += -Isrc/vendorcode/siemens/hwilib
+
+romstage-y += hwilib.c
+ramstage-y += hwilib.c
diff --git a/src/vendorcode/siemens/hwilib/hwilib.c b/src/vendorcode/siemens/hwilib/hwilib.c
new file mode 100644
index 0000000..5d47881
--- /dev/null
+++ b/src/vendorcode/siemens/hwilib/hwilib.c
@@ -0,0 +1,321 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Siemens AG.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cbfs.h>
+#include <string.h>
+#include <console/console.h>
+#include <arch/io.h>
+#include <arch/early_variables.h>
+#include "hwilib.h"
+
+
+#define MAX_BLOCK_NUM 3
+#define LEN_HIB 0x1fd
+#define LEN_SIB 0x121
+#define LEN_EIB 0x0b5
+#define NEXT_OFFSET_HIB 0x1dc
+#define NEXT_OFFSET_SIB 0x104
+#define NEXT_OFFSET_EIB 0x0b0
+#define LEN_UNIQUEL_NUM 0x010
+#define LEN_HW_REV 0x002
+#define LEN_MAC_ADDRESS 0x006
+#define LEN_SPD 0x080
+#define LEN_EDID 0x080
+#define LEN_OFFSET 0x00c
+#define EIB_FEATRUE_OFFSET 0x00e
+#define LEN_MAGIC_NUM 0x007
+#define BLOCK_MAGIC "H1W2M3I"
+
+/* Define all supported block types. */
+enum {
+ BLK_HIB,
+ BLK_SIB,
+ BLK_EIB,
+};
+
+/* This structure holds a valid position for a given field
+ * Every field can have multiple positions of which the first available
+ * will be taken by the library.
+ */
+struct param_pos {
+ uint8_t blk_type; /* Valid for a specific block type */
+ uint32_t offset; /* Offset in given block */
+ uint32_t len; /* Length for the field in this block */
+};
+
+/* This structure holds all the needed information for a given field type
+ * and a pointer to a function which is able to extract the desired data.
+ */
+struct param_info {
+ struct param_pos pos[MAX_BLOCK_NUM];
+ uint64_t mask;
+ uint8_t mask_offset;
+ uint32_t (*get_field)(const struct param_info *param, uint8_t *dst,
+ uint32_t maxlen);
+};
+
+/* Storage for pointers to the different blocks. The contents will be filled
+ * in hwilib_find_blocks().
+ */
+static uint8_t *all_blocks[MAX_BLOCK_NUM] CAR_GLOBAL;
+
+static uint32_t hwilib_read_bytes (const struct param_info *param, uint8_t *dst,
+ uint32_t maxlen);
+
+/* Add all supported fields to this variable. It is important to use the
+ * field type of a given field as the array index so that all the information
+ * is on the appropriate place inside the array. In this way one do not need
+ * to search for fields but can simply use an index into the array.
+ */
+static const struct param_info params[] = {
+ [HIB_VerID] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [SIB_VerID] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0x8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [EIB_VerID] = {
+ .pos[0] = {.blk_type = BLK_EIB, .offset = 0x8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [HIB_HwRev] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xbe, .len = 2},
+ .get_field = hwilib_read_bytes },
+ [SIB_HwRev] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xc8, .len = 2},
+ .get_field = hwilib_read_bytes },
+ [UniqueNum] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xa2, .len = 10},
+ .pos[1] = {.blk_type = BLK_SIB, .offset = 0xa2, .len = 10},
+ .get_field = hwilib_read_bytes },
+ [Mac1] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xc0, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac1Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xc6, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Mac2] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xc8, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac2Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xce, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Mac3] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xd0, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac3Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xd6, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Mac4] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xd8, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac4Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xde, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [SPD] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xe0, .len = 0x80},
+ .get_field = hwilib_read_bytes },
+ [FF_FreezeDis] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1b8, .len = 4},
+ .mask = 0x10,
+ .mask_offset = 4,
+ .get_field = hwilib_read_bytes },
+ [FF_FanReq] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1b8, .len = 4},
+ .mask = 0x400,
+ .mask_offset = 10,
+ .get_field = hwilib_read_bytes },
+ [BiosFlags] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1c0, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping1] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1cc, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping2] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1d0, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping3] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1d4, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping4] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1d8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [PF_Color_Depth] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xea, .len = 1},
+ .mask = 0x03,
+ .mask_offset = 0,
+ .get_field = hwilib_read_bytes },
+ [PF_DisplType] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xe3, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [PF_DisplCon] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xf2, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Edid] = {
+ .pos[0] = {.blk_type = BLK_EIB, .offset = 0x10, .len = 0x80},
+ .get_field = hwilib_read_bytes },
+ [VddRef] = {
+ .pos[0] = {.blk_type = BLK_EIB, .offset = 0x90, .len = 2},
+ .get_field = hwilib_read_bytes },
+};
+
+/** \brief This functions reads the given field from the first valid hwinfo
+ * block
+ * @param *param Parameter to read from hwinfo
+ * @param *dst Pointer to memory where the data will be stored in
+ * @return number of copied bytes on success, 0 on error
+ */
+static uint32_t hwilib_read_bytes (const struct param_info *param, uint8_t *dst,
+ uint32_t maxlen)
+{
+ uint8_t i = 0, *blk = NULL;
+ uint8_t **blk_ptr = car_get_var_ptr(&all_blocks[0]);
+ static const uint16_t all_blk_size[MAX_BLOCK_NUM] =
+ {LEN_HIB, LEN_SIB, LEN_EIB};
+
+ if (!param || !dst)
+ return 0;
+ /* Take the first valid block to get the parameter from */
+ do {
+ if ((param->pos[i].len) && (param->pos[i].offset)) {
+ blk = blk_ptr[param->pos[i].blk_type];
+ break;
+ }
+ i++;
+ } while (i < MAX_BLOCK_NUM);
+
+ /* Ensure there is a valid block available for this parameter and
+ * the length of the parameter do not exceed maxlen or block len.
+ */
+ if ((!blk) || (param->pos[i].len > maxlen) ||
+ (param->pos[i].len + param->pos[i].offset >
+ all_blk_size[param->pos[i].blk_type]))
+ return 0;
+ /* We can now copy the wanted data. */
+ memcpy(dst, (blk + param->pos[i].offset), param->pos[i].len);
+ /* If there is a mask given, apply it only for parameters with a
+ * length of 1, 2, 4 or 8 bytes.
+ */
+ if (param->mask) {
+ switch (param->pos[i].len) {
+ case 1:
+ /* Apply a mask on a 8 bit value */
+ *dst &= (param->mask & 0xff);
+ *dst >>= (param->mask_offset);
+ break;
+ case 2:
+ /* Apply mask on a 16 bit value */
+ *((uint16_t *)(dst)) &= (param->mask & 0xffff);
+ *((uint16_t *)(dst)) >>= (param->mask_offset);
+ break;
+ case 4:
+ /* Apply mask on a 32 bit value */
+ *((uint32_t *)(dst)) &= (param->mask & 0xffffffff);
+ *((uint32_t *)(dst)) >>= (param->mask_offset);
+ break;
+ case 8:
+ /* Apply mask on a 64 bit value */
+ *((uint64_t *)(dst)) &= (param->mask);
+ *((uint64_t *)(dst)) >>= (param->mask_offset);
+ break;
+ default:
+ /* Warn if there is a mask for an invalid length. */
+ printk(BIOS_WARNING,
+ "HWILIB: Invalid field length for given mask.\n");
+ break;
+ }
+ }
+ return param->pos[i].len;
+}
+
+/** \brief This function finds all available block types in a given cbfs file.
+ * @param *hwi_filename Name of the cbfs-file to use.
+ * @return CB_SUCCESS when no error, otherwise error code
+ */
+enum cb_err hwilib_find_blocks (const char *hwi_filename)
+{
+ uint8_t *ptr = NULL, *base = NULL;
+ uint32_t next_offset = 1;
+ uint8_t **blk_ptr = car_get_var_ptr(&all_blocks[0]);
+ size_t filesize = 0;
+
+ /* Check for a valid parameter */
+ if (!hwi_filename)
+ return CB_ERR_ARG;
+ ptr = cbfs_boot_map_with_leak(hwi_filename, CBFS_TYPE_RAW, &filesize);
+ if (!ptr) {
+ printk(BIOS_ERR,"HWILIB: Missing file \"%s\" in cbfs.\n",
+ hwi_filename);
+ return CB_ERR;
+ }
+ /* Ensure the block has the right magic */
+ if (strncmp((char*)ptr, BLOCK_MAGIC, LEN_MAGIC_NUM)) {
+ printk(BIOS_ERR, "HWILIB: Bad magic at start of block!\n");
+ return CB_ERR;
+ }
+ /* Reset all static pointers to blocks as they might have been set
+ * in prior calls to this function.
+ * This way the caller do not need to "close" already opened blocks.
+ */
+ memset(blk_ptr, 0, (MAX_BLOCK_NUM * sizeof (uint8_t *)));
+ /* Check which blocks are available by examining the length field. */
+ base = ptr;
+ while(!(strncmp((char *)ptr, BLOCK_MAGIC, LEN_MAGIC_NUM)) &&
+ next_offset) {
+ uint16_t len = read16(ptr + LEN_OFFSET);
+ /* Ensure file size boundaries for a given block. */
+ if ((ptr - base + len) > filesize)
+ break;
+ if (len == LEN_HIB) {
+ blk_ptr[BLK_HIB] = ptr;
+ next_offset = read32(ptr + NEXT_OFFSET_HIB);
+ if (next_offset)
+ ptr = base + next_offset;
+ } else if (len == LEN_SIB) {
+ blk_ptr[BLK_SIB] = ptr;
+ next_offset = read32(ptr + NEXT_OFFSET_SIB);
+ if (next_offset)
+ ptr = base + next_offset;
+ } else if (len == LEN_EIB) {
+ /* Skip preliminary blocks */
+ if (!(read16(ptr + EIB_FEATRUE_OFFSET) & 0x01))
+ blk_ptr[BLK_EIB] = ptr;
+ next_offset = read32(ptr + NEXT_OFFSET_EIB);
+ if (next_offset)
+ ptr = base + next_offset;
+ } else {
+ next_offset = 0;
+ }
+ }
+ /* We should have found at least one valid block */
+ if (blk_ptr[BLK_HIB] || blk_ptr[BLK_SIB] || blk_ptr[BLK_EIB])
+ return CB_SUCCESS;
+ else
+ return CB_ERR;
+}
+
+/** \brief This functions is used from caller to get a specific field from
+ * hwinfo block.
+ * @param field Field type to read from hwinfo
+ * @param *dst Pointer to memory where the data will be stored in
+ * @return number of copied bytes on success, 0 on error
+ */
+uint32_t hwilib_get_field (hwinfo_field_t field, uint8_t *dst, uint32_t maxlen)
+{
+ /* Check the boundaries of params-variable */
+ if ((uint32_t)field < ARRAY_SIZE(params))
+ return params[field].get_field(¶ms[field], dst, maxlen);
+ else
+ return 0;
+}
diff --git a/src/vendorcode/siemens/hwilib/hwilib.h b/src/vendorcode/siemens/hwilib/hwilib.h
new file mode 100644
index 0000000..fb0798b
--- /dev/null
+++ b/src/vendorcode/siemens/hwilib/hwilib.h
@@ -0,0 +1,74 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SIEMENS_HWI_LIB_H_
+#define SIEMENS_HWI_LIB_H_
+
+#include <types.h>
+
+
+/* Declare all supported fields which can be get with hwilib. */
+typedef enum {
+ HIB_VerID = 0,
+ SIB_VerID,
+ EIB_VerID,
+ HIB_HwRev,
+ SIB_HwRev,
+ UniqueNum,
+ Mac1,
+ Mac1Aux,
+ Mac2,
+ Mac2Aux,
+ Mac3,
+ Mac3Aux,
+ Mac4,
+ Mac4Aux,
+ SPD,
+ FF_FreezeDis,
+ FF_FanReq,
+ BiosFlags,
+ MacMapping1,
+ MacMapping2,
+ MacMapping3,
+ MacMapping4,
+ PF_Color_Depth,
+ PF_DisplType,
+ PF_DisplCon,
+ Edid,
+ VddRef
+} hwinfo_field_t;
+
+/* Define used values in supported fields */
+#define PF_COLOR_DEPTH_6BIT 0x00
+#define PF_COLOR_DEPTH_8BIT 0x01
+#define PF_COLOR_DEPTH_10BIT 0x02
+#define PF_DISPLCON_LVDS_SINGLE 0x00
+#define PF_DISPLCON_LVDS_DUAL 0x05
+#define FF_FREEZE_DISABLE 0x01
+#define FF_FAN_NEEDED 0x01
+
+/* Use this function to find all supported blocks in cbfs. It must be called
+ * once with a valid cbfs file name before hwilib_get_field() can be used.
+ */
+enum cb_err hwilib_find_blocks (const char *hwi_filename);
+
+/* Use this function to get fields out of supported info blocks
+ * This function returns the number of copied bytes or 0 on error.
+ */
+uint32_t hwilib_get_field (hwinfo_field_t field, uint8_t *data, uint32_t maxlen);
+
+/* This functions needs to be implemented for every mainboard that uses i210. */
+enum cb_err mainboard_get_mac_address(u16 bus, u8 devfn, u8 mac[6]);
+#endif /* SIEMENS_HWI_LIB_H_ */
Werner Zeh (werner.zeh(a)siemens.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14515
-gerrit
commit 13156870e6e3e3b8f8d0f281dac3b0a67c91c91f
Author: Werner Zeh <werner.zeh(a)siemens.com>
Date: Tue Apr 26 09:26:14 2016 +0200
drivers/intel/i210: Use uint8_t and friends instead of u8
Switch all types to uint8_t and the like instead of u8.
Change-Id: Ia12c4ee9e21e2d3166c2f895c819357fa2ed9a94
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
src/drivers/intel/i210/i210.c | 67 ++++++++++++++++---------------
src/mainboard/siemens/mc_tcu3/mainboard.c | 5 ++-
src/vendorcode/siemens/hwilib/hwilib.h | 3 +-
3 files changed, 40 insertions(+), 35 deletions(-)
diff --git a/src/drivers/intel/i210/i210.c b/src/drivers/intel/i210/i210.c
index e821d48..c5e0c4e 100644
--- a/src/drivers/intel/i210/i210.c
+++ b/src/drivers/intel/i210/i210.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2014 Siemens AG.
+ * Copyright (C) 2014-2016 Siemens AG.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,13 +25,14 @@
/* We need one function we can call to get a MAC address to use */
/* This function can be coded somewhere else but must exist. */
-extern enum cb_err mainboard_get_mac_address(u16 bus, u8 devfn, u8 mac[6]);
+extern enum cb_err mainboard_get_mac_address(uint16_t bus, uint8_t devfn,
+ uint8_t mac[6]);
/* This is a private function to wait for a bit mask in a given register */
/* To avoid endless loops, a time-out is implemented here. */
-static int wait_done(u32* reg, u32 mask)
+static int wait_done(uint32_t* reg, uint32_t mask)
{
- u32 timeout = I210_POLL_TIMEOUT_US;
+ uint32_t timeout = I210_POLL_TIMEOUT_US;
while (!(*reg & mask)) {
udelay(1);
@@ -50,17 +51,18 @@ static int wait_done(u32* reg, u32 mask)
* @param *buffer Pointer to the buffer where to store read data
* @return void I210_NO_ERROR or an error code
*/
-static u32 read_flash(struct device *dev, u32 address, u32 count, u16 *buffer)
+static uint32_t read_flash(struct device *dev, uint32_t address,
+ uint32_t count, uint16_t *buffer)
{
- u32 bar;
- u32 *eeprd;
- u32 i;
+ uint32_t bar;
+ uint32_t *eeprd;
+ uint32_t i;
/* Get the BAR to memory mapped space*/
bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
if ((!bar) || ((address + count) > 0x40))
return I210_INVALID_PARAM;
- eeprd = (u32*)(bar + I210_REG_EEREAD);
+ eeprd = (uint32_t*)(bar + I210_REG_EEREAD);
/* Prior to start ensure flash interface is ready by checking DONE-bit */
if (wait_done(eeprd, I210_DONE))
return I210_NOT_READY;
@@ -84,10 +86,10 @@ static u32 read_flash(struct device *dev, u32 address, u32 count, u16 *buffer)
* @param *checksum Pointer to the buffer where to store the checksum
* @return void I210_NO_ERROR or an error code
*/
-static u32 compute_checksum(struct device *dev, u16 *checksum)
+static uint32_t compute_checksum(struct device *dev, uint16_t *checksum)
{
- u16 eep_data[0x40];
- u32 i;
+ uint16_t eep_data[0x40];
+ uint32_t i;
/* First read back data to compute the checksum for */
if (read_flash(dev, 0, 0x3f, eep_data))
@@ -111,20 +113,21 @@ static u32 compute_checksum(struct device *dev, u16 *checksum)
* @param *buffer Pointer to the buffer where data to write is stored in
* @return void I210_NO_ERROR or an error code
*/
-static u32 write_flash(struct device *dev, u32 address, u32 count, u16 *buffer)
+static uint32_t write_flash(struct device *dev, uint32_t address,
+ uint32_t count, uint16_t *buffer)
{
- u32 bar;
- u32 *eepwr;
- u32 *eectrl;
- u16 checksum;
- u32 i;
+ uint32_t bar;
+ uint32_t *eepwr;
+ uint32_t *eectrl;
+ uint16_t checksum;
+ uint32_t i;
/* Get the BAR to memory mapped space */
bar = pci_read_config32(dev, 0x10);
if ((!bar) || ((address + count) > 0x40))
return I210_INVALID_PARAM;
- eepwr = (u32*)(bar + I210_REG_EEWRITE);
- eectrl = (u32*)(bar + I210_REG_EECTRL);
+ eepwr = (uint32_t*)(bar + I210_REG_EEWRITE);
+ eectrl = (uint32_t*)(bar + I210_REG_EECTRL);
/* Prior to start ensure flash interface is ready by checking DONE-bit */
if (wait_done(eepwr, I210_DONE))
return I210_NOT_READY;
@@ -145,8 +148,8 @@ static u32 write_flash(struct device *dev, u32 address, u32 count, u16 *buffer)
if (wait_done(eepwr, I210_DONE))
return I210_WRITE_ERROR;
/* Up to now, desired data was written into shadowed RAM. We now need */
- /* to perform a flash cycle to bring the shadowed RAM into flash memory. */
- /* To start a flash cycle we need to set FLUPD-bit and wait for FLDONE. */
+ /* to perform a flash cycle to bring the shadowed RAM into flash. */
+ /* To start a flash cycle we need to set FLUPD and wait for FLDONE. */
*eectrl = *eectrl | I210_FLUPD;
if (wait_done(eectrl, I210_FLUDONE))
return I210_FLASH_UPDATE_ERROR;
@@ -158,16 +161,16 @@ static u32 write_flash(struct device *dev, u32 address, u32 count, u16 *buffer)
* @param *MACAdr Pointer to the buffer where to store read MAC address
* @return void I210_NO_ERROR or an error code
*/
-static u32 read_mac_adr(struct device *dev, u8 *mac_adr)
+static uint32_t read_mac_adr(struct device *dev, uint8_t *mac_adr)
{
- u16 adr[3];
+ uint16_t adr[3];
if (!dev || !mac_adr)
return I210_INVALID_PARAM;
if (read_flash(dev, 0, 3, adr))
return I210_READ_ERROR;
- /* Copy the address into destination. This is done because of */
- /* possible not matching alignment for destination to u16 boundary. */
- memcpy(mac_adr, (u8*)adr, 6);
+ /* Copy the address into destination. This is done because of possible */
+ /* not matching alignment for destination to uint16_t boundary. */
+ memcpy(mac_adr, (uint8_t*)adr, 6);
return I210_SUCCESS;
}
@@ -176,13 +179,13 @@ static u32 read_mac_adr(struct device *dev, u8 *mac_adr)
* @param *MACAdr Pointer to the buffer where the desired MAC address is
* @return void I210_NO_ERROR or an error code
*/
-static u32 write_mac_adr(struct device *dev, u8 *mac_adr)
+static uint32_t write_mac_adr(struct device *dev, uint8_t *mac_adr)
{
- u16 adr[3];
+ uint16_t adr[3];
if (!dev || !mac_adr)
return I210_INVALID_PARAM;
/* Copy desired address into a local buffer to avoid alignment issues */
- memcpy((u8*)adr, mac_adr, 6);
+ memcpy((uint8_t*)adr, mac_adr, 6);
return write_flash(dev, 0, 3, adr);
}
@@ -194,8 +197,8 @@ static u32 write_mac_adr(struct device *dev, u8 *mac_adr)
*/
static void init(struct device *dev)
{
- u8 cur_adr[6];
- u8 adr_to_set[6];
+ uint8_t cur_adr[6];
+ uint8_t adr_to_set[6];
enum cb_err status;
/*Check first whether there is a valid MAC address available */
diff --git a/src/mainboard/siemens/mc_tcu3/mainboard.c b/src/mainboard/siemens/mc_tcu3/mainboard.c
index e9c29a0..009c34d 100644
--- a/src/mainboard/siemens/mc_tcu3/mainboard.c
+++ b/src/mainboard/siemens/mc_tcu3/mainboard.c
@@ -39,10 +39,11 @@
* @param mac buffer where to store the MAC address
* @return cb_err CB_ERR or CB_SUCCESS
*/
-enum cb_err mainboard_get_mac_address(u16 bus, u8 devfn, u8 mac[6])
+enum cb_err mainboard_get_mac_address(uint16_t bus, uint8_t devfn,
+ uint8_t mac[6])
{
uint8_t mac_adr[6];
- u32 i;
+ uint32_t i;
/* Open main hwinfo block */
if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS)
diff --git a/src/vendorcode/siemens/hwilib/hwilib.h b/src/vendorcode/siemens/hwilib/hwilib.h
index fb0798b..c66a99c 100644
--- a/src/vendorcode/siemens/hwilib/hwilib.h
+++ b/src/vendorcode/siemens/hwilib/hwilib.h
@@ -70,5 +70,6 @@ enum cb_err hwilib_find_blocks (const char *hwi_filename);
uint32_t hwilib_get_field (hwinfo_field_t field, uint8_t *data, uint32_t maxlen);
/* This functions needs to be implemented for every mainboard that uses i210. */
-enum cb_err mainboard_get_mac_address(u16 bus, u8 devfn, u8 mac[6]);
+enum cb_err mainboard_get_mac_address(uint16_t bus, uint8_t devfn,
+ uint8_t mac[6]);
#endif /* SIEMENS_HWI_LIB_H_ */
Werner Zeh (werner.zeh(a)siemens.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14505
-gerrit
commit 7e1518dfcdfa1ed03d785637a7c75e7ffe3d5bf5
Author: Werner Zeh <werner.zeh(a)siemens.com>
Date: Fri Apr 22 14:14:45 2016 +0200
vendorcode/siemens: Add hwilib for Siemens specific info struct
Add a library which unifies access to Siemens specific hardware information
data. This library is meant to be used with Siemens platforms and can be
selected in Kconfig. The needed source of information has to be present
in cbfs.
This lib can be used in romstage and ramstage.
Change-Id: I2c6e003b0c123b4cf6a84906c2b133b8c38c8b1a
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
src/vendorcode/Makefile.inc | 1 +
src/vendorcode/siemens/Kconfig | 20 ++
src/vendorcode/siemens/Makefile.inc | 16 ++
src/vendorcode/siemens/hwilib/Makefile.inc | 19 ++
src/vendorcode/siemens/hwilib/hwilib.c | 321 +++++++++++++++++++++++++++++
src/vendorcode/siemens/hwilib/hwilib.h | 74 +++++++
6 files changed, 451 insertions(+)
diff --git a/src/vendorcode/Makefile.inc b/src/vendorcode/Makefile.inc
index 741a04a..440972f 100644
--- a/src/vendorcode/Makefile.inc
+++ b/src/vendorcode/Makefile.inc
@@ -1,3 +1,4 @@
subdirs-y += amd
subdirs-y += google
subdirs-y += intel
+subdirs-y += siemens
diff --git a/src/vendorcode/siemens/Kconfig b/src/vendorcode/siemens/Kconfig
new file mode 100644
index 0000000..8bbab62
--- /dev/null
+++ b/src/vendorcode/siemens/Kconfig
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Siemens AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config USE_SIEMENS_HWILIB
+ bool
+ default n
+
+source "src/vendorcode/siemens/*/Kconfig"
diff --git a/src/vendorcode/siemens/Makefile.inc b/src/vendorcode/siemens/Makefile.inc
new file mode 100644
index 0000000..ece2b4d
--- /dev/null
+++ b/src/vendorcode/siemens/Makefile.inc
@@ -0,0 +1,16 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Siemens AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+subdirs-$(CONFIG_USE_SIEMENS_HWILIB) += hwilib
diff --git a/src/vendorcode/siemens/hwilib/Makefile.inc b/src/vendorcode/siemens/hwilib/Makefile.inc
new file mode 100644
index 0000000..1c6f6c9
--- /dev/null
+++ b/src/vendorcode/siemens/hwilib/Makefile.inc
@@ -0,0 +1,19 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Siemens AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+CFLAGS_x86_32 += -Isrc/vendorcode/siemens/hwilib
+
+romstage-y += hwilib.c
+ramstage-y += hwilib.c
diff --git a/src/vendorcode/siemens/hwilib/hwilib.c b/src/vendorcode/siemens/hwilib/hwilib.c
new file mode 100644
index 0000000..7e1766d
--- /dev/null
+++ b/src/vendorcode/siemens/hwilib/hwilib.c
@@ -0,0 +1,321 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Siemens AG.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cbfs.h>
+#include <string.h>
+#include <console/console.h>
+#include <arch/io.h>
+#include <arch/early_variables.h>
+#include "hwilib.h"
+
+
+#define MAX_BLOCK_NUM 3
+#define LEN_HIB 0x1fd
+#define LEN_SIB 0x121
+#define LEN_EIB 0x0b5
+#define NEXT_OFFSET_HIB 0x1dc
+#define NEXT_OFFSET_SIB 0x104
+#define NEXT_OFFSET_EIB 0x0b0
+#define LEN_UNIQUEL_NUM 0x010
+#define LEN_HW_REV 0x002
+#define LEN_MAC_ADDRESS 0x006
+#define LEN_SPD 0x080
+#define LEN_EDID 0x080
+#define LEN_OFFSET 0x00c
+#define EIB_FEATRUE_OFFSET 0x00e
+#define LEN_MAGIC_NUM 0x007
+#define BLOCK_MAGIC "H1W2M3I"
+
+/* Define all supported block types. */
+enum {
+ BLK_HIB,
+ BLK_SIB,
+ BLK_EIB,
+};
+
+/* This structure holds a valid position for a given field
+ * Every field can have multiple positions of which the first available
+ * will be taken by the library.
+ */
+struct param_pos {
+ uint8_t blk_type; /* Valid for a specific block type */
+ uint32_t offset; /* Offset in given block */
+ uint32_t len; /* Length for the field in this block */
+};
+
+/* This structure holds all the needed information for a given field type
+ * and a pointer to a function which is able to extract the desired data.
+ */
+struct param_info {
+ struct param_pos pos[MAX_BLOCK_NUM];
+ uint64_t mask;
+ uint8_t mask_offset;
+ uint32_t (*get_field)(const struct param_info *param, uint8_t *dst,
+ uint32_t maxlen);
+};
+
+/* Storage for pointers to the different blocks. The contents will be filled
+ * in hwilib_find_blocks().
+ */
+static uint8_t *all_blocks[MAX_BLOCK_NUM] CAR_GLOBAL;
+
+static uint32_t hwilib_read_bytes (const struct param_info *param, uint8_t *dst,
+ uint32_t maxlen);
+
+/* Add all supported fields to this variable. It is important to use the
+ * field type of a given field as the array index so that all the information
+ * is on the appropriate place inside the array. In this way one do not need
+ * to search for fields but can simply use an index into the array.
+ */
+static const struct param_info params[] = {
+ [HIB_VerID] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [SIB_VerID] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0x8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [EIB_VerID] = {
+ .pos[0] = {.blk_type = BLK_EIB, .offset = 0x8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [HIB_HwRev] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xbe, .len = 2},
+ .get_field = hwilib_read_bytes },
+ [SIB_HwRev] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xc8, .len = 2},
+ .get_field = hwilib_read_bytes },
+ [UniqueNum] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xa2, .len = 10},
+ .pos[1] = {.blk_type = BLK_SIB, .offset = 0xa2, .len = 10},
+ .get_field = hwilib_read_bytes },
+ [Mac1] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xc0, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac1Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xc6, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Mac2] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xc8, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac2Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xce, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Mac3] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xd0, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac3Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xd6, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Mac4] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xd8, .len = 6},
+ .get_field = hwilib_read_bytes },
+ [Mac4Aux] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xde, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [SPD] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0xe0, .len = 0x80},
+ .get_field = hwilib_read_bytes },
+ [FF_FreezeDis] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1b8, .len = 4},
+ .mask = 0x10,
+ .mask_offset = 4,
+ .get_field = hwilib_read_bytes },
+ [FF_FanReq] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1b8, .len = 4},
+ .mask = 0x400,
+ .mask_offset = 10,
+ .get_field = hwilib_read_bytes },
+ [BiosFlags] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1c0, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping1] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1cc, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping2] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1d0, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping3] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1d4, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [MacMapping4] = {
+ .pos[0] = {.blk_type = BLK_HIB, .offset = 0x1d8, .len = 4},
+ .get_field = hwilib_read_bytes },
+ [PF_Color_Depth] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xea, .len = 1},
+ .mask = 0x03,
+ .mask_offset = 0,
+ .get_field = hwilib_read_bytes },
+ [PF_DisplType] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xe3, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [PF_DisplCon] = {
+ .pos[0] = {.blk_type = BLK_SIB, .offset = 0xf2, .len = 1},
+ .get_field = hwilib_read_bytes },
+ [Edid] = {
+ .pos[0] = {.blk_type = BLK_EIB, .offset = 0x10, .len = 0x80},
+ .get_field = hwilib_read_bytes },
+ [VddRef] = {
+ .pos[0] = {.blk_type = BLK_EIB, .offset = 0x90, .len = 2},
+ .get_field = hwilib_read_bytes },
+};
+
+/** \brief This functions reads the given field from the first valid hwinfo
+ * block
+ * @param *param Parameter to read from hwinfo
+ * @param *dst Pointer to memory where the data will be stored in
+ * @return number of copied bytes on success, 0 on error
+ */
+static uint32_t hwilib_read_bytes (const struct param_info *param, uint8_t *dst,
+ uint32_t maxlen)
+{
+ uint8_t i = 0, *blk = NULL;
+ uint8_t **blk_ptr = car_get_var_ptr(&all_blocks[0]);
+ static const uint16_t all_blk_size[MAX_BLOCK_NUM] =
+ {LEN_HIB, LEN_SIB, LEN_EIB};
+
+ if (!param || !dst)
+ return 0;
+ /* Take the first valid block to get the parameter from */
+ do {
+ if ((param->pos[i].len) && (param->pos[i].offset)) {
+ blk = blk_ptr[param->pos[i].blk_type];
+ break;
+ }
+ i++;
+ } while (i < MAX_BLOCK_NUM);
+
+ /* Ensure there is a valid block available for this parameter and
+ * the length of the parameter do not exceed maxlen or block len.
+ */
+ if ((!blk) || (param->pos[i].len > maxlen) ||
+ (param->pos[i].len + param->pos[i].offset >
+ all_blk_size[param->pos[i].blk_type]))
+ return 0;
+ /* We can now copy the wanted data. */
+ memcpy(dst, (blk + param->pos[i].offset), param->pos[i].len);
+ /* If there is a mask given, apply it only for parameters with a
+ * length of 1, 2, 4 or 8 bytes.
+ */
+ if (param->mask) {
+ switch (param->pos[i].len) {
+ case 1:
+ /* Apply a mask on a 8 bit value */
+ *dst &= (param->mask & 0xff);
+ *dst >>= (param->mask_offset);
+ break;
+ case 2:
+ /* Apply mask on a 16 bit value */
+ *((uint16_t *)(dst)) &= (param->mask & 0xffff);
+ *((uint16_t *)(dst)) >>= (param->mask_offset);
+ break;
+ case 4:
+ /* Apply mask on a 32 bit value */
+ *((uint32_t *)(dst)) &= (param->mask & 0xffffffff);
+ *((uint32_t *)(dst)) >>= (param->mask_offset);
+ break;
+ case 8:
+ /* Apply mask on a 64 bit value */
+ *((uint64_t *)(dst)) &= (param->mask);
+ *((uint64_t *)(dst)) >>= (param->mask_offset);
+ break;
+ default:
+ /* Warn if there is a mask for an invalid length. */
+ printk(BIOS_WARNING,
+ "HWILIB: Invalid field length for given mask.\n");
+ break;
+ }
+ }
+ return param->pos[i].len;
+}
+
+/** \brief This function finds all available block types in a given cbfs file.
+ * @param *hwi_filename Name of the cbfs-file to use.
+ * @return CB_SUCCESS when no error, otherwise error code
+ */
+enum cb_err hwilib_find_blocks (const char *hwi_filename)
+{
+ uint8_t *ptr = NULL, *base = NULL;
+ uint32_t next_offset = 1;
+ uint8_t **blk_ptr = car_get_var_ptr(&all_blocks[0]);
+ size_t filesize = 0;
+
+ /* Check for a valid parameter */
+ if (!hwi_filename)
+ return CB_ERR_ARG;
+ ptr = cbfs_boot_map_with_leak(hwi_filename, CBFS_TYPE_RAW, &filesize);
+ if (!ptr) {
+ printk(BIOS_ERR,"HWILIB: Missing file \"%s\" in cbfs.\n",
+ hwi_filename);
+ return CB_ERR;
+ }
+ /* Ensure the block has the right magic */
+ if (strncmp((char*)ptr, BLOCK_MAGIC, LEN_MAGIC_NUM)) {
+ printk(BIOS_ERR, "HWILIB: Bad magic at start of block!\n");
+ return CB_ERR;
+ }
+ /* Reset all static pointers to blocks as they might have been set
+ * in prior calls to this function.
+ * This way the caller do not need to "close" already opened blocks.
+ */
+ memset(blk_ptr, 0, ARRAY_SIZE(all_blocks));
+ /* Check which blocks are available by examining the length field. */
+ base = ptr;
+ while(!(strncmp((char *)ptr, BLOCK_MAGIC, LEN_MAGIC_NUM)) &&
+ next_offset) {
+ uint16_t len = read16(ptr + LEN_OFFSET);
+ /* Ensure file size boundaries for a given block. */
+ if ((ptr - base + len) > filesize)
+ break;
+ if (len == LEN_HIB) {
+ blk_ptr[BLK_HIB] = ptr;
+ next_offset = read32(ptr + NEXT_OFFSET_HIB);
+ if (next_offset)
+ ptr = base + next_offset;
+ } else if (len == LEN_SIB) {
+ blk_ptr[BLK_SIB] = ptr;
+ next_offset = read32(ptr + NEXT_OFFSET_SIB);
+ if (next_offset)
+ ptr = base + next_offset;
+ } else if (len == LEN_EIB) {
+ /* Skip preliminary blocks */
+ if (!(read16(ptr + EIB_FEATRUE_OFFSET) & 0x01))
+ blk_ptr[BLK_EIB] = ptr;
+ next_offset = read32(ptr + NEXT_OFFSET_EIB);
+ if (next_offset)
+ ptr = base + next_offset;
+ } else {
+ next_offset = 0;
+ }
+ }
+ /* We should have found at least one valid block */
+ if (blk_ptr[BLK_HIB] || blk_ptr[BLK_SIB] || blk_ptr[BLK_EIB])
+ return CB_SUCCESS;
+ else
+ return CB_ERR;
+}
+
+/** \brief This functions is used from caller to get a specific field from
+ * hwinfo block.
+ * @param field Field type to read from hwinfo
+ * @param *dst Pointer to memory where the data will be stored in
+ * @return number of copied bytes on success, 0 on error
+ */
+uint32_t hwilib_get_field (hwinfo_field_t field, uint8_t *dst, uint32_t maxlen)
+{
+ /* Check the boundaries of params-variable */
+ if ((uint32_t)field < ARRAY_SIZE(params))
+ return params[field].get_field(¶ms[field], dst, maxlen);
+ else
+ return 0;
+}
diff --git a/src/vendorcode/siemens/hwilib/hwilib.h b/src/vendorcode/siemens/hwilib/hwilib.h
new file mode 100644
index 0000000..fb0798b
--- /dev/null
+++ b/src/vendorcode/siemens/hwilib/hwilib.h
@@ -0,0 +1,74 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SIEMENS_HWI_LIB_H_
+#define SIEMENS_HWI_LIB_H_
+
+#include <types.h>
+
+
+/* Declare all supported fields which can be get with hwilib. */
+typedef enum {
+ HIB_VerID = 0,
+ SIB_VerID,
+ EIB_VerID,
+ HIB_HwRev,
+ SIB_HwRev,
+ UniqueNum,
+ Mac1,
+ Mac1Aux,
+ Mac2,
+ Mac2Aux,
+ Mac3,
+ Mac3Aux,
+ Mac4,
+ Mac4Aux,
+ SPD,
+ FF_FreezeDis,
+ FF_FanReq,
+ BiosFlags,
+ MacMapping1,
+ MacMapping2,
+ MacMapping3,
+ MacMapping4,
+ PF_Color_Depth,
+ PF_DisplType,
+ PF_DisplCon,
+ Edid,
+ VddRef
+} hwinfo_field_t;
+
+/* Define used values in supported fields */
+#define PF_COLOR_DEPTH_6BIT 0x00
+#define PF_COLOR_DEPTH_8BIT 0x01
+#define PF_COLOR_DEPTH_10BIT 0x02
+#define PF_DISPLCON_LVDS_SINGLE 0x00
+#define PF_DISPLCON_LVDS_DUAL 0x05
+#define FF_FREEZE_DISABLE 0x01
+#define FF_FAN_NEEDED 0x01
+
+/* Use this function to find all supported blocks in cbfs. It must be called
+ * once with a valid cbfs file name before hwilib_get_field() can be used.
+ */
+enum cb_err hwilib_find_blocks (const char *hwi_filename);
+
+/* Use this function to get fields out of supported info blocks
+ * This function returns the number of copied bytes or 0 on error.
+ */
+uint32_t hwilib_get_field (hwinfo_field_t field, uint8_t *data, uint32_t maxlen);
+
+/* This functions needs to be implemented for every mainboard that uses i210. */
+enum cb_err mainboard_get_mac_address(u16 bus, u8 devfn, u8 mac[6]);
+#endif /* SIEMENS_HWI_LIB_H_ */
Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14531
-gerrit
commit 3f7d6653ab9918579b631f32519608cc804efdf6
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Apr 27 23:05:52 2016 -0500
soc/intel/apollolake: clarify Fast SPI CS2 pad configuration
The pad for CS2 of the Fast SPI interface needs to be configured for
automatic MMIO translation when a SPI TPM is utilized. Instead of
unconditionally configuring that pad under LPC_TPM provide a explicit
Kconfig for a mainboard to select.
Change-Id: Ia94b90e12d71a4b849359188a853f7e036cc583b
Signed-off-by: Aaron Durbin <adurbin(a)chormium.org>
---
src/mainboard/intel/amenia/Kconfig | 1 +
src/soc/intel/apollolake/Kconfig | 8 ++++++++
src/soc/intel/apollolake/bootblock/bootblock.c | 2 +-
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/intel/amenia/Kconfig b/src/mainboard/intel/amenia/Kconfig
index be98b86..b2c1a8c 100644
--- a/src/mainboard/intel/amenia/Kconfig
+++ b/src/mainboard/intel/amenia/Kconfig
@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_LPC_TPM
select HAVE_ACPI_RESUME
select MAINBOARD_HAS_CHROMEOS
+ select TPM_ON_FAST_SPI
config CHROMEOS
bool
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 7cd548b..bdb8eeb 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -41,6 +41,14 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select SOC_INTEL_COMMON
+config TPM_ON_FAST_SPI
+ bool
+ default n
+ select LPC_TPM
+ help
+ TPM part is conntected on Fast SPI interface, but the LPC MMIO
+ TPM transactions are decoded and serialized over the SPI interface.
+
config SOC_INTEL_COMMON_RESET
bool
default y
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index 2456455..abb713e 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -102,7 +102,7 @@ void bootblock_soc_early_init(void)
if (IS_ENABLED(CONFIG_SOC_UART_DEBUG))
soc_console_uart_init();
- if (IS_ENABLED(CONFIG_LPC_TPM))
+ if (IS_ENABLED(CONFIG_TPM_ON_FAST_SPI))
tpm_enable();
if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_LPC))
the following patch was just integrated into master:
commit 164e8f1d9b9a36ccca2feefa0e2172ac0c3254c3
Author: Zhao, Lijian <lijian.zhao(a)intel.com>
Date: Mon Feb 1 16:41:59 2016 -0800
soc/intel/apollolake: Add GPIO devices
Add GPIO controller in ACPI device description.
GPIO controller driver is probed in kernel and all
the pins in the banks are showing respective values.
Change-Id: I0512cfec872113b15fd204ec3b95efeac87f694a
Signed-off-by: Zhao, Lijian <lijian.zhao(a)intel.com>
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy(a)intel.com>
Reviewed-on: https://review.coreboot.org/14478
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/14478 for details.
-gerrit
the following patch was just integrated into master:
commit 0c85b7f4d7180c9307fd95bb887791d4231397a5
Author: Andrey Petrov <andrey.petrov(a)intel.com>
Date: Sat Apr 23 12:31:01 2016 -0700
soc/intel/apollolake: Add cache for BIOS ROM
Enable caching of BIOS region with variable MTRR. This is most
useful if enabled early such as in bootblock.
Change-Id: I39f33ca43f06fce26d1d48e706c97f097e3c10f1
Signed-off-by: Andrey Petrov <andrey.petrov(a)intel.com>
Reviewed-on: https://review.coreboot.org/14480
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/14480 for details.
-gerrit
Andrey Petrov (andrey.petrov(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14471
-gerrit
commit 6b1ac38d9adb3d60223cb15e28f91ce8339293e9
Author: Lance Zhao <lijian.zhao(a)intel.com>
Date: Tue Apr 19 18:04:21 2016 -0700
soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds
Add chromeos required GNVS feature. The GNVS table stays in both CBMEM
and ACPI DSDT tables.
Change-Id: I4db0eb18d2de62917a94704318a7896c04e4777f
Signed-off-by: Andrey Petrov <andrey.petrov(a)intel.com>
---
src/soc/intel/apollolake/acpi.c | 29 ++++++++++++++++++++++
src/soc/intel/apollolake/acpi/globalnvs.asl | 35 +++++++++++++++++++++++++++
src/soc/intel/apollolake/chip.c | 6 +++++
src/soc/intel/apollolake/include/soc/acpi.h | 2 ++
src/soc/intel/apollolake/include/soc/nvs.h | 37 +++++++++++++++++++++++++++++
src/soc/intel/apollolake/lpc.c | 1 +
6 files changed, 110 insertions(+)
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 7d28313..a5d1dfa 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -16,12 +16,15 @@
*/
#include <arch/acpi.h>
+#include <arch/acpigen.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
+#include <cbmem.h>
#include <cpu/x86/smm.h>
#include <soc/acpi.h>
#include <soc/iomap.h>
#include <soc/pm.h>
+#include <soc/nvs.h>
unsigned long acpi_fill_mcfg(unsigned long current)
{
@@ -125,3 +128,29 @@ unsigned long southbridge_write_acpi_tables(device_t device,
{
return acpi_write_hpet(device, current, rsdp);
}
+
+static void acpi_create_gnvs(struct global_nvs_t *gnvs)
+{
+ if (IS_ENABLED(CONFIG_CHROMEOS)) {
+ /* Initialize Verified Boot data */
+ chromeos_init_vboot(&gnvs->chromeos);
+ gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
+ }
+}
+
+void southbridge_inject_dsdt(device_t device)
+{
+ struct global_nvs_t *gnvs;
+
+ gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
+
+ if (gnvs) {
+ acpi_create_gnvs(gnvs);
+ acpi_save_gnvs((uintptr_t)gnvs);
+
+ /* Add it to DSDT. */
+ acpigen_write_scope("\\");
+ acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
+ acpigen_pop_len();
+ }
+}
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl
new file mode 100644
index 0000000..2ef5031
--- /dev/null
+++ b/src/soc/intel/apollolake/acpi/globalnvs.asl
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * NOTE: The layout of the GNVS structure below must match the layout in
+ * soc/intel/apollolake/include/soc/nvs.h !!!
+ *
+ */
+
+External (NVSA)
+
+OperationRegion (GNVS, SystemMemory, NVSA, 0x1000)
+Field (GNVS, ByteAcc, NoLock, Preserve)
+{
+ /* Nothing here yet, folks */
+ Offset (0x00),
+
+ /* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
+ Offset (0x100),
+ #include <vendorcode/google/chromeos/acpi/gnvs.asl>
+}
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index d2a1e0d..6e0a90f 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -17,6 +17,7 @@
*/
#include <bootstate.h>
+#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <device/device.h>
@@ -26,6 +27,7 @@
#include <memrange.h>
#include <soc/iomap.h>
#include <soc/cpu.h>
+#include <soc/nvs.h>
#include <soc/pci_devs.h>
#include "chip.h"
@@ -65,11 +67,15 @@ static void enable_dev(device_t dev)
static void soc_init(void *data)
{
struct range_entry range;
+ struct global_nvs_t *gnvs;
/* TODO: tigten this resource range */
/* TODO: fix for S3 resume, as this would corrupt OS memory */
range_entry_init(&range, 0x200000, 4ULL*GiB, 0);
fsp_silicon_init(&range);
+
+ /* Allocate ACPI NVS in CBMEM */
+ gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
}
void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
diff --git a/src/soc/intel/apollolake/include/soc/acpi.h b/src/soc/intel/apollolake/include/soc/acpi.h
index 2d20805..3605cc3 100644
--- a/src/soc/intel/apollolake/include/soc/acpi.h
+++ b/src/soc/intel/apollolake/include/soc/acpi.h
@@ -25,4 +25,6 @@ void soc_fill_common_fadt(acpi_fadt_t * fadt);
unsigned long southbridge_write_acpi_tables(device_t device,
unsigned long current, struct acpi_rsdp *rsdp);
+void southbridge_inject_dsdt(device_t device);
+
#endif /* _SOC_APOLLOLAKE_ACPI_H_ */
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
new file mode 100644
index 0000000..8b3a3af
--- /dev/null
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * NOTE: The layout of the global_nvs_t structure below must match the layout
+ * in soc/intel/apollolake/acpi/globalnvs.asl !!!
+ *
+ */
+
+#ifndef _SOC_APOLLOLAKE_NVS_H_
+#define _SOC_APOLLOLAKE_NVS_H_
+
+#include <vendorcode/google/chromeos/gnvs.h>
+
+struct global_nvs_t {
+ /* Miscellaneous */
+ uint8_t unused[256];
+
+ /* ChromeOS specific (0x100 - 0xfff) */
+ chromeos_acpi_t chromeos;
+} __attribute__((packed));
+
+#endif /* _SOC_APOLLOLAKE_NVS_H_ */
diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c
index 6e366e0..06ca0db 100644
--- a/src/soc/intel/apollolake/lpc.c
+++ b/src/soc/intel/apollolake/lpc.c
@@ -86,6 +86,7 @@ static struct device_operations device_ops = {
.set_resources = &pci_dev_set_resources,
.enable_resources = &pci_dev_enable_resources,
.write_acpi_tables = southbridge_write_acpi_tables,
+ .acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.init = &lpc_init
};