the following patch was just integrated into master:
commit 3385ebe59a452ce66e0180641de271b028a41e7e
Author: Tobias Diedrich <ranma+coreboot(a)tdiedrich.de>
Date: Sun Mar 13 21:19:45 2016 +0100
pcengines/apu1: Enable USB overcurrent detection.
The two external USB ports and the internal USB header have overcurrent
protection chips with the low-active overcurrent signal connected to the
chipset.
The power-on default for this register disables the software detection
of overcurrent conditions.
After setting the register Linux correctly shows the overcurrent
condition in the kernel log (tested by shorting the 5v and gnd lines on
J14 / the internal USB header):
[ 2015.229921] usb usb1-port3: over-current condition
[ 2015.449925] usb usb1-port4: over-current condition
Simlar for the external ports:
[ 256.237916] usb usb1-port1: over-current condition
[ 256.458084] usb usb1-port5: over-current condition
Note that each signal is shared between two ports:
usboc0#: External ports (port1/5)
usboc1#: Internal ports (port3/4)
Change-Id: I02d498053b8ec61dc206e74a96c4a1dcfd4fae92
Signed-off-by: Tobias Diedrich <ranma+coreboot(a)tdiedrich.de>
Reviewed-on: https://review.coreboot.org/14084
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/14084 for details.
-gerrit
the following patch was just integrated into master:
commit 8ebb95d0c8e9088c9961cf3f8a3fdfed17f0247e
Author: Patrick Rudolph <siro(a)das-labor.org>
Date: Thu Mar 10 20:50:42 2016 +0100
lenovo: add config ONBOARD_VGA_IS_PRIMARY
Fix for the T4xx and T5xx series.
It does not apply to X2xx/X6x series as those have only
one GPU, which is always connected to the display.
The T6x series needs special care not handled with this patch.
Without ONBOARD_VGA_IS_PRIMARY the onboard GPU would be
deactivated in case a dedicated GPU is found and active,
leaving the system without a working display.
Change-Id: I94d1700e9afb75de83a4f2ed1ff53ba3b0559ae1
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
Reviewed-on: https://review.coreboot.org/14031
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis(a)fe80.eu>
Reviewed-by: Nicolas Reinecke <nr(a)das-labor.org>
See https://review.coreboot.org/14031 for details.
-gerrit
the following patch was just integrated into master:
commit 740e5ec01350c784184b56e44fa3427bcce81dc0
Author: PH Hsu <ph.hsu(a)mediatek.com>
Date: Wed Dec 16 13:48:10 2015 +0800
google/oak: add table for 4GB configuration
BRANCH=none
BUG=chrome-os-partner:49229
BUG=chrome-os-partner:50806
TEST=power on to kernel on Oak Rev3 with 4GB dram
Change-Id: I32fa881df12eb9b7f66086904aebde3dd1483fbf
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 94c8b7ad911c93c4325113e7afc009f2f81d2275
Original-Change-Id: Ia3640882a46e695550e679dc70611855b64a560f
Original-Signed-off-by: PH Hsu <ph.hsu(a)mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/331811
Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Reviewed-on: https://review.coreboot.org/14089
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/14089 for details.
-gerrit
the following patch was just integrated into master:
commit 3693d0f94b7ed1fc7ffe131af87622a18630ad28
Author: PH Hsu <ph.hsu(a)mediatek.com>
Date: Wed Dec 16 13:48:10 2015 +0800
mediatek/mt8173: Enable 4GB mode
If the system is using 4GB of memory, enable 4GB mode in
the memory controller.
Change-Id: I4d0f8ad8d43ff45dd786f4244b11c0879d2088cd
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 94c8b7ad911c93c4325113e7afc009f2f81d2275
Original-Change-Id: Ia3640882a46e695550e679dc70611855b64a560f
Original-Signed-off-by: PH Hsu <ph.hsu(a)mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/331811
Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Reviewed-on: https://review.coreboot.org/14088
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/14088 for details.
-gerrit
the following patch was just integrated into master:
commit 00feb3928f130bcf6ddf97a605f1e07cb3c37661
Author: Koro Chen <koro.chen(a)mediatek.com>
Date: Mon Mar 7 11:27:26 2016 +0800
google/oak: Remove EC_SUSPEND_L from AP
This pin is not used anymore since Rev5.
BRANCH=none
BUG=chrome-os-partner:49375
TEST=make and boot on Rev4/5
Change-Id: I3c775eb2b5e05256523bfd8be814e516944a2f90
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: a87e3babe28413bd879a2d95d4612a5b6b541419
Original-Change-Id: I87972ff8961309ecdad03639e1b6fac1da119cd7
Original-Signed-off-by: Koro Chen <koro.chen(a)mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/331810
Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Reviewed-on: https://review.coreboot.org/14087
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/14087 for details.
-gerrit
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14067
-gerrit
commit b489cbc5c522f6971f2237de567aee1d66548f9b
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Sat Mar 12 11:47:00 2016 -0800
coreinfo: Use tinycurses
When using PDcurses over a serial line, the background of
coreinfo is not properly cleared. Hence use tinycurses, which
was the only option when coreinfo was developed.
Change-Id: I15bb6eb552cf924de98d09ef63be33ecf336c526
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
---
payloads/coreinfo/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile
index 96acecc..ff98fd5 100644
--- a/payloads/coreinfo/Makefile
+++ b/payloads/coreinfo/Makefile
@@ -50,7 +50,7 @@ HOSTCXXFLAGS := -I$(srck) -I$(objk)
LIBCONFIG_PATH := ../libpayload
LIBPAYLOAD_DIR := $(coreinfo_obj)/libpayload
HAVE_LIBPAYLOAD := $(wildcard $(LIBPAYLOAD_DIR)/lib/libpayload.a)
-LIB_CONFIG ?= defconfig
+LIBPAYLOAD_CONFIG ?= configs/defconfig-tinycurses
OBJCOPY ?= objcopy
INCLUDES = -I$(coreinfo_obj) -include $(LIBPAYLOAD_DIR)/include/kconfig.h
@@ -117,7 +117,7 @@ else
libpayload:
printf "Building libpayload @ $(LIBCONFIG_PATH).\n"
$(MAKE) -C $(LIBCONFIG_PATH) distclean coreinfo_obj=$(coreinfo_obj)/libptmp
- $(MAKE) -C $(LIBCONFIG_PATH) $(LIB_CONFIG)
+ $(MAKE) -C $(LIBCONFIG_PATH) defconfig KBUILD_DEFCONFIG=$(LIBPAYLOAD_CONFIG)
$(MAKE) -C $(LIBCONFIG_PATH) install DESTDIR=$(coreinfo_obj)
endif
the following patch was just integrated into master:
commit 621dd8468ff1ccc915498c5ee8db824ab286193e
Author: Martin Roth <martinroth(a)google.com>
Date: Mon Mar 14 15:07:14 2016 -0600
Makefile.inc: Add toupper, tolower, and ws_to_under macros
Add a few additional macros that can be used throughout the coreboot
makefiles.
tolower: returns the value in all lowercase
toupper: returns the value in all uppercase
ws_to_under: returns the value with any whitespace changed to underscores
Change-Id: Icd0e6586481d8f229af0e899e0c94ef7c5c672c3
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: https://review.coreboot.org/14093
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/14093 for details.
-gerrit
the following patch was just integrated into master:
commit 9125073d2af2e1c34977c9caeb5f9c5710d5b9c4
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Wed Jul 15 10:24:18 2015 -0700
payloads: Enable building depthcharge as part of the coreboot build
For CHROMEOS builds, depthcharge can be built automatically.
This dependency exists because depthcharge without vboot and subsequent
signing of the image doesn't work very well, and both are keyed to that
flag as well.
Change-Id: Id0195bd3b4e454f382782106d6512469106daac5
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Reviewed-on: https://review.coreboot.org/10924
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/10924 for details.
-gerrit
the following patch was just integrated into master:
commit 730d47537e947eff439b33a6d3847abdd2a5a2ef
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Sat Mar 12 17:19:50 2016 -0800
x86: Drop CONFIG_COMPILE_IN_DSDT
This option is no longer needed, as FMAP support has been
fully integrated in coreboot
Change-Id: I6121b31bf946532717ba15e12f5c63d2baa95ab2
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Reviewed-on: https://review.coreboot.org/14078
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/14078 for details.
-gerrit