the following patch was just integrated into master:
commit f2134f3bab18a9c8968eef3e4233c82170af9629
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Thu Feb 18 16:21:15 2016 +0100
Fix qemu-armv7 memory map
Old map does not work on recent qemu. New map puts coreboot to ROM, so
it behave more like most real machines would.
For details on this map see comment in memlayout.ld
Change-Id: If1f3328b511daca32ba93da5a6d44402508b37e9
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13748
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/13748 for details.
-gerrit
Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13748
-gerrit
commit 0d592042a0bc6869cc7cfafe5dda1ed4ecbed989
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Thu Feb 18 16:21:15 2016 +0100
Fix qemu-armv7 memory map
Old map does not work on recent qemu. New map puts coreboot to ROM, so
it behave more like most real machines would.
For details on this map see comment in memlayout.ld
Change-Id: If1f3328b511daca32ba93da5a6d44402508b37e9
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
---
src/mainboard/emulation/qemu-armv7/media.c | 4 +--
src/mainboard/emulation/qemu-armv7/memlayout.ld | 33 +++++++++++++++----------
2 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/src/mainboard/emulation/qemu-armv7/media.c b/src/mainboard/emulation/qemu-armv7/media.c
index cb0b275..e9feaf4 100644
--- a/src/mainboard/emulation/qemu-armv7/media.c
+++ b/src/mainboard/emulation/qemu-armv7/media.c
@@ -14,9 +14,9 @@
*/
#include <boot_device.h>
-/* Maps directly to qemu memory mapped space of 0x10000 up to rom size. */
+/* Maps directly to NOR flash up to rom size. */
static const struct mem_region_device boot_dev =
- MEM_REGION_DEV_INIT((void *)0x10000, CONFIG_ROM_SIZE);
+ MEM_REGION_DEV_INIT((void *)0x0, CONFIG_ROM_SIZE);
const struct region_device *boot_device_ro(void)
{
diff --git a/src/mainboard/emulation/qemu-armv7/memlayout.ld b/src/mainboard/emulation/qemu-armv7/memlayout.ld
index 0b139a2..1b3a48b 100644
--- a/src/mainboard/emulation/qemu-armv7/memlayout.ld
+++ b/src/mainboard/emulation/qemu-armv7/memlayout.ld
@@ -18,26 +18,33 @@
#include <arch/header.ld>
/*
- * Memory map for qemu vexpress-a9:
+ * Memory map for qemu vexpress-a9 since
+ * 6ec1588e09770ac7e9c60194faff6101111fc7f0 (Jul 2014):
*
- * 0x0000_0000: jump instruction (by qemu)
- * 0x0001_0000: bootblock (entry of kernel / firmware)
- * 0x0002_0000: romstage, assume up to 128KB in size.
- * 0x0007_ff00: stack pointer
- * 0x0010_0000: CBFS header
- * 0x0011_0000: CBFS data
- * 0x0100_0000: reserved for ramstage
+ * 0x0000_0000: NOR flash
* 0x1000_0000: I/O map address
+ * 0x6000_0000: RAM
*/
+/*
+ * This map is designed to work with new qemu vexpress memory layout and
+ * with -bios option which neatly puts coreboot into flash and so payloads
+ * can find CBFS and we don't risk overwriting CBFS.
+ *
+ * Prior to Jul 2014 qemu aliased 0 to begining of RAM instead of flash
+ * and -bios was unusable as $pc pointed to 0 which was zero-filled as a
+ * workaround we suggested using -kernel but this still had all the issues
+ * of having fake-ROM in RAM. In fact it was even worse as fake ROM ends
+ * up exactly at addresses needed to load Linux.
+ */
SECTIONS
{
/* TODO: does this thing emulate SRAM? */
- BOOTBLOCK(0x10000, 64K)
- ROMSTAGE(0x20000, 128K)
- STACK(0x000FC000, 16K)
+ BOOTBLOCK(0x00000, 64K)
- DRAM_START(0x01000000)
- RAMSTAGE(0x01000000, 16M)
+ DRAM_START(0x60000000)
+ STACK(0x60000000, 64K)
+ ROMSTAGE(0x60010000, 128K)
+ RAMSTAGE(0x60030000, 16M)
}
the following patch was just integrated into master:
commit bd1fdc6e84cae1f3fa705ae229a6b8ab67f2960a
Author: Patrick Rudolph <siro(a)das-labor.org>
Date: Tue Jan 26 08:45:21 2016 +0100
nb/intel/sandybridge/raminit: Add XMP support
Some vendors store lower frequency profiles in the regular SPD,
if the SPD contains a XMP profile. To make use of the board's and DIMM's
maximum supported DRAM frequency, try to parse the XMP profile and
use it instead.
Validate the XMP profile to make sure that the installed DIMM count
per channel is supported and the requested voltage is supported.
To reduce complexity only XMP Profile 1 is read.
Allows my DRAM to run at 800Mhz instead of 666Mhz as encoded in the
default SPD.
Test system:
* Gigabyte GA-B75M-D3H
* Intel Pentium CPU G2130
Change-Id: Ib4dd68debfdcfdce138e813ad5b0e8e2ce3a40b2
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
Reviewed-on: https://review.coreboot.org/13486
Reviewed-by: Martin Roth <martinroth(a)google.com>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/13486 for details.
-gerrit
the following patch was just integrated into master:
commit c3b0b7281326de836890fdb16eb92737f44b4e59
Author: zbao <fishbaozi(a)gmail.com>
Date: Fri Feb 19 13:47:31 2016 +0800
amdfwtool: Postpone the usage of PSP combo directory
If we only need to "combo" two PSP directories into one image,
we can put first address in romsig 0x10 and second one in
romsig 0x14.
If we really need to put three, the 0x14 is the combo directory
which points to multiple level-2 PSP directories.
I guess that two PSP can also use combo directory, with only
one level-2 directory. But nobody seems to do that.
Change-Id: Ic450a846bc04db90a75cd417b6d7104fe2a5b177
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13739
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13739 for details.
-gerrit