coreboot-gerrit July 2015

coreboot-gerrit@coreboot.org

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1048 discussions

Patch merged into coreboot/master: abuild: Allow disabling mainboards
by gerrit＠coreboot.org 14 Jul '15

14 Jul '15

the following patch was just integrated into master: commit 3ac3c4ebac8700ba99f2fdaf745d3e6aa1056dca Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Jul 14 20:20:13 2015 +0200 abuild: Allow disabling mainboards There may be boards that shouldn't be built for one reason or another. Allow black-listing them by adding a file to the mainboard directory called 'abuild.disabled'. It should contain the reason that is printed by abuild and also serves as documentation for users that want to know what's going on. Change-Id: I78c3281a578e96ee40f6b101143d4f3763582350 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Reviewed-on: http://review.coreboot.org/10917 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See http://review.coreboot.org/10917 for details. -gerrit

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Patch merged into coreboot/master: Braswell: Use CBFS image type name
by gerrit＠coreboot.org 14 Jul '15

14 Jul '15

the following patch was just integrated into master: commit b0630bfcbe5b284c6984074ef4c7add3ec11c80f Author: Lee Leahy <leroy.p.leahy(a)intel.com> Date: Thu Jul 9 16:49:35 2015 -0700 Braswell: Use CBFS image type name Use the simplified CBFS image type name in Makefile.inc. BRANCH=none BUG=None TEST=Build and run on cyan Change-Id: Idb62de7fce36fde38a6fbeeefdfc2dd0d75bd493 Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com> Reviewed-on: http://review.coreboot.org/10872 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Tested-by: build bot (Jenkins) See http://review.coreboot.org/10872 for details. -gerrit

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New patch to review for coreboot: abuild: Allow disabling mainboards
by Patrick Georgi 14 Jul '15

14 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10917 -gerrit commit d9c9b0ff16898160ae59a64b539a8b32af059da9 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Jul 14 20:20:13 2015 +0200 abuild: Allow disabling mainboards There may be boards that shouldn't be built for one reason or another. Allow black-listing them by adding a file to the mainboard directory called 'abuild.disabled'. It should contain the reason that is printed by abuild and also serves as documentation for users that want to know what's going on. Change-Id: I78c3281a578e96ee40f6b101143d4f3763582350 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- util/abuild/abuild | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/util/abuild/abuild b/util/abuild/abuild index 85805d7..ddf916a 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -280,6 +280,12 @@ function build_target HOSTCC='gcc' + if [ -f src/mainboard/${VENDOR}/${MAINBOARD}/abuild.disabled ]; then + echo "${VENDOR}/${MAINBOARD} disabled:" + cat src/mainboard/${VENDOR}/${MAINBOARD}/abuild.disabled + return + fi + if [ "$quiet" == "false" ]; then printf "Building $VENDOR/$MAINBOARD\n"; fi mkdir -p $TARGET/${VENDOR}_${MAINBOARD} $TARGET/abuild ABSPATH=`cd $TARGET/abuild; pwd`

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Patch set updated for coreboot: libpayload: store boot media information in sysinfo
by Patrick Georgi 14 Jul '15

14 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10869 -gerrit commit 86d6ea98cdbc6158dcafb8438f7e286ef7a78fea Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Jul 14 17:15:24 2015 +0100 libpayload: store boot media information in sysinfo Write boot media information in sysinfo, if it exists. This allows picking the right CBFS for further files in case there are several. Change-Id: I75a8ee6b93f349b9f2fab1e82826aba675949c0a Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- payloads/libpayload/include/coreboot_tables.h | 11 +++++++++++ payloads/libpayload/include/sysinfo.h | 4 ++++ payloads/libpayload/libc/coreboot.c | 14 ++++++++++++++ 3 files changed, 29 insertions(+) diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index 0c516b1..be3fe48 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -257,6 +257,17 @@ struct cb_spi_flash { uint32_t erase_cmd; }; +#define CB_TAG_BOOT_MEDIA_PARAMS 0x0030 +struct cb_boot_media_params { + uint32_t tag; + uint32_t size; + /* offsets are relative to start of boot media */ + uint32_t fmap_offset; + uint32_t cbfs_offset; + uint32_t cbfs_size; + uint32_t boot_media_size; +}; + #define CB_TAG_SERIALNO 0x002a #define CB_MAX_SERIALNO_LENGTH 32 diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index c407c3d..54f5e12 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -124,6 +124,10 @@ struct sysinfo_t { uint32_t sector_size; uint32_t erase_cmd; } spi_flash; + uint32_t fmap_offset; + uint32_t cbfs_offset; + uint32_t cbfs_size; + uint32_t boot_media_size; uint64_t mtc_start; uint32_t mtc_size; }; diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 8a5d3ae..3e248e1 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -220,6 +220,17 @@ static void cb_parse_spi_flash(void *ptr, struct sysinfo_t *info) info->spi_flash.erase_cmd = flash->erase_cmd; } +static void cb_parse_boot_media_params(unsigned char *ptr, + struct sysinfo_t *info) +{ + struct cb_boot_media_params *const bmp = + (struct cb_boot_media_params *)ptr; + info->fmap_offset = bmp->fmap_offset; + info->cbfs_offset = bmp->cbfs_offset; + info->cbfs_size = bmp->cbfs_size; + info->boot_media_size = bmp->boot_media_size; +} + int cb_parse_header(void *addr, int len, struct sysinfo_t *info) { struct cb_header *header; @@ -372,6 +383,9 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info) case CB_TAG_MTC: cb_parse_mtc(ptr, info); break; + case CB_TAG_BOOT_MEDIA_PARAMS: + cb_parse_boot_media_params(ptr, info); + break; default: cb_parse_arch_specific(rec, info); break;

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Patch set updated for coreboot: cbtable: describe boot media
by Patrick Georgi 14 Jul '15

14 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10867 -gerrit commit 400b1517f55b34ab5afd753fb2ba526f266e7fcf Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Jul 14 17:15:51 2015 +0100 cbtable: describe boot media This allows finding the currently used CBFS (in case there are several), and avoids the need to define flash size when building the payload. Change-Id: I4b00159610077761c501507e136407e9ae08c73e Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/include/boot/coreboot_tables.h | 14 ++++++ src/lib/coreboot_table.c | 27 +++++++++++ src/vendorcode/google/chromeos/vboot2/Makefile.inc | 1 + src/vendorcode/google/chromeos/vboot2/cbtable.c | 55 ++++++++++++++++++++++ 4 files changed, 97 insertions(+) diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index c8d5251..d1a63a8 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -297,6 +297,17 @@ struct lb_spi_flash { uint32_t erase_cmd; }; +#define LB_TAG_BOOT_MEDIA_PARAMS 0x0030 +struct lb_boot_media_params { + uint32_t tag; + uint32_t size; + /* offsets are relative to start of boot media */ + uint32_t fmap_offset; + uint32_t cbfs_offset; + uint32_t cbfs_size; + uint32_t boot_media_size; +}; + #define LB_TAG_SERIALNO 0x002a #define MAX_SERIALNO_LENGTH 32 @@ -390,6 +401,9 @@ void lb_add_console(uint16_t consoletype, void *data); /* Define this in mainboard.c to add board-specific table entries. */ void lb_board(struct lb_header *header); +/* Define this to add information which sub-CBFS to use. */ +void lb_boot_media_params(struct lb_header *header); + /* * Function to retrieve MAC address(es) from the VPD and store them in the * coreboot table. diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index f7fb2bb..b03d748 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -27,6 +27,7 @@ #include <version.h> #include <boardid.h> #include <device/device.h> +#include <fmap.h> #include <stdlib.h> #include <cbfs.h> #include <cbmem.h> @@ -228,6 +229,30 @@ static void lb_board_id(struct lb_header *header) #endif } + +void __attribute__((weak)) lb_boot_media_params(struct lb_header *header) +{ + struct lb_boot_media_params *bmp; + struct region_device fmrd; + + bmp = (struct lb_boot_media_params *)lb_new_record(header); + + bmp->tag = LB_TAG_BOOT_MEDIA_PARAMS; + bmp->size = sizeof(*bmp); + bmp->fmap_offset = ~0; + if (IS_ENABLED(CONFIG_ARCH_X86)) { + bmp->cbfs_offset = CONFIG_ROM_SIZE - CONFIG_CBFS_SIZE; + } else { + bmp->cbfs_offset = 0; + } + bmp->cbfs_size = CONFIG_CBFS_SIZE; + bmp->boot_media_size = CONFIG_ROM_SIZE; + + if (find_fmap_directory(&fmrd) == 0) { + bmp->fmap_offset = region_device_offset(&fmrd); + } +} + static void lb_ram_code(struct lb_header *header) { #if IS_ENABLED(CONFIG_RAM_CODE_SUPPORT) @@ -483,6 +508,8 @@ unsigned long write_coreboot_table( lb_ramoops(head); #endif + lb_boot_media_params(head); + /* Remember where my valid memory ranges are */ return lb_table_fini(head); } diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc index 9026df6..08993cb 100644 --- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc +++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc @@ -41,6 +41,7 @@ endif romstage-y += vboot_handoff.c common.c ramstage-y += common.c +ramstage-y += cbtable.c verstage-y += verstage.ld diff --git a/src/vendorcode/google/chromeos/vboot2/cbtable.c b/src/vendorcode/google/chromeos/vboot2/cbtable.c new file mode 100644 index 0000000..7c95395 --- /dev/null +++ b/src/vendorcode/google/chromeos/vboot2/cbtable.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <boot/coreboot_tables.h> +#include <fmap.h> +#include <fmap_serialized.h> +#include <region.h> +#include <string.h> + +#include "misc.h" + +/* Don't create an entry in case of any error. After all, what would be a + correct response? */ +void lb_boot_media_params(struct lb_header *header) +{ + struct lb_boot_media_params *bmp; + struct vb2_working_data *wd = vboot_get_working_data(); + struct region_device boot_media, fmrd; + + if (!wd) + return; /* no vboot2 data to work with */ + + if (find_fmap_directory(&fmrd)) + return; /* couldn't find fmap */ + + if (vb2_get_selected_region(wd, &boot_media)) + return; /* no boot media defined */ + + bmp = (struct lb_boot_media_params *)lb_new_record(header); + + bmp->tag = LB_TAG_BOOT_MEDIA_PARAMS; + bmp->size = sizeof(*bmp); + bmp->fmap_offset = region_device_offset(&fmrd); + bmp->cbfs_offset = region_device_offset(&boot_media); + bmp->cbfs_size = region_device_size(&boot_media); + bmp->boot_media_size = CONFIG_ROM_SIZE; +} +

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Patch set updated for coreboot: libpayload: store boot media information in sysinfo
by Patrick Georgi 14 Jul '15

14 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10869 -gerrit commit 236f09dbf213f860957b2f4300210f72cce21fbb Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Jul 14 17:15:24 2015 +0100 libpayload: store boot media information in sysinfo Write boot media information in sysinfo, if it exists. This allows picking the right CBFS for further files in case there are several. Change-Id: I75a8ee6b93f349b9f2fab1e82826aba675949c0a Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- payloads/libpayload/include/coreboot_tables.h | 11 +++++++++++ payloads/libpayload/include/sysinfo.h | 4 ++++ payloads/libpayload/libc/coreboot.c | 14 ++++++++++++++ 3 files changed, 29 insertions(+) diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index 0c516b1..be3fe48 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -257,6 +257,17 @@ struct cb_spi_flash { uint32_t erase_cmd; }; +#define CB_TAG_BOOT_MEDIA_PARAMS 0x0030 +struct cb_boot_media_params { + uint32_t tag; + uint32_t size; + /* offsets are relative to start of boot media */ + uint32_t fmap_offset; + uint32_t cbfs_offset; + uint32_t cbfs_size; + uint32_t boot_media_size; +}; + #define CB_TAG_SERIALNO 0x002a #define CB_MAX_SERIALNO_LENGTH 32 diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index c407c3d..54f5e12 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -124,6 +124,10 @@ struct sysinfo_t { uint32_t sector_size; uint32_t erase_cmd; } spi_flash; + uint32_t fmap_offset; + uint32_t cbfs_offset; + uint32_t cbfs_size; + uint32_t boot_media_size; uint64_t mtc_start; uint32_t mtc_size; }; diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 8a5d3ae..3e248e1 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -220,6 +220,17 @@ static void cb_parse_spi_flash(void *ptr, struct sysinfo_t *info) info->spi_flash.erase_cmd = flash->erase_cmd; } +static void cb_parse_boot_media_params(unsigned char *ptr, + struct sysinfo_t *info) +{ + struct cb_boot_media_params *const bmp = + (struct cb_boot_media_params *)ptr; + info->fmap_offset = bmp->fmap_offset; + info->cbfs_offset = bmp->cbfs_offset; + info->cbfs_size = bmp->cbfs_size; + info->boot_media_size = bmp->boot_media_size; +} + int cb_parse_header(void *addr, int len, struct sysinfo_t *info) { struct cb_header *header; @@ -372,6 +383,9 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info) case CB_TAG_MTC: cb_parse_mtc(ptr, info); break; + case CB_TAG_BOOT_MEDIA_PARAMS: + cb_parse_boot_media_params(ptr, info); + break; default: cb_parse_arch_specific(rec, info); break;

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Patch set updated for coreboot: cbtable: describe boot media
by Patrick Georgi 14 Jul '15

14 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10867 -gerrit commit ea64339da46e5b635060e13db992fa44c73ff49c Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Jul 14 17:15:51 2015 +0100 cbtable: describe boot media This allows finding the currently used CBFS (in case there are several), and avoids the need to define flash size when building the payload. Change-Id: I4b00159610077761c501507e136407e9ae08c73e Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/include/boot/coreboot_tables.h | 14 ++++++ src/lib/coreboot_table.c | 26 ++++++++++ src/vendorcode/google/chromeos/vboot2/Makefile.inc | 1 + src/vendorcode/google/chromeos/vboot2/cbtable.c | 55 ++++++++++++++++++++++ 4 files changed, 96 insertions(+) diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index c8d5251..d1a63a8 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -297,6 +297,17 @@ struct lb_spi_flash { uint32_t erase_cmd; }; +#define LB_TAG_BOOT_MEDIA_PARAMS 0x0030 +struct lb_boot_media_params { + uint32_t tag; + uint32_t size; + /* offsets are relative to start of boot media */ + uint32_t fmap_offset; + uint32_t cbfs_offset; + uint32_t cbfs_size; + uint32_t boot_media_size; +}; + #define LB_TAG_SERIALNO 0x002a #define MAX_SERIALNO_LENGTH 32 @@ -390,6 +401,9 @@ void lb_add_console(uint16_t consoletype, void *data); /* Define this in mainboard.c to add board-specific table entries. */ void lb_board(struct lb_header *header); +/* Define this to add information which sub-CBFS to use. */ +void lb_boot_media_params(struct lb_header *header); + /* * Function to retrieve MAC address(es) from the VPD and store them in the * coreboot table. diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index f7fb2bb..5998bf3 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -228,6 +228,30 @@ static void lb_board_id(struct lb_header *header) #endif } + +void __attribute__((weak)) lb_boot_media_params(struct lb_header *header) +{ + struct lb_boot_media_params *bmp; + struct region_device fmrd; + + bmp = (struct lb_boot_media_params *)lb_new_record(header); + + bmp->tag = LB_TAG_BOOT_MEDIA_PARAMS; + bmp->size = sizeof(*bmp); + bmp->fmap_offset = ~0; + if (IS_ENABLED(CONFIG_ARCH_X86)) { + bmp->cbfs_offset = CONFIG_ROM_SIZE - CONFIG_CBFS_SIZE; + } else { + bmp->cbfs_offset = 0; + } + bmp->cbfs_size = CONFIG_CBFS_SIZE; + bmp->boot_media_size = CONFIG_ROM_SIZE; + + if (find_fmap_directory(&fmrd) == 0) { + bmp->fmap_offset = region_device_offset(&fmrd); + } +} + static void lb_ram_code(struct lb_header *header) { #if IS_ENABLED(CONFIG_RAM_CODE_SUPPORT) @@ -483,6 +507,8 @@ unsigned long write_coreboot_table( lb_ramoops(head); #endif + lb_boot_media_params(head); + /* Remember where my valid memory ranges are */ return lb_table_fini(head); } diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc index 9026df6..08993cb 100644 --- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc +++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc @@ -41,6 +41,7 @@ endif romstage-y += vboot_handoff.c common.c ramstage-y += common.c +ramstage-y += cbtable.c verstage-y += verstage.ld diff --git a/src/vendorcode/google/chromeos/vboot2/cbtable.c b/src/vendorcode/google/chromeos/vboot2/cbtable.c new file mode 100644 index 0000000..7c95395 --- /dev/null +++ b/src/vendorcode/google/chromeos/vboot2/cbtable.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <boot/coreboot_tables.h> +#include <fmap.h> +#include <fmap_serialized.h> +#include <region.h> +#include <string.h> + +#include "misc.h" + +/* Don't create an entry in case of any error. After all, what would be a + correct response? */ +void lb_boot_media_params(struct lb_header *header) +{ + struct lb_boot_media_params *bmp; + struct vb2_working_data *wd = vboot_get_working_data(); + struct region_device boot_media, fmrd; + + if (!wd) + return; /* no vboot2 data to work with */ + + if (find_fmap_directory(&fmrd)) + return; /* couldn't find fmap */ + + if (vb2_get_selected_region(wd, &boot_media)) + return; /* no boot media defined */ + + bmp = (struct lb_boot_media_params *)lb_new_record(header); + + bmp->tag = LB_TAG_BOOT_MEDIA_PARAMS; + bmp->size = sizeof(*bmp); + bmp->fmap_offset = region_device_offset(&fmrd); + bmp->cbfs_offset = region_device_offset(&boot_media); + bmp->cbfs_size = region_device_size(&boot_media); + bmp->boot_media_size = CONFIG_ROM_SIZE; +} +

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Patch merged into coreboot/master: libpayload: Add support for handling fmaps
by gerrit＠coreboot.org 14 Jul '15

14 Jul '15

the following patch was just integrated into master: commit 89f73dccdbdccff494e9729e94defecd64b92964 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Thu Jul 9 13:57:00 2015 +0200 libpayload: Add support for handling fmaps They will become more common soon, so better support them now. Change-Id: I2b16e1bb7707fe8410365877524ff359aeefc161 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Reviewed-on: http://review.coreboot.org/10868 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See http://review.coreboot.org/10868 for details. -gerrit

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Patch merged into coreboot/master: riscv-emulation: Set stack size to 0 in Kconfig
by gerrit＠coreboot.org 14 Jul '15

14 Jul '15

the following patch was just integrated into master: commit 1daee069cda9df463526a0a71d68d14e331244a8 Author: Thaminda Edirisooriya <thaminda(a)google.com> Date: Thu Jul 9 13:53:34 2015 -0700 riscv-emulation: Set stack size to 0 in Kconfig Build now decides the stack size by correctly referencing the value in /src/mainboard/emulation/qemu-riscv/memlayout.ld. Note that while the size is correct, the placement is still wrong, and causes the stack to be corrupted by the coreboot tables. Still needs to be addressed Change-Id: I86c08bd53eeb64e672fecba21e06220694a4c3dd Signed-off-by: Thaminda Edirisooriya <thaminda(a)google.com> Reviewed-on: http://review.coreboot.org/10870 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/10870 for details. -gerrit

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Patch merged into coreboot/master: fmap: publish find_fmap_directory()
by gerrit＠coreboot.org 14 Jul '15

14 Jul '15

the following patch was just integrated into master: commit 977587abf8b212dbf9297126b8dd31076c83d6b7 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Thu Jul 9 13:34:40 2015 +0200 fmap: publish find_fmap_directory() The fmap directory can be useful to pass to the payload. For that, we need to be able to get it. Change-Id: Ibe0be73bb4fe28afb16d4d215b979eb0be369645 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Reviewed-on: http://review.coreboot.org/10866 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See http://review.coreboot.org/10866 for details. -gerrit

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coreboot-gerrit July 2015