coreboot-gerrit July 2015

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Patch set updated for coreboot: vendorcode/amd: 64bit fixes
by Stefan Reinauer 31 Jul '15

31 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11081 -gerrit commit 5b403ef940269f62a080c244bc0fd4d1829617ad Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 11:17:40 2015 -0700 vendorcode/amd: 64bit fixes Change-Id: I6a0752cf0c0e484e670acca97c4991b5578845fb Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/vendorcode/amd/agesa/f10/Include/Ids.h | 2 +- src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h | 46 +++++++++++----------- src/vendorcode/amd/agesa/f10/Makefile.inc | 6 +++ src/vendorcode/amd/agesa/f10/gcccar.inc | 5 +-- src/vendorcode/amd/agesa/f12/Include/Ids.h | 2 +- src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h | 46 +++++++++++----------- src/vendorcode/amd/agesa/f12/Makefile.inc | 13 +++--- src/vendorcode/amd/agesa/f12/cpcarmac.inc | 8 ++-- src/vendorcode/amd/agesa/f14/Include/Ids.h | 2 +- .../amd/agesa/f14/Legacy/Proc/Dispatcher.c | 4 +- .../amd/agesa/f14/Proc/Mem/Feat/S3/mfs3.c | 10 ++--- src/vendorcode/amd/agesa/f15/Include/Ids.h | 2 +- .../amd/agesa/f15/Include/OptionIdsInstall.h | 24 +++++------ src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h | 46 +++++++++++----------- .../amd/agesa/f15/Legacy/Proc/Dispatcher.c | 4 +- .../amd/agesa/f15/Legacy/Proc/hobTransfer.c | 12 +++--- src/vendorcode/amd/agesa/f15/Makefile.inc | 7 ++++ .../amd/agesa/f15/Proc/CPU/heapManager.c | 14 +++---- src/vendorcode/amd/agesa/f15tn/Include/Ids.h | 2 +- .../amd/agesa/f15tn/Include/OptionIdsInstall.h | 24 +++++------ .../amd/agesa/f15tn/Include/gcc-intrin.h | 46 +++++++++++----------- .../amd/agesa/f15tn/Legacy/Proc/Dispatcher.c | 4 +- .../amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c | 4 +- .../amd/agesa/f15tn/Legacy/Proc/hobTransfer.c | 12 +++--- src/vendorcode/amd/agesa/f15tn/Makefile.inc | 6 +++ .../amd/agesa/f15tn/Proc/CPU/heapManager.c | 14 +++---- .../amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c | 2 +- .../amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h | 2 +- .../amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h | 2 +- .../Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c | 2 +- .../Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c | 2 +- .../GNB/Modules/GnbPcieConfig/PcieConfigData.c | 2 +- src/vendorcode/amd/agesa/f16kb/Include/Ids.h | 2 +- .../amd/agesa/f16kb/Include/OptionIdsInstall.h | 24 +++++------ .../amd/agesa/f16kb/Include/gcc-intrin.h | 46 +++++++++++----------- .../amd/agesa/f16kb/Legacy/Proc/Dispatcher.c | 10 ++--- .../amd/agesa/f16kb/Legacy/Proc/agesaCallouts.c | 2 +- .../amd/agesa/f16kb/Legacy/Proc/hobTransfer.c | 6 +-- src/vendorcode/amd/agesa/f16kb/Makefile.inc | 3 ++ .../f16kb/Proc/CPU/Feature/cpuFeatureLeveling.c | 2 +- src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c | 4 +- .../amd/agesa/f16kb/Proc/CPU/cpuPostInit.c | 2 +- .../amd/agesa/f16kb/Proc/CPU/heapManager.c | 14 +++---- .../amd/agesa/f16kb/Proc/Common/AmdS3LateRestore.c | 2 +- .../amd/agesa/f16kb/Proc/GNB/Common/Gnb.h | 2 +- .../Proc/GNB/Modules/GnbInitKB/GfxSamuInitKB.c | 6 +-- .../amd/agesa/f16kb/Proc/IDS/Debug/IdsDpHdtout.c | 12 +++--- src/vendorcode/amd/cimx/rd890/Makefile.inc | 5 +++ src/vendorcode/amd/cimx/sb700/ACPILIB.c | 12 +++--- src/vendorcode/amd/cimx/sb700/AMDLIB.c | 6 +-- src/vendorcode/amd/cimx/sb700/AZALIA.c | 2 +- src/vendorcode/amd/cimx/sb700/DISPATCHER.c | 6 +-- src/vendorcode/amd/cimx/sb700/Makefile.inc | 5 +++ src/vendorcode/amd/cimx/sb700/SBDEF.h | 6 +-- src/vendorcode/amd/cimx/sb900/Hudson-2.h | 6 +-- src/vendorcode/amd/cimx/sb900/Makefile.inc | 5 +++ src/vendorcode/amd/pi/Makefile.inc | 7 ++++ 57 files changed, 310 insertions(+), 264 deletions(-) diff --git a/src/vendorcode/amd/agesa/f10/Include/Ids.h b/src/vendorcode/amd/agesa/f10/Include/Ids.h index 73a8856..2607b3d 100644 --- a/src/vendorcode/amd/agesa/f10/Include/Ids.h +++ b/src/vendorcode/amd/agesa/f10/Include/Ids.h @@ -447,7 +447,7 @@ typedef enum { //vv- for debug reference only /// Function entry for HDT script to call typedef struct _SCRIPT_FUNCTION { - UINT32 FuncAddr; ///< Function address in ROM + UINTN FuncAddr; ///< Function address in ROM CHAR8 FuncName[40]; ///< Function name } SCRIPT_FUNCTION; diff --git a/src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h index 7d90f8b..9ae45c3 100644 --- a/src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h +++ b/src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h @@ -27,11 +27,11 @@ */ #if defined (__GNUC__) - +#include <stdint.h> /* I/O intrin functions. */ -static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint8_t __inbyte(uint16_t Port) { - unsigned char value; + uint8_t value; __asm__ __volatile__ ( "in %1, %0" @@ -42,9 +42,9 @@ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned return value; } -static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint16_t __inword(uint16_t Port) { - unsigned short value; + uint16_t value; __asm__ __volatile__ ( "in %1, %0" @@ -55,9 +55,9 @@ static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigne return value; } -static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint32_t __indword(uint16_t Port) { - unsigned long value; + uint32_t value; __asm__ __volatile__ ( "in %1, %0" @@ -68,7 +68,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne } -static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short Port,unsigned char Data) +static __inline__ __attribute__((always_inline)) void __outbyte(uint16_t Port,uint8_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -77,7 +77,7 @@ static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outword(unsigned short Port,unsigned short Data) +static __inline__ __attribute__((always_inline)) void __outword(uint16_t Port,uint16_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -86,7 +86,7 @@ static __inline__ __attribute__((always_inline)) void __outword(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outdword(unsigned short Port,unsigned long Data) +static __inline__ __attribute__((always_inline)) void __outdword(uint16_t Port,uint32_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -95,7 +95,7 @@ static __inline__ __attribute__((always_inline)) void __outdword(unsigned short ); } -static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insb" @@ -104,7 +104,7 @@ static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insw" @@ -113,7 +113,7 @@ static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __indwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insl" @@ -122,7 +122,7 @@ static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsb" @@ -131,7 +131,7 @@ static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsw" @@ -140,7 +140,7 @@ static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outdwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsl" @@ -525,7 +525,7 @@ static __inline__ __attribute__((always_inline)) void __lidt(void *Source) } static __inline__ __attribute__((always_inline)) void -__writefsbyte(const unsigned long Offset, const unsigned char Data) +__writefsbyte(const unsigned long Offset, const uint8_t Data) { __asm__ ("movb %[Data], %%fs:%a[Offset]" : @@ -533,7 +533,7 @@ __writefsbyte(const unsigned long Offset, const unsigned char Data) } static __inline__ __attribute__((always_inline)) void -__writefsword(const unsigned long Offset, const unsigned short Data) +__writefsword(const unsigned long Offset, const uint16_t Data) { __asm__ ("movw %[Data], %%fs:%a[Offset]" : @@ -541,14 +541,14 @@ __writefsword(const unsigned long Offset, const unsigned short Data) } static __inline__ __attribute__((always_inline)) void -__writefsdword(const unsigned long Offset, const unsigned long Data) +__writefsdword(const unsigned long Offset, const uint32_t Data) { __asm__ ("movl %[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data)); } -static __inline__ __attribute__((always_inline)) unsigned char +static __inline__ __attribute__((always_inline)) uint8_t __readfsbyte(const unsigned long Offset) { unsigned char value; @@ -558,7 +558,7 @@ __readfsbyte(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned short +static __inline__ __attribute__((always_inline)) uint16_t __readfsword(const unsigned long Offset) { unsigned short value; @@ -568,11 +568,11 @@ __readfsword(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned long +static __inline__ __attribute__((always_inline)) uint32_t __readfsdword(unsigned long Offset) { unsigned long value; - __asm__ ("movl %%fs:%a[Offset], %[value]" + __asm__ ("mov %%fs:%a[Offset], %[value]" : [value] "=r" (value) : [Offset] "ir" (Offset)); return value; diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc index fe4a797..e0aa00d 100644 --- a/src/vendorcode/amd/agesa/f10/Makefile.inc +++ b/src/vendorcode/amd/agesa/f10/Makefile.inc @@ -47,15 +47,21 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem ## AGESA need sse feature ## CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_64 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC) +CPPFLAGS_x86_64 += $(AGESA_INC) ####################################################################### classes-y += libagesa +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) $(eval $(call create_class_compiler,libagesa,x86_32)) +else +$(eval $(call create_class_compiler,libagesa,x86_64)) +endif #libagesa-y += Proc/CPU/Family/0x10/F10IoCstate.c #libagesa-y += Proc/CPU/Feature/cpuIoCstate.c diff --git a/src/vendorcode/amd/agesa/f10/gcccar.inc b/src/vendorcode/amd/agesa/f10/gcccar.inc index 94d0ccc..2f0e083 100644 --- a/src/vendorcode/amd/agesa/f10/gcccar.inc +++ b/src/vendorcode/amd/agesa/f10/gcccar.inc @@ -240,7 +240,7 @@ MSR_MASK = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN)) jnz node_core_exit # Br if yes mov $((1 << FLAG_UNKNOWN_FAMILY)+(1 << FLAG_IS_PRIMARY)), %esi # No, Set error code, Only let BSP continue - + mov $APIC_BASE_ADDRESS, %ecx # MSR:0000_001B _RDMSR bt $APIC_BSC, %eax # Is this the BSC? @@ -965,7 +965,7 @@ fam15_enable_stack_hook_exit: btr $DIS_HW_PF, %eax # Turn on hardware prefetches #.endif # End workaround for erratum 498 0: - _WRMSR + _WRMSR #-------------------------------------------------------------------------- # Begin critical sequence in which EAX, BX, ECX, and EDX must be preserved. #-------------------------------------------------------------------------- @@ -1609,4 +1609,3 @@ ClearTheStack: # Stack base is in SS, stack pointer is xor %eax, %eax .endm - diff --git a/src/vendorcode/amd/agesa/f12/Include/Ids.h b/src/vendorcode/amd/agesa/f12/Include/Ids.h index 216c1b9..3f1f37b 100644 --- a/src/vendorcode/amd/agesa/f12/Include/Ids.h +++ b/src/vendorcode/amd/agesa/f12/Include/Ids.h @@ -666,7 +666,7 @@ typedef enum { //vv- for debug reference only #define IDS_CALLOUT_FCH_INIT_ENV 0x00 ///< The function data of IDS callout function of FchInitEnv. /// Function entry for HDT script to call typedef struct _SCRIPT_FUNCTION { - UINT32 FuncAddr; ///< Function address in ROM + UINTN FuncAddr; ///< Function address in ROM CHAR8 FuncName[40]; ///< Function name } SCRIPT_FUNCTION; diff --git a/src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h index 7d90f8b..9ae45c3 100644 --- a/src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h +++ b/src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h @@ -27,11 +27,11 @@ */ #if defined (__GNUC__) - +#include <stdint.h> /* I/O intrin functions. */ -static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint8_t __inbyte(uint16_t Port) { - unsigned char value; + uint8_t value; __asm__ __volatile__ ( "in %1, %0" @@ -42,9 +42,9 @@ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned return value; } -static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint16_t __inword(uint16_t Port) { - unsigned short value; + uint16_t value; __asm__ __volatile__ ( "in %1, %0" @@ -55,9 +55,9 @@ static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigne return value; } -static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint32_t __indword(uint16_t Port) { - unsigned long value; + uint32_t value; __asm__ __volatile__ ( "in %1, %0" @@ -68,7 +68,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne } -static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short Port,unsigned char Data) +static __inline__ __attribute__((always_inline)) void __outbyte(uint16_t Port,uint8_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -77,7 +77,7 @@ static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outword(unsigned short Port,unsigned short Data) +static __inline__ __attribute__((always_inline)) void __outword(uint16_t Port,uint16_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -86,7 +86,7 @@ static __inline__ __attribute__((always_inline)) void __outword(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outdword(unsigned short Port,unsigned long Data) +static __inline__ __attribute__((always_inline)) void __outdword(uint16_t Port,uint32_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -95,7 +95,7 @@ static __inline__ __attribute__((always_inline)) void __outdword(unsigned short ); } -static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insb" @@ -104,7 +104,7 @@ static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insw" @@ -113,7 +113,7 @@ static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __indwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insl" @@ -122,7 +122,7 @@ static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsb" @@ -131,7 +131,7 @@ static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsw" @@ -140,7 +140,7 @@ static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outdwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsl" @@ -525,7 +525,7 @@ static __inline__ __attribute__((always_inline)) void __lidt(void *Source) } static __inline__ __attribute__((always_inline)) void -__writefsbyte(const unsigned long Offset, const unsigned char Data) +__writefsbyte(const unsigned long Offset, const uint8_t Data) { __asm__ ("movb %[Data], %%fs:%a[Offset]" : @@ -533,7 +533,7 @@ __writefsbyte(const unsigned long Offset, const unsigned char Data) } static __inline__ __attribute__((always_inline)) void -__writefsword(const unsigned long Offset, const unsigned short Data) +__writefsword(const unsigned long Offset, const uint16_t Data) { __asm__ ("movw %[Data], %%fs:%a[Offset]" : @@ -541,14 +541,14 @@ __writefsword(const unsigned long Offset, const unsigned short Data) } static __inline__ __attribute__((always_inline)) void -__writefsdword(const unsigned long Offset, const unsigned long Data) +__writefsdword(const unsigned long Offset, const uint32_t Data) { __asm__ ("movl %[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data)); } -static __inline__ __attribute__((always_inline)) unsigned char +static __inline__ __attribute__((always_inline)) uint8_t __readfsbyte(const unsigned long Offset) { unsigned char value; @@ -558,7 +558,7 @@ __readfsbyte(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned short +static __inline__ __attribute__((always_inline)) uint16_t __readfsword(const unsigned long Offset) { unsigned short value; @@ -568,11 +568,11 @@ __readfsword(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned long +static __inline__ __attribute__((always_inline)) uint32_t __readfsdword(unsigned long Offset) { unsigned long value; - __asm__ ("movl %%fs:%a[Offset], %[value]" + __asm__ ("mov %%fs:%a[Offset], %[value]" : [value] "=r" (value) : [Offset] "ir" (Offset)); return value; diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index 1e5bc70..e135e2a 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -2,7 +2,7 @@ # # Copyright (c) 2011, Advanced Micro Devices, Inc. # All rights reserved. -# +# # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are met: # * Redistributions of source code must retain the above copyright @@ -10,10 +10,10 @@ # * Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. -# * Neither the name of Advanced Micro Devices, Inc. nor the names of -# its contributors may be used to endorse or promote products derived +# * Neither the name of Advanced Micro Devices, Inc. nor the names of +# its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. -# +# # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -24,7 +24,7 @@ # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# +# #***************************************************************************** # AGESA V5 Files @@ -80,7 +80,10 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech/DDR3 CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_64 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_INC := $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC) +CPPFLAGS_x86_64 += $(AGESA_INC) + ####################################################################### diff --git a/src/vendorcode/amd/agesa/f12/cpcarmac.inc b/src/vendorcode/amd/agesa/f12/cpcarmac.inc index b4add85..dce7d3f 100644 --- a/src/vendorcode/amd/agesa/f12/cpcarmac.inc +++ b/src/vendorcode/amd/agesa/f12/cpcarmac.inc @@ -9,7 +9,7 @@ ; ; Copyright (c) 2011, Advanced Micro Devices, Inc. ; All rights reserved. -; +; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions are met: ; * Redistributions of source code must retain the above copyright @@ -17,10 +17,10 @@ ; * Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. -; * Neither the name of Advanced Micro Devices, Inc. nor the names of -; its contributors may be used to endorse or promote products derived +; * Neither the name of Advanced Micro Devices, Inc. nor the names of +; its contributors may be used to endorse or promote products derived ; from this software without specific prior written permission. -; +; ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE diff --git a/src/vendorcode/amd/agesa/f14/Include/Ids.h b/src/vendorcode/amd/agesa/f14/Include/Ids.h index 732f458..451c4d6 100644 --- a/src/vendorcode/amd/agesa/f14/Include/Ids.h +++ b/src/vendorcode/amd/agesa/f14/Include/Ids.h @@ -643,7 +643,7 @@ typedef enum { //vv- for debug reference only /// Function entry for HDT script to call typedef struct _SCRIPT_FUNCTION { - UINT32 FuncAddr; ///< Function address in ROM + UINTN FuncAddr; ///< Function address in ROM CHAR8 FuncName[40]; ///< Function name } SCRIPT_FUNCTION; diff --git a/src/vendorcode/amd/agesa/f14/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f14/Legacy/Proc/Dispatcher.c index 68d9e6f..d7c6f80 100644 --- a/src/vendorcode/amd/agesa/f14/Legacy/Proc/Dispatcher.c +++ b/src/vendorcode/amd/agesa/f14/Legacy/Proc/Dispatcher.c @@ -85,8 +85,8 @@ AmdAgesaDispatcher ( IMAGE_ENTRY ImageEntry; MODULE_ENTRY ModuleEntry; DISPATCH_TABLE *Entry; - UINT32 ImageStart; - UINT32 ImageEnd; + UINTN ImageStart; + UINTN ImageEnd; CONST AMD_IMAGE_HEADER* AltImagePtr; Status = AGESA_UNSUPPORTED; diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/mfs3.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/mfs3.c index a8a6d46..4963b4b 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/mfs3.c +++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/mfs3.c @@ -259,30 +259,30 @@ MemFS3GetDeviceList ( (*DeviceBlockHdrPtr)->RelativeOrMaskOffset = (UINT16) AllocHeapParams.RequestedBufferSize; // Copy device list on the stack to the heap. - BufferOffset = sizeof (DEVICE_BLOCK_HEADER) + (UINT64) (UINT32) AllocHeapParams.BufferPtr; + BufferOffset = sizeof (DEVICE_BLOCK_HEADER) + (UINTN) AllocHeapParams.BufferPtr; for (Die = 0; Die < DieCount; Die ++) { for (i = PRESELFREF; i <= POSTSELFREF; i ++) { // Copy PCI device descriptor to the heap if it exists. if (DeviceDescript[Die].PCIDevice[i].RegisterListID != 0xFFFFFFFF) { - LibAmdMemCopy ((VOID *)(UINT32) BufferOffset, &(DeviceDescript[Die].PCIDevice[i]), sizeof (PCI_DEVICE_DESCRIPTOR), StdHeader); + LibAmdMemCopy ((VOID *)(UINTN) BufferOffset, &(DeviceDescript[Die].PCIDevice[i]), sizeof (PCI_DEVICE_DESCRIPTOR), StdHeader); (*DeviceBlockHdrPtr)->NumDevices ++; BufferOffset += sizeof (PCI_DEVICE_DESCRIPTOR); } // Copy conditional PCI device descriptor to the heap if it exists. if (DeviceDescript[Die].CPCIDevice[i].RegisterListID != 0xFFFFFFFF) { - LibAmdMemCopy ((VOID *)(UINT32) BufferOffset, &(DeviceDescript[Die].CPCIDevice[i]), sizeof (CONDITIONAL_PCI_DEVICE_DESCRIPTOR), StdHeader); + LibAmdMemCopy ((VOID *)(UINTN) BufferOffset, &(DeviceDescript[Die].CPCIDevice[i]), sizeof (CONDITIONAL_PCI_DEVICE_DESCRIPTOR), StdHeader); (*DeviceBlockHdrPtr)->NumDevices ++; BufferOffset += sizeof (CONDITIONAL_PCI_DEVICE_DESCRIPTOR); } // Copy MSR device descriptor to the heap if it exists. if (DeviceDescript[Die].MSRDevice[i].RegisterListID != 0xFFFFFFFF) { - LibAmdMemCopy ((VOID *)(UINT32) BufferOffset, &(DeviceDescript[Die].MSRDevice[i]), sizeof (MSR_DEVICE_DESCRIPTOR), StdHeader); + LibAmdMemCopy ((VOID *)(UINTN) BufferOffset, &(DeviceDescript[Die].MSRDevice[i]), sizeof (MSR_DEVICE_DESCRIPTOR), StdHeader); (*DeviceBlockHdrPtr)->NumDevices ++; BufferOffset += sizeof (MSR_DEVICE_DESCRIPTOR); } // Copy conditional MSR device descriptor to the heap if it exists. if (DeviceDescript[Die].CMSRDevice[i].RegisterListID != 0xFFFFFFFF) { - LibAmdMemCopy ((VOID *)(UINT32) BufferOffset, &(DeviceDescript[Die].PCIDevice[i]), sizeof (CONDITIONAL_MSR_DEVICE_DESCRIPTOR), StdHeader); + LibAmdMemCopy ((VOID *)(UINTN) BufferOffset, &(DeviceDescript[Die].PCIDevice[i]), sizeof (CONDITIONAL_MSR_DEVICE_DESCRIPTOR), StdHeader); (*DeviceBlockHdrPtr)->NumDevices ++; BufferOffset += sizeof (CONDITIONAL_MSR_DEVICE_DESCRIPTOR); } diff --git a/src/vendorcode/amd/agesa/f15/Include/Ids.h b/src/vendorcode/amd/agesa/f15/Include/Ids.h index b8d5091..07ceeaf 100644 --- a/src/vendorcode/amd/agesa/f15/Include/Ids.h +++ b/src/vendorcode/amd/agesa/f15/Include/Ids.h @@ -615,7 +615,7 @@ typedef enum { //vv- for debug reference only /// Function entry for HDT script to call typedef struct _SCRIPT_FUNCTION { - UINT32 FuncAddr; ///< Function address in ROM + UINTN FuncAddr; ///< Function address in ROM CHAR8 FuncName[40]; ///< Function name } SCRIPT_FUNCTION; diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h index a2c0034..6873370 100644 --- a/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h +++ b/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h @@ -74,29 +74,29 @@ CONST PF_HtIdsGetPortOverride ROMDATA pf_HtIdsGetPortOverride = M_HTIDS_PORT_OVE #if (AGESA_ENTRY_INIT_POST == TRUE) #include <mu.h> CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) /*(UINT64)*/ MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"}, - { (UINT32) /*(UINT64)*/ MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"}, - { (UINT32) /*(UINT64)*/ MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"} + { (UINTN) MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"}, + { (UINTN) MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"}, + { (UINTN) MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"} }; #elif (AGESA_ENTRY_INIT_RECOVERY == TRUE) #include <mru.h> CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) (UINT64) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"}, - { (UINT32) (UINT64) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"}, - { (UINT32) (UINT64) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"} + { (UINTN) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"}, + { (UINTN) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"}, + { (UINTN) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"} }; #else CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"}, - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"}, - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"} + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"} }; #endif #else CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"}, - { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"}, - { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"} + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"} }; #endif diff --git a/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h index 7d90f8b..9ae45c3 100644 --- a/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h +++ b/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h @@ -27,11 +27,11 @@ */ #if defined (__GNUC__) - +#include <stdint.h> /* I/O intrin functions. */ -static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint8_t __inbyte(uint16_t Port) { - unsigned char value; + uint8_t value; __asm__ __volatile__ ( "in %1, %0" @@ -42,9 +42,9 @@ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned return value; } -static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint16_t __inword(uint16_t Port) { - unsigned short value; + uint16_t value; __asm__ __volatile__ ( "in %1, %0" @@ -55,9 +55,9 @@ static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigne return value; } -static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint32_t __indword(uint16_t Port) { - unsigned long value; + uint32_t value; __asm__ __volatile__ ( "in %1, %0" @@ -68,7 +68,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne } -static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short Port,unsigned char Data) +static __inline__ __attribute__((always_inline)) void __outbyte(uint16_t Port,uint8_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -77,7 +77,7 @@ static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outword(unsigned short Port,unsigned short Data) +static __inline__ __attribute__((always_inline)) void __outword(uint16_t Port,uint16_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -86,7 +86,7 @@ static __inline__ __attribute__((always_inline)) void __outword(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outdword(unsigned short Port,unsigned long Data) +static __inline__ __attribute__((always_inline)) void __outdword(uint16_t Port,uint32_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -95,7 +95,7 @@ static __inline__ __attribute__((always_inline)) void __outdword(unsigned short ); } -static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insb" @@ -104,7 +104,7 @@ static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insw" @@ -113,7 +113,7 @@ static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __indwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insl" @@ -122,7 +122,7 @@ static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsb" @@ -131,7 +131,7 @@ static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsw" @@ -140,7 +140,7 @@ static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outdwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsl" @@ -525,7 +525,7 @@ static __inline__ __attribute__((always_inline)) void __lidt(void *Source) } static __inline__ __attribute__((always_inline)) void -__writefsbyte(const unsigned long Offset, const unsigned char Data) +__writefsbyte(const unsigned long Offset, const uint8_t Data) { __asm__ ("movb %[Data], %%fs:%a[Offset]" : @@ -533,7 +533,7 @@ __writefsbyte(const unsigned long Offset, const unsigned char Data) } static __inline__ __attribute__((always_inline)) void -__writefsword(const unsigned long Offset, const unsigned short Data) +__writefsword(const unsigned long Offset, const uint16_t Data) { __asm__ ("movw %[Data], %%fs:%a[Offset]" : @@ -541,14 +541,14 @@ __writefsword(const unsigned long Offset, const unsigned short Data) } static __inline__ __attribute__((always_inline)) void -__writefsdword(const unsigned long Offset, const unsigned long Data) +__writefsdword(const unsigned long Offset, const uint32_t Data) { __asm__ ("movl %[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data)); } -static __inline__ __attribute__((always_inline)) unsigned char +static __inline__ __attribute__((always_inline)) uint8_t __readfsbyte(const unsigned long Offset) { unsigned char value; @@ -558,7 +558,7 @@ __readfsbyte(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned short +static __inline__ __attribute__((always_inline)) uint16_t __readfsword(const unsigned long Offset) { unsigned short value; @@ -568,11 +568,11 @@ __readfsword(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned long +static __inline__ __attribute__((always_inline)) uint32_t __readfsdword(unsigned long Offset) { unsigned long value; - __asm__ ("movl %%fs:%a[Offset], %[value]" + __asm__ ("mov %%fs:%a[Offset], %[value]" : [value] "=r" (value) : [Offset] "ir" (Offset)); return value; diff --git a/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c index ae25a49..4353c41 100644 --- a/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c +++ b/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c @@ -83,8 +83,8 @@ AmdAgesaDispatcher ( IMAGE_ENTRY ImageEntry; MODULE_ENTRY ModuleEntry; DISPATCH_TABLE *Entry; - UINT32 ImageStart; - UINT32 ImageEnd; + UINTN ImageStart; + UINTN ImageEnd; AMD_IMAGE_HEADER* AltImagePtr; Status = AGESA_UNSUPPORTED; diff --git a/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c index b2accb2..aa7c1b8 100644 --- a/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c +++ b/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c @@ -148,7 +148,7 @@ CopyHeapToTempRamAtPost ( // // 0xC0000 ~ 0xFFFFF // - HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + (((AmdHeapRamAddress >> 16) & 0x3) * 2)); + HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + ((((UINTN)AmdHeapRamAddress >> 16) & 0x3) * 2)); MsrData = AMD_MTRR_FIX4K_UC_DRAM; LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader); LibAmdMsrWrite ((HeapRamFixMtrr + 1), &MsrData, StdHeader); @@ -156,7 +156,7 @@ CopyHeapToTempRamAtPost ( // // 0x80000~0xBFFFF // - HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + ((AmdHeapRamAddress >> 17) & 0x1)); + HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + (((UINTN)AmdHeapRamAddress >> 17) & 0x1)); MsrData = AMD_MTRR_FIX16K_UC_DRAM; LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader); } else { @@ -165,7 +165,7 @@ CopyHeapToTempRamAtPost ( // LibAmdMsrRead (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader); MsrData = MsrData & (~(0xFF << (8 * ((AmdHeapRamAddress >> 16) & 0x7)))); - MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * ((AmdHeapRamAddress >> 16) & 0x7))); + MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * (((UINTN)AmdHeapRamAddress >> 16) & 0x7))); LibAmdMsrWrite (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader); } @@ -209,7 +209,7 @@ CopyHeapToTempRamAtPost ( TotalSize = sizeof (HEAP_MANAGER); SizeOfNodeData = 0; AlignTo16ByteInTempMem = 0; - BaseAddressInCache = (UINT8 *) (UINT32)StdHeader->HeapBasePtr; + BaseAddressInCache = (UINT8 *) (UINTN)StdHeader->HeapBasePtr; HeapManagerInCache = (HEAP_MANAGER *) BaseAddressInCache; HeapInCacheOffset = HeapManagerInCache->FirstActiveBufferOffset; HeapInCache = (BUFFER_NODE *) (BaseAddressInCache + HeapInCacheOffset); @@ -308,8 +308,8 @@ CopyHeapToMainRamAtPost ( TotalSize = sizeof (HEAP_MANAGER); SizeOfNodeData = 0; AlignTo16ByteInMainMem = 0; - BaseAddressInTempMem = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; - HeapManagerInTempMem = (HEAP_MANAGER *)(UINT32) StdHeader->HeapBasePtr; + BaseAddressInTempMem = (UINT8 *)(UINTN) StdHeader->HeapBasePtr; + HeapManagerInTempMem = (HEAP_MANAGER *)(UINTN) StdHeader->HeapBasePtr; HeapInTempMemOffset = HeapManagerInTempMem->FirstActiveBufferOffset; HeapInTempMem = (BUFFER_NODE *) (BaseAddressInTempMem + HeapInTempMemOffset); diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 94e3e43..88870b9 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -59,15 +59,22 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem ## AGESA need sse feature ## CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_64 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC) +CPPFLAGS_x86_64 += $(AGESA_INC) + ####################################################################### classes-y += libagesa +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) $(eval $(call create_class_compiler,libagesa,x86_32)) +else +$(eval $(call create_class_compiler,libagesa,x86_64)) +endif libagesa-y += Legacy/Proc/agesaCallouts.c libagesa-y += Legacy/Proc/Dispatcher.c diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c b/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c index f42c35d..5698fb3 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c @@ -156,7 +156,7 @@ HeapManagerInit ( GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader); FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (CONST VOID **) &CacheInfoPtr, &Ignored, StdHeader); - HeapBufferPtr = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; + HeapBufferPtr = (UINT8 *)(UINTN) StdHeader->HeapBasePtr; // Check whether the heap manager is already initialized LibAmdMsrRead (AMD_MTRR_VARIABLE_HEAP_MASK, &MsrData, StdHeader); @@ -326,14 +326,14 @@ HeapAllocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } // Allocate @@ -471,14 +471,14 @@ HeapDeallocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfPreviousNode = AMD_HEAP_INVALID_HEAP_OFFSET; @@ -600,14 +600,14 @@ HeapLocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfCurrentNode = HeapManager->FirstActiveBufferOffset; CurrentNode = (BUFFER_NODE *) (BaseAddress + OffsetOfCurrentNode); diff --git a/src/vendorcode/amd/agesa/f15tn/Include/Ids.h b/src/vendorcode/amd/agesa/f15tn/Include/Ids.h index abbb6d4..b2cf9f3 100644 --- a/src/vendorcode/amd/agesa/f15tn/Include/Ids.h +++ b/src/vendorcode/amd/agesa/f15tn/Include/Ids.h @@ -840,7 +840,7 @@ typedef enum { //vv- for debug reference only #define IDS_CALLOUT_POWER_PLAN_INIT 0x8D ///< The function data of IDS callout function of Override Power Plan Init /// Function entry for HDT script to call typedef struct _SCRIPT_FUNCTION { - UINT32 FuncAddr; ///< Function address in ROM + UINTN FuncAddr; ///< Function address in ROM CHAR8 FuncName[40]; ///< Function name } SCRIPT_FUNCTION; diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionIdsInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionIdsInstall.h index a60667f..5fe172c 100644 --- a/src/vendorcode/amd/agesa/f15tn/Include/OptionIdsInstall.h +++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionIdsInstall.h @@ -74,29 +74,29 @@ CONST PF_HtIdsGetPortOverride ROMDATA pf_HtIdsGetPortOverride = M_HTIDS_PORT_OVE #if (AGESA_ENTRY_INIT_POST == TRUE) #include <mu.h> CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) /*(UINT64)*/ MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"}, - { (UINT32) /*(UINT64)*/ MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"}, - { (UINT32) /*(UINT64)*/ MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"} + { (UINTN) MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"}, + { (UINTN) MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"}, + { (UINTN) MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"} }; #elif (AGESA_ENTRY_INIT_RECOVERY == TRUE) #include <mru.h> CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) (UINT64) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"}, - { (UINT32) (UINT64) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"}, - { (UINT32) (UINT64) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"} + { (UINTN) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"}, + { (UINTN) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"}, + { (UINTN) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"} }; #else CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"}, - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"}, - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"} + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"} }; #endif #else CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"}, - { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"}, - { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"} + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"} }; #endif diff --git a/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h index 7d90f8b..9ae45c3 100644 --- a/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h +++ b/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h @@ -27,11 +27,11 @@ */ #if defined (__GNUC__) - +#include <stdint.h> /* I/O intrin functions. */ -static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint8_t __inbyte(uint16_t Port) { - unsigned char value; + uint8_t value; __asm__ __volatile__ ( "in %1, %0" @@ -42,9 +42,9 @@ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned return value; } -static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint16_t __inword(uint16_t Port) { - unsigned short value; + uint16_t value; __asm__ __volatile__ ( "in %1, %0" @@ -55,9 +55,9 @@ static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigne return value; } -static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint32_t __indword(uint16_t Port) { - unsigned long value; + uint32_t value; __asm__ __volatile__ ( "in %1, %0" @@ -68,7 +68,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne } -static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short Port,unsigned char Data) +static __inline__ __attribute__((always_inline)) void __outbyte(uint16_t Port,uint8_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -77,7 +77,7 @@ static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outword(unsigned short Port,unsigned short Data) +static __inline__ __attribute__((always_inline)) void __outword(uint16_t Port,uint16_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -86,7 +86,7 @@ static __inline__ __attribute__((always_inline)) void __outword(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outdword(unsigned short Port,unsigned long Data) +static __inline__ __attribute__((always_inline)) void __outdword(uint16_t Port,uint32_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -95,7 +95,7 @@ static __inline__ __attribute__((always_inline)) void __outdword(unsigned short ); } -static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insb" @@ -104,7 +104,7 @@ static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insw" @@ -113,7 +113,7 @@ static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __indwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insl" @@ -122,7 +122,7 @@ static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsb" @@ -131,7 +131,7 @@ static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsw" @@ -140,7 +140,7 @@ static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outdwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsl" @@ -525,7 +525,7 @@ static __inline__ __attribute__((always_inline)) void __lidt(void *Source) } static __inline__ __attribute__((always_inline)) void -__writefsbyte(const unsigned long Offset, const unsigned char Data) +__writefsbyte(const unsigned long Offset, const uint8_t Data) { __asm__ ("movb %[Data], %%fs:%a[Offset]" : @@ -533,7 +533,7 @@ __writefsbyte(const unsigned long Offset, const unsigned char Data) } static __inline__ __attribute__((always_inline)) void -__writefsword(const unsigned long Offset, const unsigned short Data) +__writefsword(const unsigned long Offset, const uint16_t Data) { __asm__ ("movw %[Data], %%fs:%a[Offset]" : @@ -541,14 +541,14 @@ __writefsword(const unsigned long Offset, const unsigned short Data) } static __inline__ __attribute__((always_inline)) void -__writefsdword(const unsigned long Offset, const unsigned long Data) +__writefsdword(const unsigned long Offset, const uint32_t Data) { __asm__ ("movl %[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data)); } -static __inline__ __attribute__((always_inline)) unsigned char +static __inline__ __attribute__((always_inline)) uint8_t __readfsbyte(const unsigned long Offset) { unsigned char value; @@ -558,7 +558,7 @@ __readfsbyte(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned short +static __inline__ __attribute__((always_inline)) uint16_t __readfsword(const unsigned long Offset) { unsigned short value; @@ -568,11 +568,11 @@ __readfsword(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned long +static __inline__ __attribute__((always_inline)) uint32_t __readfsdword(unsigned long Offset) { unsigned long value; - __asm__ ("movl %%fs:%a[Offset], %[value]" + __asm__ ("mov %%fs:%a[Offset], %[value]" : [value] "=r" (value) : [Offset] "ir" (Offset)); return value; diff --git a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c index b307706..4188f1b 100644 --- a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c +++ b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c @@ -82,8 +82,8 @@ AmdAgesaDispatcher ( IMAGE_ENTRY ImageEntry; MODULE_ENTRY ModuleEntry; DISPATCH_TABLE *Entry; - UINT32 ImageStart; - UINT32 ImageEnd; + UINTN ImageStart; + UINTN ImageEnd; CONST AMD_IMAGE_HEADER* AltImagePtr; Status = AGESA_UNSUPPORTED; diff --git a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c index 1df58aa..198b404 100644 --- a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c +++ b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c @@ -434,7 +434,7 @@ AgesaFchOemCallout ( IN VOID *FchData ) { - AGESA_STATUS Status; Status = AmdAgesaCallout(AGESA_FCH_OEM_CALLOUT, (UINT32)FchData, ((FCH_DATA_BLOCK *)FchData)->StdHeader); return Status; //return AGESA_UNSUPPORTED; + AGESA_STATUS Status; Status = AmdAgesaCallout(AGESA_FCH_OEM_CALLOUT, (UINTN)FchData, ((FCH_DATA_BLOCK *)FchData)->StdHeader); return Status; //return AGESA_UNSUPPORTED; } /*---------------------------------------------------------------------------------------*/ @@ -454,7 +454,7 @@ excel331 ( { AGESA_STATUS Status; - Status = AmdAgesaCallout (0x00028146ul , (UINT32)SocketIdModuleId, MemData); + Status = AmdAgesaCallout (0x00028146ul , SocketIdModuleId, MemData); return Status; } diff --git a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c index 7ed5f16..ec17b95 100644 --- a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c +++ b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c @@ -147,7 +147,7 @@ CopyHeapToTempRamAtPost ( // // 0xC0000 ~ 0xFFFFF // - HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + (((AmdHeapRamAddress >> 16) & 0x3) * 2)); + HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + ((((UINTN)AmdHeapRamAddress >> 16) & 0x3) * 2)); MsrData = AMD_MTRR_FIX4K_UC_DRAM; LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader); LibAmdMsrWrite ((HeapRamFixMtrr + 1), &MsrData, StdHeader); @@ -155,7 +155,7 @@ CopyHeapToTempRamAtPost ( // // 0x80000~0xBFFFF // - HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + ((AmdHeapRamAddress >> 17) & 0x1)); + HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + (((UINTN)AmdHeapRamAddress >> 17) & 0x1)); MsrData = AMD_MTRR_FIX16K_UC_DRAM; LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader); } else { @@ -164,7 +164,7 @@ CopyHeapToTempRamAtPost ( // LibAmdMsrRead (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader); MsrData = MsrData & (~(0xFF << (8 * ((AmdHeapRamAddress >> 16) & 0x7)))); - MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * ((AmdHeapRamAddress >> 16) & 0x7))); + MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * (((UINTN)AmdHeapRamAddress >> 16) & 0x7))); LibAmdMsrWrite (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader); } @@ -208,7 +208,7 @@ CopyHeapToTempRamAtPost ( TotalSize = sizeof (HEAP_MANAGER); SizeOfNodeData = 0; AlignTo16ByteInTempMem = 0; - BaseAddressInCache = (UINT8 *) (UINT32)StdHeader->HeapBasePtr; + BaseAddressInCache = (UINT8 *) (UINTN)StdHeader->HeapBasePtr; HeapManagerInCache = (HEAP_MANAGER *) BaseAddressInCache; HeapInCacheOffset = HeapManagerInCache->FirstActiveBufferOffset; HeapInCache = (BUFFER_NODE *) (BaseAddressInCache + HeapInCacheOffset); @@ -307,8 +307,8 @@ CopyHeapToMainRamAtPost ( TotalSize = sizeof (HEAP_MANAGER); SizeOfNodeData = 0; AlignTo16ByteInMainMem = 0; - BaseAddressInTempMem = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; - HeapManagerInTempMem = (HEAP_MANAGER *)(UINT32) StdHeader->HeapBasePtr; + BaseAddressInTempMem = (UINT8 *)(UINTN) StdHeader->HeapBasePtr; + HeapManagerInTempMem = (HEAP_MANAGER *)(UINTN) StdHeader->HeapBasePtr; HeapInTempMemOffset = HeapManagerInTempMem->FirstActiveBufferOffset; HeapInTempMem = (BUFFER_NODE *) (BaseAddressInTempMem + HeapInTempMemOffset); diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index 0de46b0..986fbc5 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -77,15 +77,21 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Include/Library AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_64 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC) +CPPFLAGS_x86_64 += $(AGESA_INC) ####################################################################### classes-y += libagesa +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) $(eval $(call create_class_compiler,libagesa,x86_32)) +else +$(eval $(call create_class_compiler,libagesa,x86_64)) +endif libagesa-y += Legacy/Proc/Dispatcher.c libagesa-y += Legacy/Proc/agesaCallouts.c diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c index 2e45471..f281593 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c @@ -155,7 +155,7 @@ HeapManagerInit ( GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader); FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (CONST VOID **) &CacheInfoPtr, &Ignored, StdHeader); - HeapBufferPtr = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; + HeapBufferPtr = (UINT8 *)(UINTN) StdHeader->HeapBasePtr; // Check whether the heap manager is already initialized LibAmdMsrRead (AMD_MTRR_VARIABLE_HEAP_MASK, &MsrData, StdHeader); @@ -325,14 +325,14 @@ HeapAllocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } // Allocate @@ -470,14 +470,14 @@ HeapDeallocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfPreviousNode = AMD_HEAP_INVALID_HEAP_OFFSET; @@ -599,14 +599,14 @@ HeapLocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfCurrentNode = HeapManager->FirstActiveBufferOffset; CurrentNode = (BUFFER_NODE *) (BaseAddress + OffsetOfCurrentNode); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c b/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c index fb8edd9..2f23a7a 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c @@ -119,7 +119,7 @@ AmdS3LateRestore ( ASSERT (S3LateParams != NULL); BufferPointer = (UINT8 *) S3LateParams->S3DataBlock.VolatileStorage; - S3LateParams->StdHeader.HeapBasePtr = (UINT32) &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset]; + S3LateParams->StdHeader.HeapBasePtr = (UINTN) &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset]; ASSERT (S3LateParams->StdHeader.HeapBasePtr != 0); IDS_HDT_CONSOLE_INIT (&S3LateParams->StdHeader); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h index 1a934eb..ac3318a 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h @@ -125,7 +125,7 @@ typedef enum { /// Graphics Platform Configuration typedef struct { - UINT32 StdHeader; ///< Standard Header TODO: Used to be PVOID + UINTN StdHeader; ///< Standard Header TODO: Used to be PVOID PCI_ADDR GfxPciAddress; ///< Graphics PCI Address UMA_INFO UmaInfo; ///< UMA Information UINT32 GmmBase; ///< GMM Base diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h index b25c50c..e8194f8 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h @@ -355,7 +355,7 @@ typedef struct { /// PCIe platform configuration info typedef struct { PCIe_DESCRIPTOR_HEADER Header; ///< Descrptor Header - UINT32 StdHeader; ///< Standard configuration header TODO:Used to be PVOID + UINTN StdHeader; ///< Standard configuration header TODO:Used to be PVOID UINT32 LinkReceiverDetectionPooling; ///< Receiver pooling detection time in us. UINT32 LinkL0Pooling; ///< Pooling for link to get to L0 in us UINT32 LinkGpioResetAssertionTime; ///< Gpio reset assertion time in us diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c index b822294..8befb2c 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c @@ -183,7 +183,7 @@ GfxLocateConfigData ( IDS_ERROR_TRAP; return AGESA_FATAL; } - (*Gfx)->StdHeader = /* (PVOID) */(UINT32) StdHeader; + (*Gfx)->StdHeader = /* (PVOID) */(UINTN)StdHeader; return AGESA_SUCCESS; } diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c index 49fd4cb..f0fe7f8 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c @@ -113,7 +113,7 @@ GfxConfigPostInterface ( Gfx->GfxControllerMode = GfxControllerLegacyBridgeMode; Gfx->GfxPciAddress.AddressValue = MAKE_SBDFO (0, 1, 5, 0, 0); } - Gfx->StdHeader = /* (PVOID) */(UINT32) StdHeader; + Gfx->StdHeader = /* (PVOID) */(UINTN) StdHeader; Gfx->GnbHdAudio = PostParamsPtr->PlatformConfig.GnbHdAudio; Gfx->AbmSupport = PostParamsPtr->PlatformConfig.AbmSupport; Gfx->DynamicRefreshRate = PostParamsPtr->PlatformConfig.DynamicRefreshRate; diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c index 0719e52..f66fd9b4 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c @@ -432,7 +432,7 @@ PcieLocateConfigurationData ( IDS_ERROR_TRAP; return AGESA_FATAL; } - (*Pcie)->StdHeader = /* (PVOID) */ (UINT32)StdHeader; + (*Pcie)->StdHeader = /* (PVOID) */ (UINTN)StdHeader; PcieUpdateConfigurationData (*Pcie); return AGESA_SUCCESS; } diff --git a/src/vendorcode/amd/agesa/f16kb/Include/Ids.h b/src/vendorcode/amd/agesa/f16kb/Include/Ids.h index 69bb6da..53477cb 100644 --- a/src/vendorcode/amd/agesa/f16kb/Include/Ids.h +++ b/src/vendorcode/amd/agesa/f16kb/Include/Ids.h @@ -888,7 +888,7 @@ typedef enum { //vv- for debug reference only /// Function entry for HDT script to call typedef struct _SCRIPT_FUNCTION { - UINT32 FuncAddr; ///< Function address in ROM + UINTN FuncAddr; ///< Function address in ROM CHAR8 FuncName[40]; ///< Function name } SCRIPT_FUNCTION; diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionIdsInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionIdsInstall.h index b5a566f..fe87500 100644 --- a/src/vendorcode/amd/agesa/f16kb/Include/OptionIdsInstall.h +++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionIdsInstall.h @@ -74,29 +74,29 @@ CONST PF_HtIdsGetPortOverride ROMDATA pf_HtIdsGetPortOverride = M_HTIDS_PORT_OVE #if (AGESA_ENTRY_INIT_POST == TRUE) #include <mu.h> CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"}, - { (UINT32) MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"}, - { (UINT32) MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"} + { (UINTN) MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"}, + { (UINTN) MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"}, + { (UINTN) MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"} }; #elif (AGESA_ENTRY_INIT_RECOVERY == TRUE) #include <mru.h> CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) (UINT64) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"}, - { (UINT32) (UINT64) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"}, - { (UINT32) (UINT64) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"} + { (UINTN) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"}, + { (UINTN) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"}, + { (UINTN) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"} }; #else CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"}, - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"}, - { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"} + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"} }; #endif #else CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = { - { (UINT32) CommonReturnFalse, "DefRet()"}, - { (UINT32) CommonReturnFalse, "DefRet()"}, - { (UINT32) CommonReturnFalse, "DefRet()"} + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"}, + { (UINTN) CommonReturnFalse, "DefRet()"} }; #endif diff --git a/src/vendorcode/amd/agesa/f16kb/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f16kb/Include/gcc-intrin.h index 7d90f8b..9ae45c3 100644 --- a/src/vendorcode/amd/agesa/f16kb/Include/gcc-intrin.h +++ b/src/vendorcode/amd/agesa/f16kb/Include/gcc-intrin.h @@ -27,11 +27,11 @@ */ #if defined (__GNUC__) - +#include <stdint.h> /* I/O intrin functions. */ -static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint8_t __inbyte(uint16_t Port) { - unsigned char value; + uint8_t value; __asm__ __volatile__ ( "in %1, %0" @@ -42,9 +42,9 @@ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned return value; } -static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint16_t __inword(uint16_t Port) { - unsigned short value; + uint16_t value; __asm__ __volatile__ ( "in %1, %0" @@ -55,9 +55,9 @@ static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigne return value; } -static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigned short Port) +static __inline__ __attribute__((always_inline)) uint32_t __indword(uint16_t Port) { - unsigned long value; + uint32_t value; __asm__ __volatile__ ( "in %1, %0" @@ -68,7 +68,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne } -static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short Port,unsigned char Data) +static __inline__ __attribute__((always_inline)) void __outbyte(uint16_t Port,uint8_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -77,7 +77,7 @@ static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outword(unsigned short Port,unsigned short Data) +static __inline__ __attribute__((always_inline)) void __outword(uint16_t Port,uint16_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -86,7 +86,7 @@ static __inline__ __attribute__((always_inline)) void __outword(unsigned short P ); } -static __inline__ __attribute__((always_inline)) void __outdword(unsigned short Port,unsigned long Data) +static __inline__ __attribute__((always_inline)) void __outdword(uint16_t Port,uint32_t Data) { __asm__ __volatile__ ( "out %0, %1" @@ -95,7 +95,7 @@ static __inline__ __attribute__((always_inline)) void __outdword(unsigned short ); } -static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insb" @@ -104,7 +104,7 @@ static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __inwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insw" @@ -113,7 +113,7 @@ static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned sh ); } -static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __indwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; insl" @@ -122,7 +122,7 @@ static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsb" @@ -131,7 +131,7 @@ static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsw" @@ -140,7 +140,7 @@ static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned s ); } -static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count) +static __inline__ __attribute__((always_inline)) void __outdwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count) { __asm__ __volatile__ ( "rep ; outsl" @@ -525,7 +525,7 @@ static __inline__ __attribute__((always_inline)) void __lidt(void *Source) } static __inline__ __attribute__((always_inline)) void -__writefsbyte(const unsigned long Offset, const unsigned char Data) +__writefsbyte(const unsigned long Offset, const uint8_t Data) { __asm__ ("movb %[Data], %%fs:%a[Offset]" : @@ -533,7 +533,7 @@ __writefsbyte(const unsigned long Offset, const unsigned char Data) } static __inline__ __attribute__((always_inline)) void -__writefsword(const unsigned long Offset, const unsigned short Data) +__writefsword(const unsigned long Offset, const uint16_t Data) { __asm__ ("movw %[Data], %%fs:%a[Offset]" : @@ -541,14 +541,14 @@ __writefsword(const unsigned long Offset, const unsigned short Data) } static __inline__ __attribute__((always_inline)) void -__writefsdword(const unsigned long Offset, const unsigned long Data) +__writefsdword(const unsigned long Offset, const uint32_t Data) { __asm__ ("movl %[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data)); } -static __inline__ __attribute__((always_inline)) unsigned char +static __inline__ __attribute__((always_inline)) uint8_t __readfsbyte(const unsigned long Offset) { unsigned char value; @@ -558,7 +558,7 @@ __readfsbyte(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned short +static __inline__ __attribute__((always_inline)) uint16_t __readfsword(const unsigned long Offset) { unsigned short value; @@ -568,11 +568,11 @@ __readfsword(const unsigned long Offset) return value; } -static __inline__ __attribute__((always_inline)) unsigned long +static __inline__ __attribute__((always_inline)) uint32_t __readfsdword(unsigned long Offset) { unsigned long value; - __asm__ ("movl %%fs:%a[Offset], %[value]" + __asm__ ("mov %%fs:%a[Offset], %[value]" : [value] "=r" (value) : [Offset] "ir" (Offset)); return value; diff --git a/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/Dispatcher.c index 782a523..f41deda 100644 --- a/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/Dispatcher.c +++ b/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/Dispatcher.c @@ -82,8 +82,8 @@ AmdAgesaDispatcher ( IMAGE_ENTRY ImageEntry; MODULE_ENTRY ModuleEntry; DISPATCH_TABLE *Entry; - UINT32 ImageStart; - UINT32 ImageEnd; + UINTN ImageStart; + UINTN ImageEnd; CONST AMD_IMAGE_HEADER* AltImagePtr; Status = AGESA_UNSUPPORTED; @@ -104,7 +104,7 @@ AmdAgesaDispatcher ( // 2. Try next dispatcher if possible, and we have not already got status back if ((mCpuModuleID.NextBlock != NULL) && (Status == AGESA_UNSUPPORTED)) { - ModuleEntry = (MODULE_ENTRY) (UINT32) mCpuModuleID.NextBlock->ModuleDispatcher; + ModuleEntry = (MODULE_ENTRY) mCpuModuleID.NextBlock->ModuleDispatcher; if (ModuleEntry != NULL) { Status = (*ModuleEntry) (ConfigPtr); } @@ -116,10 +116,10 @@ AmdAgesaDispatcher ( ImageStart = ((AMD_CONFIG_PARAMS *)ConfigPtr)->AltImageBasePtr; ImageEnd = ImageStart + 4; // Locate/test image base that matches this component - AltImagePtr = LibAmdLocateImage ((VOID *) (UINT32)ImageStart, (VOID *) (UINT32)ImageEnd, 4096, (CHAR8 *) AGESA_ID); + AltImagePtr = LibAmdLocateImage ((VOID *)ImageStart, (VOID *)ImageEnd, 4096, (CHAR8 *) AGESA_ID); if (AltImagePtr != NULL) { //Invoke alternative Image - ImageEntry = (IMAGE_ENTRY) ((UINT32) AltImagePtr + AltImagePtr->EntryPointAddress); + ImageEntry = (IMAGE_ENTRY) ((UINTN) AltImagePtr + AltImagePtr->EntryPointAddress); Status = (*ImageEntry) (ConfigPtr); } } diff --git a/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/agesaCallouts.c b/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/agesaCallouts.c index 990c0a7..c00619f 100644 --- a/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/agesaCallouts.c +++ b/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/agesaCallouts.c @@ -436,7 +436,7 @@ AgesaFchOemCallout ( ) { AGESA_STATUS Status; - Status = AmdAgesaCallout(AGESA_FCH_OEM_CALLOUT, (UINT32)FchData, ((FCH_DATA_BLOCK *)FchData)->StdHeader); + Status = AmdAgesaCallout(AGESA_FCH_OEM_CALLOUT, (UINTN)FchData, ((FCH_DATA_BLOCK *)FchData)->StdHeader); return Status; } diff --git a/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/hobTransfer.c index 7f03e13..09e1256 100644 --- a/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/hobTransfer.c +++ b/src/vendorcode/amd/agesa/f16kb/Legacy/Proc/hobTransfer.c @@ -212,7 +212,7 @@ CopyHeapToTempRamAtPost ( TotalSize = sizeof (HEAP_MANAGER); SizeOfNodeData = 0; AlignTo16ByteInTempMem = 0; - BaseAddressInCache = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; + BaseAddressInCache = (UINT8 *)(UINTN) StdHeader->HeapBasePtr; HeapManagerInCache = (HEAP_MANAGER *) BaseAddressInCache; HeapInCacheOffset = HeapManagerInCache->FirstActiveBufferOffset; HeapInCache = (BUFFER_NODE *) (BaseAddressInCache + HeapInCacheOffset); @@ -315,8 +315,8 @@ CopyHeapToMainRamAtPost ( TotalSize = sizeof (HEAP_MANAGER); SizeOfNodeData = 0; AlignTo16ByteInMainMem = 0; - BaseAddressInTempMem = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; - HeapManagerInTempMem = (HEAP_MANAGER *)(UINT32) StdHeader->HeapBasePtr; + BaseAddressInTempMem = (UINT8 *) StdHeader->HeapBasePtr; + HeapManagerInTempMem = (HEAP_MANAGER *) StdHeader->HeapBasePtr; HeapInTempMemOffset = HeapManagerInTempMem->FirstActiveBufferOffset; HeapInTempMem = (BUFFER_NODE *) (BaseAddressInTempMem + HeapInTempMemOffset); diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index 5ce7aee..e233802 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -79,8 +79,11 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/RDWR2DTRAINING AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_64 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing + export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) CPPFLAGS_x86_32 += $(AGESA_INC) +CPPFLAGS_x86_64 += $(AGESA_INC) ####################################################################### diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatureLeveling.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatureLeveling.c index 6494c69..60b1bdd 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatureLeveling.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatureLeveling.c @@ -261,5 +261,5 @@ GetGlobalCpuFeatureListAddress ( AddressValue = GLOBAL_CPU_FEATURE_LIST_TEMP_ADDR; - *Address = (UINT64 *)(UINT32)(AddressValue); + *Address = (UINT64 *)(UINTN)(AddressValue); } diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c index 7feb3fa..4b6128e 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c @@ -215,7 +215,7 @@ SaveDeviceContext ( UINT64 EndAddress; VOID *OrMask; - StartAddress = (UINT64)(UINT32) DeviceList; + StartAddress = (UINTN) DeviceList; Device.CommonDeviceHeader = (DEVICE_DESCRIPTOR *) &DeviceList[1]; OrMask = (UINT8 *) DeviceList + DeviceList->RelativeOrMaskOffset; @@ -279,7 +279,7 @@ SaveDeviceContext ( break; } } - EndAddress = (UINT64)(UINT32) OrMask; + EndAddress = (UINTN) OrMask; *ActualBufferSize = (UINT32) (EndAddress - StartAddress); } diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPostInit.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPostInit.c index 605e0c4..f1217a3 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPostInit.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPostInit.c @@ -202,7 +202,7 @@ GetPstateGatherDataAddressAtPost ( AddressValue = P_STATE_DATA_GATHER_TEMP_ADDR; - *Ptr = (UINT64 *)(UINT32)(AddressValue); + *Ptr = (UINT64 *)(UINTN)(AddressValue); return AGESA_SUCCESS; } diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.c index 42a6afa..24ee886 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.c @@ -158,7 +158,7 @@ HeapManagerInit ( GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader); FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (CONST VOID **) &CacheInfoPtr, &Ignored, StdHeader); - HeapBufferPtr = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; + HeapBufferPtr = (UINT8 *)(UINTN) StdHeader->HeapBasePtr; // Check whether the heap manager is already initialized LibAmdMsrRead (AMD_MTRR_VARIABLE_HEAP_MASK, &MsrData, StdHeader); @@ -328,14 +328,14 @@ HeapAllocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } // Allocate @@ -473,14 +473,14 @@ HeapDeallocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfPreviousNode = AMD_HEAP_INVALID_HEAP_OFFSET; @@ -602,14 +602,14 @@ HeapLocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfCurrentNode = HeapManager->FirstActiveBufferOffset; CurrentNode = (BUFFER_NODE *) (BaseAddress + OffsetOfCurrentNode); diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdS3LateRestore.c b/src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdS3LateRestore.c index 5b30e55..093ab97 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdS3LateRestore.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdS3LateRestore.c @@ -119,7 +119,7 @@ AmdS3LateRestore ( ASSERT (S3LateParams != NULL); BufferPointer = (UINT8 *) S3LateParams->S3DataBlock.VolatileStorage; - S3LateParams->StdHeader.HeapBasePtr = (UINT32) &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset]; + S3LateParams->StdHeader.HeapBasePtr = (UINTN) &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset]; ASSERT (S3LateParams->StdHeader.HeapBasePtr != 0); IDS_HDT_CONSOLE_INIT (&S3LateParams->StdHeader); diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/Gnb.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/Gnb.h index c01fd5e..8261a3d 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/Gnb.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/Gnb.h @@ -75,7 +75,7 @@ #define OFF 0 -#define PVOID UINT32 +#define PVOID UINTN #define STRING_TO_UINT32(a, b, c, d) ((UINT32) ((d << 24) | (c << 16) | (b << 8) | a)) diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxSamuInitKB.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxSamuInitKB.c index 66cf992..91ee9cb 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxSamuInitKB.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxSamuInitKB.c @@ -189,8 +189,8 @@ GfxSamuInit ( // Load boot control structure SamuBootControl = (SAMU_BOOT_CONTROL *)AlignedControlXBuffer; SamuBootControl->BootControl = 0x3; - SamuBootControl->KernelAddrLo = (UINT32) (AlignedPatchYBuffer); - SamuBootControl->KernelAddrHi = 0; //(UINT32) ((((UINT64) AlignedPatchYBuffer) >> 32) & 0xFF); + SamuBootControl->KernelAddrLo = (UINTN)AlignedPatchYBuffer; + SamuBootControl->KernelAddrHi = ((((UINT64) AlignedPatchYBuffer) >> 32) & 0xFF); if (SamuUseF1dPatch == TRUE) { SamuBootControl->TweakSelect = 0xBB027E1F; SamuBootControl->KeySelect = 0x8E174F83; @@ -209,7 +209,7 @@ GfxSamuInit ( // Write (physical address of boot control structure)>>8 into SAM_SAB_INIT_TLB_CONFIG (Location X >> 8) GMMx22008 = 0x4; GnbRegisterWriteKB (GnbHandle, 0x12, 0x22008, &GMMx22008, 0, GnbLibGetHeader (Gfx)); - GMMx2200C = ((UINT32) ((UINT32) AlignedControlXBuffer)) >> 8; + GMMx2200C = ((UINTN) AlignedControlXBuffer) >> 8; GnbRegisterWriteKB (GnbHandle, 0x12, 0x2200C, &GMMx2200C, 0, GnbLibGetHeader (Gfx)); // Write 0x0 to SAM_RST_HOST_SOFT_RESET diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDpHdtout.c b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDpHdtout.c index bde0514..d4d2685 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDpHdtout.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDpHdtout.c @@ -252,14 +252,14 @@ AmdIdsHdtOutInit ( HdtoutHeader.DataIndex = 0; HdtoutHeader.PrintCtrl = HDTOUT_PRINTCTRL_ON; HdtoutHeader.NumBreakpointUnit = 0; - HdtoutHeader.FuncListAddr = (UINT32) IDS_FUNCLIST_ADDR; + HdtoutHeader.FuncListAddr = (UINTN)IDS_FUNCLIST_ADDR; HdtoutHeader.StatusStr[0] = 0; HdtoutHeader.OutBufferMode = HDTOUT_BUFFER_MODE_ON; HdtoutHeader.EnableMask = 0; HdtoutHeader.ConsoleFilter = IDS_DEBUG_PRINT_MASK; // Trigger HDTOUT breakpoint to get inputs from script - IdsOutPort (HDTOUT_INIT, (UINT32) &HdtoutHeader, 0); + IdsOutPort (HDTOUT_INIT, (UINTN) &HdtoutHeader, 0); // Disable AP HDTOUT if set BspOnlyFlag if (HdtoutHeader.BspOnlyFlag == HDTOUT_BSP_ONLY) { if (!IsBsp (StdHeader, &IgnoreSts)) { @@ -299,7 +299,7 @@ AmdIdsHdtOutInit ( } while ((HdtoutHeader.BufferSize & 0x8000) == 0); // If the buffer have been successfully allocated? if ((HdtoutHeader.BufferSize & 0x8000) == 0) { - LibAmdWriteCpuReg (DR3_REG, (UINT32) AllocHeapParams.BufferPtr); + LibAmdWriteCpuReg (DR3_REG, (UINTN)AllocHeapParams.BufferPtr); LibAmdMemCopy (AllocHeapParams.BufferPtr, &HdtoutHeader, sizeof (HdtoutHeader) - 2, StdHeader); } else { /// Clear DR3_REG @@ -327,7 +327,7 @@ AmdIdsHdtOutBufferFlush ( if (AmdIdsHdtoutGetHeader (&HdtoutHeaderPtr, StdHeader)) { if ((HdtoutHeaderPtr->PrintCtrl == HDTOUT_PRINTCTRL_ON) && (HdtoutHeaderPtr->OutBufferMode == HDTOUT_BUFFER_MODE_ON)) { - IdsOutPort (HDTOUT_PRINT, (UINT32) HdtoutHeaderPtr->Data, HdtoutHeaderPtr->DataIndex); + IdsOutPort (HDTOUT_PRINT, (UINTN)HdtoutHeaderPtr->Data, HdtoutHeaderPtr->DataIndex); HdtoutHeaderPtr->DataIndex = 0; } } @@ -355,10 +355,10 @@ AmdIdsHdtOutExitCoreTask ( if (AmdIdsHdtoutGetHeader (&HdtoutHeaderPtr, StdHeader)) { if ((HdtoutHeaderPtr->PrintCtrl == HDTOUT_PRINTCTRL_ON) && (HdtoutHeaderPtr->OutBufferMode == HDTOUT_BUFFER_MODE_ON)) { - IdsOutPort (HDTOUT_PRINT, (UINT32) HdtoutHeaderPtr->Data, HdtoutHeaderPtr->DataIndex); + IdsOutPort (HDTOUT_PRINT, (UINTN)HdtoutHeaderPtr->Data, HdtoutHeaderPtr->DataIndex); } } - IdsOutPort (HDTOUT_EXIT, (UINT32) HdtoutHeaderPtr, 0); + IdsOutPort (HDTOUT_EXIT, (UINTN)HdtoutHeaderPtr, 0); AmdIdsHdtOutRegisterRestore (StdHeader); diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index 2b56cd3..7ce625a 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -32,6 +32,11 @@ CPPFLAGS_x86_32 += -I$(src)/northbridge/amd/cimx/rd890 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/rd890 +CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_64 += -I$(src)/northbridge/amd/cimx/rd890 +CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/rd890 + romstage-y += amdAcpiIvrs.c romstage-y += amdAcpiLib.c romstage-y += amdAcpiMadt.c diff --git a/src/vendorcode/amd/cimx/sb700/ACPILIB.c b/src/vendorcode/amd/cimx/sb700/ACPILIB.c index 807b166..ebeb828 100644 --- a/src/vendorcode/amd/cimx/sb700/ACPILIB.c +++ b/src/vendorcode/amd/cimx/sb700/ACPILIB.c @@ -50,21 +50,21 @@ void* ACPI_LocateTable( UINT32 Signature ) { - UINT32 i; - UINT32* RsdPtr = (UINT32*)0xe0000; - UINT32* Rsdt = NULL; - DESCRIPTION_HEADER* CurrentTable; + UINT32 i; + UINT32 *RsdPtr = (UINT32 *)0xe0000; + UINT32 *Rsdt = NULL; + DESCRIPTION_HEADER *CurrentTable; do{ // if (*RsdPtr == ' DSR' && *(RsdPtr+1) == ' RTP'){ if ((*RsdPtr == Int32FromChar ('R', 'S', 'D', ' ')) && (*(RsdPtr+1) == Int32FromChar ('R', 'T', 'P', ' '))){ - Rsdt = (UINT32*)((RSDP*)RsdPtr)->RsdtAddress; + Rsdt = (UINT32 *)(uintptr_t)((RSDP *)RsdPtr)->RsdtAddress; break; } RsdPtr+=4; }while (RsdPtr <= (UINT32*)0xffff0); if(Rsdt != NULL && ACPI_GetTableChecksum(Rsdt)==0){ for (i = 0;i < (((DESCRIPTION_HEADER*)Rsdt)->Length - sizeof(DESCRIPTION_HEADER))/4;i++){ - CurrentTable = (DESCRIPTION_HEADER*)*(UINT32*)((UINT8*)Rsdt + sizeof(DESCRIPTION_HEADER) + i*4); + CurrentTable = (DESCRIPTION_HEADER*)(uintptr_t)*(UINT32*)((UINT8*)Rsdt + sizeof(DESCRIPTION_HEADER) + i*4); if (CurrentTable->Signature == Signature) return CurrentTable; } } diff --git a/src/vendorcode/amd/cimx/sb700/AMDLIB.c b/src/vendorcode/amd/cimx/sb700/AMDLIB.c index b233259..b9fea1a 100644 --- a/src/vendorcode/amd/cimx/sb700/AMDLIB.c +++ b/src/vendorcode/amd/cimx/sb700/AMDLIB.c @@ -186,7 +186,7 @@ UINT32 Data void ReadMEM ( -UINT32 Address, +UINTN Address, UINT8 OpFlag, void* Value ) @@ -201,7 +201,7 @@ void* Value void WriteMEM ( -UINT32 Address, +UINTN Address, UINT8 OpFlag, void* Value ) @@ -216,7 +216,7 @@ void* Value void RWMEM ( -UINT32 Address, +UINTN Address, UINT8 OpFlag, UINT32 Mask, UINT32 Data diff --git a/src/vendorcode/amd/cimx/sb700/AZALIA.c b/src/vendorcode/amd/cimx/sb700/AZALIA.c index cc72858..8659c1d 100644 --- a/src/vendorcode/amd/cimx/sb700/AZALIA.c +++ b/src/vendorcode/amd/cimx/sb700/AZALIA.c @@ -268,7 +268,7 @@ void configureAzaliaPinCmd (AMDSBCFG* pConfig, UINT32 ddBAR0, UINT8 dbChannelNum if ( ((pConfig->pAzaliaOemFpCodecTableptr) == NULL) || ((pConfig->pAzaliaOemFpCodecTableptr) == 0xFFFFFFFF)) tempAzaliaCodecEntryPtr = (CODECENTRY*) FIXUP_PTR(&FrontPanelAzaliaCodecTableList[0]); else - tempAzaliaCodecEntryPtr = (CODECENTRY*) pConfig->pAzaliaOemFpCodecTableptr; + tempAzaliaCodecEntryPtr = (CODECENTRY*)(uintptr_t) pConfig->pAzaliaOemFpCodecTableptr; configureAzaliaSetConfigD4Dword(tempAzaliaCodecEntryPtr, ddChannelNum, ddBAR0); } } diff --git a/src/vendorcode/amd/cimx/sb700/DISPATCHER.c b/src/vendorcode/amd/cimx/sb700/DISPATCHER.c index ae5f9b8..af0d45d 100644 --- a/src/vendorcode/amd/cimx/sb700/DISPATCHER.c +++ b/src/vendorcode/amd/cimx/sb700/DISPATCHER.c @@ -89,7 +89,7 @@ void DispatcherEntry(void *pConfig){ void* LocateImage(UINT32 Signature){ void *Result; UINT8 *ImagePtr = (UINT8*)(0xffffffff - (IMAGE_ALIGN-1)); - while ((UINT32)ImagePtr>=(0xfffffff - (NUM_IMAGE_LOCATION*IMAGE_ALIGN -1))){ + while ((UINTN)ImagePtr>=(0xfffffff - (NUM_IMAGE_LOCATION*IMAGE_ALIGN -1))){ Result = CheckImage(Signature,(void*)ImagePtr); if (Result != NULL) return Result; @@ -129,7 +129,7 @@ void saveConfigPointer(AMDSBCFG* pConfig){ UINT8 dbReg, i; UINT32 ddValue; - ddValue = ((UINT32) pConfig); + ddValue = ((UINTN) pConfig); dbReg = SB_ECMOS_REG08; for (i=0; i<=3; i++){ @@ -143,7 +143,7 @@ void saveConfigPointer(AMDSBCFG* pConfig){ AMDSBCFG* getConfigPointer(){ UINT8 dbReg, dbValue, i; - UINT32 ddValue=0; + UINTN ddValue=0; dbReg = SB_ECMOS_REG08; for (i=0; i<=3; i++){ diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index aed81c4..7604233 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -32,6 +32,11 @@ CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb700 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb700 +CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb700 +CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb700 + romstage-y += ACPILIB.c romstage-y += AMDLIB.c romstage-y += AMDSBLIB.c diff --git a/src/vendorcode/amd/cimx/sb700/SBDEF.h b/src/vendorcode/amd/cimx/sb700/SBDEF.h index 01fc1b5..184584b 100644 --- a/src/vendorcode/amd/cimx/sb700/SBDEF.h +++ b/src/vendorcode/amd/cimx/sb700/SBDEF.h @@ -52,9 +52,9 @@ void ReadIndexPCI32(UINT32 PciAddress,UINT32 IndexAddress,void* Value); void WriteIndexPCI32(UINT32 PciAddress,UINT32 IndexAddress,UINT8 OpFlag,void* Value); void RWIndexPCI32(UINT32 PciAddress,UINT32 IndexAddress,UINT8 OpFlag,UINT32 Mask,UINT32 Data); void RWIO (UINT16 Address, UINT8 OpFlag, UINT32 Mask, UINT32 Data); -void ReadMEM(UINT32 Address,UINT8 OpFlag, void* Value); -void WriteMEM(UINT32 Address,UINT8 OpFlag, void* Value); -void RWMEM(UINT32 Address,UINT8 OpFlag,UINT32 Mask,UINT32 Data); +void ReadMEM(UINTN Address,UINT8 OpFlag, void* Value); +void WriteMEM(UINTN Address,UINT8 OpFlag, void* Value); +void RWMEM(UINTN Address,UINT8 OpFlag,UINT32 Mask,UINT32 Data); UINT32 IsFamily10(void); UINT64 ReadMSR(UINT32 Address); void WriteMSR(UINT32 Address,UINT64 Value); diff --git a/src/vendorcode/amd/cimx/sb900/Hudson-2.h b/src/vendorcode/amd/cimx/sb900/Hudson-2.h index 0b9830e..f13f1f7 100644 --- a/src/vendorcode/amd/cimx/sb900/Hudson-2.h +++ b/src/vendorcode/amd/cimx/sb900/Hudson-2.h @@ -1986,9 +1986,9 @@ SB_MISC_REGF0 EQU 0F0h #define MAX_LT_POLLINGS 0x4000 -#define ACPIMMIO32(x) (*(unsigned int*)(unsigned int)(x)) -#define ACPIMMIO16(x) (*(unsigned short*)(unsigned int)(x)) -#define ACPIMMIO8(x) (*(unsigned char*)(unsigned int)(x)) +#define ACPIMMIO32(x) (*(unsigned int*)(uintptr_t)(x)) +#define ACPIMMIO16(x) (*(unsigned short*)(uintptr_t)(x)) +#define ACPIMMIO8(x) (*(unsigned char*)(uintptr_t)(x)) #ifdef XHCI_SUPPORT #define XHCI_ACPI_MMIO_AMD_REG00 0x00 diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index 8d753d1..5d42b54 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -22,6 +22,11 @@ CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb900 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb900 +CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb900 +CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb900 + romstage-y += AcpiLib.c romstage-y += Azalia.c romstage-y += Dispatcher.c diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index 9353b82..cbea348 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -64,6 +64,7 @@ AGESA_INC += -I$(src)/include AGESA_CFLAGS += -march=amdfam10 -mno-3dnow -fno-zero-initialized-in-bss -fno-strict-aliasing CFLAGS_x86_32 += $(AGESA_CFLAGS) +CFLAGS_x86_64 += $(AGESA_CFLAGS) export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) @@ -73,6 +74,7 @@ CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS) +CC_x86_64 := $(CC_x86_64) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### @@ -108,7 +110,12 @@ agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/imc/*.c) endif classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) $(eval $(call create_class_compiler,libagesa,x86_32)) +else +$(eval $(call create_class_compiler,libagesa,x86_64)) +endif agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file))))) agesa_obj_path := $(strip $(obj)/vendorcode/amd)

1 0

Patch set updated for coreboot: AMD mainboards: Fix 64bit BiosCallOuts.c
by Stefan Reinauer 31 Jul '15

31 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11080 -gerrit commit 8a1306a867a3b7d1b24ebca048da44750f0d6e99 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 11:16:37 2015 -0700 AMD mainboards: Fix 64bit BiosCallOuts.c Change-Id: I0f3297dff47dfb44da034ac6f305dcf1981b9de1 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/cpu/amd/agesa/heapmanager.c | 2 +- src/mainboard/amd/dinar/BiosCallOuts.c | 4 ++-- src/mainboard/amd/inagua/BiosCallOuts.c | 8 ++++---- src/mainboard/amd/olivehill/BiosCallOuts.c | 4 ++-- src/mainboard/amd/parmer/BiosCallOuts.c | 4 ++-- src/mainboard/amd/persimmon/BiosCallOuts.c | 8 ++++---- src/mainboard/amd/south_station/BiosCallOuts.c | 8 ++++---- src/mainboard/amd/thatcher/BiosCallOuts.c | 4 ++-- src/mainboard/amd/torpedo/BiosCallOuts.c | 8 ++++---- src/mainboard/amd/union_station/BiosCallOuts.c | 8 ++++---- src/mainboard/asrock/e350m1/BiosCallOuts.c | 4 ++-- src/mainboard/asrock/imb-a180/BiosCallOuts.c | 4 ++-- src/mainboard/asus/f2a85-m/BiosCallOuts.c | 4 ++-- src/mainboard/asus/f2a85-m_le/BiosCallOuts.c | 4 ++-- src/mainboard/bap/ode_e20XX/BiosCallOuts.c | 4 ++-- src/mainboard/biostar/am1ml/BiosCallOuts.c | 4 ++-- src/mainboard/gizmosphere/gizmo/BiosCallOuts.c | 4 ++-- src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c | 4 ++-- src/mainboard/hp/abm/BiosCallOuts.c | 4 ++-- src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c | 4 ++-- src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c | 8 ++++---- src/mainboard/lenovo/g505s/BiosCallOuts.c | 4 ++-- .../lippert/frontrunner-af/BiosCallOuts.c | 4 ++-- src/mainboard/lippert/toucan-af/BiosCallOuts.c | 4 ++-- src/mainboard/pcengines/apu1/BiosCallOuts.c | 8 ++++---- src/mainboard/supermicro/h8qgi/BiosCallOuts.c | 4 ++-- src/mainboard/tyan/s8226/BiosCallOuts.c | 4 ++-- src/northbridge/amd/agesa/BiosCallOuts.h | 22 +++++++++++----------- src/northbridge/amd/agesa/def_callouts.c | 18 +++++++++--------- 29 files changed, 87 insertions(+), 87 deletions(-) diff --git a/src/cpu/amd/agesa/heapmanager.c b/src/cpu/amd/agesa/heapmanager.c index eeff0a4..e6f1e5f 100644 --- a/src/cpu/amd/agesa/heapmanager.c +++ b/src/cpu/amd/agesa/heapmanager.c @@ -379,7 +379,7 @@ static AGESA_STATUS agesa_LocateBuffer(UINT32 Func, UINT32 Data, VOID *ConfigPtr } -AGESA_STATUS HeapManagerCallout(UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS HeapManagerCallout(UINT32 Func, UINTN Data, VOID *ConfigPtr) { if (Func == AGESA_LOCATE_BUFFER) return agesa_LocateBuffer(Func, Data, ConfigPtr); diff --git a/src/mainboard/amd/dinar/BiosCallOuts.c b/src/mainboard/amd/dinar/BiosCallOuts.c index 2f522e7..342c069 100644 --- a/src/mainboard/amd/dinar/BiosCallOuts.c +++ b/src/mainboard/amd/dinar/BiosCallOuts.c @@ -77,7 +77,7 @@ static void restore_socket(void) } #endif -static AGESA_STATUS board_ReadSpd (UINT32 Func,UINT32 Data,VOID *ConfigPtr); +static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -95,7 +95,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); -static AGESA_STATUS board_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; #ifdef __PRE_RAM__ diff --git a/src/mainboard/amd/inagua/BiosCallOuts.c b/src/mainboard/amd/inagua/BiosCallOuts.c index 5367257..6722314 100644 --- a/src/mainboard/amd/inagua/BiosCallOuts.c +++ b/src/mainboard/amd/inagua/BiosCallOuts.c @@ -25,8 +25,8 @@ #include <southbridge/amd/cimx/sb800/gpio_oem.h> #include <stdlib.h> -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -43,7 +43,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; @@ -126,7 +126,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config } /* PCIE slot reset control */ -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; diff --git a/src/mainboard/amd/olivehill/BiosCallOuts.c b/src/mainboard/amd/olivehill/BiosCallOuts.c index ca0becc..737be82 100644 --- a/src/mainboard/amd/olivehill/BiosCallOuts.c +++ b/src/mainboard/amd/olivehill/BiosCallOuts.c @@ -30,7 +30,7 @@ #endif #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -188,7 +188,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/amd/parmer/BiosCallOuts.c b/src/mainboard/amd/parmer/BiosCallOuts.c index 3b36d4e..52abcd9 100644 --- a/src/mainboard/amd/parmer/BiosCallOuts.c +++ b/src/mainboard/amd/parmer/BiosCallOuts.c @@ -30,7 +30,7 @@ #endif #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -188,7 +188,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/amd/persimmon/BiosCallOuts.c b/src/mainboard/amd/persimmon/BiosCallOuts.c index 11c67cd..067b03e 100644 --- a/src/mainboard/amd/persimmon/BiosCallOuts.c +++ b/src/mainboard/amd/persimmon/BiosCallOuts.c @@ -24,8 +24,8 @@ #include "SB800.h" #include <stdlib.h> -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -42,7 +42,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { // Unlike e.g. AMD Inagua, Persimmon is unable to vary the RAM voltage. // Make sure the right speed settings are selected. @@ -51,7 +51,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config } /* PCIE slot reset control */ -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; diff --git a/src/mainboard/amd/south_station/BiosCallOuts.c b/src/mainboard/amd/south_station/BiosCallOuts.c index cf2a506..b6d62c4 100644 --- a/src/mainboard/amd/south_station/BiosCallOuts.c +++ b/src/mainboard/amd/south_station/BiosCallOuts.c @@ -25,8 +25,8 @@ #include <southbridge/amd/cimx/sb800/gpio_oem.h> #include <stdlib.h> -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -43,7 +43,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; @@ -126,7 +126,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config } /* PCIE slot reset control */ -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; diff --git a/src/mainboard/amd/thatcher/BiosCallOuts.c b/src/mainboard/amd/thatcher/BiosCallOuts.c index 82452f5..4d61ed3 100644 --- a/src/mainboard/amd/thatcher/BiosCallOuts.c +++ b/src/mainboard/amd/thatcher/BiosCallOuts.c @@ -30,7 +30,7 @@ #endif #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -188,7 +188,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { FCH_RESET_DATA_BLOCK *FchParams = (FCH_RESET_DATA_BLOCK *)FchData; diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.c b/src/mainboard/amd/torpedo/BiosCallOuts.c index 0bda376..0358665 100644 --- a/src/mainboard/amd/torpedo/BiosCallOuts.c +++ b/src/mainboard/amd/torpedo/BiosCallOuts.c @@ -27,8 +27,8 @@ #include <stdlib.h> #include <southbridge/amd/cimx/sb700/gpio_oem.h> -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -46,7 +46,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; @@ -97,7 +97,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config } /* PCIE slot reset control */ -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; diff --git a/src/mainboard/amd/union_station/BiosCallOuts.c b/src/mainboard/amd/union_station/BiosCallOuts.c index cf2a506..b6d62c4 100644 --- a/src/mainboard/amd/union_station/BiosCallOuts.c +++ b/src/mainboard/amd/union_station/BiosCallOuts.c @@ -25,8 +25,8 @@ #include <southbridge/amd/cimx/sb800/gpio_oem.h> #include <stdlib.h> -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -43,7 +43,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; @@ -126,7 +126,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config } /* PCIE slot reset control */ -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; diff --git a/src/mainboard/asrock/e350m1/BiosCallOuts.c b/src/mainboard/asrock/e350m1/BiosCallOuts.c index 92ba7be..7ebf306 100644 --- a/src/mainboard/asrock/e350m1/BiosCallOuts.c +++ b/src/mainboard/asrock/e350m1/BiosCallOuts.c @@ -25,7 +25,7 @@ #include <stdlib.h> -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -41,7 +41,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINTN FcnData; diff --git a/src/mainboard/asrock/imb-a180/BiosCallOuts.c b/src/mainboard/asrock/imb-a180/BiosCallOuts.c index f409097..29a257b 100644 --- a/src/mainboard/asrock/imb-a180/BiosCallOuts.c +++ b/src/mainboard/asrock/imb-a180/BiosCallOuts.c @@ -28,7 +28,7 @@ #include "cbfs.h" #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -301,7 +301,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/asus/f2a85-m/BiosCallOuts.c b/src/mainboard/asus/f2a85-m/BiosCallOuts.c index 3c87658..efb3fe5 100644 --- a/src/mainboard/asus/f2a85-m/BiosCallOuts.c +++ b/src/mainboard/asus/f2a85-m/BiosCallOuts.c @@ -25,7 +25,7 @@ #include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h> #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -77,7 +77,7 @@ static const CODEC_TBL_LIST CodecTableList[] = * Configure platform specific Hudson device, * such Azalia, SATA, GEC, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/asus/f2a85-m_le/BiosCallOuts.c b/src/mainboard/asus/f2a85-m_le/BiosCallOuts.c index f69002b..8b1d879 100644 --- a/src/mainboard/asus/f2a85-m_le/BiosCallOuts.c +++ b/src/mainboard/asus/f2a85-m_le/BiosCallOuts.c @@ -25,7 +25,7 @@ #include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h> #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -77,7 +77,7 @@ static const CODEC_TBL_LIST CodecTableList[] = * Configure platform specific Hudson device, * such Azalia, SATA, GEC, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c index 953eb40..a94fc21 100644 --- a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c +++ b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c @@ -30,7 +30,7 @@ #endif #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -188,7 +188,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/biostar/am1ml/BiosCallOuts.c b/src/mainboard/biostar/am1ml/BiosCallOuts.c index 5f644e7..f409d9e 100644 --- a/src/mainboard/biostar/am1ml/BiosCallOuts.c +++ b/src/mainboard/biostar/am1ml/BiosCallOuts.c @@ -29,7 +29,7 @@ #include "cbfs.h" #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -110,7 +110,7 @@ static const CODEC_TBL_LIST CodecTableList[] = * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c b/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c index 99c819a..96afb5b 100644 --- a/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c +++ b/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c @@ -24,7 +24,7 @@ #include "SB800.h" #include <stdlib.h> -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -41,7 +41,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { // Unlike AMD/Inagua, this board is unable to vary the RAM voltage. // Make sure the right speed settings are selected. diff --git a/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c b/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c index 953eb40..a94fc21 100644 --- a/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c +++ b/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c @@ -30,7 +30,7 @@ #endif #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -188,7 +188,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/hp/abm/BiosCallOuts.c b/src/mainboard/hp/abm/BiosCallOuts.c index 7168d8e..61bae9b 100644 --- a/src/mainboard/hp/abm/BiosCallOuts.c +++ b/src/mainboard/hp/abm/BiosCallOuts.c @@ -28,7 +28,7 @@ #include "cbfs.h" #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -50,7 +50,7 @@ const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c b/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c index f5443ae..3572665 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c @@ -26,7 +26,7 @@ #include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h> #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -184,7 +184,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c index 1f14ad4..11935a4 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c +++ b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c @@ -26,8 +26,8 @@ #include <stdint.h> #include <stdlib.h> -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -44,7 +44,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { /* Unlike e.g. AMD Inagua, Persimmon is unable to vary the RAM voltage. * Make sure the right speed settings are selected. @@ -54,7 +54,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config } /* PCIE slot reset control */ -static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; uint32_t FcnData; diff --git a/src/mainboard/lenovo/g505s/BiosCallOuts.c b/src/mainboard/lenovo/g505s/BiosCallOuts.c index f5443ae..3572665 100644 --- a/src/mainboard/lenovo/g505s/BiosCallOuts.c +++ b/src/mainboard/lenovo/g505s/BiosCallOuts.c @@ -26,7 +26,7 @@ #include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h> #include <stdlib.h> -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -184,7 +184,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) * Configure platform specific Hudson device, * such Azalia, SATA, IMC etc. */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) +static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; diff --git a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c index cb81532..a0558d7 100644 --- a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c +++ b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c @@ -30,7 +30,7 @@ * Dedicated reset is not needed for the on-board Intel I210 GbE controller. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -47,7 +47,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { MEM_DATA_STRUCT *MemData = ConfigPtr; diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c index 95e8f2e..1404dcf 100644 --- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c +++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c @@ -31,7 +31,7 @@ * and it's not needed for the on-board Intel I210 GbE controller. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -48,7 +48,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { MEM_DATA_STRUCT *MemData = ConfigPtr; diff --git a/src/mainboard/pcengines/apu1/BiosCallOuts.c b/src/mainboard/pcengines/apu1/BiosCallOuts.c index 23ea05e..4da161b 100644 --- a/src/mainboard/pcengines/apu1/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu1/BiosCallOuts.c @@ -26,8 +26,8 @@ #include <stdlib.h> #include "gpio_ftns.h" -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); +static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -44,7 +44,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ -static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { // Unlike e.g. AMD Inagua, Persimmon is unable to vary the RAM voltage. // Make sure the right speed settings are selected. @@ -52,7 +52,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config return AGESA_SUCCESS; } -static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status = AGESA_UNSUPPORTED; #ifdef __PRE_RAM__ diff --git a/src/mainboard/supermicro/h8qgi/BiosCallOuts.c b/src/mainboard/supermicro/h8qgi/BiosCallOuts.c index 0d6f39c..52d7bd8 100644 --- a/src/mainboard/supermicro/h8qgi/BiosCallOuts.c +++ b/src/mainboard/supermicro/h8qgi/BiosCallOuts.c @@ -71,7 +71,7 @@ static void restore_socket(UINT8 original_value) } #endif -static AGESA_STATUS board_ReadSpd (UINT32 Func,UINT32 Data,VOID *ConfigPtr); +static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr); #include <stdlib.h> const BIOS_CALLOUT_STRUCT BiosCallouts[] = @@ -87,7 +87,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = }; const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); -static AGESA_STATUS board_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; #ifdef __PRE_RAM__ diff --git a/src/mainboard/tyan/s8226/BiosCallOuts.c b/src/mainboard/tyan/s8226/BiosCallOuts.c index 67ce92f..7fd4dad 100644 --- a/src/mainboard/tyan/s8226/BiosCallOuts.c +++ b/src/mainboard/tyan/s8226/BiosCallOuts.c @@ -80,7 +80,7 @@ static void restore_socket(UINT8 original_value) } #endif -static AGESA_STATUS board_ReadSpd (UINT32 Func,UINT32 Data, VOID *ConfigPtr); +static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -95,7 +95,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = }; const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); -static AGESA_STATUS board_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; #ifdef __PRE_RAM__ diff --git a/src/northbridge/amd/agesa/BiosCallOuts.h b/src/northbridge/amd/agesa/BiosCallOuts.h index e763b8c..78925d9 100644 --- a/src/northbridge/amd/agesa/BiosCallOuts.h +++ b/src/northbridge/amd/agesa/BiosCallOuts.h @@ -24,22 +24,22 @@ #include "Porting.h" #include "AGESA.h" -AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -AGESA_STATUS agesa_Reset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt); +AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS agesa_Reset (UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt); -AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr); -AGESA_STATUS HeapManagerCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS HeapManagerCallout (UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS GetBiosCallout (UINT32 Func, UINTN Data, VOID *ConfigPtr); typedef struct { UINT32 CalloutName; - AGESA_STATUS (*CalloutPtr) (UINT32 Func, UINT32 Data, VOID* ConfigPtr); + AGESA_STATUS (*CalloutPtr) (UINT32 Func, UINTN Data, VOID* ConfigPtr); } BIOS_CALLOUT_STRUCT; extern const BIOS_CALLOUT_STRUCT BiosCallouts[]; diff --git a/src/northbridge/amd/agesa/def_callouts.c b/src/northbridge/amd/agesa/def_callouts.c index c07c063..e53b94c 100644 --- a/src/northbridge/amd/agesa/def_callouts.c +++ b/src/northbridge/amd/agesa/def_callouts.c @@ -28,7 +28,7 @@ #include "BiosCallOuts.h" #include "dimmSpd.h" -AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS GetBiosCallout (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS status; UINTN i; @@ -48,17 +48,17 @@ AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return BiosCallouts[i].CalloutPtr (Func, Data, ConfigPtr); } -AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINTN Data, VOID *ConfigPtr) { return AGESA_UNSUPPORTED; } -AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINTN Data, VOID *ConfigPtr) { return AGESA_SUCCESS; } -AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINTN Data, VOID *ConfigPtr) { IDS_NV_ITEM *IdsPtr = ((IDS_CALLOUT_STRUCT *) ConfigPtr)->IdsNvPtr; if (Data == IDS_CALLOUT_INIT) @@ -66,7 +66,7 @@ AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return AGESA_SUCCESS; } -AGESA_STATUS agesa_Reset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesa_Reset (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; UINT8 Value; @@ -102,7 +102,7 @@ AGESA_STATUS agesa_Reset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return Status; } -AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status; @@ -114,7 +114,7 @@ AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINT32 Data, VOID *ConfigPtr) IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_RL) || \ IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB) /* FIXME: we would like GFX disable for fam14 too for headless systems. */ -AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt) +AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt) { GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt; pVbiosImageInfo->ImagePtr = cbfs_boot_map_with_leak( @@ -125,7 +125,7 @@ AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt } #endif -AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status = AGESA_UNSUPPORTED; #ifdef __PRE_RAM__ @@ -134,7 +134,7 @@ AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return Status; } -AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr) { AGESA_STATUS Status = AGESA_UNSUPPORTED; #ifdef __PRE_RAM__

1 0

Patch set updated for coreboot: break lots of boards
by Stefan Reinauer 31 Jul '15

31 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10594 -gerrit commit 2d4bd8c93c4f47c1a14be12681394f19257e5be9 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Thu Jun 18 22:05:13 2015 -0700 break lots of boards Enable 64bit compilation for AGESA boards :-) Change-Id: I8d3908557904f6dd27154e2a4b842c94974df81a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/cpu/amd/agesa/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index 282e1ed..45e1d63 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -27,10 +27,10 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_RL default y if CPU_AMD_AGESA_FAMILY16_KB default n - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 + select ARCH_BOOTBLOCK_X86_64 + select ARCH_VERSTAGE_X86_64 + select ARCH_ROMSTAGE_X86_64 + select ARCH_RAMSTAGE_X86_64 select TSC_SYNC_LFENCE select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER

1 0

Patch set updated for coreboot: f14: Increase AP stack to 8k on 64bit
by Stefan Reinauer 31 Jul '15

31 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11025 -gerrit commit 1b540d6b2f9eefcd5b0b2fbc95af7bf16cf28be2 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Tue Jul 21 14:37:13 2015 -0700 f14: Increase AP stack to 8k on 64bit This has been broken out from http://review.coreboot.org/#/c/10581/ Change-Id: Ia6153115ff75e21657fa8c244c9eb993d0d63772 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/vendorcode/amd/agesa/f14/gcccar.inc | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/vendorcode/amd/agesa/f14/gcccar.inc b/src/vendorcode/amd/agesa/f14/gcccar.inc index 2104c27..8f395ce 100644 --- a/src/vendorcode/amd/agesa/f14/gcccar.inc +++ b/src/vendorcode/amd/agesa/f14/gcccar.inc @@ -42,7 +42,11 @@ BSP_STACK_SIZE = 0x10000 /* 64KB for BSP core CORE0_STACK_BASE_ADDR = 0x80000 /* Base address for primary cores stack */ CORE0_STACK_SIZE = 0x4000 /* 16KB for primary cores */ CORE1_STACK_BASE_ADDR = 0x40000 /* Base address for AP cores */ +#ifdef __x86_64__ +CORE1_STACK_SIZE = 0x2000 /* 8KB for each AP cores */ +#else CORE1_STACK_SIZE = 0x1000 /* 4KB for each AP cores */ +#endif APIC_BASE_ADDRESS = 0x0000001B APIC_BSC = 8 /* Boot Strap Core */

1 0

Patch set updated for coreboot: ridiculously random ramblings
by Stefan Reinauer 31 Jul '15

31 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11090 -gerrit commit 3920e55a8647f82074396fa0af88565eeda56047 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 18:03:18 2015 -0700 ridiculously random ramblings Change-Id: Id5dea6420bee02a044dc488b5086d109e806d605 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/arch/x86/Makefile.inc | 2 +- src/cpu/x86/Makefile.inc | 6 +----- src/cpu/x86/smm/Makefile.inc | 12 ++---------- src/lib/Makefile.inc | 8 ++++---- 4 files changed, 8 insertions(+), 20 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index d5b320f..5188e6f 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -259,7 +259,7 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) target-objcopy=-O elf32-i386 -B i386 endif ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y) -target-objcopy=-O elf64-x86_64 -B x86_64 +target-objcopy=-O elf64-x86-64 -B i386:x86-64 endif define ramstage-objs_aml_template diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 9ec0768..fb9ea2d 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -30,8 +30,4 @@ $(SIPI_BIN): $(SIPI_RMOD) $(SIPI_BIN).ramstage.manual: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) - cd $(dir $@); $(OBJCOPY_rmodules_$(ARCH-ramstage-y)) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) -else - cd $(dir $@); $(OBJCOPY_rmodules_$(ARCH-ramstage-y)) -I binary $(notdir $<) -O elf64-x86_64 -B x86_64 $(notdir $@) -endif + cd $(dir $@); $(OBJCOPY_rmodules_$(ARCH-ramstage-y)) -I binary $(notdir $<) $(target-objcopy) $(notdir $@) diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 2e61018..adf9b38 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -38,11 +38,7 @@ $(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(COMPILER_RT_smm) # ELF symbol names. $(obj)/cpu/x86/smm/smm.ramstage.manual: $(obj)/cpu/x86/smm/smm @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) - cd $(dir $@); $(OBJCOPY_smm) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) -else - cd $(dir $@); $(OBJCOPY_smm) -I binary $(notdir $<) -O elf64-x86_64 -B x86_64 $(notdir $@) -endif + cd $(dir $@); $(OBJCOPY_smm) -I binary $(notdir $<) $(target-objcopy) $(notdir $@) ifeq ($(CONFIG_SMM_TSEG),y) @@ -72,11 +68,7 @@ $(obj)/cpu/x86/smm/smmstub: $(obj)/cpu/x86/smm/smmstub.elf.rmod $(obj)/cpu/x86/smm/smmstub.ramstage.manual: $(obj)/cpu/x86/smm/smmstub @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) - cd $(dir $@); $(OBJCOPY_smmstub) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) -else - cd $(dir $@); $(OBJCOPY_smmstub) -I binary $(notdir $<) -O elf64-x86_64 -B x86_64 $(notdir $@) -endif + cd $(dir $@); $(OBJCOPY_smmstub) -I binary $(notdir $<) $(target-objcopy) $(notdir $@) # C-based SMM handler. diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index bda7586..89a29d9 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -94,6 +94,7 @@ romstage-y += compute_ip_checksum.c ifeq ($(CONFIG_COMPILER_GCC),y) romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += gcc.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c +smm-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c endif romstage-$(CONFIG_GENERIC_UDELAY) += timer.c @@ -162,11 +163,10 @@ ramstage-y += region.c romstage-y += boot_device.c ramstage-y += boot_device.c -smm-y += region.c +smm-y += region.c mem_pool.c smm-y += boot_device.c -smm-y += fmap.c -smm-y += cbfs.c memcmp.c -smm-$(CONFIG_COMPILER_GCC) += gcc.c +smm-y += fmap.c memcmp.c +smm-y += cbfs.c bootblock-y += version.c romstage-y += version.c

1 0

Patch set updated for coreboot: acpi: 64bit fixes
by Stefan Reinauer 31 Jul '15

31 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11088 -gerrit commit 0ffc546dee12141fa01f7043629c727d71e264a7 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 16:28:13 2015 -0700 acpi: 64bit fixes Change-Id: I5d0c95af7d35115b5ac4141489caceef4ee1c8bb Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/arch/x86/acpi.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index 134e437..2194c48 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -1051,13 +1051,13 @@ void *acpi_find_wakeup_vector(void) return NULL; printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp); - rsdt = (acpi_rsdt_t *) rsdp->rsdt_address; + rsdt = (acpi_rsdt_t *)(uintptr_t)rsdp->rsdt_address; end = (char *)rsdt + rsdt->header.length; printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end); for (i = 0; ((char *)&rsdt->entry[i]) < end; i++) { - fadt = (acpi_fadt_t *)rsdt->entry[i]; + fadt = (acpi_fadt_t *)(uintptr_t)rsdt->entry[i]; if (strncmp((char *)fadt, "FACP", 4) == 0) break; fadt = NULL; @@ -1067,7 +1067,7 @@ void *acpi_find_wakeup_vector(void) return NULL; printk(BIOS_DEBUG, "FADT found at %p\n", fadt); - facs = (acpi_facs_t *)fadt->firmware_ctrl; + facs = (acpi_facs_t *)(uintptr_t)fadt->firmware_ctrl; if (facs == NULL) { printk(BIOS_DEBUG, "No FACS found, wake up from S3 not " @@ -1076,7 +1076,7 @@ void *acpi_find_wakeup_vector(void) } printk(BIOS_DEBUG, "FACS found at %p\n", facs); - wake_vec = (void *)facs->firmware_waking_vector; + wake_vec = (void *)(uintptr_t)facs->firmware_waking_vector; printk(BIOS_DEBUG, "OS waking vector is %p\n", wake_vec); return wake_vec; @@ -1090,7 +1090,7 @@ extern int lowmem_backup_size; #define WAKEUP_BASE 0x600 -void (*acpi_do_wakeup)(u32 vector, u32 backup_source, u32 backup_target, +void (*acpi_do_wakeup)(uintptr_t vector, u32 backup_source, u32 backup_target, u32 backup_size) asmlinkage = (void *)WAKEUP_BASE; extern unsigned char __wakeup; @@ -1098,10 +1098,10 @@ extern unsigned int __wakeup_size; void acpi_jump_to_wakeup(void *vector) { - u32 acpi_backup_memory = 0; + uintptr_t acpi_backup_memory = 0; if (HIGH_MEMORY_SAVE && acpi_s3_resume_allowed()) { - acpi_backup_memory = (u32)cbmem_find(CBMEM_ID_RESUME); + acpi_backup_memory = (uintptr_t)cbmem_find(CBMEM_ID_RESUME); if (!acpi_backup_memory) { printk(BIOS_WARNING, "ACPI: Backup memory missing. " @@ -1124,7 +1124,7 @@ void acpi_jump_to_wakeup(void *vector) timestamp_add_now(TS_ACPI_WAKE_JUMP); - acpi_do_wakeup((u32)vector, acpi_backup_memory, CONFIG_RAMBASE, + acpi_do_wakeup((uintptr_t)vector, acpi_backup_memory, CONFIG_RAMBASE, HIGH_MEMORY_SAVE); } #endif

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Patch set updated for coreboot: smm: 64bit fixes
by Stefan Reinauer 31 Jul '15

31 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11089 -gerrit commit 1c2405f26bb547fea2240ae386e9879262bce9af Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 16:28:44 2015 -0700 smm: 64bit fixes Change-Id: I35dab4e66514948aafa912d993fb8d42c5a520a0 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/cpu/x86/smm/Makefile.inc | 8 ++++++++ src/cpu/x86/smm/smihandler.c | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 239689e..2e61018 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -61,14 +61,22 @@ $(obj)/cpu/x86/smm/smmstub.o: $$(smmstub-objs) $(CC_smmstub) $(CFLAGS_smmstub) -nostdlib -r -o $@ $^ # Link the SMM stub module with a 0-byte heap. +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smmstub.elf, $(obj)/cpu/x86/smm/smmstub.o, 0,x86_32)) +else +$(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smmstub.elf, $(obj)/cpu/x86/smm/smmstub.o, 0,x86_64)) +endif $(obj)/cpu/x86/smm/smmstub: $(obj)/cpu/x86/smm/smmstub.elf.rmod $(OBJCOPY_smmstub) -O binary $< $@ $(obj)/cpu/x86/smm/smmstub.ramstage.manual: $(obj)/cpu/x86/smm/smmstub @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) cd $(dir $@); $(OBJCOPY_smmstub) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) +else + cd $(dir $@); $(OBJCOPY_smmstub) -I binary $(notdir $<) -O elf64-x86_64 -B x86_64 $(notdir $@) +endif # C-based SMM handler. diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index 9c282c3..295e5a8 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -109,7 +109,7 @@ static void smi_restore_pci_address(void) outl(pci_orig, 0xcf8); } -static inline void *smm_save_state(u32 base, int arch_offset, int node) +static inline void *smm_save_state(uintptr_t base, int arch_offset, int node) { base += SMM_SAVE_STATE_BEGIN(arch_offset) - (node * 0x400); return (void *)base;

1 0

New patch to review for coreboot: what-jenkins-does: Add building chromeos configurations
by Patrick Georgi 31 Jul '15

31 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11104 -gerrit commit 7e57585355406d42769fc7e359659c86e389d0fe Author: Patrick Georgi <pgeorgi(a)google.com> Date: Fri Jul 31 16:40:05 2015 +0200 what-jenkins-does: Add building chromeos configurations This prevents us from inadvertedly breaking Chrome OS' configurations. They're built in addition to the normal configurations for each boards, to accomodate all use cases on these devices. Change-Id: I772a47dca8815f47c12f6fd4405ae28c7c997aa8 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Makefile.inc b/Makefile.inc index ef9b522..29b5b15 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -683,6 +683,8 @@ $(obj)/board_id: JENKINS_PAYLOAD?=none CPUS?=4 what-jenkins-does: + util/abuild/abuild -B -J $(if $(JENKINS_NOCCACHE),,-y) -c $(CPUS) -z -p $(JENKINS_PAYLOAD) -x + -mv abuild.xml abuild-chromeos.xml util/abuild/abuild -B -J $(if $(JENKINS_NOCCACHE),,-y) -c $(CPUS) -z -p $(JENKINS_PAYLOAD) (cd payloads/libpayload; unset COREBOOT_BUILD_DIR; $(MAKE) $(if $(JENKINS_NOCCACHE),,CONFIG_LP_CCACHE=y) V=$(V) Q=$(Q) junit.xml) $(MAKE) V=$(V) Q=$(Q) -C util/cbmem junit.xml

1 0

New patch to review for coreboot: broadcom/cygnus: returning from verstage without having one is useless
by Patrick Georgi 31 Jul '15

31 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11103 -gerrit commit c0747ebca405bcf4e77720579826fb7c7beb902b Author: Patrick Georgi <pgeorgi(a)google.com> Date: Fri Jul 31 17:39:03 2015 +0200 broadcom/cygnus: returning from verstage without having one is useless Change-Id: I488b74b73a7654e97958a80fa7c83258fea3e959 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- src/soc/broadcom/cygnus/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/broadcom/cygnus/Kconfig b/src/soc/broadcom/cygnus/Kconfig index e6da57c..7ab305c 100644 --- a/src/soc/broadcom/cygnus/Kconfig +++ b/src/soc/broadcom/cygnus/Kconfig @@ -29,6 +29,7 @@ config SOC_BROADCOM_CYGNUS select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select HAS_PRECBMEM_TIMESTAMP_REGION + select SEPARATE_VERSTAGE select RETURN_FROM_VERSTAGE select GENERIC_GPIO_LIB

1 0

Patch merged into coreboot/master: secimage: Don't link in gmp library
by gerrit＠coreboot.org 31 Jul '15

31 Jul '15

the following patch was just integrated into master: commit 1db856d08aecdb3a5fb76ddee7918afc1964b395 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 16:26:00 2015 -0700 secimage: Don't link in gmp library secimage does not use libgmp, so don't link it in. (Otherwise linking fails if the library is not installed) Change-Id: I24af21c7754ecd0109f3e86669fa34fa6991d7fe Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/11079 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11079 for details. -gerrit

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coreboot-gerrit July 2015