Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8945
-gerrit
commit e0e2c76b08de962fa0955b3c62ee14e50347f4af
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Tue Mar 24 10:48:03 2015 -0500
coreboot: used tiered imd for imd-based cbmem
The tiered imd support allows for packing small allocations
in a single imd region. This removes internal fragmentation
for small object allocations within cbmem.
Change-Id: I010fdf8997df56d950bee74c97c13d338d18354f
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/lib/imd_cbmem.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c
index 2b7156d..e683a35 100644
--- a/src/lib/imd_cbmem.c
+++ b/src/lib/imd_cbmem.c
@@ -31,6 +31,9 @@
/* The root region is at least DYN_CBMEM_ALIGN_SIZE . */
#define ROOT_MIN_SIZE DYN_CBMEM_ALIGN_SIZE
+/* Small allocation parameters. */
+#define SM_ROOT_SIZE 1024
+#define SM_ALIGN 32
static struct imd imd_cbmem CAR_GLOBAL = { };
@@ -59,7 +62,8 @@ void cbmem_initialize_empty(void)
printk(BIOS_DEBUG, "CBMEM: ");
- if (imd_create_empty(imd, DYN_CBMEM_ALIGN_SIZE, DYN_CBMEM_ALIGN_SIZE))
+ if (imd_create_tiered_empty(imd, DYN_CBMEM_ALIGN_SIZE,
+ DYN_CBMEM_ALIGN_SIZE, SM_ROOT_SIZE, SM_ALIGN))
return;
/* Complete migration to CBMEM. */
Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8986
-gerrit
commit 24b4944b5c634832387a0fd8af0c5c22c7236515
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Tue Mar 24 11:33:03 2015 -0500
baytrail: select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
This platform supports PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
in that CAR region can be migrated and the data can be maintained
across the CAR tear down boundary.
Change-Id: I232613ebb641eb9d8fc61af4ba8d2e9b66ec5e51
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/soc/intel/baytrail/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 214a1ac..fbd2b01 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -21,6 +21,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
+ select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
select PARALLEL_MP
Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8984
-gerrit
commit 2d102cec2d04b5816d618e9812734876860bad64
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Mar 25 10:44:53 2015 -0500
broadwell: select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
This platform supports PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
in that CAR region can be migrated and the data can be maintained
across the CAR tear down boundary.
Change-Id: Iff3372fabc684bf8742e8f7fbfde9fbc105a7aa7
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/soc/intel/broadwell/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index c147663..c81fa6e 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
select IOAPIC
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
+ select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
select REG_SCRIPT
Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8835
-gerrit
commit e7eeb423ab35196961950bef43b8d868de3e2f7c
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Fri Mar 20 10:58:41 2015 -0500
loading: move ramstage cache function declarations
The functions related to caching ramstage were in cbfs.h.
Now that the loading code is separate move those declarations
to the common program_loading.h.
Change-Id: Ib22ef8a9c66e1d2b53388bceb8386baa6302d28b
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/include/cbfs.h | 38 --------------------------------------
src/include/program_loading.h | 36 ++++++++++++++++++++++++++++++++++++
src/lib/ramstage_cache.c | 2 +-
3 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/src/include/cbfs.h b/src/include/cbfs.h
index 2db3c94..c0e3d80 100644
--- a/src/include/cbfs.h
+++ b/src/include/cbfs.h
@@ -79,43 +79,5 @@ int run_address(void *f);
/* Defined in individual arch / board implementation. */
int init_default_cbfs_media(struct cbfs_media *media);
-#if defined(__PRE_RAM__)
-struct romstage_handoff;
-struct cbmem_entry;
-
-#if CONFIG_RELOCATABLE_RAMSTAGE && defined(__PRE_RAM__)
-/* The cache_loaded_ramstage() and load_cached_ramstage() functions are defined
- * to be weak so that board and chipset code may override them. Their job is to
- * cache and load the ramstage for quick S3 resume. By default a copy of the
- * relocated ramstage is saved using the cbmem infrastructure. These
- * functions are only valid during romstage. */
-
-/* The implementer of cache_loaded_ramstage() may use the romstage_handoff
- * structure to store information, but note that the handoff variable can be
- * NULL. The ramstage cbmem_entry represents the region occupied by the loaded
- * ramstage. */
-void cache_loaded_ramstage(struct romstage_handoff *handoff,
- const struct cbmem_entry *ramstage, void *entry_point);
-/* Return NULL on error or entry point on success. The ramstage cbmem_entry is
- * the region where to load the cached contents to. */
-void * load_cached_ramstage(struct romstage_handoff *handoff,
- const struct cbmem_entry *ramstage);
-#else /* CONFIG_RELOCATABLE_RAMSTAGE */
-
-static inline void cache_loaded_ramstage(struct romstage_handoff *handoff,
- const struct cbmem_entry *ramstage, void *entry_point)
-{
-}
-
-static inline void *
-load_cached_ramstage(struct romstage_handoff *handoff,
- const struct cbmem_entry *ramstage)
-{
- return NULL;
-}
-
-#endif /* CONFIG_RELOCATABLE_RAMSTAGE */
-#endif /* defined(__PRE_RAM__) */
-
#endif
diff --git a/src/include/program_loading.h b/src/include/program_loading.h
index 21d2c1e..e071db9 100644
--- a/src/include/program_loading.h
+++ b/src/include/program_loading.h
@@ -40,8 +40,44 @@ void run_romstage(void);
* RAMSTAGE LOADING *
************************/
+struct romstage_handoff;
struct cbmem_entry;
+#if defined(__PRE_RAM__)
+#if CONFIG_RELOCATABLE_RAMSTAGE
+/* The cache_loaded_ramstage() and load_cached_ramstage() functions are defined
+ * to be weak so that board and chipset code may override them. Their job is to
+ * cache and load the ramstage for quick S3 resume. By default a copy of the
+ * relocated ramstage is saved using the cbmem infrastructure. These
+ * functions are only valid during romstage. */
+
+/* The implementer of cache_loaded_ramstage() may use the romstage_handoff
+ * structure to store information, but note that the handoff variable can be
+ * NULL. The ramstage cbmem_entry represents the region occupied by the loaded
+ * ramstage. */
+void cache_loaded_ramstage(struct romstage_handoff *handoff,
+ const struct cbmem_entry *ramstage, void *entry_point);
+/* Return NULL on error or entry point on success. The ramstage cbmem_entry is
+ * the region where to load the cached contents to. */
+void * load_cached_ramstage(struct romstage_handoff *handoff,
+ const struct cbmem_entry *ramstage);
+#else /* CONFIG_RELOCATABLE_RAMSTAGE */
+
+static inline void cache_loaded_ramstage(struct romstage_handoff *handoff,
+ const struct cbmem_entry *ramstage, void *entry_point)
+{
+}
+
+static inline void *
+load_cached_ramstage(struct romstage_handoff *handoff,
+ const struct cbmem_entry *ramstage)
+{
+ return NULL;
+}
+
+#endif /* CONFIG_RELOCATABLE_RAMSTAGE */
+#endif /* defined(__PRE_RAM__) */
+
/* Run ramstage from romstage. */
void run_ramstage(void);
diff --git a/src/lib/ramstage_cache.c b/src/lib/ramstage_cache.c
index 814d807..d61f1c1 100644
--- a/src/lib/ramstage_cache.c
+++ b/src/lib/ramstage_cache.c
@@ -19,8 +19,8 @@
#include <stddef.h>
#include <string.h>
-#include <cbfs.h>
#include <console/console.h>
+#include <program_loading.h>
#include <ramstage_cache.h>
#include <romstage_handoff.h>