coreboot-gerrit March 2015

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: 0c8bb1f haswell: select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8985 -gerrit commit 0c8bb1f9d44cf316122e91be7d5dbedf17213a97 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed Mar 25 10:45:20 2015 -0500 haswell: select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS This platform supports PLATFORM_HAS_EARLY_WRITABLE_GLOBALS in that CAR region can be migrated and the data can be maintained across the CAR tear down boundary. Change-Id: If131e26b719828647b9fe66f30fc0c87dbcb185f Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/intel/haswell/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 741b677..7352c63 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_CONSTANT_RATE select SMM_TSEG select SMM_MODULES + select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS select RELOCATABLE_MODULES select RELOCATABLE_RAMSTAGE select SUPPORT_CPU_UCODE_IN_CBFS

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Patch set updated for coreboot: 53302da payload loading: remove passing of struct payload
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8836 -gerrit commit 53302da029c79bb17032d370ce329db19d32f785 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 20 10:20:15 2015 -0500 payload loading: remove passing of struct payload There's no need to keep track of struct payload within the boot state machine. It is completely contained within the payload loader module. Change-Id: I16fcecf43d7fb41fc311955fdb82eabbd5c96b11 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/program_loading.h | 9 +++------ src/lib/hardwaremain.c | 14 ++------------ src/lib/loaders/load_and_run_payload.c | 16 +++++++--------- 3 files changed, 12 insertions(+), 27 deletions(-) diff --git a/src/include/program_loading.h b/src/include/program_loading.h index e071db9..ca61c16 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -104,14 +104,11 @@ struct payload { void *entry; }; -/* - * Load payload into memory and return pointer to payload structure. Returns - * NULL on error. - */ -struct payload *payload_load(void); +/* Load payload into memory in preparation to run. */ +void payload_load(void); /* Run the loaded payload. */ -void payload_run(const struct payload *payload); +void payload_run(void); /* Mirror the payload to be loaded. */ void mirror_payload(struct payload *payload); diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 1091c00..83bc7be 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -227,26 +227,16 @@ static boot_state_t bs_write_tables(void *arg) static boot_state_t bs_payload_load(void *arg) { - struct payload *payload; - timestamp_add_now(TS_LOAD_PAYLOAD); - payload = payload_load(); - - if (! payload) - die("Could not load payload\n"); - - /* Pass the payload to the next state. */ - boot_states[BS_PAYLOAD_BOOT].arg = payload; + payload_load(); return BS_PAYLOAD_BOOT; } static boot_state_t bs_payload_boot(void *arg) { - struct payload *payload = arg; - - payload_run(payload); + payload_run(); printk(BIOS_EMERG, "Boot failed"); /* Returning from this state will fail because the following signals diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 4bb29c1..89b6da6 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -44,7 +44,7 @@ void __attribute__((weak)) mirror_payload(struct payload *payload) return; } -struct payload *payload_load(void) +void payload_load(void) { int i; void *entry; @@ -65,24 +65,22 @@ struct payload *payload_load(void) } if (i == ARRAY_SIZE(payload_ops)) - return NULL; + goto out; mirror_payload(payload); entry = selfload(payload); - if (entry == NULL) - return NULL; - payload->entry = entry; - return payload; +out: + if (payload->entry == NULL) + die("Payload not loaded.\n"); } -void payload_run(const struct payload *payload) +void payload_run(void) { - if (payload == NULL) - return; + const struct payload *payload = &global_payload; /* Reset to booting from this image as late as possible */ boot_successful();

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Patch set updated for coreboot: 7b0a8f0 coreboot: common stage cache
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8625 -gerrit commit 7b0a8f0bb68b5a907f75da69f15bf89f75b19abf Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 6 23:17:33 2015 -0600 coreboot: common stage cache Many chipsets were using a stage cache for reference code or when using a relocatable ramstage. Provide a common API for the chipsets to use while reducing code duplication. Change-Id: Ia36efa169fe6bd8a3dbe07bf57a9729c7edbdd46 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/intel/haswell/romstage.c | 26 +++--- src/include/cbfs.h | 3 +- src/include/cbmem.h | 2 + src/include/program_loading.h | 14 +-- src/include/ramstage_cache.h | 53 ----------- src/include/romstage_handoff.h | 4 - src/include/stage_cache.h | 49 +++++++++++ src/lib/Makefile.inc | 9 ++ src/lib/cbmem_stage_cache.c | 71 +++++++++++++++ src/lib/ext_stage_cache.c | 120 +++++++++++++++++++++++++ src/lib/loaders/load_and_run_ramstage.c | 21 ++--- src/lib/ramstage_cache.c | 132 +++------------------------- src/soc/intel/baytrail/refcode.c | 59 ++----------- src/soc/intel/baytrail/romstage/raminit.c | 17 ++-- src/soc/intel/baytrail/romstage/romstage.c | 6 +- src/soc/intel/baytrail/stage_cache.c | 6 +- src/soc/intel/broadwell/refcode.c | 59 ++----------- src/soc/intel/broadwell/romstage/raminit.c | 13 ++- src/soc/intel/broadwell/romstage/romstage.c | 5 +- src/soc/intel/broadwell/stage_cache.c | 6 +- 20 files changed, 342 insertions(+), 333 deletions(-) diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 50150cf..b8c455b 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <string.h> +#include <cbfs.h> #include <cbmem.h> #include <console/console.h> #include <arch/cpu.h> @@ -33,9 +34,9 @@ #include <device/pci_def.h> #include <cpu/x86/lapic.h> #include <cbfs.h> -#include <ramstage_cache.h> #include <romstage_handoff.h> #include <reset.h> +#include <stage_cache.h> #include <vendorcode/google/chromeos/chromeos.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include <ec/google/chromeec/ec.h> @@ -256,13 +257,17 @@ void romstage_common(const struct romstage_params *params) if (!wake_from_s3) { cbmem_initialize_empty(); + stage_cache_create_empty(); /* Save data returned from MRC on non-S3 resumes. */ save_mrc_data(params->pei_data); - } else if (cbmem_initialize()) { - #if CONFIG_HAVE_ACPI_RESUME - /* Failed S3 resume, reset to come up cleanly */ - reset_system(); - #endif + } else { + stage_cache_recover(); + if (cbmem_initialize()) { + #if CONFIG_HAVE_ACPI_RESUME + /* Failed S3 resume, reset to come up cleanly */ + reset_system(); + #endif + } } handoff = romstage_handoff_find_or_add(); @@ -307,18 +312,17 @@ void romstage_after_car(void) } -#if CONFIG_RELOCATABLE_RAMSTAGE -#include <ramstage_cache.h> +#if IS_ENABLED(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) -struct ramstage_cache *ramstage_cache_location(long *size) +void stage_cache_external_region(void **base, size_t *size) { /* The ramstage cache lives in the TSEG region at RESERVED_SMM_OFFSET. * The top of ram is defined to be the TSEG base address. */ *size = RESERVED_SMM_SIZE; - return (void *)((uint32_t)cbmem_top() + RESERVED_SMM_OFFSET); + *base = (void *)((uint32_t)cbmem_top() + RESERVED_SMM_OFFSET); } -void ramstage_cache_invalid(struct ramstage_cache *cache) +void ramstage_cache_invalid(void) { #if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE reset_system(); diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 6d9fc40..2478c4c 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> - * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * Copyright (C) 2013-2015 Google, Inc. * * This file is dual-licensed. You can choose between: * - The GNU GPL, version 2, as published by the Free Software Foundation @@ -83,4 +83,3 @@ int run_address(void *f); int init_default_cbfs_media(struct cbfs_media *media); #endif - diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 421e746..cb1cda9 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -78,6 +78,8 @@ #define CBMEM_ID_HOB_POINTER 0x484f4221 #define CBMEM_ID_IMD_ROOT 0xff4017ff #define CBMEM_ID_IMD_SMALL 0x53a11439 +#define CBMEM_ID_STAGEx_META 0x57a9e000 +#define CBMEM_ID_STAGEx_CACHE 0x57a9e100 #ifndef __ASSEMBLER__ #include <stddef.h> diff --git a/src/include/program_loading.h b/src/include/program_loading.h index 0261b59..9d64721 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -127,18 +127,12 @@ void run_romstage(void); /* Run ramstage from romstage. */ void run_ramstage(void); -struct romstage_handoff; -#if IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE) /* Cache the loaded ramstage described by prog. */ -void cache_loaded_ramstage(struct romstage_handoff *, struct prog *p); +void cache_loaded_ramstage(struct prog *p); /* Load ramstage from cache filling in struct prog. */ -void load_cached_ramstage(struct romstage_handoff *h, struct prog *p); -#else -static inline void cache_loaded_ramstage(struct romstage_handoff *h, - struct prog *p) {} -static inline void load_cached_ramstage(struct romstage_handoff *h, - struct prog *p) {} -#endif +void load_cached_ramstage(struct prog *p); +/* Called when the stage cache couldn't load ramstage on resume. */ +void ramstage_cache_invalid(void); /*********************** * PAYLOAD LOADING * diff --git a/src/include/ramstage_cache.h b/src/include/ramstage_cache.h deleted file mode 100644 index 8d9b095..0000000 --- a/src/include/ramstage_cache.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _RAMSTAGE_CACHE_ -#define _RAMSTAGE_CACHE_ - -#include <stddef.h> -#include <stdint.h> - -/* This structure is saved along with the relocated ramstage program when - * CONFIG_RELOCATED_RAMSTAGE is employed. For x86, it can used to protect - * the integrity of the ramstage program on S3 resume by saving a copy of - * the relocated ramstage in SMM space with the assumption that the SMM region - * cannot be altered from the OS. The magic value just serves as a quick sanity - * check. */ - -#define RAMSTAGE_CACHE_MAGIC 0xf3c3a02a - -struct ramstage_cache { - uint32_t magic; - uint32_t entry_point; - uint32_t load_address; - uint32_t size; - char program[0]; -} __attribute__((packed)); - -/* Chipset/Board function for obtaining cache location and size. */ -struct ramstage_cache *ramstage_cache_location(long *size); -/* Chipset/Board function called when cache is invalid on resume. */ -void ramstage_cache_invalid(struct ramstage_cache *cache); - -static inline int ramstage_cache_is_valid(const struct ramstage_cache *c) -{ - return (c != NULL && c->magic == RAMSTAGE_CACHE_MAGIC); -} - -#endif /* _RAMSTAGE_CACHE_ */ diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index 307babd..679633d 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -34,10 +34,6 @@ struct romstage_handoff { * will be re-loaded from cbfs (which can be slower since it lives * in flash). */ uint32_t s3_resume; - /* The ramstage_entry_point is cached in the stag loading path. This - * cached value can only be utilized when the chipset code properly - * fills in the s3_resume field above. */ - uint32_t ramstage_entry_point; }; #if defined(__PRE_RAM__) diff --git a/src/include/stage_cache.h b/src/include/stage_cache.h new file mode 100644 index 0000000..61c74d1 --- /dev/null +++ b/src/include/stage_cache.h @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _STAGE_CACHE_H_ +#define _STAGE_CACHE_H_ + +#include <stddef.h> +#include <stdint.h> +#include <program_loading.h> + +enum { + STAGE_RAMSTAGE, + STAGE_REFCODE, +}; + +/* Create an empty stage cache. */ +void stage_cache_create_empty(void); +/* Recover existing stage cache. */ +void stage_cache_recover(void); +/* Cache the loaded stage provided according to the parameters. */ +void stage_cache_add(int stage_id, void *base, size_t size, void *entry); +/* Load the cached stage at given location returning the stage entry point. */ +void *stage_cache_load_stage(int stage_id); +/* Fill in parameters for the external stage cache, if utilized. */ +void stage_cache_external_region(void **base, size_t *size); + +/* Metadata associated with each stage. */ +struct stage_cache { + uint64_t load_addr; + uint64_t entry_addr; +}; + +#endif /* _STAGE_CACHE_H_ */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 43da5cd..8ca52a5 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -108,6 +108,15 @@ ramstage-$(CONFIG_REG_SCRIPT) += reg_script.c romstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += ramstage_cache.c +ifeq ($(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM),y) +ramstage-y += ext_stage_cache.c +romstage-y += ext_stage_cache.c +else +ramstage-y += cbmem_stage_cache.c +romstage-y += cbmem_stage_cache.c +endif + + smm-y += cbfs.c cbfs_core.c memcmp.c smm-$(CONFIG_COMPILER_GCC) += gcc.c diff --git a/src/lib/cbmem_stage_cache.c b/src/lib/cbmem_stage_cache.c new file mode 100644 index 0000000..9551439 --- /dev/null +++ b/src/lib/cbmem_stage_cache.c @@ -0,0 +1,71 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/early_variables.h> +#include <cbmem.h> +#include <stage_cache.h> +#include <string.h> + + +/* Provide empty implementations by default. */ +void __attribute__((weak)) stage_cache_create_empty(void) {} +void __attribute__((weak)) stage_cache_recover(void) {} + +/* Stage cache uses cbmem. */ +void stage_cache_add(int stage_id, void *base, size_t size, void *entry) +{ + struct stage_cache *meta; + void *c; + + meta = cbmem_add(CBMEM_ID_STAGEx_META + stage_id, sizeof(*meta)); + if (meta == NULL) + return; + meta->load_addr = (uintptr_t)base; + meta->entry_addr = (uintptr_t)entry; + + c = cbmem_add(CBMEM_ID_STAGEx_CACHE + stage_id, size); + if (c == NULL) + return; + + memcpy(c, base, size); +} + +void *stage_cache_load_stage(int stage_id) +{ + struct stage_cache *meta; + const struct cbmem_entry *e; + void *c; + size_t size; + + meta = cbmem_find(CBMEM_ID_STAGEx_META + stage_id); + if (meta == NULL) + return NULL; + + e = cbmem_entry_find(CBMEM_ID_STAGEx_CACHE + stage_id); + + if (e == NULL) + return NULL; + + c = cbmem_entry_start(e); + size = cbmem_entry_size(e); + + memcpy((void *)(uintptr_t)meta->load_addr, c, size); + + return (void *)(uintptr_t)meta->entry_addr; +} diff --git a/src/lib/ext_stage_cache.c b/src/lib/ext_stage_cache.c new file mode 100644 index 0000000..e861fe3 --- /dev/null +++ b/src/lib/ext_stage_cache.c @@ -0,0 +1,120 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/early_variables.h> +#include <bootstate.h> +#include <cbmem.h> +#include <imd.h> +#include <rules.h> +#include <stage_cache.h> +#include <string.h> + +static struct imd imd_stage_cache CAR_GLOBAL = { }; + +static inline struct imd *imd_get(void) +{ + return car_get_var_ptr(&imd_stage_cache); +} + +static struct imd *sc_imd_init(void) +{ + struct imd *imd; + void *base; + size_t size; + + imd = imd_get(); + stage_cache_external_region(&base, &size); + imd_handle_init(imd, (void *)(size + (uintptr_t)base)); + + return imd; +} + +void stage_cache_create_empty(void) +{ + imd_create_tiered_empty(sc_imd_init(), 4096, 4096, 1024, 32); +} + +void stage_cache_recover(void) +{ + imd_recover(sc_imd_init()); +} + +void stage_cache_add(int stage_id, void *base, size_t size, void *entry) +{ + struct imd *imd; + const struct imd_entry *e; + struct stage_cache *meta; + void *c; + + imd = imd_get(); + e = imd_entry_add(imd, CBMEM_ID_STAGEx_META + stage_id, sizeof(*meta)); + + if (e == NULL) + return; + + meta = imd_entry_at(imd, e); + + meta->load_addr = (uintptr_t)base; + meta->entry_addr = (uintptr_t)entry; + + e = imd_entry_add(imd, CBMEM_ID_STAGEx_CACHE + stage_id, size); + + if (e == NULL) + return; + + c = imd_entry_at(imd, e); + + memcpy(c, base, size); +} + +void *stage_cache_load_stage(int stage_id) +{ + struct imd *imd; + struct stage_cache *meta; + const struct imd_entry *e; + void *c; + size_t size; + + imd = imd_get(); + e = imd_entry_find(imd, CBMEM_ID_STAGEx_META + stage_id); + if (e == NULL) + return NULL; + + meta = imd_entry_at(imd, e); + + e = imd_entry_find(imd, CBMEM_ID_STAGEx_CACHE + stage_id); + + if (e == NULL) + return NULL; + + c = imd_entry_at(imd, e); + size = imd_entry_size(imd, e); + + memcpy((void *)(uintptr_t)meta->load_addr, c, size); + + return (void *)(uintptr_t)meta->entry_addr; +} + +#if ENV_RAMSTAGE +static void recover_sc(void *unused) +{ + stage_cache_recover(); +} +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, recover_sc, NULL); +#endif diff --git a/src/lib/loaders/load_and_run_ramstage.c b/src/lib/loaders/load_and_run_ramstage.c index b3728a1..cc83c9f 100644 --- a/src/lib/loaders/load_and_run_ramstage.c +++ b/src/lib/loaders/load_and_run_ramstage.c @@ -35,16 +35,19 @@ static const struct prog_loader_ops *loaders[] = { &cbfs_ramstage_loader, }; -static void -load_ramstage(const struct prog_loader_ops *ops, - struct romstage_handoff *handoff, struct prog *ramstage) +void __attribute__((weak)) cache_loaded_ramstage(struct prog *p) {} +void __attribute__((weak)) load_cached_ramstage(struct prog *p) {} +void __attribute__((weak)) ramstage_cache_invalid(void) {} + +static void load_ramstage(const struct prog_loader_ops *ops, + struct prog *ramstage) { timestamp_add_now(TS_START_COPYRAM); if (ops->prepare(ramstage)) return; - cache_loaded_ramstage(handoff, ramstage); + cache_loaded_ramstage(ramstage); timestamp_add_now(TS_END_COPYRAM); @@ -56,18 +59,18 @@ static void run_ramstage_from_resume(struct romstage_handoff *handoff, { if (handoff != NULL && handoff->s3_resume) { /* Load the cached ramstage to runtime location. */ - load_cached_ramstage(handoff, ramstage); + load_cached_ramstage(ramstage); if (prog_entry(ramstage) != NULL) { printk(BIOS_DEBUG, "Jumping to image.\n"); prog_run(ramstage); } + ramstage_cache_invalid(); } } void run_ramstage(void) { - struct romstage_handoff *handoff; const struct prog_loader_ops *ops; int i; struct prog ramstage = { @@ -75,14 +78,12 @@ void run_ramstage(void) .type = PROG_RAMSTAGE, }; - handoff = romstage_handoff_find_or_add(); - - run_ramstage_from_resume(handoff, &ramstage); + run_ramstage_from_resume(romstage_handoff_find_or_add(), &ramstage); for (i = 0; i < ARRAY_SIZE(loaders); i++) { ops = loaders[i]; printk(BIOS_DEBUG, "Trying %s ramstage loader.\n", ops->name); - load_ramstage(ops, handoff, &ramstage); + load_ramstage(ops, &ramstage); } die("Ramstage was not loaded!\n"); diff --git a/src/lib/ramstage_cache.c b/src/lib/ramstage_cache.c index 1dd40c7..650200a 100644 --- a/src/lib/ramstage_cache.c +++ b/src/lib/ramstage_cache.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2013 Google Inc. + * Copyright 2013-2015 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,133 +17,21 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <stddef.h> -#include <string.h> -#include <console/console.h> #include <program_loading.h> -#include <ramstage_cache.h> -#include <romstage_handoff.h> +#include <stage_cache.h> -#if CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM - -void cache_loaded_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) -{ - struct ramstage_cache *cache; - uint32_t total_size; - uint32_t ramstage_size; - void *ramstage_base; - long cache_size = 0; - - ramstage_size = prog_size(ramstage); - ramstage_base = prog_start(ramstage); - - cache = ramstage_cache_location(&cache_size); - - if (cache == NULL) { - printk(BIOS_DEBUG, "No ramstage cache location provided.\n"); - return; - } - - total_size = sizeof(*cache) + ramstage_size; - if (total_size > cache_size) { - printk(BIOS_DEBUG, "cache size too small: 0x%08x > 0x%08lx\n", - total_size, cache_size); - /* Nuke whatever may be there now just in case. */ - cache->magic = ~RAMSTAGE_CACHE_MAGIC; - return; - } - - cache->magic = RAMSTAGE_CACHE_MAGIC; - cache->entry_point = (uint32_t)prog_entry(ramstage); - cache->load_address = (uint32_t)ramstage_base; - cache->size = ramstage_size; - - printk(BIOS_DEBUG, "Saving ramstage to %p.\n", cache); - - /* Copy over the program. */ - memcpy(&cache->program[0], ramstage_base, ramstage_size); - - if (handoff == NULL) - return; - - handoff->ramstage_entry_point = cache->entry_point; -} - -void load_cached_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) -{ - struct ramstage_cache *cache; - long size = 0; - - cache = ramstage_cache_location(&size); - - if (!ramstage_cache_is_valid(cache)) { - printk(BIOS_DEBUG, "Invalid ramstage cache found.\n"); - ramstage_cache_invalid(cache); - return; - } - - printk(BIOS_DEBUG, "Loading ramstage from %p.\n", cache); - - prog_set_area(ramstage, (void *)cache->load_address, cache->size); - prog_set_entry(ramstage, (void *)cache->entry_point, NULL); - - memcpy((void *)cache->load_address, &cache->program[0], cache->size); -} - -#else - -/* Cache relocated ramstage in CBMEM. */ - -void cache_loaded_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) +void cache_loaded_ramstage(struct prog *ramstage) { - uint32_t ramstage_size; - const struct cbmem_entry *entry; - - if (handoff == NULL) - return; - - ramstage_size = prog_size(ramstage); - /* cbmem_entry_add() does a find() before add(). */ - entry = cbmem_entry_add(CBMEM_ID_RAMSTAGE_CACHE, ramstage_size); - - if (entry == NULL) - return; + void *base; + size_t size; - /* Keep track of the entry point in the handoff structure. */ - handoff->ramstage_entry_point = (uint32_t)prog_entry(ramstage); + base = prog_start(ramstage); + size = prog_size(ramstage); - memcpy(cbmem_entry_start(entry), prog_start(ramstage), ramstage_size); + stage_cache_add(STAGE_RAMSTAGE, base, size, prog_entry(ramstage)); } -void load_cached_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) +void load_cached_ramstage(struct prog *ramstage) { - const struct cbmem_entry *entry_cache; - const struct cbmem_entry *entry_dest; - - if (handoff == NULL) - return; - - entry_cache = cbmem_entry_find(CBMEM_ID_RAMSTAGE_CACHE); - - if (entry_cache == NULL) - return; - - entry_dest = cbmem_entry_find(CBMEM_ID_RAMSTAGE); - - if (entry_dest == NULL) - return; - - prog_set_area(ramstage, cbmem_entry_start(entry_dest), - cbmem_entry_size(entry_dest)); - prog_set_entry(ramstage, (void *)handoff->ramstage_entry_point, NULL); - - /* Load the cached ramstage copy into the to-be-run region. */ - memcpy(prog_start(ramstage), cbmem_entry_start(entry_cache), - prog_size(ramstage)); + prog_set_entry(ramstage, stage_cache_load_stage(STAGE_RAMSTAGE), NULL); } - -#endif diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index e855218..1e066d5 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -23,17 +23,12 @@ #include <console/console.h> #include <cpu/x86/tsc.h> #include <rmodule.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #include <vendorcode/google/chromeos/vboot_handoff.h> #include <baytrail/ramstage.h> #include <baytrail/efi_wrapper.h> -static inline struct ramstage_cache *next_cache(struct ramstage_cache *c) -{ - return (struct ramstage_cache *)&c->program[c->size]; -} - static void ABI_X86 send_to_console(unsigned char b) { console_tx_byte(b); @@ -41,60 +36,24 @@ static void ABI_X86 send_to_console(unsigned char b) static efi_wrapper_entry_t load_refcode_from_cache(void) { - struct ramstage_cache *c; - long cache_size; + void *entry; printk(BIOS_DEBUG, "refcode loading from cache.\n"); - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid ramstage cache descriptor.\n"); - return NULL; - } - - c = next_cache(c); - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid refcode cache descriptor.\n"); - return NULL; - } - - printk(BIOS_DEBUG, "Loading cached reference code from 0x%08x(%x)\n", - c->load_address, c->size); - memcpy((void *)c->load_address, &c->program[0], c->size); + entry = stage_cache_load_stage(STAGE_REFCODE); - return (efi_wrapper_entry_t)c->entry_point; + return (efi_wrapper_entry_t)entry; } static void cache_refcode(const struct rmod_stage_load *rsl) { - struct ramstage_cache *c; - long cache_size; - - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "No place to cache reference code.\n"); - return; - } - - /* Determine how much remaining cache available. */ - cache_size -= c->size + sizeof(*c); - - if (cache_size < (sizeof(*c) + cbmem_entry_size(rsl->cbmem_entry))) { - printk(BIOS_DEBUG, "Not enough cache space for ref code.\n"); - return; - } + void *load_addr; + size_t size; - c = next_cache(c); - c->magic = RAMSTAGE_CACHE_MAGIC; - c->entry_point = (uint32_t)rsl->entry; - c->load_address = (uint32_t)cbmem_entry_start(rsl->cbmem_entry); - c->size = cbmem_entry_size(rsl->cbmem_entry); + load_adr = cbmem_entry_start(rsl->cbmem_entry); + size = cbmem_entry_size(rsl->cbmem_entry); - printk(BIOS_DEBUG, "Caching refcode at 0x%p(%x)\n", - &c->program[0], c->size); - memcpy(&c->program[0], (void *)c->load_address, c->size); + stage_cache_add(STAGE_REFCODE, load_addr, size, rsl->entry); } static int load_refcode_from_vboot(struct rmod_stage_load *refcode, diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index a51853a..7488215 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -25,6 +25,7 @@ #include <console/console.h> #include <device/pci_def.h> #include <halt.h> +#include <stage_cache.h> #include <baytrail/gpio.h> #include <soc/intel/common/mrc_cache.h> #include <baytrail/iomap.h> @@ -169,12 +170,16 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) if (prev_sleep_state != 3) { cbmem_initialize_empty(); - } else if (cbmem_initialize()) { - #if CONFIG_HAVE_ACPI_RESUME - printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); - /* Failed S3 resume, reset to come up cleanly */ - reset_system(); - #endif + stage_cache_create_empty(); + } else { + stage_cache_recover(); + if (cbmem_initialize()) { + #if CONFIG_HAVE_ACPI_RESUME + printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); + /* Failed S3 resume, reset to come up cleanly */ + reset_system(); + #endif + } } printk(BIOS_DEBUG, "MRC Wrapper returned %d\n", ret); diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 91548e3..e961ccd 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -20,18 +20,18 @@ #include <stddef.h> #include <arch/cpu.h> #include <arch/io.h> -#include <arch/cbfs.h> #include <arch/stages.h> #include <arch/early_variables.h> #include <console/console.h> +#include <cbfs.h> #include <cbmem.h> #include <cpu/x86/mtrr.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include <ec/google/chromeec/ec.h> #endif #include <elog.h> -#include <ramstage_cache.h> #include <romstage_handoff.h> +#include <stage_cache.h> #include <timestamp.h> #include <vendorcode/google/chromeos/chromeos.h> #include <baytrail/gpio.h> @@ -359,7 +359,7 @@ static void *setup_stack_and_mttrs(void) return slot; } -void ramstage_cache_invalid(struct ramstage_cache *cache) +void ramstage_cache_invalid(void) { #if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE /* Perform cold reset on invalid ramstage cache. */ diff --git a/src/soc/intel/baytrail/stage_cache.c b/src/soc/intel/baytrail/stage_cache.c index 3bda56d..c133bc8 100644 --- a/src/soc/intel/baytrail/stage_cache.c +++ b/src/soc/intel/baytrail/stage_cache.c @@ -18,10 +18,10 @@ */ #include <cbmem.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #include <baytrail/smm.h> -struct ramstage_cache *ramstage_cache_location(long *size) +void stage_cache_external_region(void **base, size_t *size) { char *smm_base; /* 1MiB cache size */ @@ -31,5 +31,5 @@ struct ramstage_cache *ramstage_cache_location(long *size) * cbmem_top(). */ smm_base = cbmem_top(); *size = cache_size; - return (void *)&smm_base[smm_region_size() - cache_size]; + *base = &smm_base[smm_region_size() - cache_size]; } diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index d66d036..a656650 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -23,74 +23,33 @@ #include <console/console.h> #include <cpu/x86/tsc.h> #include <rmodule.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #include <string.h> #include <vendorcode/google/chromeos/vboot_handoff.h> #include <broadwell/pei_data.h> #include <broadwell/pei_wrapper.h> #include <broadwell/ramstage.h> -static inline struct ramstage_cache *next_cache(struct ramstage_cache *c) -{ - return (struct ramstage_cache *)&c->program[c->size]; -} - static pei_wrapper_entry_t load_refcode_from_cache(void) { - struct ramstage_cache *c; - long cache_size; + void *entry; printk(BIOS_DEBUG, "refcode loading from cache.\n"); - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid ramstage cache descriptor.\n"); - return NULL; - } - - c = next_cache(c); - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid refcode cache descriptor.\n"); - return NULL; - } - - printk(BIOS_DEBUG, "Loading cached reference code from 0x%08x(%x)\n", - c->load_address, c->size); - memcpy((void *)c->load_address, &c->program[0], c->size); + entry = stage_cache_load_stage(STAGE_REFCODE); - return (pei_wrapper_entry_t)c->entry_point; + return (pei_wrapper_entry_t)entry; } static void cache_refcode(const struct rmod_stage_load *rsl) { - struct ramstage_cache *c; - long cache_size; - - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "No place to cache reference code.\n"); - return; - } - - /* Determine how much remaining cache available. */ - cache_size -= c->size + sizeof(*c); - - if (cache_size < (sizeof(*c) + cbmem_entry_size(rsl->cbmem_entry))) { - printk(BIOS_DEBUG, "Not enough cache space for ref code.\n"); - return; - } + void *load_addr; + size_t size; - c = next_cache(c); - c->magic = RAMSTAGE_CACHE_MAGIC; - c->entry_point = (uint32_t)rsl->entry; - c->load_address = (uint32_t)cbmem_entry_start(rsl->cbmem_entry); - c->size = cbmem_entry_size(rsl->cbmem_entry); + load_adr = cbmem_entry_start(rsl->cbmem_entry); + size = cbmem_entry_size(rsl->cbmem_entry); - printk(BIOS_DEBUG, "Caching refcode at 0x%p(%x)\n", - &c->program[0], c->size); - memcpy(&c->program[0], (void *)c->load_address, c->size); + stage_cache_add(STAGE_REFCODE, load_addr, size, rsl->entry); } static int load_refcode_from_vboot(struct rmod_stage_load *refcode, diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index b8b88bc..cb541ab 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -29,6 +29,7 @@ #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #endif +#include <stage_cache.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/intel/common/mrc_cache.h> #include <broadwell/iomap.h> @@ -111,12 +112,16 @@ void raminit(struct pei_data *pei_data) if (pei_data->boot_mode != SLEEP_STATE_S3) { cbmem_initialize_empty(); - } else if (cbmem_initialize()) { + stage_cache_create_empty(); + } else { + stage_cache_recover(); + if (cbmem_initialize()) { #if CONFIG_HAVE_ACPI_RESUME - printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); - /* Failed S3 resume, reset to come up cleanly */ - reset_system(); + printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); + /* Failed S3 resume, reset to come up cleanly */ + reset_system(); #endif + } } printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", pei_data->data_to_save, diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index ff5918a..2945204 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -25,11 +25,12 @@ #include <arch/stages.h> #include <arch/early_variables.h> #include <console/console.h> +#include <cbfs.h> #include <cbmem.h> #include <cpu/x86/mtrr.h> #include <elog.h> -#include <ramstage_cache.h> #include <romstage_handoff.h> +#include <stage_cache.h> #include <timestamp.h> #include <broadwell/me.h> #include <broadwell/pei_data.h> @@ -134,7 +135,7 @@ void asmlinkage romstage_after_car(void) while (1); } -void ramstage_cache_invalid(struct ramstage_cache *cache) +void ramstage_cache_invalid(void) { #if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE /* Perform cold reset on invalid ramstage cache. */ diff --git a/src/soc/intel/broadwell/stage_cache.c b/src/soc/intel/broadwell/stage_cache.c index 6c6b6fb..80c7cc5 100644 --- a/src/soc/intel/broadwell/stage_cache.c +++ b/src/soc/intel/broadwell/stage_cache.c @@ -18,11 +18,11 @@ */ #include <cbmem.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #include <broadwell/smm.h> #include <stdint.h> -struct ramstage_cache *ramstage_cache_location(long *size) +void stage_cache_external_region(void **base, size_t *size) { /* The ramstage cache lives in the TSEG region. * The top of ram is defined to be the TSEG base address. */ @@ -30,6 +30,6 @@ struct ramstage_cache *ramstage_cache_location(long *size) offset -= CONFIG_IED_REGION_SIZE; offset -= CONFIG_SMM_RESERVED_SIZE; + *base = (void *)(cbmem_top() + offset); *size = CONFIG_SMM_RESERVED_SIZE; - return (void *)(cbmem_top() + offset); }

1 0

Patch set updated for coreboot: eabe160 program loading: provide one cache maintenance callback
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8838 -gerrit commit eabe160e7c7dfce53acebc123c52395f86312345 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 20 09:42:05 2015 -0500 program loading: provide one cache maintenance callback Instead of having 2 different functions to call when a program is loaded provide a single callback with flags parameter. The previous callbacks for cache management routines did this: for_each_program_segment: arch_program_segment_loaded(start, size); arch_program_loaded(); Now, use one callback instead: for_each_program_segment: arch_segment_loaded(start, size, SEG_FINAL?); Change-Id: I3811cba92e3355d172f605e4444f053321b07a2a Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/program_loading.h | 12 ++++++++---- src/lib/arch_ops.c | 10 +++------- src/lib/cbfs.c | 3 +-- src/lib/rmodule.c | 5 ++--- src/lib/selfboot.c | 17 +++++++++-------- 5 files changed, 23 insertions(+), 24 deletions(-) diff --git a/src/include/program_loading.h b/src/include/program_loading.h index ca61c16..85ccd3c 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -23,11 +23,15 @@ #include <stdint.h> #include <stddef.h> -/* For each segment of a program loaded this function is called*/ -void arch_program_segment_loaded(uintptr_t start, size_t size); +enum { + /* Last segment of program. Can be used to take different actions for + * cache maintenance of a program load. */ + SEG_FINAL = 1 << 0, +}; -/* Upon completion of loading a program this function is called */ -void arch_program_loaded(void); +/* Called for each segment of a program loaded. The PROG_FLAG_FINAL will be + * set on the last segment loaded. */ +void arch_segment_loaded(uintptr_t start, size_t size, int flags); /************************ * ROMSTAGE LOADING * diff --git a/src/lib/arch_ops.c b/src/lib/arch_ops.c index f02b342..b9f5719 100644 --- a/src/lib/arch_ops.c +++ b/src/lib/arch_ops.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 Imagination Technologies + * Copyright 2015 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,14 +21,9 @@ #include <program_loading.h> /* For each segment of a program loaded this function is called*/ -__attribute__ ((weak)) void arch_program_segment_loaded(uintptr_t start, - size_t size) +void __attribute__ ((weak)) arch_segment_loaded(uintptr_t start, size_t size, + int flags) { /* do nothing */ } -/* Upon completion of loading a program this function is called */ -__attribute__ ((weak)) void arch_program_loaded(void) -{ - /* do nothing */ -} diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index c0a61b4..a214b45 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -112,8 +112,7 @@ void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) media->unmap(media, data); } - arch_program_segment_loaded(stage.load, stage.memlen); - arch_program_loaded(); + arch_segment_loaded(stage.load, stage.memlen, SEG_FINAL); DEBUG("stage loaded\n"); return (void *)(uintptr_t)stage.entry; diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index c2bf33c..791029a 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -200,9 +200,8 @@ int rmodule_load(void *base, struct rmodule *module) return -1; rmodule_clear_bss(module); - arch_program_segment_loaded((uintptr_t)module->location, - rmodule_memory_size(module)); - arch_program_loaded(); + arch_segment_loaded((uintptr_t)module->location, + rmodule_memory_size(module), SEG_FINAL); return 0; } diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index fe73c0c..b29a34e 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -314,9 +314,16 @@ static int load_self_segments( struct payload *payload) { struct segment *ptr; + struct segment *last_non_empty; const unsigned long one_meg = (1UL << 20); unsigned long bounce_high = lb_end; + /* Determine last non-empty loaded segment. */ + last_non_empty = NULL; + for(ptr = head->next; ptr != head; ptr = ptr->next) + if (ptr->s_filesz != 0) + last_non_empty = ptr; + for(ptr = head->next; ptr != head; ptr = ptr->next) { if (bootmem_region_targets_usable_ram(ptr->s_dstaddr, ptr->s_memsz)) @@ -442,17 +449,11 @@ static int load_self_segments( * Each architecture can perform additonal operations * on the loaded segment */ - arch_program_segment_loaded((uintptr_t)dest, - ptr->s_memsz); + arch_segment_loaded((uintptr_t)dest, ptr->s_memsz, + last_non_empty == ptr ? SEG_FINAL : 0); } } - /* - * Each architecture can perform additonal operations once the entire - * program is loaded - */ - arch_program_loaded(); - return 1; }

1 0

Patch set updated for coreboot: eb12b69 program loading: introduce struct prog
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8839 -gerrit commit eb12b6972ff73ceeefd2acd9390fbc8dc5524f6d Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 20 13:00:20 2015 -0500 program loading: introduce struct prog The struct prog serves as way to consolidate program loading. This abstraction can be used to perform more complicated execution paths such as running a program on a separate CPU after it has been loaded. Currently t124 and t132 need to do that in the boot path. Follow on patches will allow the platform to decide how to execute a particular program. Note: the vboot path is largely untouched because it's already broken in the coreboot.org tree. After getting all the necessary patches pushed then vboot will be fixed. Change-Id: Ic6e6fe28c5660fb41edee5fd8661eaf58222f883 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm/boot.c | 11 ++- src/arch/arm64/boot.c | 11 ++- src/arch/mips/boot.c | 7 +- src/arch/mips/include/arch/stages.h | 1 - src/arch/riscv/boot.c | 5 +- src/arch/x86/boot/boot.c | 5 +- src/include/cbfs.h | 3 + src/include/program_loading.h | 119 +++++++++++++++++++------------- src/lib/arch_ops.c | 1 - src/lib/cbfs.c | 53 +++++++++++--- src/lib/loaders/cbfs_payload_loader.c | 5 +- src/lib/loaders/cbfs_ramstage_loader.c | 29 +++----- src/lib/loaders/load_and_run_payload.c | 22 +++--- src/lib/loaders/load_and_run_ramstage.c | 43 +++++------- src/lib/loaders/load_and_run_romstage.c | 12 ++-- src/lib/ramstage_cache.c | 55 ++++++++------- src/lib/selfboot.c | 2 +- 17 files changed, 212 insertions(+), 172 deletions(-) diff --git a/src/arch/arm/boot.c b/src/arch/arm/boot.c index 5217a9f..9dc6dbd 100644 --- a/src/arch/arm/boot.c +++ b/src/arch/arm/boot.c @@ -18,17 +18,14 @@ */ #include <arch/cache.h> -#include <arch/stages.h> -#include <cbmem.h> -#include <console/console.h> #include <program_loading.h> void arch_payload_run(const struct payload *payload) { - void (*doit)(void *) = payload->entry; - void *cb_tables = cbmem_find(CBMEM_ID_CBTABLE); + void (*doit)(void *); - printk(BIOS_SPEW, "entry = %p\n", payload->entry); cache_sync_instructions(); - doit(cb_tables); + + doit = prog_entry(&payload->prog); + doit(prog_entry_arg(&payload->prog)); } diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 5217a9f..9dc6dbd 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -18,17 +18,14 @@ */ #include <arch/cache.h> -#include <arch/stages.h> -#include <cbmem.h> -#include <console/console.h> #include <program_loading.h> void arch_payload_run(const struct payload *payload) { - void (*doit)(void *) = payload->entry; - void *cb_tables = cbmem_find(CBMEM_ID_CBTABLE); + void (*doit)(void *); - printk(BIOS_SPEW, "entry = %p\n", payload->entry); cache_sync_instructions(); - doit(cb_tables); + + doit = prog_entry(&payload->prog); + doit(prog_entry_arg(&payload->prog)); } diff --git a/src/arch/mips/boot.c b/src/arch/mips/boot.c index d322e99..6e12d10 100644 --- a/src/arch/mips/boot.c +++ b/src/arch/mips/boot.c @@ -17,11 +17,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <console/console.h> #include <arch/stages.h> +#include <program_loading.h> -void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size) +void arch_payload_run(const struct payload *payload) { - printk(BIOS_SPEW, "entry = %p\n", entry); - stage_exit(entry); + stage_exit(prog_entry(&payload->prog)); } diff --git a/src/arch/mips/include/arch/stages.h b/src/arch/mips/include/arch/stages.h index b95ad1d..3015bb1 100644 --- a/src/arch/mips/include/arch/stages.h +++ b/src/arch/mips/include/arch/stages.h @@ -24,6 +24,5 @@ extern void main(void); void stage_entry(void); void stage_exit(void *); -void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size); #endif /* __MIPS_ARCH_STAGES_H */ diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c index ff65cc3..4c2be03 100644 --- a/src/arch/riscv/boot.c +++ b/src/arch/riscv/boot.c @@ -17,14 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <console/console.h> #include <arch/stages.h> #include <program_loading.h> -#include <console/uart.h> void arch_payload_run(const struct payload *payload) { - printk(BIOS_SPEW, "entry = %p\n", payload->entry); // uart_rx_byte(0); - stage_exit(payload->entry); + stage_exit(prog_entry(&payload->prog)); } diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index 8f7f0e0..1fb36e2 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -126,8 +126,9 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) void arch_payload_run(const struct payload *payload) { if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) - jmp_payload_no_bounce_buffer(payload->entry); + jmp_payload_no_bounce_buffer(prog_entry(&payload->prog)); else - jmp_payload(payload->entry, (uintptr_t)payload->bounce.data, + jmp_payload(prog_entry(&payload->prog), + (uintptr_t)payload->bounce.data, payload->bounce.size); } diff --git a/src/include/cbfs.h b/src/include/cbfs.h index c0e3d80..6d9fc40 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -57,6 +57,9 @@ void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, uint16_t device, void * dest); void *cbfs_load_stage(struct cbfs_media *media, const char *name); void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset); +/* Load a stage from a prog structure. Returns < 0 on error. 0 on success. */ +struct prog; +int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog); /* Simple buffer for streaming media. */ struct cbfs_simple_buffer { diff --git a/src/include/program_loading.h b/src/include/program_loading.h index 85ccd3c..38047c7 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -29,10 +29,67 @@ enum { SEG_FINAL = 1 << 0, }; -/* Called for each segment of a program loaded. The PROG_FLAG_FINAL will be +/* Called for each segment of a program loaded. The SEG_FINAL flag will be * set on the last segment loaded. */ void arch_segment_loaded(uintptr_t start, size_t size, int flags); +struct buffer_area { + void *data; + size_t size; +}; + +enum prog_type { + PROG_ROMSTAGE, + PROG_RAMSTAGE, + PROG_PAYLOAD, +}; + +/* Representation of a program. */ +struct prog { + enum prog_type type; + const char *name; + /* The area can mean different things depending on what type the + * program is. e.g. a payload prog uses this field for the backing + * store of the payload_segments and data. */ + struct buffer_area area; + /* Entry to program with optional argument. It's up to the architecture + * to decide if argument is passed. */ + void (*entry)(void *); + void *arg; +}; + +static inline size_t prog_size(const struct prog *prog) +{ + return prog->area.size; +} + +static inline void *prog_start(const struct prog *prog) +{ + return prog->area.data; +} + +static inline void *prog_entry(const struct prog *prog) +{ + return prog->entry; +} + +static inline void *prog_entry_arg(const struct prog *prog) +{ + return prog->arg; +} + +static inline void prog_set_area(struct prog *prog, void *start, size_t size) +{ + prog->area.data = start; + prog->area.size = size; +} + +static inline void prog_set_entry(struct prog *prog, void *e, void *arg) +{ + prog->entry = e; + prog->arg = arg; +} + /************************ * ROMSTAGE LOADING * ************************/ @@ -45,67 +102,35 @@ void run_romstage(void); ************************/ struct romstage_handoff; -struct cbmem_entry; - -#if defined(__PRE_RAM__) -#if CONFIG_RELOCATABLE_RAMSTAGE -/* The cache_loaded_ramstage() and load_cached_ramstage() functions are defined - * to be weak so that board and chipset code may override them. Their job is to - * cache and load the ramstage for quick S3 resume. By default a copy of the - * relocated ramstage is saved using the cbmem infrastructure. These - * functions are only valid during romstage. */ - -/* The implementer of cache_loaded_ramstage() may use the romstage_handoff - * structure to store information, but note that the handoff variable can be - * NULL. The ramstage cbmem_entry represents the region occupied by the loaded - * ramstage. */ -void cache_loaded_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage, void *entry_point); -/* Return NULL on error or entry point on success. The ramstage cbmem_entry is - * the region where to load the cached contents to. */ -void * load_cached_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage); -#else /* CONFIG_RELOCATABLE_RAMSTAGE */ - -static inline void cache_loaded_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage, void *entry_point) -{ -} - -static inline void * -load_cached_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage) -{ - return NULL; -} - -#endif /* CONFIG_RELOCATABLE_RAMSTAGE */ -#endif /* defined(__PRE_RAM__) */ +#if IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE) +/* Cache the loaded ramstage described by prog. */ +void cache_loaded_ramstage(struct romstage_handoff *, struct prog *p); +/* Load ramstage from cache filling in struct prog. */ +void load_cached_ramstage(struct romstage_handoff *h, struct prog *p); +#else +static inline void cache_loaded_ramstage(struct romstage_handoff *h, + struct prog *p) {} +static inline void load_cached_ramstage(struct romstage_handoff *h, + struct prog *p) {} +#endif /* Run ramstage from romstage. */ void run_ramstage(void); struct ramstage_loader_ops { const char *name; - void *(*load)(uint32_t cbmem_id, const char *name, - const struct cbmem_entry **cbmem_entry); + /* Returns 0 on succes. < 0 on error. */ + int (*load)(struct prog *ramstage); }; /*********************** * PAYLOAD LOADING * ***********************/ -struct buffer_area { - void *data; - size_t size; -}; - struct payload { - const char *name; - struct buffer_area backing_store; + struct prog prog; /* Used when payload wants memory coreboot ramstage is running at. */ struct buffer_area bounce; - void *entry; }; /* Load payload into memory in preparation to run. */ diff --git a/src/lib/arch_ops.c b/src/lib/arch_ops.c index b9f5719..ac1be77 100644 --- a/src/lib/arch_ops.c +++ b/src/lib/arch_ops.c @@ -26,4 +26,3 @@ void __attribute__ ((weak)) arch_segment_loaded(uintptr_t start, size_t size, { /* do nothing */ } - diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index a214b45..54ec8d0 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -74,17 +74,18 @@ void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, return dest; } -void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) +static int cbfs_load_prog_stage_by_offset(struct cbfs_media *media, + struct prog *prog, ssize_t offset) { struct cbfs_stage stage; struct cbfs_media backing_store; if (init_backing_media(&media, &backing_store)) - return (void *)-1; + return -1; if (cbfs_read(media, &stage, offset, sizeof(stage)) != sizeof(stage)) { ERROR("ERROR: failed to read stage header\n"); - return (void *)-1; + return -1; } LOG("loading stage @ 0x%llx (%d bytes), entry @ 0x%llx\n", @@ -97,41 +98,71 @@ void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) if (cbfs_read(media, (void *)(uintptr_t)stage.load, offset + sizeof(stage), stage.len) != stage.len) { ERROR("ERROR: Reading stage failed.\n"); - return (void *)-1; + return -1; } } else { void *data = media->map(media, offset + sizeof(stage), stage.len); if (data == CBFS_MEDIA_INVALID_MAP_ADDRESS) { ERROR("ERROR: Mapping stage failed.\n"); - return (void *)-1; + return -1; } if (!cbfs_decompress(stage.compression, data, (void *)(uintptr_t)stage.load, stage.len)) - return (void *)-1; + return -1; media->unmap(media, data); } arch_segment_loaded(stage.load, stage.memlen, SEG_FINAL); DEBUG("stage loaded\n"); - return (void *)(uintptr_t)stage.entry; + prog_set_area(prog, (void *)(uintptr_t)stage.load, stage.memlen); + prog_set_entry(prog, (void *)(uintptr_t)stage.entry, NULL); + + return 0; } -void *cbfs_load_stage(struct cbfs_media *media, const char *name) +int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog) { struct cbfs_file file; ssize_t offset; struct cbfs_media backing_store; if (init_backing_media(&media, &backing_store)) - return (void *)-1; + return -1; - offset = cbfs_locate_file(media, &file, name); + offset = cbfs_locate_file(media, &file, prog->name); if (offset < 0 || file.type != CBFS_TYPE_STAGE) + return -1; + + if (cbfs_load_prog_stage_by_offset(media, prog, offset) < 0) + return -1; + + return 0; +} + +void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) +{ + struct prog prog = { + .name = NULL, + }; + + if (cbfs_load_prog_stage_by_offset(media, &prog, offset) < 0) + return (void *)-1; + + return prog_entry(&prog); +} + +void *cbfs_load_stage(struct cbfs_media *media, const char *name) +{ + struct prog prog = { + .name = name, + }; + + if (cbfs_load_prog_stage(media, &prog) < 0) return (void *)-1; - return cbfs_load_stage_by_offset(media, offset); + return prog_entry(&prog); } /* Simple buffer */ diff --git a/src/lib/loaders/cbfs_payload_loader.c b/src/lib/loaders/cbfs_payload_loader.c index 22f4c2f..609d123 100644 --- a/src/lib/loaders/cbfs_payload_loader.c +++ b/src/lib/loaders/cbfs_payload_loader.c @@ -26,14 +26,13 @@ static int cbfs_locate_payload(struct payload *payload) size_t size; const int type = CBFS_TYPE_PAYLOAD; - buffer = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, payload->name, + buffer = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, payload->prog.name, type, &size); if (buffer == NULL) return -1; - payload->backing_store.data = buffer; - payload->backing_store.size = size; + prog_set_area(&payload->prog, buffer, size); return 0; } diff --git a/src/lib/loaders/cbfs_ramstage_loader.c b/src/lib/loaders/cbfs_ramstage_loader.c index 5155aea..27be88e 100644 --- a/src/lib/loaders/cbfs_ramstage_loader.c +++ b/src/lib/loaders/cbfs_ramstage_loader.c @@ -19,44 +19,37 @@ */ #include <console/console.h> #include <cbfs.h> -#include <arch/stages.h> #include <program_loading.h> -#include <timestamp.h> #if CONFIG_RELOCATABLE_RAMSTAGE #include <rmodule.h> +#include <cbmem.h> -static void *cbfs_load_ramstage(uint32_t cbmem_id, const char *name, - const struct cbmem_entry **cbmem_entry) +static int cbfs_load_ramstage(struct prog *ramstage) { struct rmod_stage_load rmod_ram = { - .cbmem_id = cbmem_id, - .name = name, + .cbmem_id = CBMEM_ID_RAMSTAGE, + .name = ramstage->name, }; if (rmodule_stage_load_from_cbfs(&rmod_ram)) { printk(BIOS_DEBUG, "Could not load ramstage.\n"); - return NULL; + return -1; } - *cbmem_entry = rmod_ram.cbmem_entry; + prog_set_area(ramstage, cbmem_entry_start(rmod_ram.cbmem_entry), + cbmem_entry_size(rmod_ram.cbmem_entry)); + prog_set_entry(ramstage, rmod_ram.entry, NULL); - return rmod_ram.entry; + return 0; } #else /* CONFIG_RELOCATABLE_RAMSTAGE */ -static void *cbfs_load_ramstage(uint32_t cbmem_id, const char *name, - const struct cbmem_entry **cbmem_entry) +static int cbfs_load_ramstage(struct prog *ramstage) { - void *entry; + return cbfs_load_prog_stage(CBFS_DEFAULT_MEDIA, ramstage); - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, name); - - if ((void *)entry == (void *) -1) - entry = NULL; - - return entry; } #endif /* CONFIG_RELOCATABLE_RAMSTAGE */ diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 89b6da6..8e745c9 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <stdlib.h> +#include <cbmem.h> #include <console/console.h> #include <fallback.h> #include <lib.h> @@ -36,7 +37,10 @@ static const struct payload_loader_ops *payload_ops[] = { }; static struct payload global_payload = { - .name = CONFIG_CBFS_PREFIX "/payload", + .prog = { + .name = CONFIG_CBFS_PREFIX "/payload", + .type = PROG_PAYLOAD, + }, }; void __attribute__((weak)) mirror_payload(struct payload *payload) @@ -47,9 +51,9 @@ void __attribute__((weak)) mirror_payload(struct payload *payload) void payload_load(void) { int i; - void *entry; const struct payload_loader_ops *ops; struct payload *payload = &global_payload; + struct prog * prog = &payload->prog; for (i = 0; i < ARRAY_SIZE(payload_ops); i++) { ops = payload_ops[i]; @@ -59,8 +63,7 @@ void payload_load(void) continue; } printk(BIOS_DEBUG, "%s: located payload @ %p, %zu bytes.\n", - ops->name, payload->backing_store.data, - payload->backing_store.size); + ops->name, prog_start(prog), prog_size(prog)); break; } @@ -69,12 +72,12 @@ void payload_load(void) mirror_payload(payload); - entry = selfload(payload); - - payload->entry = entry; + /* Pass cbtables to payload if architecture desires it. */ + prog_set_entry(&payload->prog, selfload(payload), + cbmem_find(CBMEM_ID_CBTABLE)); out: - if (payload->entry == NULL) + if (prog_entry(&payload->prog) == NULL) die("Payload not loaded.\n"); } @@ -85,7 +88,8 @@ void payload_run(void) /* Reset to booting from this image as late as possible */ boot_successful(); - printk(BIOS_DEBUG, "Jumping to boot code at %p\n", payload->entry); + printk(BIOS_DEBUG, "Jumping to boot code at %p(%p)\n", + prog_entry(&payload->prog), prog_entry_arg(&payload->prog)); post_code(POST_ENTER_ELF_BOOT); timestamp_add_now(TS_SELFBOOT_JUMP); diff --git a/src/lib/loaders/load_and_run_ramstage.c b/src/lib/loaders/load_and_run_ramstage.c index b24e29f..82bc1e0 100644 --- a/src/lib/loaders/load_and_run_ramstage.c +++ b/src/lib/loaders/load_and_run_ramstage.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <arch/stages.h> #include <cbfs.h> -#include <cbmem.h> #include <program_loading.h> #include <romstage_handoff.h> #include <timestamp.h> @@ -36,46 +35,32 @@ static const struct ramstage_loader_ops *loaders[] = { &cbfs_ramstage_loader, }; -static const char *ramstage_name = CONFIG_CBFS_PREFIX "/ramstage"; -static const uint32_t ramstage_id = CBMEM_ID_RAMSTAGE; - static void -load_ramstage(const struct ramstage_loader_ops *ops, struct romstage_handoff *handoff) +load_ramstage(const struct ramstage_loader_ops *ops, + struct romstage_handoff *handoff, struct prog *ramstage) { - const struct cbmem_entry *cbmem_entry; - void *entry_point; - timestamp_add_now(TS_START_COPYRAM); - entry_point = ops->load(ramstage_id, ramstage_name, &cbmem_entry); - if (entry_point == NULL) + if (ops->load(ramstage)) return; - cache_loaded_ramstage(handoff, cbmem_entry, entry_point); + cache_loaded_ramstage(handoff, ramstage); timestamp_add_now(TS_END_COPYRAM); - stage_exit(entry_point); + stage_exit(prog_entry(ramstage)); } -static void run_ramstage_from_resume(struct romstage_handoff *handoff) +static void run_ramstage_from_resume(struct romstage_handoff *handoff, + struct prog *ramstage) { - void *entry; - const struct cbmem_entry *cbmem_entry; - if (handoff != NULL && handoff->s3_resume) { - cbmem_entry = cbmem_entry_find(ramstage_id); - - /* No place to load ramstage. */ - if (cbmem_entry == NULL) - return; - /* Load the cached ramstage to runtime location. */ - entry = load_cached_ramstage(handoff, cbmem_entry); + load_cached_ramstage(handoff, ramstage); - if (entry != NULL) { + if (prog_entry(ramstage) != NULL) { printk(BIOS_DEBUG, "Jumping to image.\n"); - stage_exit(entry); + stage_exit(prog_entry(ramstage)); } } } @@ -85,15 +70,19 @@ void run_ramstage(void) struct romstage_handoff *handoff; const struct ramstage_loader_ops *ops; int i; + struct prog ramstage = { + .name = CONFIG_CBFS_PREFIX "/ramstage", + .type = PROG_RAMSTAGE, + }; handoff = romstage_handoff_find_or_add(); - run_ramstage_from_resume(handoff); + run_ramstage_from_resume(handoff, &ramstage); for (i = 0; i < ARRAY_SIZE(loaders); i++) { ops = loaders[i]; printk(BIOS_DEBUG, "Trying %s ramstage loader.\n", ops->name); - load_ramstage(ops, handoff); + load_ramstage(ops, handoff, &ramstage); } die("Ramstage was not loaded!\n"); diff --git a/src/lib/loaders/load_and_run_romstage.c b/src/lib/loaders/load_and_run_romstage.c index ebc1243..3ad9176 100644 --- a/src/lib/loaders/load_and_run_romstage.c +++ b/src/lib/loaders/load_and_run_romstage.c @@ -27,16 +27,16 @@ void run_romstage(void) { - void *entry; + struct prog romstage = { + .name = CONFIG_CBFS_PREFIX "/romstage", + .type = PROG_ROMSTAGE, + }; - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, - CONFIG_CBFS_PREFIX "/romstage"); - - if (entry == (void *)-1) { + if (cbfs_load_prog_stage(CBFS_DEFAULT_MEDIA, &romstage) < 0) { if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) die("Couldn't load romstage.\n"); halt(); } - stage_exit(entry); + stage_exit(prog_entry(&romstage)); } diff --git a/src/lib/ramstage_cache.c b/src/lib/ramstage_cache.c index d61f1c1..1dd40c7 100644 --- a/src/lib/ramstage_cache.c +++ b/src/lib/ramstage_cache.c @@ -27,8 +27,7 @@ #if CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM void cache_loaded_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage, - void *entry_point) + struct prog *ramstage) { struct ramstage_cache *cache; uint32_t total_size; @@ -36,8 +35,8 @@ void cache_loaded_ramstage(struct romstage_handoff *handoff, void *ramstage_base; long cache_size = 0; - ramstage_size = cbmem_entry_size(ramstage); - ramstage_base = cbmem_entry_start(ramstage); + ramstage_size = prog_size(ramstage); + ramstage_base = prog_start(ramstage); cache = ramstage_cache_location(&cache_size); @@ -56,7 +55,7 @@ void cache_loaded_ramstage(struct romstage_handoff *handoff, } cache->magic = RAMSTAGE_CACHE_MAGIC; - cache->entry_point = (uint32_t)entry_point; + cache->entry_point = (uint32_t)prog_entry(ramstage); cache->load_address = (uint32_t)ramstage_base; cache->size = ramstage_size; @@ -68,11 +67,11 @@ void cache_loaded_ramstage(struct romstage_handoff *handoff, if (handoff == NULL) return; - handoff->ramstage_entry_point = (uint32_t)entry_point; + handoff->ramstage_entry_point = cache->entry_point; } -void *load_cached_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage) +void load_cached_ramstage(struct romstage_handoff *handoff, + struct prog *ramstage) { struct ramstage_cache *cache; long size = 0; @@ -82,14 +81,15 @@ void *load_cached_ramstage(struct romstage_handoff *handoff, if (!ramstage_cache_is_valid(cache)) { printk(BIOS_DEBUG, "Invalid ramstage cache found.\n"); ramstage_cache_invalid(cache); - return NULL; + return; } printk(BIOS_DEBUG, "Loading ramstage from %p.\n", cache); - memcpy((void *)cache->load_address, &cache->program[0], cache->size); + prog_set_area(ramstage, (void *)cache->load_address, cache->size); + prog_set_entry(ramstage, (void *)cache->entry_point, NULL); - return (void *)cache->entry_point; + memcpy((void *)cache->load_address, &cache->program[0], cache->size); } #else @@ -97,7 +97,7 @@ void *load_cached_ramstage(struct romstage_handoff *handoff, /* Cache relocated ramstage in CBMEM. */ void cache_loaded_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage, void *entry_point) + struct prog *ramstage) { uint32_t ramstage_size; const struct cbmem_entry *entry; @@ -105,7 +105,7 @@ void cache_loaded_ramstage(struct romstage_handoff *handoff, if (handoff == NULL) return; - ramstage_size = cbmem_entry_size(ramstage); + ramstage_size = prog_size(ramstage); /* cbmem_entry_add() does a find() before add(). */ entry = cbmem_entry_add(CBMEM_ID_RAMSTAGE_CACHE, ramstage_size); @@ -113,30 +113,37 @@ void cache_loaded_ramstage(struct romstage_handoff *handoff, return; /* Keep track of the entry point in the handoff structure. */ - handoff->ramstage_entry_point = (uint32_t)entry_point; + handoff->ramstage_entry_point = (uint32_t)prog_entry(ramstage); - memcpy(cbmem_entry_start(entry), cbmem_entry_start(ramstage), - ramstage_size); + memcpy(cbmem_entry_start(entry), prog_start(ramstage), ramstage_size); } -void *load_cached_ramstage(struct romstage_handoff *handoff, - const struct cbmem_entry *ramstage) +void load_cached_ramstage(struct romstage_handoff *handoff, + struct prog *ramstage) { const struct cbmem_entry *entry_cache; + const struct cbmem_entry *entry_dest; if (handoff == NULL) - return NULL; + return; entry_cache = cbmem_entry_find(CBMEM_ID_RAMSTAGE_CACHE); if (entry_cache == NULL) - return NULL; + return; - /* Load the cached ramstage copy into the to-be-run region. */ - memcpy(cbmem_entry_start(ramstage), cbmem_entry_start(entry_cache), - cbmem_entry_size(ramstage)); + entry_dest = cbmem_entry_find(CBMEM_ID_RAMSTAGE); + + if (entry_dest == NULL) + return; - return (void *)handoff->ramstage_entry_point; + prog_set_area(ramstage, cbmem_entry_start(entry_dest), + cbmem_entry_size(entry_dest)); + prog_set_entry(ramstage, (void *)handoff->ramstage_entry_point, NULL); + + /* Load the cached ramstage copy into the to-be-run region. */ + memcpy(prog_start(ramstage), cbmem_entry_start(entry_cache), + prog_size(ramstage)); } #endif diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index b29a34e..164dce9 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -220,7 +220,7 @@ static int build_self_segment_list( struct segment *ptr; struct cbfs_payload_segment *segment, *first_segment; struct cbfs_payload *cbfs_payload; - cbfs_payload = payload->backing_store.data; + cbfs_payload = prog_start(&payload->prog); memset(head, 0, sizeof(*head)); head->next = head->prev = head; first_segment = segment = &cbfs_payload->segments;

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Patch set updated for coreboot: 0cee8a9 coreboot: differentiate on early reliable writable globals
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8943 -gerrit commit 0cee8a9aaa64f2f48569fe04172f64a72f71923e Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Mar 24 09:20:45 2015 -0500 coreboot: differentiate on early reliable writable globals There is a big difference between the boards supported in coreboot and the properties they provide within each stage during the bootflow. The leads to core infrastructure relying on supporting the least common denominator when writing APIs. Therefore, provide PLATFORM_HAS_EARLY_WRITABLE_GLOBALS which indicates that the platform has reliable writable global variables in the early stages of boot. For x86 that would be romstage, and for the other architetures which have SRAM it would encompass bootblock and romstage. Change-Id: I2cefeaee0551ee241e138fcee0d199679002c3be Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/Kconfig | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/Kconfig b/src/Kconfig index 7aee478..2625266 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -293,6 +293,25 @@ config SYSTEM_TYPE_LAPTOP default n bool +config PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + bool + default y if !ARCH_X86 + help + This option signals to the rest of the infrastructure that + the platform supports writable globals in bootblock and + romstage. Fox traditional x86 systems without any SRAM this + would mean cache-as-ram globals are migrated correctly from + the CAR area once memory is trained. After the migration the + variables are accessible using the CAR API. This behavior + puts such x86 systems on par with ARM and MIPS systems. + +config PLATFORM_NO_EARLY_WRITABLE_GLOBALS + bool + default y if !PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + help + This is just the opposite of PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + to enable cleaner Makefiles. + menu "Chipset" comment "CPU"

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Patch set updated for coreboot: e4b4531 program loading: add prog_run() function
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8846 -gerrit commit e4b45313ca9a7138ee76a4c6eb27071176d49560 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 20 15:55:08 2015 -0500 program loading: add prog_run() function The prog_run() function abstracts away what is required for running a given program. Within it, there are 2 calls: 1. platform_prog_run() and 2. arch_prog_run(). The platform_prog_run() allows for a chipset to intercept a program that will be run. This allows for CPU switching as currently needed in t124 and t132. Change-Id: I22a5dd5bfb1018e7e46475e47ac993a0941e2a8c Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm/Makefile.inc | 2 ++ src/arch/arm/boot.c | 11 +++++++--- src/arch/arm64/Makefile.inc | 2 ++ src/arch/arm64/boot.c | 11 +++++++--- src/arch/mips/boot.c | 9 ++++++-- src/arch/riscv/Makefile.inc | 2 ++ src/arch/riscv/boot.c | 14 ++++++++---- src/arch/x86/boot/Makefile.inc | 1 + src/arch/x86/boot/boot.c | 10 ++++++++- src/include/program_loading.h | 12 +++++++++- src/lib/Makefile.inc | 8 +++---- src/lib/arch_ops.c | 28 ----------------------- src/lib/loaders/load_and_run_payload.c | 2 +- src/lib/loaders/load_and_run_ramstage.c | 4 ++-- src/lib/loaders/load_and_run_romstage.c | 2 +- src/lib/prog_ops.c | 39 +++++++++++++++++++++++++++++++++ 16 files changed, 107 insertions(+), 50 deletions(-) diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc index 25f764c..b331f4b 100644 --- a/src/arch/arm/Makefile.inc +++ b/src/arch/arm/Makefile.inc @@ -54,6 +54,7 @@ ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARM),y) bootblock-y += id.S $(obj)/arch/arm/id.bootblock.o: $(obj)/build.h +bootblock-y += boot.c bootblock-y += stages.c bootblock-y += eabi_compat.c bootblock-y += memset.S @@ -89,6 +90,7 @@ verstage-y += stages.c ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y) +romstage-y += boot.c romstage-y += stages.c romstage-y += div0.c romstage-y += eabi_compat.c diff --git a/src/arch/arm/boot.c b/src/arch/arm/boot.c index 9dc6dbd..6a2934b 100644 --- a/src/arch/arm/boot.c +++ b/src/arch/arm/boot.c @@ -20,12 +20,17 @@ #include <arch/cache.h> #include <program_loading.h> -void arch_payload_run(const struct payload *payload) +void arch_prog_run(struct prog *prog) { void (*doit)(void *); cache_sync_instructions(); - doit = prog_entry(&payload->prog); - doit(prog_entry_arg(&payload->prog)); + doit = prog_entry(prog); + doit(prog_entry_arg(prog)); +} + +void arch_payload_run(struct payload *payload) +{ + arch_prog_run(&payload->prog); } diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index b50499e..9c97c4d 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -57,6 +57,7 @@ bootblock-y += div0.c bootblock-y += id.S $(obj)/arch/arm64/id.bootblock.o: $(obj)/build.h +bootblock-y += boot.c bootblock-y += c_entry.c bootblock-y += stage_entry.S bootblock-y += stages.c @@ -79,6 +80,7 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM64 ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y) +romstage-y += boot.c romstage-y += c_entry.c romstage-y += stage_entry.S romstage-y += stages.c diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 9dc6dbd..6a2934b 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -20,12 +20,17 @@ #include <arch/cache.h> #include <program_loading.h> -void arch_payload_run(const struct payload *payload) +void arch_prog_run(struct prog *prog) { void (*doit)(void *); cache_sync_instructions(); - doit = prog_entry(&payload->prog); - doit(prog_entry_arg(&payload->prog)); + doit = prog_entry(prog); + doit(prog_entry_arg(prog)); +} + +void arch_payload_run(struct payload *payload) +{ + arch_prog_run(&payload->prog); } diff --git a/src/arch/mips/boot.c b/src/arch/mips/boot.c index 6e12d10..ebc45bb 100644 --- a/src/arch/mips/boot.c +++ b/src/arch/mips/boot.c @@ -20,7 +20,12 @@ #include <arch/stages.h> #include <program_loading.h> -void arch_payload_run(const struct payload *payload) +void arch_prog_run(struct prog *prog) { - stage_exit(prog_entry(&payload->prog)); + stage_exit(prog_entry(prog)); +} + +void arch_payload_run(struct payload *payload) +{ + arch_prog_run(&payload->prog); } diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index 242fd40..30c84a9 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -31,6 +31,7 @@ ifeq ($(CONFIG_ARCH_BOOTBLOCK_RISCV),y) bootblock_lds = $(src)/arch/riscv/bootblock.ld bootblock-y = bootblock.S stages.c +bootblock-y += boot.c bootblock-y += rom_media.c bootblock-y += \ $(top)/src/lib/memchr.c \ @@ -52,6 +53,7 @@ endif ################################################################################ ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y) +romstage-y += boot.c romstage-y += stages.c romstage-y += rom_media.c romstage-y += \ diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c index 4c2be03..f66c02f 100644 --- a/src/arch/riscv/boot.c +++ b/src/arch/riscv/boot.c @@ -17,11 +17,17 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <arch/stages.h> #include <program_loading.h> -void arch_payload_run(const struct payload *payload) +void arch_prog_run(struct prog *prog) { -// uart_rx_byte(0); - stage_exit(prog_entry(&payload->prog)); + void (*doit)(void *); + + doit = prog_entry(prog); + doit(prog_entry_arg(prog)); +} + +void arch_payload_run(struct payload *payload) +{ + arch_prog_run(&payload->prog); } diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 9f06b4f..7810ba8 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) romstage-y += cbmem.c +romstage-y += boot.c endif # CONFIG_ARCH_ROMSTAGE_X86_32 diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index 1fb36e2..d536584 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -123,7 +123,7 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) ); } -void arch_payload_run(const struct payload *payload) +void arch_payload_run(struct payload *payload) { if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) jmp_payload_no_bounce_buffer(prog_entry(&payload->prog)); @@ -132,3 +132,11 @@ void arch_payload_run(const struct payload *payload) (uintptr_t)payload->bounce.data, payload->bounce.size); } + +void arch_prog_run(struct prog *prog) +{ + __asm__ volatile ( + "jmp *%%edi\n" + :: "D"(prog_entry(prog)) + ); +} diff --git a/src/include/program_loading.h b/src/include/program_loading.h index 38047c7..1df1825 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -90,6 +90,16 @@ static inline void prog_set_entry(struct prog *prog, void *e, void *arg) prog->arg = arg; } +/* Run the program described by prog. */ +void prog_run(struct prog *prog); +/* Per architecture implementation running a program. */ +void arch_prog_run(struct prog *prog); +/* Platform (SoC/chipset) specific overrides for running a program. This is + * called prior to calling the arch_prog_run. Thus, if there is anything + * special that needs to be done by the platform similar to the architecture + * code it needs to that as well. */ +void platform_prog_run(struct prog *prog); + /************************ * ROMSTAGE LOADING * ************************/ @@ -143,7 +153,7 @@ void payload_run(void); void mirror_payload(struct payload *payload); /* architecture specific function to run payload. */ -void arch_payload_run(const struct payload *payload); +void arch_payload_run(struct payload *payload); /* Payload loading operations. */ struct payload_loader_ops { diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 3d92617..7499506 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -18,7 +18,7 @@ # subdirs-y += loaders -bootblock-y += arch_ops.c +bootblock-y += prog_ops.c bootblock-y += cbfs.c cbfs_core.c bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c @@ -26,7 +26,7 @@ bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c bootblock-y += memchr.c bootblock-y += memcmp.c -verstage-y += arch_ops.c +verstage-y += prog_ops.c verstage-y += delay.c verstage-y += cbfs.c verstage-y += memcmp.c @@ -35,7 +35,7 @@ verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c verstage-y += tlcl.c verstage-$(CONFIG_GENERIC_UDELAY) += timer.c -romstage-y += arch_ops.c +romstage-y += prog_ops.c romstage-y += memchr.c romstage-y += memcmp.c $(foreach arch,$(ARCH_SUPPORTED),\ @@ -60,7 +60,7 @@ romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += gcc.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c endif -ramstage-y += arch_ops.c +ramstage-y += prog_ops.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c ramstage-y += coreboot_table.c diff --git a/src/lib/arch_ops.c b/src/lib/arch_ops.c deleted file mode 100644 index ac1be77..0000000 --- a/src/lib/arch_ops.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Imagination Technologies - * Copyright 2015 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <program_loading.h> - -/* For each segment of a program loaded this function is called*/ -void __attribute__ ((weak)) arch_segment_loaded(uintptr_t start, size_t size, - int flags) -{ - /* do nothing */ -} diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 8e745c9..e3208a9 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -83,7 +83,7 @@ out: void payload_run(void) { - const struct payload *payload = &global_payload; + struct payload *payload = &global_payload; /* Reset to booting from this image as late as possible */ boot_successful(); diff --git a/src/lib/loaders/load_and_run_ramstage.c b/src/lib/loaders/load_and_run_ramstage.c index 82bc1e0..9067a28 100644 --- a/src/lib/loaders/load_and_run_ramstage.c +++ b/src/lib/loaders/load_and_run_ramstage.c @@ -48,7 +48,7 @@ load_ramstage(const struct ramstage_loader_ops *ops, timestamp_add_now(TS_END_COPYRAM); - stage_exit(prog_entry(ramstage)); + prog_run(ramstage); } static void run_ramstage_from_resume(struct romstage_handoff *handoff, @@ -60,7 +60,7 @@ static void run_ramstage_from_resume(struct romstage_handoff *handoff, if (prog_entry(ramstage) != NULL) { printk(BIOS_DEBUG, "Jumping to image.\n"); - stage_exit(prog_entry(ramstage)); + prog_run(ramstage); } } } diff --git a/src/lib/loaders/load_and_run_romstage.c b/src/lib/loaders/load_and_run_romstage.c index 3ad9176..8467e90 100644 --- a/src/lib/loaders/load_and_run_romstage.c +++ b/src/lib/loaders/load_and_run_romstage.c @@ -38,5 +38,5 @@ void run_romstage(void) halt(); } - stage_exit(prog_entry(&romstage)); + prog_run(&romstage); } diff --git a/src/lib/prog_ops.c b/src/lib/prog_ops.c new file mode 100644 index 0000000..755b135 --- /dev/null +++ b/src/lib/prog_ops.c @@ -0,0 +1,39 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Imagination Technologies + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <program_loading.h> + +/* For each segment of a program loaded this function is called*/ +void __attribute__ ((weak)) arch_segment_loaded(uintptr_t start, size_t size, + int flags) +{ + /* do nothing */ +} + +void prog_run(struct prog *prog) +{ + platform_prog_run(prog); + arch_prog_run(prog); +} + +void __attribute__ ((weak)) platform_prog_run(struct prog *prog) +{ + /* do nothing */ +}

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Patch set updated for coreboot: 2e0fa68 tegra124: implement platform_prog_run()
by Aaron Durbin 27 Mar '15

27 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8847 -gerrit commit 2e0fa6812735a73bf66dff0be7dfebc7fa029006 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 20 16:42:17 2015 -0500 tegra124: implement platform_prog_run() The tegra124 SoC is currently booting up on the AVP cpu which bootstraps the rest of the SoC. Upon exiting bootblock it runs romstage from its faster armv7 core. Instead of hard coding the stage loading operations use run_romstage(). Change-Id: Idddcfd5443f08d4dd41e1d9b71650ff6d4b14bc4 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/nvidia/tegra124/bootblock.c | 39 ++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 18 deletions(-) diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c index f08ca41..1ccc394 100644 --- a/src/soc/nvidia/tegra124/bootblock.c +++ b/src/soc/nvidia/tegra124/bootblock.c @@ -22,16 +22,30 @@ #include <bootblock_common.h> #include <cbfs.h> #include <console/console.h> +#include <program_loading.h> #include <soc/clock.h> #include <soc/nvidia/tegra/apbmisc.h> #include <vendorcode/google/chromeos/chromeos.h> #include "pinmux.h" #include "power.h" -void main(void) +static void run_next_stage(void *entry) { - void *entry; + ASSERT(entry); + clock_cpu0_config(entry); + + power_enable_and_ungate_cpu(); + + /* Repair ram on cluster0 and cluster1 after CPU is powered on. */ + ram_repair(); + + clock_cpu0_remove_reset(); + clock_halt_avp(); +} + +void main(void) +{ // enable pinmux clamp inputs clamp_tristate_inputs(); @@ -70,21 +84,10 @@ void main(void) PINMUX_PWR_INT_N_FUNC_PMICINTR | PINMUX_INPUT_ENABLE); - if (IS_ENABLED(CONFIG_VBOOT2_VERIFY_FIRMWARE)) - entry = NULL; - else - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, - CONFIG_CBFS_PREFIX "/romstage"); - - ASSERT(entry); - clock_cpu0_config(entry); - - power_enable_and_ungate_cpu(); - - /* Repair ram on cluster0 and cluster1 after CPU is powered on. */ - ram_repair(); - - clock_cpu0_remove_reset(); + run_romstage(); +} - clock_halt_avp(); +void platform_prog_run(struct prog *prog) +{ + run_next_stage(prog_entry(prog)); }

1 0

Patch set updated for coreboot: 0c93eb8 crossgcc: don't use libdl while building GDB on FreeBSD
by Stefan Reinauer 27 Mar '15

27 Mar '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2342 -gerrit commit 0c93eb8b5dc8a85710c2e83f793fdcd0bdd8cbe1 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Sat Feb 9 23:58:06 2013 +0100 crossgcc: don't use libdl while building GDB on FreeBSD crossgcc: fix building GDB on FreeBSD (and possibly NetBSD/OpenBSD). Since FreeBSD doesn't have libdl, these errors are shown: - config.log: /usr/bin/ld: cannot find -ldl - crossgcc-build.log: configure: error: C compiler cannot create executables Conditionally remove -ldl from LDFLAGS. Change-Id: I79c48da7e6700a4606c9e0c1314241db8997d3f3 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- util/crossgcc/buildgcc | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index fde8bc6..5255a28 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -583,11 +583,19 @@ printf "Building GDB ${GDB_VERSION} ... " cd ${BUILDDIRPREFIX}-gdb export PYTHONHOME=$DESTDIR$TARGETDIR rm -f .failed + if [ $(uname) = "FreeBSD" -o $(uname) = "NetBSD" ]; then LDFLAGS="-Wl,-rpath,\$\$ORIGIN/../lib/ -L$DESTDIR$TARGETDIR/lib \ - -lpthread -ldl -lutil" \ + -lpthread -lutil" \ CC="$CC" CFLAGS="$HOSTCFLAGS -I$DESTDIR$TARGETDIR/include" \ ../gdb-${GDB_VERSION}/configure --prefix=$TARGETDIR \ --target=${TARGETARCH} --disable-werror --disable-nls + else + LDFLAGS="-Wl,-rpath,\$\$ORIGIN/../lib/ -L$DESTDIR$TARGETDIR/lib \ + -lpthread -ldl -lutil" \ + CC="$CC" CFLAGS="$HOSTCFLAGS -I$DESTDIR$TARGETDIR/include" \ + ../gdb-${GDB_VERSION}/configure --prefix=$TARGETDIR \ + --target=${TARGETARCH} --disable-werror --disable-nls + fi $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed if [ ! -f .failed ]; then touch .success; fi

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Patch merged into coreboot/master: 00903e5 cbfs/rmodule: add architecture specific operations at stage load
by gerrit＠coreboot.org 27 Mar '15

27 Mar '15

the following patch was just integrated into master: commit 00903e5fc0249d822af1d9843358a3aa3675991b Author: Ionela Voinescu <ionela.voinescu(a)imgtec.com> Date: Fri Jan 9 13:14:20 2015 +0000 cbfs/rmodule: add architecture specific operations at stage load Two weak functions were added so that architecture specific operations on each segment of payload or stage can be performed. Each architecture must define its own operations, otherwise the behavior will default to do-nothing functions. This patch has been updated by to fit more in line with how program loading is currently being done. The API is the same as the original, but all call sites to stages/payloads have been updated. This is known to break any archs that use rmodule loading that needs cache maintenance. That will be fixed in a forthcoming patch. Also, the vboot paths are left as is for easier upstreaming of the rest of the vboot patches. Original-Change-Id: Ie29e7f9027dd430c8b4dde9848fa3413c5dbfbfa Original-Signed-off-by: Ionela Voinescu <ionela.voinescu(a)imgtec.com> Original-Reviewed-on: https://chromium-review.googlesource.com/239881 Original-Reviewed-by: Vadim Bendebury <vbendeb(a)chromium.org> (cherry picked from commit c82c21ce87a4c02bd9219548a4226a58e77beef0) Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Change-Id: Ifcee5cd9ac5dbca991556296eb5e170b47b77af7 Reviewed-on: http://review.coreboot.org/8837 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/8837 for details. -gerrit

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coreboot-gerrit March 2015