coreboot-gerrit January 2015

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: c0aebd7 mainboard/packardbell/ms2290/romstage.c: Comment unused func
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8167 -gerrit commit c0aebd7daac48acc7f280ac215362d673dd4f19d Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Jan 8 01:57:43 2015 +1100 mainboard/packardbell/ms2290/romstage.c: Comment unused func Take unused reverse eng function out of build by wrapping in #if 0. Change-Id: I816b3ea08a8858fc03e4455c1d7711265e63cba4 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/packardbell/ms2290/romstage.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c index a366d38..f702e9f 100644 --- a/src/mainboard/packardbell/ms2290/romstage.c +++ b/src/mainboard/packardbell/ms2290/romstage.c @@ -163,10 +163,13 @@ static inline u32 read_acpi32(u32 addr) return inl(DEFAULT_PMBASE | addr); } +// unused func - used for RE +#if 0 static inline u16 read_acpi16(u32 addr) { return inw(DEFAULT_PMBASE | addr); } +#endif #include <cpu/intel/romstage.h> void main(unsigned long bist)

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New patch to review for coreboot: 7e0db61 northbridge/intel/nehalem/raminit.c: Remove redundant function
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8166 -gerrit commit 7e0db61b839bc684017e1e09a2d9ee7fec7e399a Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Jan 8 01:55:22 2015 +1100 northbridge/intel/nehalem/raminit.c: Remove redundant function Remove 'read_mchbar8_bypass()' as 'read_mchbar8()' does the same thing and 'read_mchbar8_bypass()' is unused. Change-Id: I0dc2325e6205c38b63e5200c408ece65e4f938dc Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/northbridge/intel/nehalem/raminit.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 9ca98d5..85c82c9 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -146,11 +146,6 @@ static inline u8 read_mchbar8(u32 addr) return MCHBAR8(addr); } -static inline u8 read_mchbar8_bypass(u32 addr) -{ - return MCHBAR8(addr); -} - static void clflush(u32 addr) { asm volatile ("clflush (%0)"::"r" (addr));

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Patch set updated for coreboot: dbf293a southbridge/intel/lynxpoint/me_9.x.c: Avoid unused func warn
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8157 -gerrit commit dbf293a207353e8a8b88ff147194abc4a28abbd4 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jan 7 15:53:00 2015 +1100 southbridge/intel/lynxpoint/me_9.x.c: Avoid unused func warn Put a guard around this function to avoid compiler warnings pretaining to unused functions when a false branch is hit on a guard further down the file. Change-Id: Ie4955ee9df6904c38848f46226b53be37d9fa239 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/southbridge/intel/lynxpoint/me_9.x.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index dfed6de..eb118cb 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -374,6 +374,9 @@ static int mei_recv_msg(void *header, int header_bytes, return mei_wait_for_me_ready(); } +#if IS_ENABLED (CONFIG_DEBUG_INTEL_ME) + +#if defined(__SMM__) static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi, void *req_data, int req_bytes, void *rsp_data, int rsp_bytes) @@ -411,6 +414,7 @@ static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi, return 0; } +#endif /* __SMM__ */ static inline int mei_sendrecv_icc(struct icc_header *icc, void *req_data, int req_bytes, @@ -435,6 +439,7 @@ static inline int mei_sendrecv_icc(struct icc_header *icc, return 0; } +#endif /* CONFIG_DEBUG_INTEL_ME */ /* * mbp give up routine. This path is taken if hfs.mpb_rdy is 0 or the read

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Patch set updated for coreboot: 653c0c9 mainboard/lenovo/x201/romstage.c: Avoid unused func warning
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8158 -gerrit commit 653c0c977618a7408b468d2b2ea0b9c027725c39 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jan 7 15:55:32 2015 +1100 mainboard/lenovo/x201/romstage.c: Avoid unused func warning Change-Id: I646dddd39e61b59358b29a49239c0a1de77c7e55 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/lenovo/x201/romstage.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 64011b1..535c373 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -167,10 +167,14 @@ static inline u32 read_acpi32(u32 addr) return inl(DEFAULT_PMBASE | addr); } +// Used for reverse engining purposes +// avoid unused func compiler warn +#if 0 static inline u16 read_acpi16(u32 addr) { return inw(DEFAULT_PMBASE | addr); } +#endif static void set_fsb_frequency(void) {

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Patch set updated for coreboot: 0f78355 Makefile: clang - ramp up some more warnings
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8136 -gerrit commit 0f7835579aace69182fbf7820998a7751de3f1b6 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Jan 6 14:58:31 2015 +1100 Makefile: clang - ramp up some more warnings Change-Id: I5262cba22d262f5d74d1edd958b59c2695271293 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 6ef9838..ce2b727 100644 --- a/Makefile +++ b/Makefile @@ -119,7 +119,7 @@ ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) # this means the triple is i386-linux-elf instead of i386-none-elf CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 # Tone down some clang warnings -CFLAGS_x86_32 += -Wno-unused-variable -Wno-unused-function -Wno-tautological-compare -Wno-shift-overflow +CFLAGS_x86_32 += -Wno-unused-variable -Wno-tautological-compare -Wno-shift-overflow CC_x86_32:=clang HOSTCC := clang

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Patch set updated for coreboot: 90a450d Re-factor 'to_flash_offset()' into 'spi_flash.h'
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8165 -gerrit commit 90a450d23d38fdfaf17a9053c942300b3f8023cf Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat May 24 04:09:50 2014 +1000 Re-factor 'to_flash_offset()' into 'spi_flash.h' Re-factor to_flash_offset() into 'spi_flash.h' header. Motivated by Clang complaining that the function 'to_flash_offset' is unused. Change-Id: Ie2a8ac3cddac1cd87f1197efcd1bc9eb3189136e Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/drivers/intel/fsp/fastboot_cache.c | 13 ++----------- src/include/spi_flash.h | 11 +++++++++++ src/northbridge/intel/haswell/mrccache.c | 7 +------ src/northbridge/intel/sandybridge/mrccache.c | 7 +------ src/soc/intel/common/nvm.c | 10 ++-------- src/soc/intel/fsp_baytrail/nvm.c | 13 ++----------- 6 files changed, 19 insertions(+), 42 deletions(-) diff --git a/src/drivers/intel/fsp/fastboot_cache.c b/src/drivers/intel/fsp/fastboot_cache.c index 64982d8..907e143 100644 --- a/src/drivers/intel/fsp/fastboot_cache.c +++ b/src/drivers/intel/fsp/fastboot_cache.c @@ -31,15 +31,6 @@ #include <lib.h> // hexdump #include "fsp_util.h" -#ifndef CONFIG_VIRTUAL_ROM_SIZE -#error "CONFIG_VIRTUAL_ROM_SIZE must be set." -#endif - -/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(void *p) { - return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE); -} - static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -205,7 +196,7 @@ void update_mrc_cache(void *unused) "Need to erase the MRC cache region of %d bytes at %p\n", cache_size, cache_base); - flash->erase(flash, to_flash_offset(cache_base), cache_size); + flash->erase(flash, to_flash_offset(flash, cache_base), cache_size); /* we will start at the beginning again */ cache = cache_base; @@ -213,7 +204,7 @@ void update_mrc_cache(void *unused) /* 4. write mrc data with flash->write() */ printk(BIOS_DEBUG, "Write MRC cache update to flash at %p\n", cache); - flash->write(flash, to_flash_offset(cache), + flash->write(flash, to_flash_offset(flash, cache), current->mrc_data_size + sizeof(*current), current); } diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 7e430d0..fa97ad5 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -76,4 +76,15 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, return flash->erase(flash, offset, len); } +#if !defined(__PRE_RAM__) +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { +#if IS_ENABLED (CONFIG_VIRTUAL_ROM_SIZE) + return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE); +#else + return ((u32)p + flash->size); +#endif /* defined(CONFIG_VIRTUAL_ROM_SIZE) */ +} +#endif /* !defined(__PRE_RAM__) */ + #endif /* _SPI_FLASH_H_ */ diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c index a921e04..88af789 100644 --- a/src/northbridge/intel/haswell/mrccache.c +++ b/src/northbridge/intel/haswell/mrccache.c @@ -33,11 +33,6 @@ #include <vendorcode/google/chromeos/fmap.h> #endif -/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { - return ((u32)p + flash->size); -} - static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -228,7 +223,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif +#endif /* !defined(__PRE_RAM__) */ struct mrc_data_container *find_current_mrc_cache(void) { diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c index c84ff82..664fb7f 100644 --- a/src/northbridge/intel/sandybridge/mrccache.c +++ b/src/northbridge/intel/sandybridge/mrccache.c @@ -33,11 +33,6 @@ #include <vendorcode/google/chromeos/fmap.h> #endif -/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { - return ((u32)p + flash->size); -} - static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -227,7 +222,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif +#endif /* !defined(__PRE_RAM__) */ struct mrc_data_container *find_current_mrc_cache(void) { diff --git a/src/soc/intel/common/nvm.c b/src/soc/intel/common/nvm.c index 791422f..54b3baf 100644 --- a/src/soc/intel/common/nvm.c +++ b/src/soc/intel/common/nvm.c @@ -46,12 +46,6 @@ static int nvm_init(void) return 0; } -/* Convert memory mapped pointer to flash offset. */ -static inline uint32_t to_flash_offset(void *p) -{ - return CONFIG_ROM_SIZE + (uintptr_t)p; -} - int nvm_is_erased(const void *start, size_t size) { const uint8_t *cur = start; @@ -70,7 +64,7 @@ int nvm_erase(void *start, size_t size) { if (nvm_init() < 0) return -1; - return flash->erase(flash, to_flash_offset(start), size); + return flash->erase(flash, to_flash_offset(flash, start), size); } /* Write data to NVM. Returns 0 on success < 0 on error. */ @@ -78,5 +72,5 @@ int nvm_write(void *start, const void *data, size_t size) { if (nvm_init() < 0) return -1; - return flash->write(flash, to_flash_offset(start), size, data); + return flash->write(flash, to_flash_offset(flash, start), size, data); } diff --git a/src/soc/intel/fsp_baytrail/nvm.c b/src/soc/intel/fsp_baytrail/nvm.c index 0224463..d1e5223 100644 --- a/src/soc/intel/fsp_baytrail/nvm.c +++ b/src/soc/intel/fsp_baytrail/nvm.c @@ -47,15 +47,6 @@ static int nvm_init(void) return 0; } -/* Convert memory mapped pointer to flash offset. */ -static inline uint32_t to_flash_offset(void *p) -{ -#ifndef CONFIG_ROM_SIZE -#error CONFIG_ROM_SIZE must be set. -#endif - return CONFIG_ROM_SIZE + (uintptr_t)p; -} - int nvm_is_erased(const void *start, size_t size) { const uint8_t *cur = start; @@ -74,7 +65,7 @@ int nvm_erase(void *start, size_t size) { if (nvm_init() < 0) return -1; - flash->erase(flash, to_flash_offset(start), size); + flash->erase(flash, to_flash_offset(flash, start), size); return 0; } @@ -83,6 +74,6 @@ int nvm_write(void *start, const void *data, size_t size) { if (nvm_init() < 0) return -1; - flash->write(flash, to_flash_offset(start), size, data); + flash->write(flash, to_flash_offset(flash, start), size, data); return 0; }

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Patch set updated for coreboot: 9720540 southbridge/intel/lynxpoint/me_9.x.c: Avoid unused func warn
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8157 -gerrit commit 972054028c9accdbfb7cdfd41e2a4584e10826a7 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jan 7 15:53:00 2015 +1100 southbridge/intel/lynxpoint/me_9.x.c: Avoid unused func warn Put a guard around this function to avoid compiler warnings pretaining to unused functions when a false branch is hit on a guard further down the file. Change-Id: Ie4955ee9df6904c38848f46226b53be37d9fa239 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/southbridge/intel/lynxpoint/me_9.x.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index dfed6de..84c287b 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -374,6 +374,7 @@ static int mei_recv_msg(void *header, int header_bytes, return mei_wait_for_me_ready(); } +#if IS_ENABLED (CONFIG_DEBUG_INTEL_ME) || defined(__SMM__) static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi, void *req_data, int req_bytes, void *rsp_data, int rsp_bytes) @@ -411,6 +412,7 @@ static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi, return 0; } +#endif static inline int mei_sendrecv_icc(struct icc_header *icc, void *req_data, int req_bytes,

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Patch set updated for coreboot: 5ba204a mainboard/lenovo/x201/romstage.c: Avoid unused func warning
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8158 -gerrit commit 5ba204a0dddbd570aa92a55a2f0642205bc16caf Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jan 7 15:55:32 2015 +1100 mainboard/lenovo/x201/romstage.c: Avoid unused func warning Change-Id: I646dddd39e61b59358b29a49239c0a1de77c7e55 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/lenovo/x201/romstage.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 64011b1..535c373 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -167,10 +167,14 @@ static inline u32 read_acpi32(u32 addr) return inl(DEFAULT_PMBASE | addr); } +// Used for reverse engining purposes +// avoid unused func compiler warn +#if 0 static inline u16 read_acpi16(u32 addr) { return inw(DEFAULT_PMBASE | addr); } +#endif static void set_fsb_frequency(void) {

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Patch set updated for coreboot: aff3747 Makefile: clang - ramp up some more warnings
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8136 -gerrit commit aff3747ae02981672e32320c00d0036196fe5935 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Jan 6 14:58:31 2015 +1100 Makefile: clang - ramp up some more warnings Change-Id: I5262cba22d262f5d74d1edd958b59c2695271293 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 6ef9838..ce2b727 100644 --- a/Makefile +++ b/Makefile @@ -119,7 +119,7 @@ ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) # this means the triple is i386-linux-elf instead of i386-none-elf CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 # Tone down some clang warnings -CFLAGS_x86_32 += -Wno-unused-variable -Wno-unused-function -Wno-tautological-compare -Wno-shift-overflow +CFLAGS_x86_32 += -Wno-unused-variable -Wno-tautological-compare -Wno-shift-overflow CC_x86_32:=clang HOSTCC := clang

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Patch set updated for coreboot: 9832e00 Re-factor 'to_flash_offset()' into 'spi_flash.h'
by Edward O'Callaghan 07 Jan '15

07 Jan '15

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8165 -gerrit commit 9832e008f1e25e75c98245bf92522588ba51d50c Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat May 24 04:09:50 2014 +1000 Re-factor 'to_flash_offset()' into 'spi_flash.h' Re-factor to_flash_offset() into 'spi_flash.h' header. Motivated by Clang complaining that the function 'to_flash_offset' is unused. Change-Id: Ie2a8ac3cddac1cd87f1197efcd1bc9eb3189136e Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/drivers/intel/fsp/fastboot_cache.c | 13 ++----------- src/include/spi_flash.h | 11 +++++++++++ src/northbridge/intel/haswell/mrccache.c | 7 +------ src/northbridge/intel/sandybridge/mrccache.c | 7 +------ src/soc/intel/common/nvm.c | 10 ++-------- src/soc/intel/fsp_baytrail/nvm.c | 13 ++----------- 6 files changed, 19 insertions(+), 42 deletions(-) diff --git a/src/drivers/intel/fsp/fastboot_cache.c b/src/drivers/intel/fsp/fastboot_cache.c index 64982d8..907e143 100644 --- a/src/drivers/intel/fsp/fastboot_cache.c +++ b/src/drivers/intel/fsp/fastboot_cache.c @@ -31,15 +31,6 @@ #include <lib.h> // hexdump #include "fsp_util.h" -#ifndef CONFIG_VIRTUAL_ROM_SIZE -#error "CONFIG_VIRTUAL_ROM_SIZE must be set." -#endif - -/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(void *p) { - return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE); -} - static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -205,7 +196,7 @@ void update_mrc_cache(void *unused) "Need to erase the MRC cache region of %d bytes at %p\n", cache_size, cache_base); - flash->erase(flash, to_flash_offset(cache_base), cache_size); + flash->erase(flash, to_flash_offset(flash, cache_base), cache_size); /* we will start at the beginning again */ cache = cache_base; @@ -213,7 +204,7 @@ void update_mrc_cache(void *unused) /* 4. write mrc data with flash->write() */ printk(BIOS_DEBUG, "Write MRC cache update to flash at %p\n", cache); - flash->write(flash, to_flash_offset(cache), + flash->write(flash, to_flash_offset(flash, cache), current->mrc_data_size + sizeof(*current), current); } diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 7e430d0..fa97ad5 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -76,4 +76,15 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, return flash->erase(flash, offset, len); } +#if !defined(__PRE_RAM__) +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { +#if IS_ENABLED (CONFIG_VIRTUAL_ROM_SIZE) + return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE); +#else + return ((u32)p + flash->size); +#endif /* defined(CONFIG_VIRTUAL_ROM_SIZE) */ +} +#endif /* !defined(__PRE_RAM__) */ + #endif /* _SPI_FLASH_H_ */ diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c index a921e04..88af789 100644 --- a/src/northbridge/intel/haswell/mrccache.c +++ b/src/northbridge/intel/haswell/mrccache.c @@ -33,11 +33,6 @@ #include <vendorcode/google/chromeos/fmap.h> #endif -/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { - return ((u32)p + flash->size); -} - static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -228,7 +223,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif +#endif /* !defined(__PRE_RAM__) */ struct mrc_data_container *find_current_mrc_cache(void) { diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c index c84ff82..664fb7f 100644 --- a/src/northbridge/intel/sandybridge/mrccache.c +++ b/src/northbridge/intel/sandybridge/mrccache.c @@ -33,11 +33,6 @@ #include <vendorcode/google/chromeos/fmap.h> #endif -/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { - return ((u32)p + flash->size); -} - static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -227,7 +222,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif +#endif /* !defined(__PRE_RAM__) */ struct mrc_data_container *find_current_mrc_cache(void) { diff --git a/src/soc/intel/common/nvm.c b/src/soc/intel/common/nvm.c index 791422f..54b3baf 100644 --- a/src/soc/intel/common/nvm.c +++ b/src/soc/intel/common/nvm.c @@ -46,12 +46,6 @@ static int nvm_init(void) return 0; } -/* Convert memory mapped pointer to flash offset. */ -static inline uint32_t to_flash_offset(void *p) -{ - return CONFIG_ROM_SIZE + (uintptr_t)p; -} - int nvm_is_erased(const void *start, size_t size) { const uint8_t *cur = start; @@ -70,7 +64,7 @@ int nvm_erase(void *start, size_t size) { if (nvm_init() < 0) return -1; - return flash->erase(flash, to_flash_offset(start), size); + return flash->erase(flash, to_flash_offset(flash, start), size); } /* Write data to NVM. Returns 0 on success < 0 on error. */ @@ -78,5 +72,5 @@ int nvm_write(void *start, const void *data, size_t size) { if (nvm_init() < 0) return -1; - return flash->write(flash, to_flash_offset(start), size, data); + return flash->write(flash, to_flash_offset(flash, start), size, data); } diff --git a/src/soc/intel/fsp_baytrail/nvm.c b/src/soc/intel/fsp_baytrail/nvm.c index 0224463..d1e5223 100644 --- a/src/soc/intel/fsp_baytrail/nvm.c +++ b/src/soc/intel/fsp_baytrail/nvm.c @@ -47,15 +47,6 @@ static int nvm_init(void) return 0; } -/* Convert memory mapped pointer to flash offset. */ -static inline uint32_t to_flash_offset(void *p) -{ -#ifndef CONFIG_ROM_SIZE -#error CONFIG_ROM_SIZE must be set. -#endif - return CONFIG_ROM_SIZE + (uintptr_t)p; -} - int nvm_is_erased(const void *start, size_t size) { const uint8_t *cur = start; @@ -74,7 +65,7 @@ int nvm_erase(void *start, size_t size) { if (nvm_init() < 0) return -1; - flash->erase(flash, to_flash_offset(start), size); + flash->erase(flash, to_flash_offset(flash, start), size); return 0; } @@ -83,6 +74,6 @@ int nvm_write(void *start, const void *data, size_t size) { if (nvm_init() < 0) return -1; - flash->write(flash, to_flash_offset(start), size, data); + flash->write(flash, to_flash_offset(flash, start), size, data); return 0; }

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coreboot-gerrit January 2015