coreboot-gerrit July 2014

coreboot-gerrit@coreboot.org

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861 discussions

New patch to review for coreboot: ee04f13 southbridge/intel/bd82x6x/me_8.x.c: Trivial - space to tab fix
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6268 -gerrit commit ee04f1324f9df2e544f9d2a90088fa25ccc93ce2 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Jul 13 00:28:05 2014 +1000 southbridge/intel/bd82x6x/me_8.x.c: Trivial - space to tab fix Change-Id: I5b6d0a1f5f96a8d6cfc5a14baaa0f9267339b072 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/southbridge/intel/bd82x6x/me_8.x.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 356d9a5..2dc83f7 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -392,11 +392,10 @@ static int mkhi_get_fwcaps(mefwcaps_sku *cap) }; /* Send request and wait for response */ - if (mei_sendrecv(&mei, &mkhi, &rule_id, &cap_msg, sizeof(cap_msg)) - < 0) { + if (mei_sendrecv(&mei, &mkhi, &rule_id, &cap_msg, sizeof(cap_msg)) < 0) { printk(BIOS_ERR, "ME: GET FWCAPS message failed\n"); return -1; - } + } *cap = cap_msg.caps_sku; return 0; } @@ -420,7 +419,7 @@ static void me_print_fwcaps(mbp_fw_caps *caps_section) print_cap("IntelR Capability Licensing Service (CLS)", cap->intel_cls); print_cap("IntelR Power Sharing Technology (MPC)", cap->intel_mpc); print_cap("ICC Over Clocking", cap->icc_over_clocking); - print_cap("Protected Audio Video Path (PAVP)", cap->pavp); + print_cap("Protected Audio Video Path (PAVP)", cap->pavp); print_cap("IPV6", cap->ipv6); print_cap("KVM Remote Control (KVM)", cap->kvm); print_cap("Outbreak Containment Heuristic (OCH)", cap->och);

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New patch to review for coreboot: 166aa70 southbridge/intel/bd82x6x/early_smbus.c: Use 'pci_devfn_t'
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6267 -gerrit commit 166aa70c5980284c17271c44e021811546626fd9 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Jul 12 19:59:31 2014 +1000 southbridge/intel/bd82x6x/early_smbus.c: Use 'pci_devfn_t' Straighten out typedef usage between 'pci_devfn_t' vs. 'device_t' with the aim to deprecate one version of 'device_t' various typedefs. Change-Id: I5cdd61292925ec2c5d42969cf6a118c9c49bbcb4 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/southbridge/intel/bd82x6x/early_smbus.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c index 616e7c3..9105cba 100644 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ b/src/southbridge/intel/bd82x6x/early_smbus.c @@ -27,7 +27,7 @@ void enable_smbus(void) { - device_t dev; + pci_devfn_t dev; /* Set the SMBus device statically. */ dev = PCI_DEV(0x0, 0x1f, 0x3);

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Patch set updated for coreboot: b4b1b58 NOTFORMERGE: test
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6232 -gerrit commit b4b1b586c9e5038644934a0c1e00599cab403b00 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Jul 10 02:49:54 2014 +1000 NOTFORMERGE: test Change-Id: Icb2eca566a96b723a3162983aac57394e6a866d3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/arch/x86/include/arch/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index d5cdf35..4ae9fe2 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -224,7 +224,7 @@ static inline int log2f(int value) /* FIXME: Sources for romstage still use device_t. */ /* Use pci_devfn_t or pnp_devfn_t instead */ -typedef u32 device_t; +//typedef u32 device_t; /* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G, * We don't need to set %fs, and %gs anymore

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Patch set updated for coreboot: a6d022c Fix romstage dev type, 'device_t' -> 'pci_devfn_t' in get_sbdn()
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6226 -gerrit commit a6d022c046d13d09ea97ad811c20cfef9e798528 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jul 9 05:22:32 2014 +1000 Fix romstage dev type, 'device_t' -> 'pci_devfn_t' in get_sbdn() Unfortunately coreboot has to deal with ROMCC's short comings which has lead to a little bit of confusion due to typedefs. Essentially, coreboot defines four typedefs: * 'typedef struct device * device_t' in ramstage not in SIMPLE_DEVICE mode * 'typedef u32 device_t' in romstage or when SIMPLE_DEVICE is defined * 'typedef u32 pnp_devfn_t' * 'typedef u32 pci_devfn_t' Some early functions make use of 'device_t' over 'pci_devfn_t' and since the C type-checker does not enforce typedefs to the same type 'u32' these are never noticed. Fix these so that 'device_t' does not conflict in romstage for later work. We later plan to have 'pnp_devfn_t' and 'pci_devfn_t' as the only variants of 'u32' and 'device_t' to be a struct pointer type exclusively. Change-Id: Ied3940d9b2ec119ca4b75b955305add59edbbb18 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/asus/a8v-e_deluxe/romstage.c | 2 +- src/mainboard/asus/a8v-e_se/romstage.c | 2 +- src/mainboard/asus/f2a85-m/romstage.c | 2 +- src/mainboard/asus/k8v-x/romstage.c | 2 +- src/mainboard/asus/m2v-mx_se/romstage.c | 2 +- src/mainboard/asus/m2v/romstage.c | 2 +- src/southbridge/amd/cimx/sb700/early.c | 6 +++--- src/southbridge/amd/cimx/sb800/early.c | 2 +- src/southbridge/amd/sb600/early_setup.c | 2 +- src/southbridge/amd/sb700/early_setup.c | 2 +- src/southbridge/broadcom/bcm5785/early_setup.c | 2 +- src/southbridge/nvidia/mcp55/early_ctrl.c | 2 +- src/southbridge/sis/sis966/early_ctrl.c | 2 +- 13 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index 1dea57b..9604816 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -90,7 +90,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index abe5f84..1261293 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -90,7 +90,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index f50f334..dc7363d 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -66,7 +66,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; u8 byte; - device_t dev; + pci_devfn_t dev; #if IS_ENABLED(CONFIG_POST_DEVICE_PCI_PCIE) hudson_pci_port80(); diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c index 4d6bd60..e4b9c6b 100644 --- a/src/mainboard/asus/k8v-x/romstage.c +++ b/src/mainboard/asus/k8v-x/romstage.c @@ -88,7 +88,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index d374828..6e113c0 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -107,7 +107,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index a2c6a03..94b1251 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -91,7 +91,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/southbridge/amd/cimx/sb700/early.c b/src/southbridge/amd/cimx/sb700/early.c index 6dc4ff4..b606352 100644 --- a/src/southbridge/amd/cimx/sb700/early.c +++ b/src/southbridge/amd/cimx/sb700/early.c @@ -34,7 +34,7 @@ */ u32 get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; printk(BIOS_SPEW, "SB700 - Early.c - %s - Start.\n", __func__); dev = pci_locate_device_on_bus( @@ -69,7 +69,7 @@ void sb_Poweron_Init(void) void sb7xx_51xx_enable_wideio(u8 wio_index, u16 base) { /* TODO: Now assume wio_index=0 */ - device_t dev; + pci_devfn_t dev; u8 reg8; //dev = pci_locate_device(PCI_ID(0x1002, 0x439d), 0); /* LPC Controller */ @@ -83,7 +83,7 @@ void sb7xx_51xx_enable_wideio(u8 wio_index, u16 base) void sb7xx_51xx_disable_wideio(u8 wio_index) { /* TODO: Now assume wio_index=0 */ - device_t dev; + pci_devfn_t dev; u8 reg8; //dev = pci_locate_device(PCI_ID(0x1002, 0x439d), 0); /* LPC Controller */ diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c index 40648ed..0341567 100644 --- a/src/southbridge/amd/cimx/sb800/early.c +++ b/src/southbridge/amd/cimx/sb800/early.c @@ -33,7 +33,7 @@ */ u32 get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; printk(BIOS_DEBUG, "SB800 - %s - %s - Start.\n", __FILE__, __func__); //dev = PCI_DEV(bus, 0x14, 0); diff --git a/src/southbridge/amd/sb600/early_setup.c b/src/southbridge/amd/sb600/early_setup.c index b6611f6..6797399 100644 --- a/src/southbridge/amd/sb600/early_setup.c +++ b/src/southbridge/amd/sb600/early_setup.c @@ -106,7 +106,7 @@ static void sb600_lpc_init(void) /* what is its usage? */ static u32 get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(PCI_ID(0x1002, 0x4385), bus); diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index b7a5e77..7208146 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -221,7 +221,7 @@ void sb7xx_51xx_disable_wideio(u8 wio_index) /* what is its usage? */ u32 __attribute__ ((weak)) get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(PCI_ID(0x1002, 0x4385), bus); diff --git a/src/southbridge/broadcom/bcm5785/early_setup.c b/src/southbridge/broadcom/bcm5785/early_setup.c index 9dee295..0a69e5e 100644 --- a/src/southbridge/broadcom/bcm5785/early_setup.c +++ b/src/southbridge/broadcom/bcm5785/early_setup.c @@ -69,7 +69,7 @@ static void bcm5785_enable_wdt_port_cf9(void) unsigned get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. * There can only be one bcm5785 on a hypertransport chain/bus. diff --git a/src/southbridge/nvidia/mcp55/early_ctrl.c b/src/southbridge/nvidia/mcp55/early_ctrl.c index 92f9d03..865c023 100644 --- a/src/southbridge/nvidia/mcp55/early_ctrl.c +++ b/src/southbridge/nvidia/mcp55/early_ctrl.c @@ -24,7 +24,7 @@ static unsigned get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_NVIDIA, diff --git a/src/southbridge/sis/sis966/early_ctrl.c b/src/southbridge/sis/sis966/early_ctrl.c index 3695023..4b3a228 100644 --- a/src/southbridge/sis/sis966/early_ctrl.c +++ b/src/southbridge/sis/sis966/early_ctrl.c @@ -23,7 +23,7 @@ static unsigned get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(

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Patch set updated for coreboot: 93806cc device/pci_early.c: Mixes up variants of a typedefs to 'u32'
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6225 -gerrit commit 93806cc15cd88defa8fc3025f73771dd8faf5961 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jul 9 04:55:16 2014 +1000 device/pci_early.c: Mixes up variants of a typedefs to 'u32' Unfortunately coreboot has to deal with ROMCC's short comings which has lead to a little bit of confusion due to typedefs. Essentially, coreboot defines four typedefs: * 'typedef struct device * device_t' in ramstage not in SIMPLE_DEVICE mode * 'typedef u32 device_t' in romstage or when SIMPLE_DEVICE is defined * 'typedef u32 pnp_devfn_t' * 'typedef u32 pci_devfn_t' Some early functions make use of 'device_t' over 'pci_devfn_t' and since the C type-checker does not enforce typedefs to the same type 'u32' these are never noticed. Fix these so that 'device_t' does not conflict in romstage for later work. We later plan to have 'pnp_devfn_t' and 'pci_devfn_t' as the only variants of 'u32' and 'device_t' to be a struct pointer type exclusively. Change-Id: I948801f5be968a934798f1bad7722649758cd4d3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/device/pci_early.c | 7 +++---- src/include/device/pci.h | 6 ++++++ 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/device/pci_early.c b/src/device/pci_early.c index e31287e..e690211 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -25,8 +25,7 @@ #include <delay.h> #ifdef __PRE_RAM__ - -unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last) +unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last) { unsigned pos = 0; u16 status; @@ -69,11 +68,11 @@ unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last) return 0; } -unsigned pci_find_capability(device_t dev, unsigned cap) +unsigned pci_find_capability(pci_devfn_t dev, unsigned cap) { return pci_find_next_capability(dev, cap, 0); } -#endif +#endif /* __PRE_RAM__ */ #if CONFIG_EARLY_PCI_BRIDGE diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 8175970..0670da4 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -102,8 +102,14 @@ static inline const struct pci_operations *ops_pci(device_t dev) #endif /* ! __SIMPLE_DEVICE__ */ +#ifdef __PRE_RAM__ +unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last); +unsigned pci_find_capability(pci_devfn_t dev, unsigned cap); +#else /* !__PRE_RAM__ */ unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); unsigned pci_find_capability(device_t dev, unsigned cap); +#endif /* __PRE_RAM__ */ + void pci_early_bridge_init(void); int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);

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Patch set updated for coreboot: dad2ae4 NOTFORMERGE: test
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6232 -gerrit commit dad2ae4c88d6e04e8e574e1bf80341b7b79e9457 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Jul 10 02:49:54 2014 +1000 NOTFORMERGE: test Change-Id: Icb2eca566a96b723a3162983aac57394e6a866d3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/arch/x86/include/arch/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index d5cdf35..4ae9fe2 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -224,7 +224,7 @@ static inline int log2f(int value) /* FIXME: Sources for romstage still use device_t. */ /* Use pci_devfn_t or pnp_devfn_t instead */ -typedef u32 device_t; +//typedef u32 device_t; /* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G, * We don't need to set %fs, and %gs anymore

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Patch set updated for coreboot: a65f867 device/pci_early.c: Mixes up variants of a typedefs to 'u32'
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6225 -gerrit commit a65f867d5a298252d2223b81ba61985267b08dc8 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jul 9 04:55:16 2014 +1000 device/pci_early.c: Mixes up variants of a typedefs to 'u32' Unfortunately coreboot has to deal with ROMCC's short comings which has lead to a little bit of confusion due to typedefs. Essentially, coreboot defines four typedefs: * 'typedef struct device * device_t' in ramstage not in SIMPLE_DEVICE mode * 'typedef u32 device_t' in romstage or when SIMPLE_DEVICE is defined * 'typedef u32 pnp_devfn_t' * 'typedef u32 pci_devfn_t' Some early functions make use of 'device_t' over 'pci_devfn_t' and since the C type-checker does not enforce typedefs to the same type 'u32' these are never noticed. Fix these so that 'device_t' does not conflict in romstage for later work. We later plan to have 'pnp_devfn_t' and 'pci_devfn_t' as the only variants of 'u32' and 'device_t' to be a struct pointer type exclusively. Change-Id: I948801f5be968a934798f1bad7722649758cd4d3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/device/pci_early.c | 7 +++---- src/include/device/pci.h | 6 ++++++ 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/device/pci_early.c b/src/device/pci_early.c index e31287e..e690211 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -25,8 +25,7 @@ #include <delay.h> #ifdef __PRE_RAM__ - -unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last) +unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last) { unsigned pos = 0; u16 status; @@ -69,11 +68,11 @@ unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last) return 0; } -unsigned pci_find_capability(device_t dev, unsigned cap) +unsigned pci_find_capability(pci_devfn_t dev, unsigned cap) { return pci_find_next_capability(dev, cap, 0); } -#endif +#endif /* __PRE_RAM__ */ #if CONFIG_EARLY_PCI_BRIDGE diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 8175970..0670da4 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -102,8 +102,14 @@ static inline const struct pci_operations *ops_pci(device_t dev) #endif /* ! __SIMPLE_DEVICE__ */ +#ifdef __PRE_RAM__ +unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last); +unsigned pci_find_capability(pci_devfn_t dev, unsigned cap); +#else /* !__PRE_RAM__ */ unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); unsigned pci_find_capability(device_t dev, unsigned cap); +#endif /* __PRE_RAM__ */ + void pci_early_bridge_init(void); int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);

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Patch set updated for coreboot: 4cc0624 Remove unnecessary mappings in cbfs_media
by Naman Govil 12 Jul '14

12 Jul '14

Naman Govil (namangov(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6169 -gerrit commit 4cc06241da1fd4cd8ddaec62f7d101e43ee6fe9e Author: Naman Govil <namangov(a)gmail.com> Date: Mon Jun 30 22:57:11 2014 +0530 Remove unnecessary mappings in cbfs_media Reducing the sram usage while booting by removing unwanted map()s by creating a structure to replace it with appropriate read()s Change-Id: If503368553308a2fdd3ecc1a312a11f14c7a707f Signed-off-by: Naman Govil <namangov(a)gmail.com> --- src/arch/x86/boot/smbios.c | 9 +- src/include/cbfs_core.h | 27 +++-- src/lib/cbfs.c | 81 ++++++++++---- src/lib/cbfs_core.c | 255 ++++++++++++++++++++++++++++++++------------- 4 files changed, 267 insertions(+), 105 deletions(-) diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c index ce47a8b..ec3e5e8 100644 --- a/src/arch/x86/boot/smbios.c +++ b/src/arch/x86/boot/smbios.c @@ -28,7 +28,6 @@ #include <arch/cpu.h> #include <cpu/x86/name.h> #include <cbfs_core.h> -#include <arch/byteorder.h> #include <elog.h> #if CONFIG_CHROMEOS #include <vendorcode/google/chromeos/gnvs.h> @@ -152,11 +151,11 @@ static int smbios_write_type0(unsigned long *current, int handle) #endif { - const struct cbfs_header *header; + struct cbfs_header header; u32 romsize = CONFIG_ROM_SIZE; - header = cbfs_get_header(CBFS_DEFAULT_MEDIA); - if (header != CBFS_HEADER_INVALID_ADDRESS) - romsize = ntohl(header->romsize); + if (!cbfs_get_header(CBFS_DEFAULT_MEDIA, &header)) { + romsize = header.romsize; + } t->bios_rom_size = (romsize / 65535) - 1; } diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h index a1d8127..7c94be0 100644 --- a/src/include/cbfs_core.h +++ b/src/include/cbfs_core.h @@ -4,6 +4,7 @@ * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> * Copyright (C) 2012 Google, Inc. * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * Copyright (C) 2014 Naman Govil <namangov(a)gmail.com> * * This file is dual-licensed. You can choose between: * - The GNU GPL, version 2, as published by the Free Software Foundation @@ -189,6 +190,12 @@ struct cbfs_optionrom { #define CBFS_MEDIA_INVALID_MAP_ADDRESS ((void*)(0xffffffff)) #define CBFS_DEFAULT_MEDIA ((void*)(0x0)) +struct cbfs_file_handle { + uint32_t data_offset; + uint32_t data_len; + struct cbfs_file file; +}; + /* Media for CBFS to load files. */ struct cbfs_media { @@ -220,16 +227,24 @@ struct cbfs_media { /* returns pointer to a file entry inside CBFS or NULL */ struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name); -/* returns pointer to file content inside CBFS after if type is correct */ -void *cbfs_get_file_content(struct cbfs_media *media, const char *name, - int type, size_t *sz); /* returns decompressed size on success, 0 on failure */ int cbfs_decompress(int algo, void *src, void *dst, int len); -/* returns a pointer to CBFS master header, or CBFS_HEADER_INVALID_ADDRESS - * on failure */ -const struct cbfs_header *cbfs_get_header(struct cbfs_media *media); +/* finds the CBFS master header and fills it in a cbfs_header structure, + return 0 on success and <0 if header not found */ +int cbfs_get_header(struct cbfs_media *media, struct cbfs_header *header); + +/* Returns success (0) on finding the file requested by verifying name/type; + -1 if file not found + The absolute data_offset to the file is stored */ +int cbfs_find_file(struct cbfs_media *media, struct cbfs_file_handle *f, + const char *name, int type); + + +/* returns pointer to file content inside CBFS after verifying if type is correct */ +void *cbfs_get_file_content(struct cbfs_media *media, const char *name, + int type, size_t *sz); #endif /* __ROMCC__ */ diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index dc08937..e6c9afa 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -3,7 +3,7 @@ * * Copyright (C) 2008, Jordan Crouse <jordan(a)cosmicpenguin.net> * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. - * + * Copyright (C) 2014, Naman Govil <namangov(a)gmail.com> * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -119,38 +119,79 @@ void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, void * cbfs_load_stage(struct cbfs_media *media, const char *name) { - struct cbfs_stage *stage = (struct cbfs_stage *) - cbfs_get_file_content(media, name, CBFS_TYPE_STAGE, NULL); + struct cbfs_file_handle f; + struct cbfs_stage stage; + int c; + ssize_t value_read; + void * data; + ssize_t v_read; + struct cbfs_media default_media; + + if (media == CBFS_DEFAULT_MEDIA) { + media = &default_media; + if (init_default_cbfs_media(media) != 0) { + ERROR("Failed to initialize default media.\n"); + return (void *)-1; + } + } + + c = cbfs_find_file(media, &f, name, CBFS_TYPE_STAGE); + + if (c < 0) { + ERROR("Stage not loaded\n"); + return (void *)-1; + } + + value_read = media->read(media, &stage, f.data_offset, sizeof(stage)); /* this is a mess. There is no ntohll. */ /* for now, assume compatible byte order until we solve this. */ + if (value_read != sizeof(stage)) + return (void *)-1; + uint32_t entry; uint32_t final_size; - if (stage == NULL) - return (void *) -1; + DEBUG("Read Complete @offset = 0x%x and length = %d\n", + f.data_offset, value_read); LOG("loading stage %s @ 0x%x (%d bytes), entry @ 0x%llx\n", name, - (uint32_t) stage->load, stage->memlen, - stage->entry); + (uint32_t) stage.load, stage.memlen, + stage.entry); - final_size = cbfs_decompress(stage->compression, - ((unsigned char *) stage) + - sizeof(struct cbfs_stage), - (void *) (uint32_t) stage->load, - stage->len); - if (!final_size) - return (void *) -1; - /* Stages rely the below clearing so that the bss is initialized. */ - memset((void *)((uintptr_t)stage->load + final_size), 0, - stage->memlen - final_size); + if(stage.compression == CBFS_COMPRESS_NONE) { + //No compression; hence we can directly read + DEBUG("Read Done\n"); + v_read = media->read(media, (void *) (uintptr_t) stage.load, + f.data_offset + sizeof(stage), f.data_len); + if (v_read != f.data_len) + return (void *)-1; - DEBUG("stage loaded.\n"); + final_size = f.data_len; + } + else { + data = media->map(media, f.data_offset + sizeof(stage), f.data_len); + if (data == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + ERROR("Map not successful"); + return (void *) -1; + } + + DEBUG("Map Done\n"); + final_size = cbfs_decompress(stage.compression, data, + (void *) (uint32_t) stage.load, + stage.len); + + if (!final_size) + return (void *) -1; + } - entry = stage->entry; - // entry = ntohll(stage->entry); + /* Stages rely the below clearing so that the bss is initialized. */ + memset((void *)((uintptr_t)stage.load + final_size), 0, + stage.memlen - final_size); + DEBUG("stage loaded.\n"); + entry = stage.entry; return (void *) entry; } diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c index 50c037e..1eee51d 100644 --- a/src/lib/cbfs_core.c +++ b/src/lib/cbfs_core.c @@ -3,6 +3,7 @@ * * Copyright (C) 2011 secunet Security Networks AG * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * Copyright (C) 2014 Naman Govil <namangov(a)gmail.com> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -52,150 +53,256 @@ #include <cbfs.h> #include <string.h> -/* returns a pointer to CBFS master header, or CBFS_HEADER_INVALID_ADDRESS - * on failure */ -const struct cbfs_header *cbfs_get_header(struct cbfs_media *media) +/* fills in the header structure with a pointer to CBFS master header, + returns 0 on success and <0 if header not found */ +int cbfs_get_header(struct cbfs_media *media, struct cbfs_header *header) { - const struct cbfs_header *header; struct cbfs_media default_media; + ssize_t header_size; if (media == CBFS_DEFAULT_MEDIA) { media = &default_media; if (init_default_cbfs_media(media) != 0) { ERROR("Failed to initialize default media.\n"); - return CBFS_HEADER_INVALID_ADDRESS; + return -1; } } media->open(media); DEBUG("CBFS_HEADER_ROM_ADDRESS: 0x%x/0x%x\n", CBFS_HEADER_ROM_ADDRESS, CONFIG_ROM_SIZE); - header = media->map(media, CBFS_HEADER_ROM_ADDRESS, sizeof(*header)); + header_size = media->read(media, (void *)header , + CBFS_HEADER_ROM_ADDRESS, sizeof(*header)); media->close(media); - if (header == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + header->offset = ntohl(header->offset); + header->align = ntohl(header->align); + header->romsize = ntohl(header->romsize); + header->magic = ntohl(header->magic); + header->version = ntohl(header->version); + header->architecture = ntohl(header->architecture); + header->bootblocksize = ntohl(header->bootblocksize); + header->pad[1] = ntohl(header->pad[1]); + + if (header_size != sizeof(*header)) { ERROR("Failed to load CBFS header from 0x%x\n", CBFS_HEADER_ROM_ADDRESS); - return CBFS_HEADER_INVALID_ADDRESS; + return -1; } - - if (CBFS_HEADER_MAGIC != ntohl(header->magic)) { + else if (CBFS_HEADER_MAGIC != header->magic) { ERROR("Could not find valid CBFS master header at %x: " "%x vs %x.\n", CBFS_HEADER_ROM_ADDRESS, CBFS_HEADER_MAGIC, - ntohl(header->magic)); + header->magic); if (header->magic == 0xffffffff) { ERROR("Maybe ROM is not mapped properly?\n"); } - return CBFS_HEADER_INVALID_ADDRESS; + return -1; } - return header; + return 0; } /* public API starts here*/ -struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name) +/* This functions finds the absolute data_offset of a file searched for by + name/type. Returns 0 on success and -1 on failure + */ +int cbfs_find_file(struct cbfs_media *media, struct cbfs_file_handle *f, + const char *name, int type) { - const char *file_name; - uint32_t offset, align, romsize, name_len; - const struct cbfs_header *header; - struct cbfs_file file, *file_ptr; + uint32_t offset, align, romsize,name_len; struct cbfs_media default_media; + ssize_t value_read; + const char *file_name; + struct cbfs_header header; if (media == CBFS_DEFAULT_MEDIA) { media = &default_media; if (init_default_cbfs_media(media) != 0) { ERROR("Failed to initialize default media.\n"); - return NULL; + return -1; } } - if (CBFS_HEADER_INVALID_ADDRESS == (header = cbfs_get_header(media))) - return NULL; + if (cbfs_get_header(media, &header)) + return -1; - // Logical offset (for source media) of first file. - offset = ntohl(header->offset); - align = ntohl(header->align); - romsize = ntohl(header->romsize); + // Offset (for source media) of first file. + offset = header.offset; + align = header.align; + romsize = header.romsize; - // TODO Add a "size" in CBFS header for a platform independent way to - // determine the end of CBFS data. #if defined(CONFIG_ARCH_X86) && CONFIG_ARCH_X86 - romsize -= htonl(header->bootblocksize); + romsize -= header.bootblocksize; #endif DEBUG("CBFS location: 0x%x~0x%x, align: %d\n", offset, romsize, align); - DEBUG("Looking for '%s' starting from 0x%x.\n", name, offset); media->open(media); - while (offset < romsize && - media->read(media, &file, offset, sizeof(file)) == sizeof(file)) { - if (memcmp(CBFS_FILE_MAGIC, file.magic, - sizeof(file.magic)) != 0) { + while (offset < romsize) + { + value_read = media->read(media, &f->file, offset, sizeof(f->file)); + if(value_read != sizeof(f->file)){ + return -1; + } + f->file.len = ntohl(f->file.len); + f->file.offset = ntohl(f->file.offset); + f->file.type = ntohl(f->file.type); + + if (memcmp(CBFS_FILE_MAGIC, f->file.magic, + sizeof(f->file.magic)) != 0) { uint32_t new_align = align; if (offset % align) new_align += align - (offset % align); - ERROR("ERROR: No file header found at 0x%x - " - "try next aligned address: 0x%x.\n", offset, - offset + new_align); + ERROR("ERROR: No file header found at 0x%x - try next aligned address: 0x%x.\n", offset,offset+new_align); offset += new_align; continue; } - name_len = ntohl(file.offset) - sizeof(file); - DEBUG(" - load entry 0x%x file name (%d bytes)...\n", offset, - name_len); - - // load file name (arbitrary length). - file_name = (const char *)media->map( - media, offset + sizeof(file), name_len); - if (file_name == CBFS_MEDIA_INVALID_MAP_ADDRESS) { - ERROR("ERROR: Failed to get filename: 0x%x.\n", offset); - } else if (strcmp(file_name, name) == 0) { - int file_offset = ntohl(file.offset), - file_len = ntohl(file.len); - DEBUG("Found file (offset=0x%x, len=%d).\n", - offset + file_offset, file_len); - media->unmap(media, file_name); - file_ptr = media->map(media, offset, - file_offset + file_len); - media->close(media); - return file_ptr; - } else { - DEBUG(" (unmatched file @0x%x: %s)\n", offset, - file_name); - media->unmap(media, file_name); - } + if (f->file.type == type) { + + name_len = f->file.offset - sizeof(f->file); + DEBUG(" - load entry 0x%x file name (%d bytes)...\n", offset,name_len); + file_name = (const char *)media->map(media, offset + sizeof(f->file), + name_len); + if (file_name == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + ERROR("ERROR: Failed to get filename: 0x%x.\n", offset); + } else if (strcmp(file_name, name) == 0) { + f->data_offset = offset + f->file.offset; + f->data_len = f->file.len; + media->unmap(media, file_name); + DEBUG("Found file:offset = 0x%x, len=%d\n", + f->data_offset, f->data_len); + return 0; + } else { + DEBUG("unmatched file offset = 0x%x : %s\n", offset, file_name); + media->unmap(media,file_name); + } + } // Move to next file. - offset += ntohl(file.len) + ntohl(file.offset); + offset += f->file.len + f->file.offset; if (offset % align) offset += align - (offset % align); + DEBUG("Going for next offset\n"); } media->close(media); - LOG("WARNING: '%s' not found.\n", name); - return NULL; + LOG("Warning: '%s' not found\n",name); + return -1; } + +/*Returns pointer to file content inside CBFS after verifying type + */ void *cbfs_get_file_content(struct cbfs_media *media, const char *name, - int type, size_t *sz) + int type, size_t *sz) { - struct cbfs_file *file = cbfs_get_file(media, name); + struct cbfs_file_handle f; + int c; + struct cbfs_media default_media; + void *content; + + if (media == CBFS_DEFAULT_MEDIA) { + media = &default_media; + if (init_default_cbfs_media(media) != 0) { + ERROR("Failed to initialize default media.\n"); + return NULL; + } + } + c = cbfs_find_file(media, &f, name, type); + + if (c < 0) { + ERROR("File not found\n"); + return NULL; + } + DEBUG("Found file. Will be mapping it now!\n"); if (sz) *sz = 0; - if (file == NULL) { - ERROR("Could not find file '%s'.\n", name); + if (sz) + *sz = f.data_len; + content = media->map(media, f.data_offset, f.data_len); + if (content == CBFS_MEDIA_INVALID_MAP_ADDRESS) return NULL; + else + return content; +} + +struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name) +{ + const char *file_name; + uint32_t offset, align, romsize, name_len; + struct cbfs_header header; + struct cbfs_file file, *file_ptr; + struct cbfs_media default_media; + + if (media == CBFS_DEFAULT_MEDIA) { + media = &default_media; + if (init_default_cbfs_media(media) != 0) { + ERROR("Failed to initialize default media.\n"); + return NULL; + } } - if (ntohl(file->type) != type) { - ERROR("File '%s' is of type %x, but we requested %x.\n", name, - ntohl(file->type), type); + if (cbfs_get_header(media, &header)) return NULL; - } - if (sz) - *sz = ntohl(file->len); + // Logical offset (for source media) of first file. + offset = header.offset; + align = header.align; + romsize = header.romsize; - return (void *)CBFS_SUBHEADER(file); + // TODO Add a "size" in CBFS header for a platform independent way to + // determine the end of CBFS data. +#if defined(CONFIG_ARCH_X86) && CONFIG_ARCH_X86 + romsize -= header.bootblocksize; +#endif + DEBUG("CBFS location: 0x%x~0x%x, align: %d\n", offset, romsize, align); + + DEBUG("Looking for '%s' starting from 0x%x.\n", name, offset); + media->open(media); + while (offset < romsize && + media->read(media, &file, offset, sizeof(file)) == sizeof(file)) { + if (memcmp(CBFS_FILE_MAGIC, file.magic, + sizeof(file.magic)) != 0) { + uint32_t new_align = align; + if (offset % align) + new_align += align - (offset % align); + ERROR("ERROR: No file header found at 0x%x - " + "try next aligned address: 0x%x.\n", offset, + offset + new_align); + offset += new_align; + continue; + } + name_len = ntohl(file.offset) - sizeof(file); + DEBUG(" - load entry 0x%x file name (%d bytes)...\n", offset, + name_len); + + // load file name (arbitrary length). + file_name = (const char *)media->map( + media, offset + sizeof(file), name_len); + if (file_name == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + ERROR("ERROR: Failed to get filename: 0x%x.\n", offset); + } else if (strcmp(file_name, name) == 0) { + int file_offset = ntohl(file.offset), + file_len = ntohl(file.len); + DEBUG("Found file (offset=0x%x, len=%d).\n", + offset + file_offset, file_len); + media->unmap(media, file_name); + file_ptr = media->map(media, offset, + file_offset + file_len); + media->close(media); + return file_ptr; + } else { + DEBUG(" (unmatched file @0x%x: %s)\n", offset, + file_name); + media->unmap(media, file_name); + } + // Move to next file. + offset += ntohl(file.len) + ntohl(file.offset); + if (offset % align) + offset += align - (offset % align); + } + media->close(media); + LOG("WARNING: '%s' not found.\n", name); + return NULL; } int cbfs_decompress(int algo, void *src, void *dst, int len)

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Patch set updated for coreboot: 1f0d39e NOTFORMERGE: test
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6232 -gerrit commit 1f0d39e25ea707aa7668f8f39763002410fa1e85 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Jul 10 02:49:54 2014 +1000 NOTFORMERGE: test Change-Id: Icb2eca566a96b723a3162983aac57394e6a866d3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/arch/x86/include/arch/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index d5cdf35..4ae9fe2 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -224,7 +224,7 @@ static inline int log2f(int value) /* FIXME: Sources for romstage still use device_t. */ /* Use pci_devfn_t or pnp_devfn_t instead */ -typedef u32 device_t; +//typedef u32 device_t; /* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G, * We don't need to set %fs, and %gs anymore

1 0

Patch set updated for coreboot: c252aa0 Fix romstage dev type, 'device_t' -> 'pci_devfn_t' in get_sbdn()
by Edward O'Callaghan 12 Jul '14

12 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6226 -gerrit commit c252aa0f492b75d0004d208a40cea4ec07afe4df Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jul 9 05:22:32 2014 +1000 Fix romstage dev type, 'device_t' -> 'pci_devfn_t' in get_sbdn() Unfortunately coreboot has to deal with ROMCC's short comings which has lead to a little bit of confusion due to typedefs. Essentially, coreboot defines four typedefs: * 'typedef struct device * device_t' in ramstage not in SIMPLE_DEVICE mode * 'typedef u32 device_t' in romstage or when SIMPLE_DEVICE is defined * 'typedef u32 pnp_devfn_t' * 'typedef u32 pci_devfn_t' Some early functions make use of 'device_t' over 'pci_devfn_t' and since the C type-checker does not enforce typedefs to the same type 'u32' these are never noticed. Fix these so that 'device_t' does not conflict in romstage for later work. We later plan to have 'pnp_devfn_t' and 'pci_devfn_t' as the only variants of 'u32' and 'device_t' to be a struct pointer type exclusively. Change-Id: Ied3940d9b2ec119ca4b75b955305add59edbbb18 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/asus/a8v-e_deluxe/romstage.c | 2 +- src/mainboard/asus/a8v-e_se/romstage.c | 2 +- src/mainboard/asus/k8v-x/romstage.c | 2 +- src/mainboard/asus/m2v-mx_se/romstage.c | 2 +- src/mainboard/asus/m2v/romstage.c | 2 +- src/southbridge/amd/cimx/sb700/early.c | 2 +- src/southbridge/amd/cimx/sb800/early.c | 2 +- src/southbridge/amd/sb600/early_setup.c | 2 +- src/southbridge/amd/sb700/early_setup.c | 2 +- src/southbridge/broadcom/bcm5785/early_setup.c | 2 +- src/southbridge/nvidia/mcp55/early_ctrl.c | 2 +- src/southbridge/sis/sis966/early_ctrl.c | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index 1dea57b..9604816 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -90,7 +90,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index abe5f84..1261293 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -90,7 +90,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c index 4d6bd60..e4b9c6b 100644 --- a/src/mainboard/asus/k8v-x/romstage.c +++ b/src/mainboard/asus/k8v-x/romstage.c @@ -88,7 +88,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index d374828..6e113c0 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -107,7 +107,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index a2c6a03..94b1251 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -91,7 +91,7 @@ void soft_reset(void) unsigned int get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), bus); diff --git a/src/southbridge/amd/cimx/sb700/early.c b/src/southbridge/amd/cimx/sb700/early.c index 6dc4ff4..fd9d26b 100644 --- a/src/southbridge/amd/cimx/sb700/early.c +++ b/src/southbridge/amd/cimx/sb700/early.c @@ -34,7 +34,7 @@ */ u32 get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; printk(BIOS_SPEW, "SB700 - Early.c - %s - Start.\n", __func__); dev = pci_locate_device_on_bus( diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c index 40648ed..0341567 100644 --- a/src/southbridge/amd/cimx/sb800/early.c +++ b/src/southbridge/amd/cimx/sb800/early.c @@ -33,7 +33,7 @@ */ u32 get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; printk(BIOS_DEBUG, "SB800 - %s - %s - Start.\n", __FILE__, __func__); //dev = PCI_DEV(bus, 0x14, 0); diff --git a/src/southbridge/amd/sb600/early_setup.c b/src/southbridge/amd/sb600/early_setup.c index b6611f6..6797399 100644 --- a/src/southbridge/amd/sb600/early_setup.c +++ b/src/southbridge/amd/sb600/early_setup.c @@ -106,7 +106,7 @@ static void sb600_lpc_init(void) /* what is its usage? */ static u32 get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(PCI_ID(0x1002, 0x4385), bus); diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index b7a5e77..7208146 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -221,7 +221,7 @@ void sb7xx_51xx_disable_wideio(u8 wio_index) /* what is its usage? */ u32 __attribute__ ((weak)) get_sbdn(u32 bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(PCI_ID(0x1002, 0x4385), bus); diff --git a/src/southbridge/broadcom/bcm5785/early_setup.c b/src/southbridge/broadcom/bcm5785/early_setup.c index 9dee295..0a69e5e 100644 --- a/src/southbridge/broadcom/bcm5785/early_setup.c +++ b/src/southbridge/broadcom/bcm5785/early_setup.c @@ -69,7 +69,7 @@ static void bcm5785_enable_wdt_port_cf9(void) unsigned get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. * There can only be one bcm5785 on a hypertransport chain/bus. diff --git a/src/southbridge/nvidia/mcp55/early_ctrl.c b/src/southbridge/nvidia/mcp55/early_ctrl.c index 92f9d03..865c023 100644 --- a/src/southbridge/nvidia/mcp55/early_ctrl.c +++ b/src/southbridge/nvidia/mcp55/early_ctrl.c @@ -24,7 +24,7 @@ static unsigned get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_NVIDIA, diff --git a/src/southbridge/sis/sis966/early_ctrl.c b/src/southbridge/sis/sis966/early_ctrl.c index 3695023..4b3a228 100644 --- a/src/southbridge/sis/sis966/early_ctrl.c +++ b/src/southbridge/sis/sis966/early_ctrl.c @@ -23,7 +23,7 @@ static unsigned get_sbdn(unsigned bus) { - device_t dev; + pci_devfn_t dev; /* Find the device. */ dev = pci_locate_device_on_bus(

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coreboot-gerrit July 2014