coreboot-gerrit July 2014

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: 94f1f55 payloads/external/SeaBIOS: Allow setting buffers below 0xC0000
by Martin Roth 29 Jul '14

29 Jul '14

Martin Roth (gaumless(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6364 -gerrit commit 94f1f5555bbb600390084c2db92eddf3779988c7 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Fri Jul 25 14:39:05 2014 -0600 payloads/external/SeaBIOS: Allow setting buffers below 0xC0000 Add the option to coreboot to set the SeaBIOS buffers below 0xC0000. This is an absolute requirement on the upcoming Intel Rangeley processor because it is designed so that only the processor can write the higher memory areas. This prevents USB from bus-mastering into the buffers when they're set in the typical 0xE0000 area. Change-Id: I15638605d1c66a2277d4b852796db89978551a34 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> --- payloads/external/SeaBIOS/Makefile.inc | 3 +++ src/Kconfig | 15 +++++++++++++++ src/arch/x86/Makefile.inc | 1 + 3 files changed, 19 insertions(+) diff --git a/payloads/external/SeaBIOS/Makefile.inc b/payloads/external/SeaBIOS/Makefile.inc index 21f933a..03e2b08 100644 --- a/payloads/external/SeaBIOS/Makefile.inc +++ b/payloads/external/SeaBIOS/Makefile.inc @@ -31,6 +31,9 @@ ifeq ($(CONFIG_CONSOLE_SERIAL),y) else echo "# CONFIG_DEBUG_SERIAL is not set" >> $(OUT)/seabios/.config endif +ifneq ($(CONFIG_SEABIOS_MALLOC_UPPERMEMORY),y) + echo "# CONFIG_MALLOC_UPPERMEMORY is not set" >> $(OUT)/seabios/.config +endif ifneq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y) echo "# CONFIG_THREAD_OPTIONROMS is not set" >> $(OUT)/seabios/.config endif diff --git a/src/Kconfig b/src/Kconfig index af82353..98df93c 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -626,6 +626,21 @@ config SEABIOS_THREAD_OPTIONROMS variations during option ROM code execution. It is not known if all option ROMs will behave properly with this option. +config SEABIOS_MALLOC_UPPERMEMORY + prompt "Allocate memory that needs to be in first Meg above 0xc0000" if PAYLOAD_SEABIOS + default y + bool + help + Use the "Upper Memory Block" area (0xc0000-0xf0000) for internal + "low memory" allocations. If this is not selected, the memory is + instead allocated from the "9-segment" (0x90000-0xa0000). + This is not typically needed, but may be required on some platforms + to allow USB and SATA buffers to be written correctly by the + hardware. In general, if this is desired, the option will be + set to 'N' by the chipset Kconfig. + + If unsure, say Y. + choice prompt "GRUB2 version" default GRUB2_MASTER diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 2e92d89..3b2517b 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -352,6 +352,7 @@ seabios: CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ CONFIG_CONSOLE_SERIAL=$(CONFIG_CONSOLE_SERIAL) \ CONFIG_TTYS0_BASE=$(CONFIG_TTYS0_BASE) \ + CONFIG_SEABIOS_MALLOC_UPPERMEMORY=$(CONFIG_SEABIOS_MALLOC_UPPERMEMORY) \ OUT=$(abspath $(obj)) IASL="$(IASL)" filo:

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New patch to review for coreboot: 9be6652 cbmem: Terminate the cbmem console at the cursor position.
by Isaac Christensen 29 Jul '14

29 Jul '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6404 -gerrit commit 9be6652481253d469162c577b50df8aedce71128 Author: Gabe Black <gabeblack(a)google.com> Date: Fri Aug 9 00:40:06 2013 -0700 cbmem: Terminate the cbmem console at the cursor position. If the cbmem console buffer isn't zero filled before it's used, there won't be a terminator at the end. We need to put one at the cursor position manually. Change-Id: I69870c2b24b67ce3cbcd402b62f3574acb4c2a8f Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/65300 Reviewed-by: Hung-Te Lin <hungte(a)chromium.org> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> (cherry picked from commit 8ec61e52a6a27ed518d0abb5a19d6261edf9dab1) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- util/cbmem/cbmem.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index fabede3..4dcfe91 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -472,8 +472,8 @@ static void dump_console(void) * char console[size] * Hence we have to add 8 to get to the actual console string. */ - size = *(uint32_t *)console_p; - cursor = *(uint32_t *) (console_p + 4); + size = ((uint32_t *)console_p)[0]; + cursor = ((uint32_t *)console_p)[1]; /* Cursor continues to go on even after no more data fits in * the buffer but the data is dropped in this case. */ @@ -489,6 +489,7 @@ static void dump_console(void) size + sizeof(size) + sizeof(cursor)); memcpy(console_c, console_p + 8, size); console_c[size] = 0; + console_c[cursor] = 0; printf("%s\n", console_c); if (size < cursor)

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New patch to review for coreboot: ab22fad pit: setup voltage rails before system clocks
by Isaac Christensen 29 Jul '14

29 Jul '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6403 -gerrit commit ab22fad84ba955a95f7c23e51c400b4856543c7c Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Aug 5 21:04:16 2013 -0700 pit: setup voltage rails before system clocks This moves the call to setup_power() before system_clock_init(). This causes the PMIC to set up the voltage rails earlier so that the CPU clock can be set up at a faster rate (in the follow-up patch). After system clock init, we re-initialize the PMIC's I2C bus since the input clock rate will have changed. Old-Change-Id: Ieb828ac25daad7ee95bfa4823aaaf161028c9c92 Reviewed-on: https://gerrit.chromium.org/gerrit/64744 Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-by: Ronald G. Minnich <rminnich(a)chromium.org> Tested-by: David Hendricks <dhendrix(a)chromium.org> Commit-Queue: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit 6c133a84ef4a32c35577a266905e02af8c2d9278) pit: save setup_power() status and die later if needed Since system clock and console initialization now happen after power setup, we cannot print error messages in setup_power(). This patch re-factors the code a little bit to save the status of setup_power() so that if we get an error during setup_power() we will wait until we can actually print something before dying. Old-Change-Id: Id7ff477224b104b3c7e221c1d2df460ca9125f3b Reviewed-on: https://gerrit.chromium.org/gerrit/65009 Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Commit-Queue: David Hendricks <dhendrix(a)chromium.org> Tested-by: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit 0c89f922b20bc1291ac7ba7b2c22bdce911be7a4) Squashed two closely related commits. Change-Id: I3efe29412738959e698c89d26e682536ceabdff8 Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/mainboard/google/pit/romstage.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c index c971d0c..7733eca 100644 --- a/src/mainboard/google/pit/romstage.c +++ b/src/mainboard/google/pit/romstage.c @@ -42,6 +42,8 @@ #define MMC0_GPIO_PIN (58) +#define PMIC_I2C_BUS 4 + struct pmic_write { int or_orig; // Whether to or in the original value. @@ -75,7 +77,7 @@ struct pmic_write pmic_writes[] = { 0, MAX77802_REG_PMIC_BOOSTCTRL, MAX77802_BOOSTCTRL_OFF}, }; -static void setup_power(int is_resume) +static int setup_power(int is_resume) { int error = 0; int i; @@ -83,14 +85,12 @@ static void setup_power(int is_resume) power_init(); if (is_resume) { - return; + return 0; } /* Initialize I2C bus to configure PMIC. */ exynos_pinmux_i2c4(); - i2c_init(4, 1000000, 0x00); /* 1MHz */ - - printk(BIOS_DEBUG, "%s: Setting up PMIC...\n", __func__); + i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */ for (i = 0; i < ARRAY_SIZE(pmic_writes); i++) { uint8_t data = 0; @@ -106,8 +106,7 @@ static void setup_power(int is_resume) &data, sizeof(data)); } - if (error) - die("Failed to intialize PMIC.\n"); + return error; } static void setup_storage(void) @@ -245,6 +244,9 @@ void main(void) extern struct mem_timings mem_timings; void *entry; int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP); + int power_init_failed; + + power_init_failed = setup_power(is_resume); /* Clock must be initialized before console_init, otherwise you may need * to re-initialize serial console drivers again. */ @@ -253,7 +255,12 @@ void main(void) exynos_pinmux_uart3(); console_init(); - setup_power(is_resume); + if (power_init_failed) + die("Failed to intialize power.\n"); + + /* re-initialize PMIC I2C channel after (re-)setting system clocks */ + i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */ + setup_memory(&mem_timings, is_resume); primitive_mem_test();

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New patch to review for coreboot: e6fdebc northbridge/amd/agesa/agesawrapper_call.h: Decode status codes
by Edward O'Callaghan 29 Jul '14

29 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6402 -gerrit commit e6fdebc0e7d091dc32d9f2416a69ecced24183bc Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Jul 30 02:19:25 2014 +1000 northbridge/amd/agesa/agesawrapper_call.h: Decode status codes Decode obscure AGESA status codes into their respective string forms. Change-Id: Iccf175ef62e5005af6ebbfb1bd0acec8aedc2eaa Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/northbridge/amd/agesa/agesawrapper_call.h | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/src/northbridge/amd/agesa/agesawrapper_call.h b/src/northbridge/amd/agesa/agesawrapper_call.h index e654b8a..0acbeee 100644 --- a/src/northbridge/amd/agesa/agesawrapper_call.h +++ b/src/northbridge/amd/agesa/agesawrapper_call.h @@ -22,12 +22,36 @@ #include <console/console.h> #include "AGESA.h" +/* + * Possible AGESA_STATUS values: + * + * 0x0 = AGESA_SUCCESS + * 0x1 = AGESA_UNSUPPORTED + * 0x2 = AGESA_BOUNDS_CHK + * 0x3 = AGESA_ALERT + * 0x4 = AGESA_WARNING + * 0x5 = AGESA_ERROR + * 0x6 = AGESA_CRITICAL + * 0x7 = AGESA_FATAL + */ +static const char * decodeAGESA_STATUS(AGESA_STATUS sret) +{ + const char* statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED", + "AGESA_BOUNDS_CHK", "AGESA_ALERT", + "AGESA_WARNING", "AGESA_ERROR", + "AGESA_CRITICAL", "AGESA_FATAL" + }; + if (sret > 7) return "unknown"; /* Non-AGESA error code */ + return statusStrings[sret]; +} + static inline u32 do_agesawrapper(AGESA_STATUS (*func)(void), const char *name) { AGESA_STATUS ret; printk(BIOS_DEBUG, "agesawrapper_%s() entry\n", name); ret = func(); - printk(BIOS_DEBUG, "agesawrapper_%s() AGESA_STATUS = %x\n", name, ret); + printk(BIOS_DEBUG, "agesawrapper_%s() returned %s\n", + name, decodeAGESA_STATUS(ret)); return (u32)ret; }

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New patch to review for coreboot: 725a3a7 device/oprom/realmode/x86.c: Move includes to top of file
by Edward O'Callaghan 29 Jul '14

29 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6401 -gerrit commit 725a3a783e9d42c491a3981ba45dc9f28e9b1d23 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Jul 29 22:28:19 2014 +1000 device/oprom/realmode/x86.c: Move includes to top of file Change-Id: Ib68e1f570092a69447d307c33b98f70b817f0ec1 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/device/oprom/realmode/x86.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c index 4338e6e..7dec258 100644 --- a/src/device/oprom/realmode/x86.c +++ b/src/device/oprom/realmode/x86.c @@ -23,6 +23,9 @@ #include <arch/io.h> #include <arch/registers.h> +#include <cpu/amd/lxdef.h> +#include <cpu/amd/vr.h> +#include <cbfs.h> #include <console/console.h> #include <arch/interrupt.h> #include <cbfs.h> @@ -350,9 +353,6 @@ void run_bios(struct device *dev, unsigned long addr) } #if CONFIG_GEODE_VSA -#include <cpu/amd/lxdef.h> -#include <cpu/amd/vr.h> -#include <cbfs.h> #define VSA2_BUFFER 0x60000 #define VSA2_ENTRY_POINT 0x60020

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New patch to review for coreboot: caac298 arch/x86/include/arch/interrupt.h: Add header guards
by Edward O'Callaghan 29 Jul '14

29 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6400 -gerrit commit caac298127d4f5a47c859f78e10d731e92bd134f Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Jul 29 22:27:51 2014 +1000 arch/x86/include/arch/interrupt.h: Add header guards Change-Id: I34c27bbce3ce958a33d547c727d9733d3b2d1670 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/arch/x86/include/arch/interrupt.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/arch/x86/include/arch/interrupt.h b/src/arch/x86/include/arch/interrupt.h index 9753c50..e3322bb 100644 --- a/src/arch/x86/include/arch/interrupt.h +++ b/src/arch/x86/include/arch/interrupt.h @@ -19,6 +19,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef INTERRUPT_H +#define INTERRUPT_H + #include "registers.h" /* setup interrupt handlers for mainboard */ @@ -29,3 +32,5 @@ extern void mainboard_interrupt_handlers(int intXX, int (*intXX_func)(void)); #else static inline void mainboard_interrupt_handlers(int intXX, int (*intXX_func)(void)) { } #endif + +#endif /* INTERRUPT_H */

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New patch to review for coreboot: 21653d2 lenovo/t530/mainboard.c: Add EC info to SMBIOS
by Edward O'Callaghan 29 Jul '14

29 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6399 -gerrit commit 21653d239b9acaf13b1feb1f2bd7f69d67bc18a7 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Jul 29 20:52:17 2014 +1000 lenovo/t530/mainboard.c: Add EC info to SMBIOS As is in: 91175bb lenovo/x201 & x230: Add EC info to SMBIOS This is needed for the Linux driver for the Lenovo's to properly attach. Change-Id: Ib910b25f392d9d3d6362b6909ce9fd4eeae9a096 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/lenovo/t530/mainboard.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/mainboard/lenovo/t530/mainboard.c b/src/mainboard/lenovo/t530/mainboard.c index 325f90f..4d6e623 100644 --- a/src/mainboard/lenovo/t530/mainboard.c +++ b/src/mainboard/lenovo/t530/mainboard.c @@ -173,12 +173,28 @@ static void mainboard_init(device_t dev) 0x42, 0x142); } +static int mainboard_smbios_data(device_t dev, int *handle, unsigned long *current) +{ + int len; + char tpec[] = "IBM ThinkPad Embedded Controller -[ ]-"; + const char *oem_strings[] = { + tpec, + }; + + h8_build_id_and_function_spec_version(tpec + 35, 17); + len = smbios_write_type11(current, (*handle)++, oem_strings, ARRAY_SIZE(oem_strings)); + + return len; +} + // mainboard_enable is executed as first thing after // enumerate_buses(). static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; + dev->ops->get_smbios_data = mainboard_smbios_data; + #if CONFIG_VGA_ROM_RUN /* Install custom int15 handler for VGA OPROM */ mainboard_interrupt_handlers(0x15, &int15_handler);

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New patch to review for coreboot: ae88fbd lenovo/t530/mainboard.c: Fix prototype with header
by Edward O'Callaghan 29 Jul '14

29 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6398 -gerrit commit ae88fbd78b0cd72870f59cde13b6455ad39a7ad0 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Jul 29 20:49:55 2014 +1000 lenovo/t530/mainboard.c: Fix prototype with header Change-Id: I05cea020e77051bd3bc0e93b0c70e12b9b985d05 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/lenovo/t530/mainboard.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mainboard/lenovo/t530/mainboard.c b/src/mainboard/lenovo/t530/mainboard.c index 6d21b31..325f90f 100644 --- a/src/mainboard/lenovo/t530/mainboard.c +++ b/src/mainboard/lenovo/t530/mainboard.c @@ -39,6 +39,7 @@ #include <device/pci.h> #include <cbfs.h> #include <pc80/keyboard.h> +#include <ec/lenovo/h8/h8.h> void mainboard_suspend_resume(void) { @@ -185,8 +186,6 @@ static void mainboard_enable(device_t dev) verb_setup(); } -void h8_mainboard_init_dock (void); - void h8_mainboard_init_dock (void) { }

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New patch to review for coreboot: 26aa08a Kconfig: Fix comments on endif to match the corresponding if
by Daniele Forsi 29 Jul '14

29 Jul '14

Daniele Forsi (dforsi(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6397 -gerrit commit 26aa08ac111e13379883aaeb676d8243ea019104 Author: Daniele Forsi <dforsi(a)gmail.com> Date: Tue Jul 29 12:13:12 2014 +0200 Kconfig: Fix comments on endif to match the corresponding if Change-Id: I5c40de41a01d9c558f6c2795e19e643009804e70 Signed-off-by: Daniele Forsi <dforsi(a)gmail.com> --- src/mainboard/emulation/qemu-i440fx/Kconfig | 3 +-- src/mainboard/emulation/qemu-q35/Kconfig | 3 +-- src/mainboard/iei/juki-511p/Kconfig | 4 ++-- src/mainboard/jetway/j7f2/Kconfig | 4 ++-- src/mainboard/via/epia-m/Kconfig | 4 ++-- 5 files changed, 8 insertions(+), 10 deletions(-) diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index 727176b..34f3342 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -33,5 +33,4 @@ config DCACHE_RAM_SIZE hex default 0x10000 - -endif # BOARD_EMULATION_QEMU_X86 +endif # BOARD_EMULATION_QEMU_X86_I440FX diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index 69f596d..3949937 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -44,5 +44,4 @@ config DCACHE_RAM_SIZE hex default 0x10000 - -endif # BOARD_EMULATION_QEMU_X86 +endif # BOARD_EMULATION_QEMU_X86_Q35 diff --git a/src/mainboard/iei/juki-511p/Kconfig b/src/mainboard/iei/juki-511p/Kconfig index e17d69a..0aebb03 100644 --- a/src/mainboard/iei/juki-511p/Kconfig +++ b/src/mainboard/iei/juki-511p/Kconfig @@ -38,10 +38,10 @@ if BOARD_IEI_JUKI_511P config MAINBOARD_PART_NUMBER string default "JUKI-511P" -endif +endif # BOARD_IEI_JUKI_511P config IRQ_SLOT_COUNT int default 2 -endif # BOARD_IEI_JUKI_511P +endif # BOARD_IEI_JUKI_511P || BOARD_IEI_ROCKY_512 diff --git a/src/mainboard/jetway/j7f2/Kconfig b/src/mainboard/jetway/j7f2/Kconfig index d2b413b..48a85a1 100644 --- a/src/mainboard/jetway/j7f2/Kconfig +++ b/src/mainboard/jetway/j7f2/Kconfig @@ -18,10 +18,10 @@ if BOARD_JETWAY_J7F2 config MAINBOARD_PART_NUMBER string default "J7f2" -endif +endif # BOARD_JETWAY_J7F2 config IRQ_SLOT_COUNT int default 10 -endif # BOARD_JETWAY_J7F2 +endif # BOARD_JETWAY_J7F2 || BOARD_JETWAY_J7F4K1G2E || BOARD_JETWAY_J7F4K1G5D diff --git a/src/mainboard/via/epia-m/Kconfig b/src/mainboard/via/epia-m/Kconfig index f05c99c..5b43921 100644 --- a/src/mainboard/via/epia-m/Kconfig +++ b/src/mainboard/via/epia-m/Kconfig @@ -23,10 +23,10 @@ config MAINBOARD_PART_NUMBER string default "EPIA-M" -endif +endif # BOARD_VIA_EPIA_M config IRQ_SLOT_COUNT int default 5 -endif # BOARD_VIA_EPIA_M +endif # BOARD_VIA_EPIA_M || BOARD_VIA_EPIA_MII || BOARD_VIA_EPIA_ML

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New patch to review for coreboot: ee4d6a8 artecgroup/Kconfig, linutop/Kconfig: Add comment to endif
by Daniele Forsi 29 Jul '14

29 Jul '14

Daniele Forsi (dforsi(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6396 -gerrit commit ee4d6a81a31a25602d0841e2794560afca458028 Author: Daniele Forsi <dforsi(a)gmail.com> Date: Tue Jul 29 12:09:39 2014 +0200 artecgroup/Kconfig, linutop/Kconfig: Add comment to endif All other Kconfig files at the mainboard vendor level have a comment on "endif" matching the corresponding "if", except these two. Change-Id: Ib03c4552c670178d6b09a2ca3037ee29e3524a2f Signed-off-by: Daniele Forsi <dforsi(a)gmail.com> --- src/mainboard/artecgroup/Kconfig | 2 +- src/mainboard/linutop/Kconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/artecgroup/Kconfig b/src/mainboard/artecgroup/Kconfig index 4ccc2e7..f2d0d32 100644 --- a/src/mainboard/artecgroup/Kconfig +++ b/src/mainboard/artecgroup/Kconfig @@ -16,4 +16,4 @@ endif # VENDOR_ARTECGROUP if VENDOR_ARTECGROUP || VENDOR_LINUTOP source "src/mainboard/artecgroup/dbe61/Kconfig" -endif +endif # VENDOR_ARTECGROUP || VENDOR_LINUTOP diff --git a/src/mainboard/linutop/Kconfig b/src/mainboard/linutop/Kconfig index 7209916..75b657a 100644 --- a/src/mainboard/linutop/Kconfig +++ b/src/mainboard/linutop/Kconfig @@ -14,4 +14,4 @@ config MAINBOARD_VENDOR source "src/mainboard/linutop/linutop1/Kconfig" -endif +endif # VENDOR_LINUTOP

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coreboot-gerrit July 2014