Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5806
-gerrit
commit 6b9063236ae8abe80524ab01e4880c77da8b257a
Author: Patrick Georgi <patrick(a)georgi-clan.de>
Date: Wed May 21 22:48:35 2014 +0200
abuild: update version and copyright
Enough changed to warrant a new version, date,
and copyright.
Change-Id: Ia099cd4fec3b05efc3f8bac09d38baede1c719e0
Signed-off-by: Patrick …
[View More]Georgi <patrick(a)georgi-clan.de>
---
util/abuild/abuild | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/util/abuild/abuild b/util/abuild/abuild
index 4d98b9a..7681e14 100755
--- a/util/abuild/abuild
+++ b/util/abuild/abuild
@@ -7,6 +7,7 @@
# (C) 2004 by Stefan Reinauer <stepan(a)openbios.org>
# (C) 2006-2010 by coresystems GmbH <info(a)coresystems.de>
# (C) 2013 Sage Electronic Engineering, LLC
+# (C) 2014 Patrick Georgi <patrick(a)georgi-clan.de>
#
# This file is subject to the terms and conditions of the GNU General
# Public License. See the file COPYING in the main directory of this
@@ -15,8 +16,8 @@
#set -x # Turn echo on....
-ABUILD_DATE="May 31, 2013"
-ABUILD_VERSION="0.9.2"
+ABUILD_DATE="May 21, 2014"
+ABUILD_VERSION="0.9.4"
TOP=$PWD
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the following patch was just integrated into master:
commit 16d953a46001e8852d63095e5310ed7869d109e7
Author: Martin Roth <gaumless(a)gmail.com>
Date: Mon May 12 17:38:59 2014 -0600
device_romstage: Add a way to move to the next device
When trying to loop through all the devices in romstage, there was
no function to just go from one to the next.
This allows an easy way to go all the way down the chain of devices.
Change-Id: …
[View More]Id205b24610d75de060b0d48fa283a2ab92d1df0a
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Reviewed-on: http://review.coreboot.org/5732
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones(a)se-eng.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/5732 for details.
-gerrit
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Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5802
-gerrit
commit 3002b400c6665b5d90b4b9313ad1bfad459826c7
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Thu May 22 06:16:15 2014 +1000
amd/agesa/f14: Backport f15tn fixes from DDR3 in mtspd3.c
Change-Id: I710efc3171e1653241f2dba1217a9560d2d99a16
Signed-off-by: Edward O'Callaghan <eocallaghan(a)…
[View More]alterapraxis.com>
---
src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c
index c2f9372..dc09038 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c
@@ -290,7 +290,7 @@ MemTDIMMPresence3 (
// as a QR RDIMM with a rank Mux of x1 and therefore all four CS will be used. So an 8R LRDIMM will
// be marked as a QR even if Rank multiplication allows it to use only 2 logical ranks.
//
- if (ChannelPtr->LrDimmPresent |= DimmMask) {
+ if ((ChannelPtr->LrDimmPresent & DimmMask) != 0) {
//
// LRDIMM Physical Ranks
//
@@ -320,7 +320,7 @@ MemTDIMMPresence3 (
//
// Double Addr bus load value for dual rank DIMMs (Unless LRDIMM)
//
- if ( ((ChannelPtr->LrDimmPresent |= DimmMask) == 0) && (Value8 == 2) ) {
+ if (((ChannelPtr->LrDimmPresent & DimmMask) == 0) && (Value8 == 2) ) {
Devwidth = Devwidth << 1;
}
//
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the following patch was just integrated into master:
commit db0e0e2c54397dffa8b55bfbfb76a15d641e4235
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Thu May 15 21:13:33 2014 +1000
amd/agesa/*/gcc-intrin.h: Invaild inline asm
The 'm' (a memory reference) constraint makes little sense here since we
are talking about a fs relative read, rather 'ir' (immediate or
register) constraint is more sensible.
N.B. The 'p' constraint allows anything …
[View More]which fits the form of an address
calculation where the 'ir' constraint is just a register /xor/
immediate. Hence would produce better code here however, unfortunately,
clang does not currently support it properly.
The %b and %w constraints are also redundant and only hide errors.
The functions writefsword() and writefsdword() should use ir instead of
iq. iq is unnecessarily restrictive (it is only required for writing
bytes).
The cld in stosb is redundant (and the constraints are unnecessarily
complicated). Note that The ABI guarantees that the direction flag is
cleared. i.e. eax, ecx, edx are caller-saved, returned value in eax,
eax+edx, st0, yaddayadda, direction flag cleared. In fact bad things can
happen if you set it in some asm and do not clear it until the end of
the asm.
Line wrap these extraneously long lines found with these particular functions.
Many thanks to Christoph Mallon <christoph.mallon(a)gmx.de> from #llvm for
helping me with this.
Change-Id: Iaf3ad65791640e1060a2029e7ebb043f57b338a9
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5758
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Reviewed-by: Marc Jones <marc.jones(a)se-eng.com>
See http://review.coreboot.org/5758 for details.
-gerrit
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the following patch was just integrated into master:
commit 3312ed7e7a0b3269d6559207cdf9ed932ffecd31
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Thu May 22 03:36:22 2014 +1000
amd/agesa/f1?/Lib/amdlib.c: Integer overflow in loop construct
The semantics of this loop relies on an integer overflow in Index >=0
that implies a return value of (UINT8)-1 which around wraps to 0xFF, or
VOLT_UNSUPPORTED.
Change-Id: …
[View More]I44d68973d0a80093350b2a8a4d3b46bfbb57917a
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5801
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones(a)se-eng.com>
See http://review.coreboot.org/5801 for details.
-gerrit
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