coreboot-gerrit February 2014

coreboot-gerrit@coreboot.org

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1135 discussions

Patch merged into coreboot/master: ca15c60 jetway/nf81-t56n-lf: Use proper category.
by gerrit＠coreboot.org 24 Feb '14

24 Feb '14

the following patch was just integrated into master: commit ca15c6061acde237d5af810857a1bde3b146579b Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Feb 23 14:06:58 2014 +0100 jetway/nf81-t56n-lf: Use proper category. "Mini-ITX" was a pure inventional name for category called "mini". Change-Id: I6450fd27c1a7679f252ce7f46f409b7dc459c50d Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> See http://review.coreboot.org/5286 for details. -gerrit

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Patch merged into coreboot/master: 496108f TI am335x: Apply Kconfig use conventions
by gerrit＠coreboot.org 24 Feb '14

24 Feb '14

the following patch was just integrated into master: commit 496108f230ca75c0b5608c45d4280d474cca89b5 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 11 14:58:04 2014 +0200 TI am335x: Apply Kconfig use conventions Change-Id: Ic3c26fd7b1dd8a6731abc9a63b9ca17e084074b2 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/5291 for details. -gerrit

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New patch to review for coreboot: 496108f TI am335x: Apply Kconfig use conventions
by Kyösti Mälkki 24 Feb '14

24 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5291 -gerrit commit 496108f230ca75c0b5608c45d4280d474cca89b5 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 11 14:58:04 2014 +0200 TI am335x: Apply Kconfig use conventions Change-Id: Ic3c26fd7b1dd8a6731abc9a63b9ca17e084074b2 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/ti/Kconfig | 11 ----------- src/cpu/ti/am335x/Kconfig | 13 +++++++++++++ 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/src/cpu/ti/Kconfig b/src/cpu/ti/Kconfig index 0440098..5a62219 100644 --- a/src/cpu/ti/Kconfig +++ b/src/cpu/ti/Kconfig @@ -1,12 +1 @@ -config CPU_TI_AM335X - depends on ARCH_ARMV7 - select HAVE_MONOTONIC_TIMER - select HAVE_UART_SPECIAL - select BOOTBLOCK_CONSOLE - select EARLY_CONSOLE - bool - default n - -if CPU_TI_AM335X source src/cpu/ti/am335x/Kconfig -endif diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index 0142c49..fdc5824 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -1,3 +1,14 @@ +config CPU_TI_AM335X + depends on ARCH_ARMV7 + select HAVE_MONOTONIC_TIMER + select HAVE_UART_SPECIAL + select BOOTBLOCK_CONSOLE + select EARLY_CONSOLE + bool + default n + +if CPU_TI_AM335X + config BOOTBLOCK_CPU_INIT string default "cpu/ti/am335x/bootblock.c" @@ -47,3 +58,5 @@ config CBFS_HEADER_ROM_OFFSET config SYS_SDRAM_BASE hex default 0x40000000 + +endif

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Patch merged into coreboot/master: 64d24c0 CAR_GLOBAL: enforce compiler to check if _start != _end
by gerrit＠coreboot.org 24 Feb '14

24 Feb '14

the following patch was just integrated into master: commit 64d24c0482ebd53fdad30b4d5a44af66575ea111 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Feb 20 05:10:09 2014 +1100 CAR_GLOBAL: enforce compiler to check if _start != _end There are some fun rules C compilers can use to optimize their code. One of them is the assumption that two symbols point to two different addresses. In this case this wasn't true, resulting in unintended code execution (and later, a crash) with a clang build. Change-Id: I1496b22e1d1869ed0610e321b6ec6a83252e9d8b Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/4719 for details. -gerrit

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Patch set updated for coreboot: 02017ff console: Fix includes
by Kyösti Mälkki 24 Feb '14

24 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5232 -gerrit commit 02017ff3ad76d30effd2b9fe97534090c79eb70b Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 17 21:34:42 2014 +0200 console: Fix includes Do not pull in console hw-specific prototypes everywhere with console.h as those are not needed for higher levels. Move prototypes for UARTs next to other consoles. Change-Id: Icbc9cd3e5bdfdab85d7dccd7c3827bba35248fb8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/armv7/early_console.c | 2 ++ src/arch/x86/lib/romcc_console.c | 1 + src/arch/x86/lib/romstage_console.c | 14 +++----- src/console/cbmem_console.c | 1 + src/console/console.c | 6 ++++ src/console/uart8250_console.c | 1 + src/console/uart8250mem_console.c | 1 + src/cpu/allwinner/a10/uart.c | 2 +- src/cpu/allwinner/a10/uart_console.c | 2 +- src/cpu/samsung/exynos5250/uart.c | 2 +- src/cpu/samsung/exynos5420/uart.c | 2 +- src/cpu/ti/am335x/uart.c | 2 +- src/cpu/x86/smm/smiutil.c | 2 +- src/drivers/oxford/oxpcie/oxpcie.c | 1 + src/drivers/oxford/oxpcie/oxpcie_early.c | 2 +- src/drivers/uart/pl011.c | 2 +- src/drivers/uart/util.c | 2 +- src/include/console/console.h | 16 --------- src/include/console/uart.h | 49 ++++++++++++++++++++++++++ src/include/uart.h | 47 ------------------------ src/include/uart8250.h | 2 -- src/lib/cbmem.c | 1 + src/lib/cbmem_console.c | 1 + src/lib/coreboot_table.c | 1 + src/lib/uart8250.c | 2 +- src/lib/uart8250mem.c | 2 +- src/mainboard/cubietech/cubieboard/bootblock.c | 2 +- src/mainboard/ti/beaglebone/bootblock.c | 2 +- src/northbridge/intel/sandybridge/raminit.c | 1 + 29 files changed, 84 insertions(+), 87 deletions(-) diff --git a/src/arch/armv7/early_console.c b/src/arch/armv7/early_console.c index b6339fc..93ea38d 100644 --- a/src/arch/armv7/early_console.c +++ b/src/arch/armv7/early_console.c @@ -18,6 +18,8 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> +#include <console/uart.h> #include <console/vtxprintf.h> /* FIXME: need to make console driver more generic */ diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index c5e6882..52b8a87 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <console/loglevel.h> #include <console/post_codes.h> +#include <console/ne2k.h> /* __PRE_RAM__ */ /* Using a global varible can cause problems when we reset the stack diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 4ef702f..4981f39 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -19,20 +19,16 @@ #include <smp/node.h> #include <console/console.h> +#include <console/cbmem_console.h> +#include <console/uart.h> +#include <console/usb.h> +#include <console/ne2k.h> +#include <console/spkmodem.h> #include <console/vtxprintf.h> #if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM #include <uart8250.h> #endif -#if CONFIG_USBDEBUG -#include <console/usb.h> -#endif -#if CONFIG_CONSOLE_NE2K -#include <console/ne2k.h> -#endif -#if CONFIG_SPKMODEM -#include <console/spkmodem.h> -#endif void console_tx_byte(unsigned char byte) { diff --git a/src/console/cbmem_console.c b/src/console/cbmem_console.c index 2c43f5c..870ce2f 100644 --- a/src/console/cbmem_console.c +++ b/src/console/cbmem_console.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> static void cbmemc_init_(void) { diff --git a/src/console/console.c b/src/console/console.c index 081113c..334e140 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -18,6 +18,12 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> +#include <console/uart.h> +#include <console/usb.h> +#include <console/ne2k.h> +#include <console/spkmodem.h> + #include <build.h> #include <arch/hlt.h> #include <arch/io.h> diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c index 196412c..86f1401 100644 --- a/src/console/uart8250_console.c +++ b/src/console/uart8250_console.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/uart.h> #include <uart8250.h> static void ttyS0_init(void) diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c index 3833e47..eb4e0e0 100644 --- a/src/console/uart8250mem_console.c +++ b/src/console/uart8250mem_console.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/uart.h> #include <uart8250.h> static u32 uart_bar = 0; diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c index 990026b..10ea09a 100644 --- a/src/cpu/allwinner/a10/uart.c +++ b/src/cpu/allwinner/a10/uart.c @@ -7,7 +7,7 @@ #include "uart.h" #include <arch/io.h> -#include <uart.h> +#include <console/uart.h> #include <uart8250.h> /** diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index f7bd3c6..af66cb7 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -8,7 +8,7 @@ #include <config.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include <console/console.h> diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 10108a8..c9d8d25 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -18,7 +18,7 @@ */ #include <console/console.h> /* for __console definition */ -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include "uart.h" #include "clk.h" diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c index 2ca8271..f9dd268 100644 --- a/src/cpu/samsung/exynos5420/uart.c +++ b/src/cpu/samsung/exynos5420/uart.c @@ -18,7 +18,7 @@ */ #include <console/console.h> /* for __console definition */ -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include "uart.h" #include "clk.h" diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index 719215e..f6f1a8d 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -18,7 +18,7 @@ #include <config.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include <console/console.h> /* for __console definition */ diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index a50a16a..98ef223 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -23,7 +23,7 @@ #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <console/console.h> -#include <uart.h> +#include <console/uart.h> #include <uart8250.h> #include <console/vtxprintf.h> diff --git a/src/drivers/oxford/oxpcie/oxpcie.c b/src/drivers/oxford/oxpcie/oxpcie.c index f719fc7..26d29f8 100644 --- a/src/drivers/oxford/oxpcie/oxpcie.c +++ b/src/drivers/oxford/oxpcie/oxpcie.c @@ -22,6 +22,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <console/console.h> +#include <uart8250.h> #include <arch/io.h> static void oxford_oxpcie_enable(device_t dev) diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c index 4f6f964..edb0523 100644 --- a/src/drivers/oxford/oxpcie/oxpcie_early.c +++ b/src/drivers/oxford/oxpcie/oxpcie_early.c @@ -21,7 +21,7 @@ #include <arch/io.h> #include <arch/early_variables.h> #include <delay.h> -#include <uart.h> +#include <console/uart.h> #include <uart8250.h> #include <device/pci_def.h> diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index af085ac..376e95c 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -14,7 +14,7 @@ */ #include <console/console.h> -#include <uart.h> +#include <console/uart.h> static void pl011_uart_tx_byte(unsigned char data) { diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c index e09b686..72bf50e 100644 --- a/src/drivers/uart/util.c +++ b/src/drivers/uart/util.c @@ -16,7 +16,7 @@ */ #include <console/console.h> -#include <uart.h> +#include <console/uart.h> #if CONFIG_USE_OPTION_TABLE #include <option.h> #include "option_table.h" diff --git a/src/include/console/console.h b/src/include/console/console.h index 6fa624c..dfeedda 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -24,22 +24,6 @@ #include <console/loglevel.h> #include <console/post_codes.h> -#if CONFIG_CONSOLE_SERIAL -#include <uart.h> -#endif -#if CONFIG_USBDEBUG && !defined(__ROMCC__) -#include <console/usb.h> -#endif -#if CONFIG_CONSOLE_NE2K -#include <console/ne2k.h> -#endif -#if CONFIG_CONSOLE_CBMEM -#include <console/cbmem_console.h> -#endif -#if CONFIG_SPKMODEM -#include <console/spkmodem.h> -#endif - #ifndef __PRE_RAM__ unsigned char console_rx_byte(void); int console_tst_byte(void); diff --git a/src/include/console/uart.h b/src/include/console/uart.h new file mode 100644 index 0000000..9b52a78 --- /dev/null +++ b/src/include/console/uart.h @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CONSOLE_UART_H +#define CONSOLE_UART_H + +/* Return the clock frequency UART uses as reference clock for + * baudrate generator. */ +unsigned int uart_platform_refclk(void); + +/* Return the baudrate determined from option_table, or when that is + * not used, CONFIG_TTYS0_BAUD. + */ +unsigned int default_baudrate(void); + +/* Returns the divisor value for a given baudrate. + * The formula to satisfy is: + * refclk / divisor = baudrate * oversample + */ +unsigned int uart_baudrate_divisor(unsigned int baudrate, + unsigned int refclk, unsigned int oversample); + + +unsigned char uart_rx_byte(void); +void uart_tx_byte(unsigned char data); +void uart_tx_flush(void); +void uart_init(void); + +uint32_t uartmem_getbaseaddr(void); + +void oxford_init(void); + +#endif /* CONSOLE_UART_H */ diff --git a/src/include/uart.h b/src/include/uart.h deleted file mode 100644 index 997fe18..0000000 --- a/src/include/uart.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef UART_H -#define UART_H - -/* Return the clock frequency UART uses as reference clock for - * baudrate generator. */ -unsigned int uart_platform_refclk(void); - -/* Return the baudrate determined from option_table, or when that is - * not used, CONFIG_TTYS0_BAUD. - */ -unsigned int default_baudrate(void); - -/* Returns the divisor value for a given baudrate. - * The formula to satisfy is: - * refclk / divisor = baudrate * oversample - */ -unsigned int uart_baudrate_divisor(unsigned int baudrate, - unsigned int refclk, unsigned int oversample); - - -unsigned char uart_rx_byte(void); -void uart_tx_byte(unsigned char data); -void uart_tx_flush(void); -void uart_init(void); - -uint32_t uartmem_getbaseaddr(void); - -#endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 112cd44..af95796 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -129,8 +129,6 @@ u32 uart_mem_init(void); #if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE /* and special init for OXPCIe based cards */ extern int oxford_oxpcie_present; - -void oxford_init(void); #endif #endif diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index d97f6af..3fea49a 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -23,6 +23,7 @@ #include <cbmem.h> #include <boot/coreboot_tables.h> #include <console/console.h> +#include <console/cbmem_console.h> #include <arch/early_variables.h> #if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) #include <arch/acpi.h> diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 83d44e3..9d5419a 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> #include <cbmem.h> #include <arch/early_variables.h> #include <string.h> diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index d5dc14c..167eda0 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -21,6 +21,7 @@ */ #include <console/console.h> +#include <console/uart.h> #include <ip_checksum.h> #include <boot/coreboot_tables.h> #include <string.h> diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index d136eb8..3171e00 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -19,7 +19,7 @@ */ #include <arch/io.h> -#include <uart.h> +#include <console/uart.h> #include <uart8250.h> #include <trace.h> diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 5e96825..f35da05 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -19,7 +19,7 @@ */ #include <arch/io.h> -#include <uart.h> +#include <console/uart.h> #include <uart8250.h> #include <device/device.h> #include <delay.h> diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index 2e5929c..e22c1d8 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -7,7 +7,7 @@ */ #include <arch/io.h> -#include <uart.h> +#include <console/uart.h> #include <console/console.h> #include <delay.h> #include <cpu/allwinner/a10/gpio.h> diff --git a/src/mainboard/ti/beaglebone/bootblock.c b/src/mainboard/ti/beaglebone/bootblock.c index dd46040..9e0a62e 100644 --- a/src/mainboard/ti/beaglebone/bootblock.c +++ b/src/mainboard/ti/beaglebone/bootblock.c @@ -19,7 +19,7 @@ #include <arch/io.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <console/console.h> #include <cpu/ti/am335x/pinmux.h> diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index b9c3839..bfb4033 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/usb.h> #include <string.h> #include <arch/hlt.h> #include <arch/io.h>

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Patch set updated for coreboot: e40d55c SMM: Only have console with DEBUG_SMI
by Kyösti Mälkki 24 Feb '14

24 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5142 -gerrit commit e40d55cd6d3c72ed6c53007ef82fa16cf2e6468c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jan 26 11:32:51 2014 +0200 SMM: Only have console with DEBUG_SMI Existing code compiled serial communication and printk() for SMM even when DEBUG_SMI was not selected. Change-Id: Ic5e25cd7453cb2243f7ac592b093fba752a299f7 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/Makefile.inc | 3 +-- src/cpu/x86/smm/smiutil.c | 8 ++------ src/drivers/uart/Makefile.inc | 6 +++--- src/include/console/console.h | 1 + 4 files changed, 7 insertions(+), 11 deletions(-) diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index 62be1d2..54d59cd 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -5,8 +5,7 @@ ramstage-y += vsprintf.c ramstage-y += post.c ramstage-y += die.c -smm-y += printk.c -smm-y += vtxprintf.c +smm-$(CONFIG_DEBUG_SMI) += vtxprintf.c printk.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index 43731bc..3325c32 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -19,13 +19,10 @@ * MA 02110-1301 USA */ -#include <arch/io.h> -#include <cpu/x86/cache.h> -#include <cpu/x86/smm.h> #include <console/console.h> #include <console/uart.h> -#include <console/vtxprintf.h> +#if CONFIG_DEBUG_SMI void console_tx_flush(void) { } @@ -42,6 +39,7 @@ void console_tx_byte(unsigned char byte) uart_tx_byte(byte); #endif } +#endif void console_init(void) { @@ -53,8 +51,6 @@ void console_init(void) #if CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif -#else - console_loglevel = 1; #endif } diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc index 3a9ca3d..415c5bb 100644 --- a/src/drivers/uart/Makefile.inc +++ b/src/drivers/uart/Makefile.inc @@ -2,19 +2,19 @@ ifeq ($(CONFIG_CONSOLE_SERIAL),y) romstage-y += util.c ramstage-y += util.c bootblock-y += util.c -smm-y += util.c +smm-$(CONFIG_DEBUG_SMI) += util.c endif ifeq ($(CONFIG_CONSOLE_SERIAL8250),y) romstage-y += uart8250io.c ramstage-y += uart8250io.c -smm-y += uart8250io.c +smm-$(CONFIG_DEBUG_SMI) += uart8250io.c endif ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) romstage-y += uart8250mem.c ramstage-y += uart8250mem.c -smm-y += uart8250mem.c +smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c endif ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) diff --git a/src/include/console/console.h b/src/include/console/console.h index dfeedda..a089729 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -72,6 +72,7 @@ void __attribute__ ((noreturn)) die(const char *msg); int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); #if defined(__BOOT_BLOCK__) && !CONFIG_BOOTBLOCK_CONSOLE || \ + defined(__SMM__) && !CONFIG_DEBUG_SMI || \ (defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__)) && !CONFIG_EARLY_CONSOLE static inline void printk(int LEVEL, const char *fmt, ...);

1 0

Patch set updated for coreboot: e6af624 uart8250mem: Unify calls with generic UART
by Kyösti Mälkki 24 Feb '14

24 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5235 -gerrit commit e6af6248fdbbf71b6502f6f3c810ea32cb5e4949 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 15 10:19:23 2014 +0200 uart8250mem: Unify calls with generic UART NOTE: UART base for SMM continues to be broken, as it does not use the address resource allocator has assigned. Change-Id: I79f2ca8427a33a3c719adfe277c24dab79a33ef3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romstage_console.c | 11 +--- src/console/uart8250mem_console.c | 29 +++-------- src/cpu/x86/smm/smiutil.c | 10 +--- src/drivers/oxford/oxpcie/Makefile.inc | 5 +- src/drivers/oxford/oxpcie/oxpcie.c | 7 ++- src/drivers/oxford/oxpcie/oxpcie_early.c | 51 +++++++++++++----- src/include/console/uart.h | 2 + src/include/uart8250.h | 17 ------ src/lib/uart8250mem.c | 89 ++++++++++++++++---------------- 9 files changed, 100 insertions(+), 121 deletions(-) diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 89d7f82..6566b2f 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -26,20 +26,13 @@ #include <console/spkmodem.h> #include <console/vtxprintf.h> -#if CONFIG_CONSOLE_SERIAL8250MEM -#include <uart8250.h> -#endif - void console_tx_byte(unsigned char byte) { if (byte == '\n') console_tx_byte('\r'); #if CONFIG_CONSOLE_SERIAL8250MEM - if (oxford_oxpcie_present) { - uart8250_mem_tx_byte( - CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000, byte); - } + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_SERIAL8250 uart_tx_byte(byte); @@ -61,7 +54,7 @@ void console_tx_byte(unsigned char byte) void console_tx_flush(void) { #if CONFIG_CONSOLE_SERIAL8250MEM - uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000); + uart_tx_flush(); #endif #if CONFIG_CONSOLE_SERIAL8250 uart_tx_flush(); diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c index eb4e0e0..7e52aed 100644 --- a/src/console/uart8250mem_console.c +++ b/src/console/uart8250mem_console.c @@ -19,47 +19,30 @@ #include <console/console.h> #include <console/uart.h> -#include <uart8250.h> -static u32 uart_bar = 0; - -void uartmem_init(void) -{ - uart_bar = uart_mem_init(); -} - -u32 uartmem_getbaseaddr(void) +static void uartmem_init(void) { - return uart_bar; + uart_init(); } static void uartmem_tx_byte(unsigned char data) { - if (!uart_bar) - return; - - uart8250_mem_tx_byte(uart_bar, data); + uart_tx_byte(data); } static void uartmem_tx_flush(void) { - uart8250_mem_tx_flush(uart_bar); + uart_tx_flush(); } static unsigned char uartmem_rx_byte(void) { - if (!uart_bar) - return 0; - - return uart8250_mem_rx_byte(uart_bar); + return uart_rx_byte(); } static int uartmem_tst_byte(void) { - if (!uart_bar) - return 0; - - return uart8250_mem_can_rx_byte(uart_bar); + return uart_can_rx_byte(); } static const struct console_driver uart8250mem_console __console = { diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index 3702e5c..43731bc 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -24,13 +24,8 @@ #include <cpu/x86/smm.h> #include <console/console.h> #include <console/uart.h> -#include <uart8250.h> #include <console/vtxprintf.h> -#if CONFIG_CONSOLE_SERIAL8250MEM -static u32 serial8250mem_base_address = 0; -#endif - void console_tx_flush(void) { } @@ -41,8 +36,7 @@ void console_tx_byte(unsigned char byte) console_tx_byte('\r'); #if CONFIG_CONSOLE_SERIAL8250MEM - if (serial8250mem_base_address) - uart8250_mem_tx_byte(serial8250mem_base_address, byte); + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_SERIAL8250 uart_tx_byte(byte); @@ -57,7 +51,7 @@ void console_init(void) uart_init(); #endif #if CONFIG_CONSOLE_SERIAL8250MEM - serial8250mem_base_address = uart_mem_init(); + uart_init(); #endif #else console_loglevel = 1; diff --git a/src/drivers/oxford/oxpcie/Makefile.inc b/src/drivers/oxford/oxpcie/Makefile.inc index 6cc29c4..1922425 100644 --- a/src/drivers/oxford/oxpcie/Makefile.inc +++ b/src/drivers/oxford/oxpcie/Makefile.inc @@ -1,5 +1,4 @@ -ramstage-$(CONFIG_DRIVERS_OXFORD_OXPCIE) += oxpcie.c - ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) -romstage-$(CONFIG_DRIVERS_OXFORD_OXPCIE) += oxpcie_early.c +ramstage-y += oxpcie_early.c oxpcie.c +romstage-y += oxpcie_early.c endif diff --git a/src/drivers/oxford/oxpcie/oxpcie.c b/src/drivers/oxford/oxpcie/oxpcie.c index 26d29f8..76119d2 100644 --- a/src/drivers/oxford/oxpcie/oxpcie.c +++ b/src/drivers/oxford/oxpcie/oxpcie.c @@ -22,7 +22,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <console/console.h> -#include <uart8250.h> +#include <console/uart.h> #include <arch/io.h> static void oxford_oxpcie_enable(device_t dev) @@ -47,10 +47,9 @@ static void oxford_oxpcie_set_resources(struct device *dev) { pci_dev_set_resources(dev); -#if CONFIG_CONSOLE_SERIAL8250MEM /* Re-initialize OXPCIe base address after set_resources */ - uartmem_init(); -#endif + u32 mmio_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0); + oxford_remap(mmio_base & ~0xf); } static struct device_operations oxford_oxpcie_ops = { diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c index edb0523..22df79a 100644 --- a/src/drivers/oxford/oxpcie/oxpcie_early.c +++ b/src/drivers/oxford/oxpcie/oxpcie_early.c @@ -17,14 +17,20 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#define __SIMPLE_DEVICE__ + #include <stdint.h> +#include <stddef.h> #include <arch/io.h> #include <arch/early_variables.h> #include <delay.h> #include <console/uart.h> -#include <uart8250.h> #include <device/pci_def.h> +static unsigned int oxpcie_present CAR_GLOBAL; +static ROMSTAGE_CONST u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; +static ROMSTAGE_CONST u32 uart1_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; + #define PCIE_BRIDGE \ PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_BUS, \ CONFIG_OXFORD_OXPCIE_BRIDGE_DEVICE, \ @@ -36,13 +42,9 @@ #define OXPCIE_DEVICE_3 \ PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_SUBORDINATE, 0, 3) -#if defined(__PRE_RAM__) -int oxford_oxpcie_present CAR_GLOBAL; - -void oxford_init(void) +static void oxpcie_init_bridge(void) { u16 reg16; - oxford_oxpcie_present = 1; /* First we reset the secondary bus */ reg16 = pci_read_config16(PCIE_BRIDGE, PCI_BRIDGE_CONTROL); @@ -101,7 +103,6 @@ void oxford_init(void) break; default: /* No UART here. */ - oxford_oxpcie_present = 0; return; } @@ -114,17 +115,43 @@ void oxford_init(void) reg16 |= PCI_COMMAND_MEMORY; pci_write_config16(device, PCI_COMMAND, reg16); - /* Now the UART initialization */ - u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; + car_set_var(oxpcie_present, 1); +} + +static int oxpcie_uart_active(void) +{ + return (car_get_var(oxpcie_present)); +} + +unsigned int uart_platform_base(int idx) +{ + if (idx == 0 && oxpcie_uart_active()) + return uart0_base; + if (idx == 1 && oxpcie_uart_active()) + return uart1_base; + return 0; +} - unsigned int div = uart_baudrate_divisor(default_baudrate(), - uart_platform_refclk(), 16); - uart8250_mem_init(uart0_base, div); +#ifndef __PRE_RAM__ +void oxford_remap(u32 new_base) +{ + uart0_base = new_base + 0x1000; + uart1_base = new_base + 0x2000; } +uint32_t uartmem_getbaseaddr(void) +{ + return uart_platform_base(0); +} #endif unsigned int uart_platform_refclk(void) { return 62500000; } + +void oxford_init(void) +{ + oxpcie_init_bridge(); + uart_init(); +} diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 8aa8ea2..17811ca 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -43,8 +43,10 @@ void uart_tx_flush(void); unsigned char uart_rx_byte(void); int uart_can_rx_byte(void); +unsigned int uart_platform_base(int idx); uint32_t uartmem_getbaseaddr(void); void oxford_init(void); +void oxford_remap(unsigned int new_base); #endif /* CONSOLE_UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 100a216..c63153c 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -105,21 +105,4 @@ #define UART_SCR 0x07 #define UART_SPR 0x07 -#if CONFIG_CONSOLE_SERIAL8250MEM -void uartmem_init(void); - -/* and the same for memory mapped uarts */ -unsigned char uart8250_mem_rx_byte(unsigned base_port); -int uart8250_mem_can_rx_byte(unsigned base_port); -void uart8250_mem_tx_byte(unsigned base_port, unsigned char data); -void uart8250_mem_tx_flush(unsigned base_port); -void uart8250_mem_init(unsigned base_port, unsigned divisor); -u32 uart_mem_init(void); - -#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE -/* and special init for OXPCIe based cards */ -extern int oxford_oxpcie_present; -#endif -#endif - #endif /* UART8250_H */ diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index f35da05..ce45de9 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -33,42 +33,32 @@ #define SINGLE_CHAR_TIMEOUT (50 * 1000) #define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) -static inline int uart8250_mem_can_tx_byte(unsigned base_port) +static int uart8250_mem_can_tx_byte(unsigned base_port) { return read8(base_port + UART_LSR) & UART_LSR_THRE; } -static inline void uart8250_mem_wait_to_tx_byte(unsigned base_port) +static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while(i-- && !uart8250_mem_can_tx_byte(base_port)) udelay(1); + write8(base_port + UART_TBR, data); } -static inline void uart8250_mem_wait_until_sent(unsigned base_port) +static void uart8250_mem_tx_flush(unsigned base_port) { unsigned long int i = FIFO_TIMEOUT; while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) udelay(1); } -void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) -{ - uart8250_mem_wait_to_tx_byte(base_port); - write8(base_port + UART_TBR, data); -} - -void uart8250_mem_tx_flush(unsigned base_port) -{ - uart8250_mem_wait_until_sent(base_port); -} - -int uart8250_mem_can_rx_byte(unsigned base_port) +static int uart8250_mem_can_rx_byte(unsigned base_port) { return read8(base_port + UART_LSR) & UART_LSR_DR; } -unsigned char uart8250_mem_rx_byte(unsigned base_port) +static unsigned char uart8250_mem_rx_byte(unsigned base_port) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while(i-- && !uart8250_mem_can_rx_byte(base_port)) @@ -79,7 +69,7 @@ unsigned char uart8250_mem_rx_byte(unsigned base_port) return 0x0; } -void uart8250_mem_init(unsigned base_port, unsigned divisor) +static void uart8250_mem_init(unsigned base_port, unsigned divisor) { /* Disable interrupts */ write8(base_port + UART_IER, 0x0); @@ -99,36 +89,45 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor) write8(base_port + UART_LCR, CONFIG_TTYS0_LCS); } -u32 uart_mem_init(void) +void uart_init(void) { - u32 uart_bar = 0; - unsigned div; - - /* Now find the UART base address and calculate the divisor */ -#if CONFIG_DRIVERS_OXFORD_OXPCIE -#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__) - device_t dev = dev_find_device(0x1415, 0xc158, NULL); - if (!dev) - dev = dev_find_device(0x1415, 0xc11b, NULL); - - if (dev) { - struct resource *res = find_resource(dev, 0x10); - - if (res) { - uart_bar = res->base + 0x1000; // for 1st UART - // uart_bar = res->base + 0x2000; // for 2nd UART - } - } - - if (!uart_bar) -#endif - uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART - // uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART -#endif + u32 base = uart_platform_base(0); + if (!base) + return; + unsigned int div; div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); - if (uart_bar) - uart8250_mem_init(uart_bar, div); + uart8250_mem_init(base, div); +} - return uart_bar; +void uart_tx_byte(unsigned char data) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_byte(base, data); +} + +unsigned char uart_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0xff; + return uart8250_mem_rx_byte(base); +} + +int uart_can_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0; + return uart8250_mem_can_rx_byte(base); +} + +void uart_tx_flush(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_flush(base); }

1 0

Patch set updated for coreboot: b93d749 uart8250io: Unify calls with generic UART
by Kyösti Mälkki 24 Feb '14

24 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5234 -gerrit commit b93d749973cd554ffdddd2549606176bd0a40217 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 15 07:53:18 2014 +0200 uart8250io: Unify calls with generic UART Change-Id: I6d56648e56f2177e1d5332497321e718df18300c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 8 +++--- src/arch/x86/lib/romstage_console.c | 6 ++--- src/console/uart8250_console.c | 9 +++---- src/cpu/x86/smm/smiutil.c | 2 +- src/include/console/uart.h | 5 ++-- src/include/uart8250.h | 10 -------- src/lib/uart8250.c | 51 ++++++++++++++++++++++++------------- 7 files changed, 47 insertions(+), 44 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 52b8a87..1ed498a 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <console/loglevel.h> #include <console/post_codes.h> +#include <console/uart.h> #include <console/ne2k.h> /* __PRE_RAM__ */ @@ -28,9 +29,6 @@ * we could use the same code on all architectures. */ #define console_loglevel CONFIG_DEFAULT_CONSOLE_LOGLEVEL -#if CONFIG_CONSOLE_SERIAL8250 -#include <uart8250.h> -#endif #if CONFIG_CONSOLE_SERIAL8250 #include "drivers/uart/util.c" @@ -43,7 +41,7 @@ static void __console_tx_byte(unsigned char byte) { #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); @@ -64,7 +62,7 @@ static void __console_tx_char(int loglevel, unsigned char byte) { if (console_loglevel >= loglevel) { #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 4981f39..89d7f82 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -26,7 +26,7 @@ #include <console/spkmodem.h> #include <console/vtxprintf.h> -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_CONSOLE_SERIAL8250MEM #include <uart8250.h> #endif @@ -42,7 +42,7 @@ void console_tx_byte(unsigned char byte) } #endif #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); + uart_tx_byte(byte); #endif #if CONFIG_USBDEBUG && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) usb_tx_byte(0, byte); @@ -64,7 +64,7 @@ void console_tx_flush(void) uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000); #endif #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_flush(CONFIG_TTYS0_BASE); + uart_tx_flush(); #endif #if CONFIG_CONSOLE_NE2K ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c index 86f1401..52f59f6 100644 --- a/src/console/uart8250_console.c +++ b/src/console/uart8250_console.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <console/uart.h> -#include <uart8250.h> static void ttyS0_init(void) { @@ -28,22 +27,22 @@ static void ttyS0_init(void) static void ttyS0_tx_byte(unsigned char data) { - uart8250_tx_byte(CONFIG_TTYS0_BASE, data); + uart_tx_byte(data); } static void ttyS0_tx_flush(void) { - uart8250_tx_flush(CONFIG_TTYS0_BASE); + uart_tx_flush(); } static unsigned char ttyS0_rx_byte(void) { - return uart8250_rx_byte(CONFIG_TTYS0_BASE); + return uart_rx_byte(); } static int ttyS0_tst_byte(void) { - return uart8250_can_rx_byte(CONFIG_TTYS0_BASE); + return uart_can_rx_byte(); } static const struct console_driver uart8250_console __console = { diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index 98ef223..3702e5c 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -45,7 +45,7 @@ void console_tx_byte(unsigned char byte) uart8250_mem_tx_byte(serial8250mem_base_address, byte); #endif #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); + uart_tx_byte(byte); #endif } diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 9b52a78..8aa8ea2 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -37,10 +37,11 @@ unsigned int uart_baudrate_divisor(unsigned int baudrate, unsigned int refclk, unsigned int oversample); -unsigned char uart_rx_byte(void); +void uart_init(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); -void uart_init(void); +unsigned char uart_rx_byte(void); +int uart_can_rx_byte(void); uint32_t uartmem_getbaseaddr(void); diff --git a/src/include/uart8250.h b/src/include/uart8250.h index af95796..100a216 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -105,16 +105,6 @@ #define UART_SCR 0x07 #define UART_SPR 0x07 -#if CONFIG_CONSOLE_SERIAL8250 -unsigned char uart8250_rx_byte(unsigned base_port); -int uart8250_can_rx_byte(unsigned base_port); -void uart8250_tx_byte(unsigned base_port, unsigned char data); -void uart8250_tx_flush(unsigned base_port); -/* Yes it is silly to have three different uart init functions. But we used to - * have three different sets of uart code, so it's an improvement. - */ -void uart8250_init(unsigned base_port, unsigned divisor); -#endif #if CONFIG_CONSOLE_SERIAL8250MEM void uartmem_init(void); diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index 3171e00..8e1714d 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -40,40 +40,30 @@ #define SINGLE_CHAR_TIMEOUT (50 * 1000) #define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) -static inline int uart8250_can_tx_byte(unsigned base_port) +static int uart8250_can_tx_byte(unsigned base_port) { return inb(base_port + UART_LSR) & UART_LSR_THRE; } -static inline void uart8250_wait_to_tx_byte(unsigned base_port) +static void uart8250_tx_byte(unsigned base_port, unsigned char data) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while (i-- && !uart8250_can_tx_byte(base_port)); + outb(data, base_port + UART_TBR); } -static inline void uart8250_wait_until_sent(unsigned base_port) +static void uart8250_tx_flush(unsigned base_port) { unsigned long int i = FIFO_TIMEOUT; while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); } -void uart8250_tx_byte(unsigned base_port, unsigned char data) -{ - uart8250_wait_to_tx_byte(base_port); - outb(data, base_port + UART_TBR); -} - -void uart8250_tx_flush(unsigned base_port) -{ - uart8250_wait_until_sent(base_port); -} - -int uart8250_can_rx_byte(unsigned base_port) +static int uart8250_can_rx_byte(unsigned base_port) { return inb(base_port + UART_LSR) & UART_LSR_DR; } -unsigned char uart8250_rx_byte(unsigned base_port) +static unsigned char uart8250_rx_byte(unsigned base_port) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while (i-- && !uart8250_can_rx_byte(base_port)); @@ -84,7 +74,7 @@ unsigned char uart8250_rx_byte(unsigned base_port) return 0x0; } -void uart8250_init(unsigned base_port, unsigned divisor) +static void uart8250_init(unsigned base_port, unsigned divisor) { DISABLE_TRACE; /* Disable interrupts */ @@ -107,10 +97,35 @@ void uart8250_init(unsigned base_port, unsigned divisor) ENABLE_TRACE; } +/* FIXME: Needs uart index from Kconfig. + * Already use array as a work-around for ROMCC. + */ +static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; + void uart_init(void) { unsigned int div; div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, BAUDRATE_OVERSAMPLE); - uart8250_init(CONFIG_TTYS0_BASE, div); + uart8250_init(bases[0], div); +} + +void uart_tx_byte(unsigned char data) +{ + uart8250_tx_byte(bases[0], data); +} + +unsigned char uart_rx_byte(void) +{ + return uart8250_rx_byte(bases[0]); +} + +int uart_can_rx_byte(void) +{ + return uart8250_can_rx_byte(bases[0]); +} + +void uart_tx_flush(void) +{ + uart8250_tx_flush(bases[0]); }

1 0

Patch set updated for coreboot: 4bf0e5a allwinner/a10: Fix baudrate calculation
by Kyösti Mälkki 24 Feb '14

24 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5289 -gerrit commit 4bf0e5a7c3a9a3b3313912d53e2af2db04b470ad Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 19 08:58:12 2014 +0200 allwinner/a10: Fix baudrate calculation UART input clock is platform dependent. Also account for possible use of get_option() where baudrate is not compile-time constant. Change-Id: Ie1c8789ef72430e43fc33bfa9ffb9f5346762439 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/allwinner/a10/uart.c | 5 +++-- src/cpu/allwinner/a10/uart_console.c | 22 ++++++---------------- 2 files changed, 9 insertions(+), 18 deletions(-) diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c index 97ac302..990026b 100644 --- a/src/cpu/allwinner/a10/uart.c +++ b/src/cpu/allwinner/a10/uart.c @@ -7,6 +7,7 @@ #include "uart.h" #include <arch/io.h> +#include <uart.h> #include <uart8250.h> /** @@ -19,11 +20,11 @@ void a10_uart_configure(void *uart_base, u32 baud_rate, u8 data_bits, u16 div; struct a10_uart *uart = uart_base; + div = (u16) uart_baudrate_divisor(baud_rate, + uart_platform_refclk(), 16); /* Enable access to Divisor Latch register */ write32(UART_LCR_DLAB, &uart->lcr); /* Set baudrate */ - /* FIXME: We assume clock is 24MHz, which may not be the case */ - div = 24000000 / 16 / baud_rate; write32((div >> 8) & 0xff, &uart->dlh); write32(div & 0xff, &uart->dll); /* Set line control */ diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index 58930dd..f7bd3c6 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -38,29 +38,19 @@ static void *get_console_uart_base_addr(void) return (void *)A1X_UART0_BASE; } -static u32 get_console_uart_baud(void) +/* FIXME: We assume clock is 24MHz, which may not be the case. */ +unsigned int uart_platform_refclk(void) { - if (CONFIG_CONSOLE_SERIAL_115200) - return 115200; - else if (CONFIG_CONSOLE_SERIAL_57600) - return 57600; - else if (CONFIG_CONSOLE_SERIAL_38400) - return 34800; - else if (CONFIG_CONSOLE_SERIAL_19200) - return 19200; - else if (CONFIG_CONSOLE_SERIAL_9600) - return 9600; - - /* Default to 115200 if selection is invalid */ - return 115200; + return 24000000; } static void a10_uart_init_dev(void) { void *uart_base = get_console_uart_base_addr(); + /* Use default 8N1 encoding */ - a10_uart_configure(uart_base, get_console_uart_baud(), - 8, UART_PARITY_NONE, 1); + a10_uart_configure(uart_base, default_baudrate(), + 8, UART_PARITY_NONE, 1); a10_uart_enable_fifos(uart_base); }

1 0

Patch set updated for coreboot: ee7a3fd uart8250: Move under drivers/uart
by Kyösti Mälkki 24 Feb '14

24 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5236 -gerrit commit ee7a3fda90cb99286e12b059e19a765d55ce9ae9 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Jan 30 15:45:16 2014 +0200 uart8250: Move under drivers/uart Change-Id: Ic65ffaaa092330ed68d891e4a09a8b86cdc04a3a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 2 +- src/cpu/allwinner/a10/uart.c | 2 +- src/drivers/uart/Makefile.inc | 12 ++++ src/drivers/uart/uart8250io.c | 131 ++++++++++++++++++++++++++++++++++++++ src/drivers/uart/uart8250mem.c | 133 +++++++++++++++++++++++++++++++++++++++ src/drivers/uart/uart8250reg.h | 108 +++++++++++++++++++++++++++++++ src/include/uart8250.h | 108 ------------------------------- src/lib/Makefile.inc | 6 -- src/lib/uart8250.c | 131 -------------------------------------- src/lib/uart8250mem.c | 133 --------------------------------------- 10 files changed, 386 insertions(+), 380 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 1ed498a..66c81db 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -32,7 +32,7 @@ #if CONFIG_CONSOLE_SERIAL8250 #include "drivers/uart/util.c" -#include "lib/uart8250.c" +#include "drivers/uart/uart8250io.c" #endif #if CONFIG_CONSOLE_NE2K #include "drivers/net/ne2k.c" diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c index 10ea09a..1885ace 100644 --- a/src/cpu/allwinner/a10/uart.c +++ b/src/cpu/allwinner/a10/uart.c @@ -8,7 +8,7 @@ #include "uart.h" #include <arch/io.h> #include <console/uart.h> -#include <uart8250.h> +#include <drivers/uart/uart8250reg.h> /** * \brief Configure line control settings for UART diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc index 52a7024..3a9ca3d 100644 --- a/src/drivers/uart/Makefile.inc +++ b/src/drivers/uart/Makefile.inc @@ -5,6 +5,18 @@ bootblock-y += util.c smm-y += util.c endif +ifeq ($(CONFIG_CONSOLE_SERIAL8250),y) +romstage-y += uart8250io.c +ramstage-y += uart8250io.c +smm-y += uart8250io.c +endif + +ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) +romstage-y += uart8250mem.c +ramstage-y += uart8250mem.c +smm-y += uart8250mem.c +endif + ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) ifeq ($(CONFIG_DRIVERS_UART_PL011),y) diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c new file mode 100644 index 0000000..e4e8b6c --- /dev/null +++ b/src/drivers/uart/uart8250io.c @@ -0,0 +1,131 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * Copyright (C) 2006-2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/uart.h> +#include <trace.h> +#include "uart8250reg.h" + +/* Should support 8250, 16450, 16550, 16550A type UARTs */ + +/* Nominal values only, good for the range of choices Kconfig offers for + * set of standard baudrates. + */ +#define BAUDRATE_REFCLK (115200) +#define BAUDRATE_OVERSAMPLE (1) + +/* Expected character delay at 1200bps is 9ms for a working UART + * and no flow-control. Assume UART as stuck if shift register + * or FIFO takes more than 50ms per character to appear empty. + * + * Estimated that inb() from UART takes 1 microsecond. + */ +#define SINGLE_CHAR_TIMEOUT (50 * 1000) +#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) + +static int uart8250_can_tx_byte(unsigned base_port) +{ + return inb(base_port + UART_LSR) & UART_LSR_THRE; +} + +static void uart8250_tx_byte(unsigned base_port, unsigned char data) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while (i-- && !uart8250_can_tx_byte(base_port)); + outb(data, base_port + UART_TBR); +} + +static void uart8250_tx_flush(unsigned base_port) +{ + unsigned long int i = FIFO_TIMEOUT; + while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); +} + +static int uart8250_can_rx_byte(unsigned base_port) +{ + return inb(base_port + UART_LSR) & UART_LSR_DR; +} + +static unsigned char uart8250_rx_byte(unsigned base_port) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while (i-- && !uart8250_can_rx_byte(base_port)); + + if (i) + return inb(base_port + UART_RBR); + else + return 0x0; +} + +static void uart8250_init(unsigned base_port, unsigned divisor) +{ + DISABLE_TRACE; + /* Disable interrupts */ + outb(0x0, base_port + UART_IER); + /* Enable FIFOs */ + outb(UART_FCR_FIFO_EN, base_port + UART_FCR); + + /* assert DTR and RTS so the other end is happy */ + outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR); + + /* DLAB on */ + outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR); + + /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ + outb(divisor & 0xFF, base_port + UART_DLL); + outb((divisor >> 8) & 0xFF, base_port + UART_DLM); + + /* Set to 3 for 8N1 */ + outb(CONFIG_TTYS0_LCS, base_port + UART_LCR); + ENABLE_TRACE; +} + +/* FIXME: Needs uart index from Kconfig. + * Already use array as a work-around for ROMCC. + */ +static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; + +void uart_init(void) +{ + unsigned int div; + div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, + BAUDRATE_OVERSAMPLE); + uart8250_init(bases[0], div); +} + +void uart_tx_byte(unsigned char data) +{ + uart8250_tx_byte(bases[0], data); +} + +unsigned char uart_rx_byte(void) +{ + return uart8250_rx_byte(bases[0]); +} + +int uart_can_rx_byte(void) +{ + return uart8250_can_rx_byte(bases[0]); +} + +void uart_tx_flush(void) +{ + uart8250_tx_flush(bases[0]); +} diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c new file mode 100644 index 0000000..74929f5 --- /dev/null +++ b/src/drivers/uart/uart8250mem.c @@ -0,0 +1,133 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * Copyright (C) 2006-2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/uart.h> +#include <device/device.h> +#include <delay.h> +#include "uart8250reg.h" + +/* Should support 8250, 16450, 16550, 16550A type UARTs */ + +/* Expected character delay at 1200bps is 9ms for a working UART + * and no flow-control. Assume UART as stuck if shift register + * or FIFO takes more than 50ms per character to appear empty. + */ +#define SINGLE_CHAR_TIMEOUT (50 * 1000) +#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) + +static int uart8250_mem_can_tx_byte(unsigned base_port) +{ + return read8(base_port + UART_LSR) & UART_LSR_THRE; +} + +static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while(i-- && !uart8250_mem_can_tx_byte(base_port)) + udelay(1); + write8(base_port + UART_TBR, data); +} + +static void uart8250_mem_tx_flush(unsigned base_port) +{ + unsigned long int i = FIFO_TIMEOUT; + while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) + udelay(1); +} + +static int uart8250_mem_can_rx_byte(unsigned base_port) +{ + return read8(base_port + UART_LSR) & UART_LSR_DR; +} + +static unsigned char uart8250_mem_rx_byte(unsigned base_port) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while(i-- && !uart8250_mem_can_rx_byte(base_port)) + udelay(1); + if (i) + return read8(base_port + UART_RBR); + else + return 0x0; +} + +static void uart8250_mem_init(unsigned base_port, unsigned divisor) +{ + /* Disable interrupts */ + write8(base_port + UART_IER, 0x0); + /* Enable FIFOs */ + write8(base_port + UART_FCR, UART_FCR_FIFO_EN); + + /* Assert DTR and RTS so the other end is happy */ + write8(base_port + UART_MCR, UART_MCR_DTR | UART_MCR_RTS); + + /* DLAB on */ + write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS); + + write8(base_port + UART_DLL, divisor & 0xFF); + write8(base_port + UART_DLM, (divisor >> 8) & 0xFF); + + /* Set to 3 for 8N1 */ + write8(base_port + UART_LCR, CONFIG_TTYS0_LCS); +} + +void uart_init(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + + unsigned int div; + div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); + uart8250_mem_init(base, div); +} + +void uart_tx_byte(unsigned char data) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_byte(base, data); +} + +unsigned char uart_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0xff; + return uart8250_mem_rx_byte(base); +} + +int uart_can_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0; + return uart8250_mem_can_rx_byte(base); +} + +void uart_tx_flush(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_flush(base); +} diff --git a/src/drivers/uart/uart8250reg.h b/src/drivers/uart/uart8250reg.h new file mode 100644 index 0000000..cdfbb1b --- /dev/null +++ b/src/drivers/uart/uart8250reg.h @@ -0,0 +1,108 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef UART8250REG_H +#define UART8250REG_H + +/* Data */ +#define UART_RBR 0x00 +#define UART_TBR 0x00 + +/* Control */ +#define UART_IER 0x01 +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ + +#define UART_IIR 0x02 +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +#define UART_FCR 0x02 +#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ + +#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ + +#define UART_LCR 0x03 +#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define UART_LCR_PEN 0x08 /* Parity enable */ +#define UART_LCR_EPS 0x10 /* Even Parity Select */ +#define UART_LCR_STKP 0x20 /* Stick Parity */ +#define UART_LCR_SBRK 0x40 /* Set Break */ +#define UART_LCR_BKSE 0x80 /* Bank select enable */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ + +#define UART_MCR 0x04 +#define UART_MCR_DTR 0x01 /* DTR */ +#define UART_MCR_RTS 0x02 /* RTS */ +#define UART_MCR_OUT1 0x04 /* Out 1 */ +#define UART_MCR_OUT2 0x08 /* Out 2 */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ + +#define UART_MCR_DMA_EN 0x04 +#define UART_MCR_TX_DFR 0x08 + +#define UART_DLL 0x00 +#define UART_DLM 0x01 + +/* Status */ +#define UART_LSR 0x05 +#define UART_LSR_DR 0x01 /* Data ready */ +#define UART_LSR_OE 0x02 /* Overrun */ +#define UART_LSR_PE 0x04 /* Parity error */ +#define UART_LSR_FE 0x08 /* Framing error */ +#define UART_LSR_BI 0x10 /* Break */ +#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ +#define UART_LSR_TEMT 0x40 /* Xmitter empty */ +#define UART_LSR_ERR 0x80 /* Error */ + +#define UART_MSR 0x06 +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ + +#define UART_SCR 0x07 +#define UART_SPR 0x07 + +#endif /* UART8250REG_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h deleted file mode 100644 index c63153c..0000000 --- a/src/include/uart8250.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef UART8250_H -#define UART8250_H - -/* Data */ -#define UART_RBR 0x00 -#define UART_TBR 0x00 - -/* Control */ -#define UART_IER 0x01 -#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ -#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ -#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ -#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ - -#define UART_IIR 0x02 -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ - -#define UART_IIR_MSI 0x00 /* Modem status interrupt */ -#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ -#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ -#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ - -#define UART_FCR 0x02 -#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ -#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ - -#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ -#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ - -#define UART_LCR 0x03 -#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ -#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ -#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ -#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ -#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ -#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define UART_LCR_PEN 0x08 /* Parity enable */ -#define UART_LCR_EPS 0x10 /* Even Parity Select */ -#define UART_LCR_STKP 0x20 /* Stick Parity */ -#define UART_LCR_SBRK 0x40 /* Set Break */ -#define UART_LCR_BKSE 0x80 /* Bank select enable */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ - -#define UART_MCR 0x04 -#define UART_MCR_DTR 0x01 /* DTR */ -#define UART_MCR_RTS 0x02 /* RTS */ -#define UART_MCR_OUT1 0x04 /* Out 1 */ -#define UART_MCR_OUT2 0x08 /* Out 2 */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ - -#define UART_MCR_DMA_EN 0x04 -#define UART_MCR_TX_DFR 0x08 - -#define UART_DLL 0x00 -#define UART_DLM 0x01 - -/* Status */ -#define UART_LSR 0x05 -#define UART_LSR_DR 0x01 /* Data ready */ -#define UART_LSR_OE 0x02 /* Overrun */ -#define UART_LSR_PE 0x04 /* Parity error */ -#define UART_LSR_FE 0x08 /* Framing error */ -#define UART_LSR_BI 0x10 /* Break */ -#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ -#define UART_LSR_TEMT 0x40 /* Xmitter empty */ -#define UART_LSR_ERR 0x80 /* Error */ - -#define UART_MSR 0x06 -#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ -#define UART_MSR_RI 0x40 /* Ring Indicator */ -#define UART_MSR_DSR 0x20 /* Data Set Ready */ -#define UART_MSR_CTS 0x10 /* Clear to Send */ -#define UART_MSR_DDCD 0x08 /* Delta DCD */ -#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define UART_MSR_DDSR 0x02 /* Delta DSR */ -#define UART_MSR_DCTS 0x01 /* Delta CTS */ - -#define UART_SCR 0x07 -#define UART_SPR 0x07 - -#endif /* UART8250_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 5c37329..6641318 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -46,8 +46,6 @@ romstage-y += cbfs.c romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c #romstage-y += lzmadecode.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c -romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c ifeq ($(CONFIG_EARLY_CBMEM_INIT),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c @@ -87,8 +85,6 @@ ramstage-y += stack.c ramstage-$(CONFIG_ARCH_X86) += gcc.c ramstage-y += clog2.c romstage-y += clog2.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c ramstage-$(CONFIG_TRACE) += trace.c @@ -125,8 +121,6 @@ ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) smm-y += memmove.c endif smm-y += cbfs.c memcmp.c -smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c smm-y += gcc.c $(obj)/lib/version.ramstage.o : $(obj)/build.h diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c deleted file mode 100644 index 8e1714d..0000000 --- a/src/lib/uart8250.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * Copyright (C) 2006-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <console/uart.h> -#include <uart8250.h> -#include <trace.h> - -/* Should support 8250, 16450, 16550, 16550A type UARTs */ - -/* Nominal values only, good for the range of choices Kconfig offers for - * set of standard baudrates. - */ -#define BAUDRATE_REFCLK (115200) -#define BAUDRATE_OVERSAMPLE (1) - -/* Expected character delay at 1200bps is 9ms for a working UART - * and no flow-control. Assume UART as stuck if shift register - * or FIFO takes more than 50ms per character to appear empty. - * - * Estimated that inb() from UART takes 1 microsecond. - */ -#define SINGLE_CHAR_TIMEOUT (50 * 1000) -#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) - -static int uart8250_can_tx_byte(unsigned base_port) -{ - return inb(base_port + UART_LSR) & UART_LSR_THRE; -} - -static void uart8250_tx_byte(unsigned base_port, unsigned char data) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while (i-- && !uart8250_can_tx_byte(base_port)); - outb(data, base_port + UART_TBR); -} - -static void uart8250_tx_flush(unsigned base_port) -{ - unsigned long int i = FIFO_TIMEOUT; - while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); -} - -static int uart8250_can_rx_byte(unsigned base_port) -{ - return inb(base_port + UART_LSR) & UART_LSR_DR; -} - -static unsigned char uart8250_rx_byte(unsigned base_port) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while (i-- && !uart8250_can_rx_byte(base_port)); - - if (i) - return inb(base_port + UART_RBR); - else - return 0x0; -} - -static void uart8250_init(unsigned base_port, unsigned divisor) -{ - DISABLE_TRACE; - /* Disable interrupts */ - outb(0x0, base_port + UART_IER); - /* Enable FIFOs */ - outb(UART_FCR_FIFO_EN, base_port + UART_FCR); - - /* assert DTR and RTS so the other end is happy */ - outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR); - - /* DLAB on */ - outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR); - - /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ - outb(divisor & 0xFF, base_port + UART_DLL); - outb((divisor >> 8) & 0xFF, base_port + UART_DLM); - - /* Set to 3 for 8N1 */ - outb(CONFIG_TTYS0_LCS, base_port + UART_LCR); - ENABLE_TRACE; -} - -/* FIXME: Needs uart index from Kconfig. - * Already use array as a work-around for ROMCC. - */ -static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; - -void uart_init(void) -{ - unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, - BAUDRATE_OVERSAMPLE); - uart8250_init(bases[0], div); -} - -void uart_tx_byte(unsigned char data) -{ - uart8250_tx_byte(bases[0], data); -} - -unsigned char uart_rx_byte(void) -{ - return uart8250_rx_byte(bases[0]); -} - -int uart_can_rx_byte(void) -{ - return uart8250_can_rx_byte(bases[0]); -} - -void uart_tx_flush(void) -{ - uart8250_tx_flush(bases[0]); -} diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c deleted file mode 100644 index ce45de9..0000000 --- a/src/lib/uart8250mem.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * Copyright (C) 2006-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <console/uart.h> -#include <uart8250.h> -#include <device/device.h> -#include <delay.h> - -/* Should support 8250, 16450, 16550, 16550A type UARTs */ - -/* Expected character delay at 1200bps is 9ms for a working UART - * and no flow-control. Assume UART as stuck if shift register - * or FIFO takes more than 50ms per character to appear empty. - */ -#define SINGLE_CHAR_TIMEOUT (50 * 1000) -#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) - -static int uart8250_mem_can_tx_byte(unsigned base_port) -{ - return read8(base_port + UART_LSR) & UART_LSR_THRE; -} - -static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while(i-- && !uart8250_mem_can_tx_byte(base_port)) - udelay(1); - write8(base_port + UART_TBR, data); -} - -static void uart8250_mem_tx_flush(unsigned base_port) -{ - unsigned long int i = FIFO_TIMEOUT; - while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) - udelay(1); -} - -static int uart8250_mem_can_rx_byte(unsigned base_port) -{ - return read8(base_port + UART_LSR) & UART_LSR_DR; -} - -static unsigned char uart8250_mem_rx_byte(unsigned base_port) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while(i-- && !uart8250_mem_can_rx_byte(base_port)) - udelay(1); - if (i) - return read8(base_port + UART_RBR); - else - return 0x0; -} - -static void uart8250_mem_init(unsigned base_port, unsigned divisor) -{ - /* Disable interrupts */ - write8(base_port + UART_IER, 0x0); - /* Enable FIFOs */ - write8(base_port + UART_FCR, UART_FCR_FIFO_EN); - - /* Assert DTR and RTS so the other end is happy */ - write8(base_port + UART_MCR, UART_MCR_DTR | UART_MCR_RTS); - - /* DLAB on */ - write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS); - - write8(base_port + UART_DLL, divisor & 0xFF); - write8(base_port + UART_DLM, (divisor >> 8) & 0xFF); - - /* Set to 3 for 8N1 */ - write8(base_port + UART_LCR, CONFIG_TTYS0_LCS); -} - -void uart_init(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - - unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); - uart8250_mem_init(base, div); -} - -void uart_tx_byte(unsigned char data) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - uart8250_mem_tx_byte(base, data); -} - -unsigned char uart_rx_byte(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return 0xff; - return uart8250_mem_rx_byte(base); -} - -int uart_can_rx_byte(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return 0; - return uart8250_mem_can_rx_byte(base); -} - -void uart_tx_flush(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - uart8250_mem_tx_flush(base); -}

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coreboot-gerrit February 2014